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- Sun Apr 19, 2020 14:01:52: IAR Embedded Workbench 8.32.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll)
- Sun Apr 19, 2020 14:01:52: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32H7xx.dmac
- Sun Apr 19, 2020 14:01:52: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32H7xx_DBG.dmac
- Sun Apr 19, 2020 14:01:52: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32H7xx_OB.dmac
- Sun Apr 19, 2020 14:01:52: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32H7xx_TRACE.dmac
- Sun Apr 19, 2020 14:01:52: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32H7xxx.mac
- Sun Apr 19, 2020 14:01:52: Loading the I-jet/JTAGjet driver
- Sun Apr 19, 2020 14:01:52: Probe: Probe SW module ver 1.61
- Sun Apr 19, 2020 14:01:52: Probe: Option: trace(Auto,size_limit=25%)
- Sun Apr 19, 2020 14:01:52: Probe: Found I-jet, SN=83388
- Sun Apr 19, 2020 14:01:52: Probe: Opened connection to I-jet:83388
- Sun Apr 19, 2020 14:01:52: Probe: USB connection verified (11348 packets/sec)
- Sun Apr 19, 2020 14:01:52: Probe: I-jet, FW ver 4.2, HW Ver:A
- Sun Apr 19, 2020 14:01:52: Probe: IJET-ARM20 adapter detected
- Sun Apr 19, 2020 14:01:52: Probe: Versions: JTAG=1.83 SWO=1.39 A2D=1.70 Stream=1.49 SigCom=2.44
- Sun Apr 19, 2020 14:01:52: Emulation layer version 4.38
- Sun Apr 19, 2020 14:01:52: JTAG clock detected: 12MHz
- Sun Apr 19, 2020 14:01:52: Chain detected: 2 devices, total IR length 9.
- Sun Apr 19, 2020 14:01:52: BoardCfg=!5 Cortex
- Sun Apr 19, 2020 14:01:52: Notification to core-connect hookup.
- Sun Apr 19, 2020 14:01:52: Connecting to TAP#0 DAP AHB-AP port 0 (IDR=0x84770001).
- Sun Apr 19, 2020 14:01:52: Recognized CPUID=0x411fc271 Cortex-M7 r1p1 arch ARMv7-M
- Sun Apr 19, 2020 14:01:52: Set cacheable access on AHB-AP port 0 (HPROT=0xeb000000).
- Sun Apr 19, 2020 14:01:52: Debug resources: 8 instruction comparators, 4 data watchpoints.
- Sun Apr 19, 2020 14:01:52: MultiCore: Asynchronous core execution FORCED.
- Sun Apr 19, 2020 14:01:52: MultiCore: Synchronous core execution DISABLED.
- Sun Apr 19, 2020 14:01:52: LowLevelReset(script, delay 200)
- Sun Apr 19, 2020 14:01:52: Calling reset script: ConnectUnderReset
- Sun Apr 19, 2020 14:01:53: Notification to init-after-hw-reset hookup.
- Sun Apr 19, 2020 14:01:53: Connecting to TAP#0 DAP AHB-AP port 0 (IDR=0x84770001).
- Sun Apr 19, 2020 14:01:53: Recognized CPUID=0x411fc271 Cortex-M7 r1p1 arch ARMv7-M
- Sun Apr 19, 2020 14:01:53: Set cacheable access on AHB-AP port 0 (HPROT=0xeb000000).
- Sun Apr 19, 2020 14:01:53: Debug resources: 8 instruction comparators, 4 data watchpoints.
- Sun Apr 19, 2020 14:01:53: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32H7xxx_512kB.out
- Sun Apr 19, 2020 14:01:53: Target reset
- Sun Apr 19, 2020 14:01:54: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32H7xxx.mac
- Sun Apr 19, 2020 14:01:54: Downloaded C:\projects\mcu\version\STM32Cube_FW_H7_V1.3.0\Projects\STM32H743I_EVAL\Examples\GPIO\GPIO_EXTI\EWARM\STM32H743I_EVAL\Exe\STM32H743I_EVAL.out to flash memory.
- Sun Apr 19, 2020 14:01:54: 10480 bytes downloaded into FLASH (4.86 Kbytes/sec)
- Sun Apr 19, 2020 14:01:55: Loaded debugee: C:\projects\mcu\version\STM32Cube_FW_H7_V1.3.0\Projects\STM32H743I_EVAL\Examples\GPIO\GPIO_EXTI\EWARM\STM32H743I_EVAL\Exe\STM32H743I_EVAL.out
- Sun Apr 19, 2020 14:01:55: LowLevelReset(software, delay 200)
- Sun Apr 19, 2020 14:01:55: Calling reset script: SoftwareReset
- Sun Apr 19, 2020 14:01:55: LowLevelReset(script, delay 200)
- Sun Apr 19, 2020 14:01:55: Calling reset script: ConnectUnderReset
- Sun Apr 19, 2020 14:01:55: Notification to init-after-hw-reset hookup.
- Sun Apr 19, 2020 14:01:55: Connecting to TAP#0 DAP AHB-AP port 0 (IDR=0x84770001).
- Sun Apr 19, 2020 14:01:55: Recognized CPUID=0x411fc271 Cortex-M7 r1p1 arch ARMv7-M
- Sun Apr 19, 2020 14:01:55: Set cacheable access on AHB-AP port 0 (HPROT=0xeb000000).
- Sun Apr 19, 2020 14:01:55: Debug resources: 8 instruction comparators, 4 data watchpoints.
- Sun Apr 19, 2020 14:01:55: 10480 bytes verified (511.72 Kbytes/sec)
- Sun Apr 19, 2020 14:01:55: Download completed and verification successful.
- Sun Apr 19, 2020 14:01:55: LowLevelReset(software, delay 200)
- Sun Apr 19, 2020 14:01:55: Calling reset script: SoftwareReset
- Sun Apr 19, 2020 14:01:55: Target reset
- Sun Apr 19, 2020 14:01:55: INFO: Configuring trace using 'Auto,size_limit=25%,swoinit(baseswo=0xE00E_3002,baseitm=0xE000_0000),baseetm=0xE0041002,baseetb=0xE00F4002,basetpiu=0xE00F5002' setting ...
- Sun Apr 19, 2020 14:01:55: Trace: Using ETMv4 at address 0xe0041000
- Sun Apr 19, 2020 14:01:55: Trace: ETMv4 is already powered-up (TRCPDSR=0x1)
- Sun Apr 19, 2020 14:01:55: Trace: Using ETF at address 0xe00f4000, RAM size 0x400 words (4KB)
- Sun Apr 19, 2020 14:01:55: Trace: Configured as 'ETMv4 to ETB' (SW ver: Trace2=1.28 ETM=1.02 ETB=1.05 Deco=1.42)
- Sun Apr 19, 2020 14:01:55: Could not measure 'ITrgPwr' when ETM mode is active.
- Sun Apr 19, 2020 14:01:55: MultiCore: Synchronous core execution DISABLED.
- Sun Apr 19, 2020 14:01:55: There was 1 warning during the initialization of the debugging session.
- Sun Apr 19, 2020 14:01:55: Trace: DONE (nInstr=282, nStart=2)
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