diff --git a/examples/litedram_gen.py b/examples/litedram_gen.py
index 9450d39..a534041 100755
--- a/examples/litedram_gen.py
+++ b/examples/litedram_gen.py
@@ -82,6 +82,11 @@ def get_csr_ios(aw, dw):
         ),
     ]

+def get_irq_ios(num_irqs):
+    return [
+        ("irq_lines", 0, Pins(num_irqs)),
+    ]
+
 def get_native_user_port_ios(_id, aw, dw):
     return [
         ("user_port", _id,
@@ -259,6 +264,16 @@ class LiteDRAMCore(SoCSDRAM):
                 _csr_port_io.dat_r.eq(csr_port.dat_r),
             ]

+        # interrupt lines
+        num_irqs = len(self.soc_interrupt_map)
+        platform.add_extension(get_irq_ios(num_irqs))
+        _irq_lines = platform.request("irq_lines")
+        for _name, _id in sorted(self.soc_interrupt_map.items()):
+            if hasattr(self, _name):
+                module = getattr(self, _name)
+                assert hasattr(module, 'ev'), "Submodule %s does not have EventManager (xx.ev) module" % _name
+                self.comb += _irq_lines[_id].eq(module.ev.irq)
+
         # user port
         self.comb += [
             platform.request("user_clk").eq(ClockSignal()),