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IAR Debug Log Working Example

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Sep 20th, 2017
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  1. Wed Sep 20, 2017 14:32:17: IAR Embedded Workbench 8.10.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll)
  2. Wed Sep 20, 2017 14:32:17: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\debugger\TexasInstruments\CC26xx.dmac
  3. Wed Sep 20, 2017 14:32:17: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\TexasInstruments\FlashCC26xx.mac
  4. Wed Sep 20, 2017 14:32:17: JLINK command: ProjectFile = Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\settings\i2c_simpletest_Debug.jlink, return = 0
  5. Wed Sep 20, 2017 14:32:17: Device "CC2650F128" selected.
  6. Wed Sep 20, 2017 14:32:17: DLL version: V6.14b, compiled Mar 9 2017 08:46:04
  7. Wed Sep 20, 2017 14:32:17: Firmware: J-Link V10 compiled May 22 2017 18:29:43
  8. Wed Sep 20, 2017 14:32:17: JTAG speed is initially set to: 1000 kHz
  9. Wed Sep 20, 2017 14:32:17: Performing HIB
  10. Wed Sep 20, 2017 14:32:17: TotalIRLen = 10, IRPrint = 0x0011
  11. Wed Sep 20, 2017 14:32:17: AP-IDR: 0x24770011, Type: AHB-AP
  12. Wed Sep 20, 2017 14:32:17: AHB-AP ROM: 0xE00FF000 (Base addr. of first ROM table)
  13. Wed Sep 20, 2017 14:32:17: Found Cortex-M3 r2p1, Little endian.
  14. Wed Sep 20, 2017 14:32:17: FPUnit: 6 code (BP) slots and 2 literal slots
  15. Wed Sep 20, 2017 14:32:17: CoreSight components:
  16. Wed Sep 20, 2017 14:32:17: ROMTbl 0 @ E00FF000
  17. Wed Sep 20, 2017 14:32:17: ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB000 SCS
  18. Wed Sep 20, 2017 14:32:17: ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT
  19. Wed Sep 20, 2017 14:32:17: ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB
  20. Wed Sep 20, 2017 14:32:17: ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM
  21. Wed Sep 20, 2017 14:32:17: ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 003BB923 TPIU-Lite
  22. Wed Sep 20, 2017 14:32:18: Hardware reset with strategy 0 was performed
  23. Wed Sep 20, 2017 14:32:18: Initial reset was performed
  24. Wed Sep 20, 2017 14:32:18: Found 2 JTAG devices, Total IRLen = 10:
  25. Wed Sep 20, 2017 14:32:18: #0 Id: 0x4BA00477, IRLen: 4, IRPrint: 0x1 CoreSight JTAG-DP
  26. Wed Sep 20, 2017 14:32:18: #1 Id: 0x8B99A02F, IRLen: 6, IRPrint: 0x1 TI ICEPick
  27. Wed Sep 20, 2017 14:32:18: 1056 bytes downloaded (16.37 Kbytes/sec)
  28. Wed Sep 20, 2017 14:32:18: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\TexasInstruments\FlashCC26xxRAM20.out
  29. Wed Sep 20, 2017 14:32:18: Target reset
  30. Wed Sep 20, 2017 14:32:19: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\TexasInstruments\FlashCC26xx.mac
  31. Wed Sep 20, 2017 14:32:19: Downloaded Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\Debug\Exe\i2c_simpletest.out to flash memory.
  32. Wed Sep 20, 2017 14:32:19: Hardware reset with strategy 0 was performed
  33. Wed Sep 20, 2017 14:32:19: 17055 bytes downloaded into FLASH (12.71 Kbytes/sec)
  34. Wed Sep 20, 2017 14:32:19: Loaded debugee: Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\Debug\Exe\i2c_simpletest.out
  35. Wed Sep 20, 2017 14:32:20: Hardware reset with strategy 0 was performed
  36. Wed Sep 20, 2017 14:32:20: Target reset
  37. Wed Sep 20, 2017 14:32:39: IAR Embedded Workbench 8.10.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll)
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