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c4 bootlog

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Oct 26th, 2020
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  1. why@machine:~$ picocom -b 115200 /dev/ttyUSB0
  2. picocom v3.1
  3.  
  4. port is : /dev/ttyUSB0
  5. flowcontrol : none
  6. baudrate is : 115200
  7. parity is : none
  8. databits are : 8
  9. stopbits are : 1
  10. escape is : C-a
  11. local echo is : no
  12. noinit is : no
  13. noreset is : no
  14. hangup is : no
  15. nolock is : no
  16. send_cmd is : sz -vv
  17. receive_cmd is : rz -vv -E
  18. imap is :
  19. omap is :
  20. emap is : crcrlf,delbs,
  21. logfile is : none
  22. initstring : none
  23. exit_after is : not set
  24. exit is : no
  25.  
  26. Type [C-a] [C-h] to see available commands
  27. Terminal ready
  28. SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0;
  29. bl2_stage_init 0x01
  30. bl2_stage_init 0x81
  31. hw id: 0x0000 - pwm id 0x01
  32. bl2_stage_init 0xc1
  33. bl2_stage_init 0x02
  34.  
  35. no sdio debug board detected
  36. L0:00000000
  37. L1:00000703
  38. L2:00008067
  39. L3:15000020
  40. S1:00000000
  41. B2:20282000
  42. B1:a0f83180
  43.  
  44. TE: 269625
  45.  
  46. BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz
  47.  
  48. Board ID = 1
  49. Set cpu clk to 24M
  50. Set clk81 to 24M
  51. Use GP1_pll as DSU clk.
  52. DSU clk: 1200 Mhz
  53. CPU clk: 1200 MHz
  54. Set clk81 to 166.6M
  55. DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37
  56. board id: 1
  57. Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
  58. fw parse done
  59. Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
  60. Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
  61. PIEI prepare done
  62. fastboot data load
  63. fastboot data verify
  64. verify result: 255
  65. Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  66. DDR4 probe
  67. ddr clk to 1320MHz
  68. Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
  69.  
  70. dmc_version 0001
  71. Check phy result
  72. INFO : End of initialization
  73. INFO : End of read enable training
  74. INFO : End of fine write leveling
  75. INFO : End of read dq deskew training
  76. INFO : End of MPR read delay center optimization
  77. INFO : End of Write leveling coarse delay
  78. INFO : End of write delay center optimization
  79. INFO : End of read delay center optimization
  80. INFO : End of max read latency training
  81. INFO : Training has run successfully!
  82. 1D training succeed
  83. Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0
  84. Check phy result
  85. INFO : End of initialization
  86. INFO : End of 2D read delay Voltage center optimization
  87. INFO : End of 2D write delay Voltage center optimization
  88. INFO : Training has run successfully!
  89.  
  90. R0_RxClkDly_Margin==94 ps 8
  91. R0_TxDqDly_Margi==118 ps 10
  92.  
  93.  
  94. R1_RxClkDly_Margin==0 ps 0
  95. R1_TxDqDly_Margi==0 ps 0
  96.  
  97. dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001
  98.  
  99. soc_vref_reg_value 0x 0000004f 0000004f 0000004e 0000004f 00000050 0000004f 0000004e 0000004f 0000004e 0000004e 0000004e 0000004d 0000004e 0000004d 00000051 00000051 0000004e 0000004d 0000004e 0000004d 0000004c 0000004c 0000004e 0000004e 0000004e 0000004e 0000004f 0000004c 0000004e 0000004e 0000004e 0000004c dram_vref_reg_value 0x 00000020
  100. 2D training succeed
  101. aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43
  102. auto size-- 65535DDR cs0 size: 2048MB
  103. DDR cs1 size: 2048MB
  104. DMC_DDR_CTRL: 00700024DDR size: 3928MB
  105. cs0 DataBus test pass
  106. cs1 DataBus test pass
  107. cs0 AddrBus test pass
  108. cs1 AddrBus test pass
  109.  
  110. non-sec scramble use zero key
  111. ddr scramble enabled
  112.  
  113. 100bdlr_step_size ps== 445
  114. result report
  115. boot times 0Enable ddr reg access
  116. Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
  117. Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x00090000, part: 0
  118. bl2z: ptr: 05129330, size: 00001e40
  119. 0.0;M3 CHK:0;cm4_sp_mode 0
  120. MVN_1=0x00000000
  121. MVN_2=0x00000000
  122. [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz]
  123. OPS=0x10
  124. ring efuse init
  125. 2b 0c 10 00 01 17 2a 00 00 09 36 30 43 57 50 50
  126. [0.017354 Inits done]
  127. secure task start!
  128. high task start!
  129. low task start!
  130. run into bl31
  131. NOTICE: BL31: v1.3(release):4fc40b1
  132. NOTICE: BL31: Built : 15:57:33, May 22 2019
  133. NOTICE: BL31: G12A normal boot!
  134. NOTICE: BL31: BL33 decompress pass
  135. ERROR: Error initializing runtime service opteed_fast
  136.  
  137.  
  138. U-Boot 2020.04-armbian (Sep 01 2020 - 20:09:38 +0200) odroid-c4
  139.  
  140. Model: Hardkernel ODROID-C4
  141. SoC: Amlogic Meson SM1 (Unknown) Revision 2b:c (10:2)
  142. DRAM: 3.8 GiB
  143. MMC: sd@ffe05000: 0, mmc@ffe07000: 1
  144. In: serial
  145. Out: serial
  146. Err: serial
  147. Net:
  148. Warning: ethernet@ff3f0000 (eth0) using random MAC address - 26:f9:8e:e7:54:cf
  149. eth0: ethernet@ff3f0000
  150. Hit any key to stop autoboot: 0
  151. switch to partitions #0, OK
  152. mmc0 is current device
  153. Scanning mmc 0:1...
  154. Found U-Boot script /boot/boot.scr
  155. 3196 bytes read in 6 ms (519.5 KiB/s)
  156. ## Executing script at 08000000
  157. 138 bytes read in 3 ms (44.9 KiB/s)
  158. 15824217 bytes read in 1400 ms (10.8 MiB/s)
  159. 24576512 bytes read in 2171 ms (10.8 MiB/s)
  160. 72432 bytes read in 15 ms (4.6 MiB/s)
  161. 232 bytes read in 7 ms (32.2 KiB/s)
  162. Applying kernel provided DT fixup script (meson-fixup.scr)
  163. ## Executing script at 34000000
  164. ## Loading init Ramdisk from Legacy Image at 13000000 ...
  165. Image Name: uInitrd
  166. Image Type: AArch64 Linux RAMDisk Image (gzip compressed)
  167. Data Size: 15824153 Bytes = 15.1 MiB
  168. Load Address: 00000000
  169. Entry Point: 00000000
  170. Verifying Checksum ... OK
  171. ## Flattened Device Tree blob at 08008000
  172. Booting using the fdt blob at 0x8008000
  173. Loading Ramdisk to f0032000, end f0f49519 ... OK
  174. Loading Device Tree to 00000000effb7000, end 00000000f0031fff ... OK
  175.  
  176. Starting kernel ...
  177.  
  178.  
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