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- *** MCA Error Report ***
- CPU Machine Check Architecture Error Dump (CPU: Intel(R) Core(TM) i5-6267U CPU @ 2.90GHz, CPUID: 0x406E3)
- Core: 0
- IA32_MC3_STATUS=0xFE00000000800400
- IA32_MC3_CTL=0x0
- IA32_MC3_ADDR=0xFFFFF8056D3F72D8
- IA32_MC3_MISC=0xFFFFF8056D3F72D8
- Core: 0
- IA32_MC4_STATUS=0xFE00000000800400
- IA32_MC4_CTL=0x0
- IA32_MC4_ADDR=0xFFFFF8056D3F1363
- IA32_MC4_MISC=0xFFFFF8056D3F1363
- Core: 1
- IA32_MC3_STATUS=0xFE00000000800400
- IA32_MC3_CTL=0x1F
- IA32_MC3_ADDR=0xFFFFF8056D3F72D8
- IA32_MC3_MISC=0xFFFFF8056D3F72D8
- Core: 2 3
- IA32_MC3_STATUS=0xFE00000000800400
- IA32_MC3_CTL=0x1F
- IA32_MC3_ADDR=0xFFFFF8056D3F1363
- IA32_MC3_MISC=0xFFFFF8056D3F1363
- *** Device Tree ***
- {
- "pcie_cfg_base" : "0xe0000000",
- "pci_devices" :
- {
- "0x0" : "MCHC@0",
- "0x10000" : "IGPU@2",
- "0xa0000" : "XHC1@14",
- "0xc8000" : "URT2@19",
- "0xb0000" : "IMEI@16",
- "0xe0000" : "RP01@1C",
- "0xe4000" : "RP05@1C,4",
- "0xe8000" : "RP09@1D",
- "0xeb000" : "RP12@1D,3",
- "0x100000" : "RP01@1C/IOPP/SSD0@0",
- "0xf0000" : "URT0@1E",
- "0xf1000" : "URT1@1E,1",
- "0xf3000" : "SPI1@1E,3",
- "0x200000" : "RP12@1D,3/IOPP/ARPT@0",
- "0xf8000" : "LPCB@1F",
- "0xfa000" : "PMCR@1F,2",
- "0xfb000" : "HDEF@1F,3",
- "0xfc000" : "SBUS@1F,4",
- "0x8200000" : "RP05@1C,4/IOPP/UPSB@0",
- "0x300000" : "RP09@1D/IOPP/UPSB@0",
- "0x8300000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB0@0",
- "0x8308000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB1@1",
- "0x400000" : "RP09@1D/IOPP/UPSB@0/IOPP/DSB0@0",
- "0x408000" : "RP09@1D/IOPP/UPSB@0/IOPP/DSB1@1",
- "0x8310000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB2@2",
- "0x8320000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB4@4",
- "0x410000" : "RP09@1D/IOPP/UPSB@0/IOPP/DSB2@2",
- "0x420000" : "RP09@1D/IOPP/UPSB@0/IOPP/DSB4@4",
- "0x8400000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB2@2/IOPP/XHC2@0",
- "0x8500000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB0@0/IOPP/NHI0@0",
- "0x500000" : "RP09@1D/IOPP/UPSB@0/IOPP/DSB2@2/IOPP/XHC3@0",
- "0x600000" : "RP09@1D/IOPP/UPSB@0/IOPP/DSB0@0/IOPP/NHI0@0"
- },
- "device_mmio" :
- {
- "PCI0@0" :
- [
- { "a" : "0xcf8", "s" : "0x8" }
- ],
- "PCI0@0/AppleACPIPCI/IGPU@2" :
- [
- { "a" : "0x7f90000000", "s" : "0x1000000" },
- { "a" : "0x7f80000000", "s" : "0x10000000" }
- ],
- "PCI0@0/AppleACPIPCI/XHC1@14" :
- [
- { "a" : "0x7f91010000", "s" : "0x10000" }
- ],
- "PCI0@0/AppleACPIPCI/IMEI@16" :
- [
- { "a" : "0x7f91028000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/URT2@19" :
- [
- { "a" : "0x7f91027000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/RP01@1C/IOPP/SSD0@0" :
- [
- { "a" : "0x82500000", "s" : "0x4000" }
- ],
- "PCI0@0/AppleACPIPCI/RP05@1C,4/IOPP/UPSB@0/IOPP/DSB0@0/IOPP/NHI0@0" :
- [
- { "a" : "0x82800000", "s" : "0x40000" },
- { "a" : "0x82840000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/RP05@1C,4/IOPP/UPSB@0/IOPP/DSB2@2/IOPP/XHC2@0" :
- [
- { "a" : "0x82700000", "s" : "0x10000" }
- ],
- "PCI0@0/AppleACPIPCI/RP09@1D/IOPP/UPSB@0/IOPP/DSB0@0/IOPP/NHI0@0" :
- [
- { "a" : "0xaab00000", "s" : "0x40000" },
- { "a" : "0xaab40000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/RP09@1D/IOPP/UPSB@0/IOPP/DSB2@2/IOPP/XHC3@0" :
- [
- { "a" : "0xaaa00000", "s" : "0x10000" }
- ],
- "PCI0@0/AppleACPIPCI/RP12@1D,3/IOPP/ARPT@0" :
- [
- { "a" : "0x82400000", "s" : "0x8000" },
- { "a" : "0x82000000", "s" : "0x400000" }
- ],
- "PCI0@0/AppleACPIPCI/URT0@1E" :
- [
- { "a" : "0x7f91026000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/URT1@1E,1" :
- [
- { "a" : "0x7f91025000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/SPI1@1E,3" :
- [
- { "a" : "0x7f91024000", "s" : "0x1000" }
- ],
- "PCI0@0/AppleACPIPCI/PMCR@1F,2" :
- [
- { "a" : "0x82624000", "s" : "0x4000" }
- ],
- "PCI0@0/AppleACPIPCI/HDEF@1F,3" :
- [
- { "a" : "0x7f91020000", "s" : "0x4000" },
- { "a" : "0x7f91000000", "s" : "0x10000" }
- ],
- "PCI0@0/AppleACPIPCI/SBUS@1F,4" :
- [
- { "a" : "0x7f91029000", "s" : "0x100" }
- ],
- "DMAC" :
- [
- { "a" : "0x0", "s" : "0x20" },
- { "a" : "0x81", "s" : "0x11" },
- { "a" : "0x93", "s" : "0xd" },
- { "a" : "0xc0", "s" : "0x20" }
- ],
- "FWHD" :
- [
- { "a" : "0xff000000", "s" : "0x1000000" }
- ],
- "IPIC" :
- [
- { "a" : "0x20", "s" : "0x2" },
- { "a" : "0x24", "s" : "0x2" },
- { "a" : "0x28", "s" : "0x2" },
- { "a" : "0x2c", "s" : "0x2" },
- { "a" : "0x30", "s" : "0x2" },
- { "a" : "0x34", "s" : "0x2" },
- { "a" : "0x38", "s" : "0x2" },
- { "a" : "0x3c", "s" : "0x2" },
- { "a" : "0xa0", "s" : "0x2" },
- { "a" : "0xa4", "s" : "0x2" },
- { "a" : "0xa8", "s" : "0x2" },
- { "a" : "0xac", "s" : "0x2" },
- { "a" : "0xb0", "s" : "0x2" },
- { "a" : "0xb4", "s" : "0x2" },
- { "a" : "0xb8", "s" : "0x2" },
- { "a" : "0xbc", "s" : "0x2" },
- { "a" : "0x4d0", "s" : "0x2" }
- ],
- "MATH" :
- [
- { "a" : "0xf0", "s" : "0x1" }
- ],
- "LDRC" :
- [
- { "a" : "0x2e", "s" : "0x2" },
- { "a" : "0x4e", "s" : "0x2" },
- { "a" : "0x61", "s" : "0x1" },
- { "a" : "0x63", "s" : "0x1" },
- { "a" : "0x65", "s" : "0x1" },
- { "a" : "0x67", "s" : "0x1" },
- { "a" : "0x80", "s" : "0x1" },
- { "a" : "0x92", "s" : "0x1" },
- { "a" : "0xb2", "s" : "0x2" },
- { "a" : "0xffff", "s" : "0x1" },
- { "a" : "0x1800", "s" : "0xff" },
- { "a" : "0x800", "s" : "0x80" }
- ],
- "RTC" :
- [
- { "a" : "0x70", "s" : "0x8" }
- ],
- "TIMR" :
- [
- { "a" : "0x40", "s" : "0x4" },
- { "a" : "0x50", "s" : "0x4" }
- ],
- "SMC" :
- [
- { "a" : "0x300", "s" : "0x20" },
- { "a" : "0xfef00000", "s" : "0x10000" }
- ],
- "EC" :
- [
- { "a" : "0x62", "s" : "0x1" },
- { "a" : "0x66", "s" : "0x1" }
- ],
- "PDRC" :
- [
- { "a" : "0xfed10000", "s" : "0x8000" },
- { "a" : "0xfed18000", "s" : "0x1000" },
- { "a" : "0xfed19000", "s" : "0x1000" },
- { "a" : "0xe0000000", "s" : "0x10000000" },
- { "a" : "0xfed20000", "s" : "0x20000" },
- { "a" : "0xfed90000", "s" : "0x4000" },
- { "a" : "0xfed45000", "s" : "0x4b000" },
- { "a" : "0xff000000", "s" : "0x1000000" },
- { "a" : "0xfee00000", "s" : "0x100000" },
- { "a" : "0xfd000000", "s" : "0x1000000" },
- { "a" : "0xfe000000", "s" : "0x10000" },
- { "a" : "0xfe010000", "s" : "0x1000" },
- { "a" : "0xfe020000", "s" : "0x16000" },
- { "a" : "0xfe036000", "s" : "0x6000" },
- { "a" : "0xfe03c000", "s" : "0x1000" },
- { "a" : "0xfe03d000", "s" : "0x83000" },
- { "a" : "0xfe0c0000", "s" : "0x40000" },
- { "a" : "0xfe100000", "s" : "0x100000" },
- { "a" : "0xfe200000", "s" : "0x200000" },
- { "a" : "0xfe400000", "s" : "0x10000" },
- { "a" : "0xfe410000", "s" : "0x1f0000" },
- { "a" : "0xfe600000", "s" : "0x200000" }
- ],
- "MEM2" :
- [
- { "a" : "0x20000000", "s" : "0x200000" },
- { "a" : "0x40000000", "s" : "0x200000" }
- ]
- }
- }
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