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  5. NASA/TP-2019-220319
  6.  
  7.  
  8. Quantum Supremacy Using a Programmable
  9. Superconducting Processor
  10.  
  11.  
  12. Eleanor G. Rieffel
  13.  
  14.  
  15. NASA Ames Research Center
  16.  
  17.  
  18. August 2019
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  20. https://ntrs.nasa.gov/search.jsp?R=20190030475 2019-09-13T07:55:30+00:00Z
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  130.  
  131.  
  132. Quantum Supremacy Using a Programmable
  133. Superconducting Processor
  134.  
  135.  
  136.  
  137. Eleanor G. Rieffel
  138.  
  139.  
  140. NASA Ames Research Center
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  154. Ames Research Center
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  160. August 2019
  161.  
  162. Acknowledgments
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  211. or http://ntrs.nasa.gov
  212.  
  213. Quantum supremacy using a programmable superconducting processor
  214. Google AI Quantum and collaboratorsy
  215. The tantalizing promise of quantum computers is that certain computational tasks might be
  216. executed exponentially faster on a quantum processor than on a classical processor. A fundamen-
  217. tal challenge is to build a high- delity processor capable of running quantum algorithms in an
  218. exponentially large computational space. Here, we report using a processor with programmable
  219. superconducting qubits to create quantum states on 53 qubits, occupying a state space 253 ˘1016.
  220. Measurements from repeated experiments sample the corresponding probability distribution, which
  221. we verify using classical simulations. While our processor takes about 200 seconds to sample one
  222. instance of the quantum circuit 1 million times, a state-of-the-art supercomputer would require
  223. approximately 10,000 years to perform the equivalent task. This dramatic speedup relative to all
  224. known classical algorithms provides an experimental realization of quantum supremacy on a com-
  225. putational task and heralds the advent of a much-anticipated computing paradigm.
  226. In the early 1980s, Richard Feynman proposed that a
  227. quantum computer would be an e ective tool to solve
  228. problems in physics and chemistry, as it is exponentially
  229. costly to simulate large quantum systems with classical
  230. computers [1]. Realizing Feynman’s vision poses signi -
  231. cant experimental and theoretical challenges. First, can
  232. a quantum system be engineered to perform a computa-
  233. tion in a large enough computational (Hilbert) space and
  234. with low enough errors to provide a quantum speedup?
  235. Second, can we formulate a problem that is hard for a
  236. classical computer but easy for a quantum computer? By
  237. computing a novel benchmark task on our superconduct-
  238. ing qubit processor[2{7], we tackle both questions. Our
  239. experiment marks a milestone towards full scale quantum
  240. computing: quantum supremacy[8].
  241. In reaching this milestone, we show that quantum
  242. speedup is achievable in a real-world system and is
  243. not precluded by any hidden physical laws. Quantum
  244. supremacy also heralds the era of Noisy Intermediate-
  245. Scale Quantum (NISQ) technologies. The benchmark
  246. task we demonstrate has an immediate application in
  247. generating certi able random numbers[9]; other initial
  248. uses for this new computational capability may include
  249. optimization optimization [10{12], machine learning[13{
  250. 15], materials science and chemistry [16{18]. However,
  251. realizing the full promise of quantum computing (e.g.
  252. Shor’s algorithm for factoring) still requires technical
  253. leaps to engineer fault-tolerant logical qubits[19{23].
  254. To achieve quantum supremacy, we made a number of
  255. technical advances which also pave the way towards er-
  256. ror correction. We developed fast, high- delity gates that
  257. can be executed simultaneously across a two-dimensional
  258. qubit array. We calibrated and benchmarked the pro-
  259. cessor at both the component and system level using a
  260. powerful new tool: cross-entropy benchmarking (XEB).
  261. Finally, we used component-level delities to accurately
  262. predict the performance of the whole system, further
  263. showing that quantum information behaves as expected
  264. when scaling to large systems.
  265. A COMPUTATIONAL TASK TO
  266. DEMONSTRATE QUANTUM SUPREMACY
  267. To demonstrate quantum supremacy, we compare our
  268. quantum processor against state-of-the-art classical com-
  269. puters in the task of sampling the output of a pseudo-
  270. random quantum circuit[24{26]. Random circuits are a
  271. suitable choice for benchmarking since they do not pos-
  272. sess structure and therefore allow for limited guarantees
  273. of computational hardness[24, 25, 27, 28]. We design the
  274. circuits to entangle a set of quantum bits (qubits) by re-
  275. peated application of single-qubit and two-qubit logical
  276. operations. Sampling the quantum circuit’s output pro-
  277. duces a set of bitstrings, e.g. f0000101, 1011100, ...g.
  278. Due to quantum interference, the probability distribution
  279. of the bitstrings resembles a speckled intensity pattern
  280. produced by light interference in laser scatter, such that
  281. some bitstrings are much more likely to occur than oth-
  282. ers. Classically computing this probability distribution
  283. becomes exponentially more dicult as the number of
  284. qubits (width) and number of gate cycles (depth) grows.
  285. We verify that the quantum processor is working prop-
  286. erly using a method called cross-entropy benchmarking
  287. (XEB) [24, 26], which compares how often each bitstring
  288. is observed experimentally with its corresponding ideal
  289. probability computed via simulation on a classical com-
  290. puter. For a given circuit, we collect the measured bit-
  291. strings fx
  292. igand compute the linear XEB delity [24{
  293. 26, 29], which is the mean of the simulated probabilities
  294. of the bitstrings we measured:
  295. F
  296. XEB = 2
  297. nhP(x
  298. i)i
  299. i 1 (1)
  300. where nis the number of qubits, P(x
  301. i) is the probability
  302. of bitstring x
  303. i computed for the ideal quantum circuit,
  304. and the average is over the observed bitstrings. Intu-
  305. itively, F
  306. XEB is correlated with how often we sample high
  307. probability bitstrings. When there are no errors in the
  308. quantum circuit, sampling the probability distribution
  309. will produce F
  310. XEB = 1. On the other hand, sampling
  311. from the uniform distribution will give hP(x
  312. i)i
  313. i = 1=2n
  314. and produce F
  315. XEB = 0. Values of F
  316. XEB between 0 and
  317. 2
  318. Qubit Adjustable coupler
  319. a
  320. b
  321. 10 millimeters
  322. FIG. 1. The Sycamore processor. a, Layout of processor
  323. showing a rectangular array of 54 qubits (gray), each con-
  324. nected to its four nearest neighbors with couplers (blue). In-
  325. operable qubit is outlined. b, Optical image of the Sycamore
  326. chip.
  327. 1 correspond to the probability that no error has oc-
  328. curred while running the circuit. The probabilities P(x
  329. i)
  330. must be obtained from classically simulating the quan-
  331. tum circuit, and thus computing F
  332. XEB is intractable in
  333. the regime of quantum supremacy. However, with certain
  334. circuit simpli cations, we can obtain quantitative delity
  335. estimates of a fully operating processor running wide and
  336. deep quantum circuits.
  337. Our goal is to achieve a high enough F
  338. XEB for a circuit
  339. with sucient width and depth such that the classical
  340. computing cost is prohibitively large. This is a dicult
  341. task because our logic gates are imperfect and the quan-
  342. tum states we intend to create are sensitive to errors. A
  343. single bit or phase
  344. ip over the course of the algorithm
  345. will completely shue the speckle pattern and result in
  346. close to 0 delity [24, 29]. Therefore, in order to claim
  347. quantum supremacy we need a quantum processor that
  348. executes the program with suciently low error rates.
  349. BUILDING AND CHARACTERIZING A
  350. HIGH-FIDELITY PROCESSOR
  351. We designed a quantum processor named \Sycamore"
  352. which consists of a two-dimensional array of 54 trans-
  353. mon qubits, where each qubit is tunably coupled to four
  354. nearest-neighbors, in a rectangular lattice. The connec-
  355. tivity was chosen to be forward compatible with error-
  356. correction using the surface code [20]. A key systems-
  357. engineering advance of this device is achieving high-
  358. delity single- and two-qubit operations, not just in iso-
  359. lation but also while performing a realistic computation
  360. with simultaneous gate operations on many qubits. We
  361. discuss the highlights below; extended details can be
  362. found in the supplementary information.
  363. In a superconducting circuit, conduction electrons con-
  364. dense into a macroscopic quantum state, such that cur-
  365. rents and voltages behave quantum mechanically [2, 30].
  366. Our processor uses transmon qubits [6], which can be
  367. thought of as nonlinear superconducting resonators at 5
  368. to 7 GHz. The qubit is encoded as the two lowest quan-
  369. tum eigenstates of the resonant circuit. Each transmon
  370. has two controls: a microwave drive to excite the qubit,
  371. and a magnetic
  372. ux control to tune the frequency. Each
  373. qubit is connected to a linear resonator used to read out
  374. the qubit state [5]. As shown in Fig. 1, each qubit is
  375. also connected to its neighboring qubits using a new ad-
  376. justable coupler [31, 32]. Our coupler design allows us to
  377. quickly tune the qubit-qubit coupling from completely
  378. o to 40 MHz. Since one qubit did not function properly
  379. the device uses 53 qubits and 86 couplers.
  380. The processor is fabricated using aluminum for metal-
  381. ization and Josephson junctions, and indium for bump-
  382. bonds between two silicon wafers. The chip is wire-
  383. bonded to a superconducting circuit board and cooled
  384. to below 20 mK in a dilution refrigerator to reduce am-
  385. bient thermal energy to well below the qubit energy.
  386. The processor is connected through lters and attenu-
  387. ators to room-temperature electronics, which synthesize
  388. the control signals. The state of all qubits can be read
  389. simultaneously by using a frequency-multiplexing tech-
  390. nique[33, 34]. We use two stages of cryogenic ampli ers
  391. to boost the signal, which is digitized (8 bits at 1 GS/s)
  392. and demultiplexed digitally at room temperature. In to-
  393. tal, we orchestrate 277 digital-to-analog converters (14
  394. bits at 1 GS/s) for complete control of the quantum pro-
  395. cessor.
  396. We execute single-qubit gates by driving 25 ns mi-
  397. crowave pulses resonant with the qubit frequency while
  398. the qubit-qubit coupling is turned o . The pulses
  399. are shaped to minimize transitions to higher transmon
  400. states[35]. Gate performance varies strongly with fre-
  401. quency due to two-level-system (TLS) defects[36, 37],
  402. stray microwave modes, coupling to control lines and
  403. the readout resonator, residual stray coupling between
  404. qubits,
  405. ux noise, and pulse distortions. We therefore
  406. 3
  407. Pauli and measurement errors
  408. CDF am, E ted histogr Integra e
  409. 1
  410. e
  411. 2 e
  412. 2c e
  413. r
  414. a
  415. b
  416. Average error
  417. Single-qubit (e 1
  418. )
  419. Two-qubit (e 2
  420. )
  421. Two-qubit, cycle (e 2c )
  422. Readout (e r
  423. )
  424. Isolated
  425. 0.15%
  426. 0.36%
  427. 0.65%
  428. 3.1%
  429. Simultaneous
  430. 0.16%
  431. 0.62%
  432. 0.93%
  433. 3.8%
  434. Simultaneous
  435. Pauli error
  436. e
  437. 1
  438. , e 2
  439. 10 -2
  440. 10 -3
  441. Isolated
  442. FIG. 2. System-wide Pauli and measurement errors. a,
  443. Integrated histogram (empirical cumulative distribution func-
  444. tion, ECDF) of Pauli errors (black, green, blue) and readout
  445. errors (orange), measured on qubits in isolation (dotted lines)
  446. and when operating all qubits simultaneously (solid). The
  447. median of each distribution occurs at 0.50 on the vertical
  448. axis. Average (mean) values are shown below. b, Heatmap
  449. showing single- and two-qubit Pauli errors e
  450. 1 (crosses) and e
  451. 2
  452. (bars) positioned in the layout of the processor. Values shown
  453. for all qubits operating simultaneously.
  454. optimize the single-qubit operation frequencies to miti-
  455. gate these error mechanisms.
  456. We benchmark single-qubit gate performance by using
  457. the XEB protocol described above, reduced to the single-
  458. qubit level (n= 1), to measure the probability of an error
  459. occurring during a single-qubit gate. On each qubit, we
  460. apply a variable number mof randomly selected gates
  461. and measure F
  462. XEB averaged over many sequences; as m
  463. increases, errors accumulate and average F
  464. XEB decays.
  465. We model this decay by [1 e
  466. 1=(1 1=D2)]m where e
  467. 1 is
  468. the Pauli error probability. The state (Hilbert) space di-
  469. mension term, D= 2n = 2, corrects for the depolarizing
  470. model where states with errors partially overlap with the
  471. ideal state. This procedure is similar to the more typical
  472. technique of randomized benchmarking [21, 38, 39], but
  473. supports non-Cli ord gatesets [40] and can separate out
  474. decoherence error from coherent control error. We then
  475. repeat the experiment with all qubits executing single-
  476. qubit gates simultaneously (Fig.2), which shows only a
  477. small increase in the error probabilities, demonstrating
  478. that our device has low microwave crosstalk.
  479. We perform two-qubit iSWAP-like entangling gates by
  480. bringing neighboring qubits on resonance and turning on
  481. a 20 MHz coupling for 12 ns, which allows the qubits to
  482. swap excitations. During this time, the qubits also ex-
  483. perience a controlled-phase (CZ) interaction, which orig-
  484. inates from the higher levels of the transmon. The two-
  485. qubit gate frequency trajectories of each pair of qubits are
  486. optimized to mitigate the same error mechanisms consid-
  487. ered in optimizing single-qubit operation frequencies.
  488. To characterize and benchmark the two-qubit gates,
  489. we run two-qubit circuits with mcycles, where each cy-
  490. cle contains a randomly chosen single-qubit gate on each
  491. of the two qubits followed by a xed two-qubit gate. We
  492. learn the parameters of the two-qubit unitary (e.g. the
  493. amount of iSWAP and CZ interaction) by using F
  494. XEB
  495. as a cost function. After this optimization, we extract
  496. the per-cycle error e
  497. 2c from the decay of F
  498. XEB with m,
  499. and isolate the two-qubit error e
  500. 2 by subtracting the two
  501. single-qubit errors e
  502. 1. We nd an average e
  503. 2 of 0:36%.
  504. Additionally, we repeat the same procedure while simul-
  505. taneously running two-qubit circuits for the entire array.
  506. After updating the unitary parameters to account for ef-
  507. fects such as dispersive shifts and crosstalk, we nd an
  508. average e
  509. 2 of 0.62%.
  510. For the full experiment, we generate quantum circuits
  511. using the two-qubit unitaries measured for each pair dur-
  512. ing simultaneous operation, rather than a standard gate
  513. for all pairs. The typical two-qubit gate is a full iSWAP
  514. with 1=6 of a full CZ. In principle, our architecture could
  515. generate unitaries with arbitrary iSWAP and CZ inter-
  516. actions, but reliably generating a target unitary remains
  517. an active area of research.
  518. Finally, we benchmark qubit readout using standard
  519. dispersive measurement [41]. Measurement errors aver-
  520. aged over the 0 and 1 states are shown in Fig 2a. We have
  521. also measured the error when operating all qubits simul-
  522. taneously, by randomly preparing each qubit in the 0 or
  523. 1 state and then measuring all qubits for the probability
  524. of the correct result. We nd that simultaneous readout
  525. incurs only a modest increase in per-qubit measurement
  526. errors.
  527. Having found the error rates of the individual gates and
  528. readout, we can model the delity of a quantum circuit
  529. as the product of the probabilities of error-free opera-
  530. 4
  531. single-qubit gate:
  532. 25 ns
  533. qubit
  534. XY control
  535. two-qubit gate:
  536. 12 ns
  537. qubit 1
  538. Z control
  539. qubit 2
  540. Z control
  541. coupler
  542. cycle: 1 2 3 4 5 6 m
  543. time
  544. column
  545. row
  546. 7 8
  547. A BC D
  548. A
  549. B
  550. D
  551. C
  552. a b
  553. FIG. 3. Control operations for the quantum supremacy circuits. a, Example quantum circuit instance used in our
  554. experiment. Every cycle includes a layer each of single- and two-qubit gates. The single-qubit gates are chosen randomly from
  555. f
  556. p
  557. X;
  558. p
  559. Y;
  560. p
  561. Wg. The sequence of two-qubit gates are chosen according to a tiling pattern, coupling each qubit sequentially to
  562. its four nearest-neighbor qubits. The couplers are divided into four subsets (ABCD), each of which is executed simultaneously
  563. across the entire array corresponding to shaded colors. Here we show an intractable sequence (repeat ABCDCDAB); we also
  564. use di erent coupler subsets along with a simpli able sequence (repeat EFGHEFGH, not shown) that can be simulated on a
  565. classical computer. b, Waveform of control signals for single- and two-qubit gates.
  566. tion of all gates and measurements. Our largest random
  567. quantum circuits have 53 qubits, 1113 single-qubit gates,
  568. 430 two-qubit gates, and a measurement on each qubit,
  569. for which we predict a total delity of 0:2%. This delity
  570. should be resolvable with a few million measurements,
  571. since the uncertainty on F
  572. XEB is 1=
  573. p
  574. N
  575. s, where N
  576. s is the
  577. number of samples. Our model assumes that entangling
  578. larger and larger systems does not introduce additional
  579. error sources beyond the errors we measure at the single-
  580. and two-qubit level | in the next section we will see how
  581. well this hypothesis holds.
  582. FIDELITY ESTIMATION IN THE SUPREMACY
  583. REGIME
  584. The gate sequence for our pseudo-random quantum
  585. circuit generation is shown in Fig.3. One cycle of the
  586. algorithm consists of applying single-qubit gates chosen
  587. randomly from f
  588. p
  589. X;
  590. p
  591. Y;
  592. p
  593. Wgon all qubits, followed
  594. by two-qubit gates on pairs of qubits. The sequences of
  595. gates which form the \supremacy circuits" are designed
  596. to minimize the circuit depth required to create a highly
  597. entangled state, which ensures computational complexity
  598. and classical hardness.
  599. While we cannot compute F
  600. XEB in the supremacy
  601. regime, we can estimate it using three variations to re-
  602. duce the complexity of the circuits. In \patch circuits",
  603. we remove a slice of two-qubit gates (a small fraction
  604. of the total number of two-qubit gates), splitting the cir-
  605. cuit into two spatially isolated, non-interacting patches of
  606. qubits. We then compute the total delity as the product
  607. of the patch delities, each of which can be easily calcu-
  608. lated. In \elided circuits", we remove only a fraction of
  609. the initial two-qubit gates along the slice, allowing for
  610. entanglement between patches, which more closely mim-
  611. ics the full experiment while still maintaining simulation
  612. feasibility. Finally, we can also run full \veri cation cir-
  613. cuits" with the same gate counts as our supremacy cir-
  614. cuits, but with a di erent pattern for the sequence of two-
  615. qubit gates which is much easier to simulate classically
  616. [29]. Comparison between these variations allows track-
  617. ing of the system delity as we approach the supremacy
  618. regime.
  619. We rst check that the patch and elided versions of the
  620. veri cation circuits produce the same delity as the full
  621. veri cation circuits up to 53 qubits, as shown in Fig.4a.
  622. For each data point, we typically collect N
  623. s = 5 106
  624. total samples over ten circuit instances, where instances
  625. di er only in the choices of single-qubit gates in each
  626. cycle. We also show predicted F
  627. XEB values computed
  628. by multiplying the no-error probabilities of single- and
  629. two-qubit gates and measurement [29]. Patch, elided,
  630. and predicted delities all show good agreement with
  631. the delities of the corresponding full circuits, despite
  632. the vast di erences in computational complexity and en-
  633. tanglement. This gives us con dence that elided circuits
  634. can be used to accurately estimate the delity of more
  635. complex circuits.
  636. We proceed now to benchmark our most computa-
  637. tionally dicult circuits. In Fig.4b, we show the mea-
  638. sured F
  639. XEB for 53-qubit patch and elided versions of the
  640. full supremacy circuits with increasing depth. For the
  641. largest circuit with 53 qubits and 20 cycles, we collected
  642. N
  643. s = 30 106 samples over 10 circuit instances, obtaining
  644. F
  645. XEB = (2:24 0:21) 10 3 for the elided circuits. With
  646. 5˙con dence, we assert that the average delity of run-
  647. ning these circuits on the quantum processor is greater
  648. than at least 0.1%. The full data for Fig.4b should have
  649. similar delities, but are only archived since the simula-
  650. tion times (red numbers) take too long. It is thus in the
  651. quantum supremacy regime.
  652. 5
  653. number of qubits, n number of cycles, m
  654. n = 53 qubits
  655. a Classically veriable b Supremacy regime
  656. idelity, XEB F
  657.  
  658. XEB
  659. m = 14 cycles
  660. Prediction from gate and measurement errors
  661. Full circuit Elided circuit Patch circuit
  662. Prediction
  663. Patch
  664. E F G H A B C D C D A B
  665. Elided (±5 error bars)
  666. 10 millennia
  667. 100 years
  668. 600 years
  669. 4 years
  670. 4 years
  671. 2 weeks
  672. 1 week
  673. 2 hour sC la ic mp ng @ Sycamore
  674. 5 hours
  675. Classical verication
  676. Sycamore sampling (N s
  677. = 1M): 200 seconds
  678. 10 15 20 25 30 35 40 45 50 55 12 14 16 18 20
  679. 10 -3
  680. 10 -2
  681. 10 -1
  682. 10 0
  683. FIG. 4. Demonstrating quantum supremacy. a, Veri cation of benchmarking methods. F
  684. XEB values for patch, elided,
  685. and full veri cation circuits are calculated from measured bitstrings and the corresponding probabilities predicted by classical
  686. simulation. Here, the two-qubit gates are applied in a simpli able tiling and sequence such that the full circuits can be simulated
  687. out to n= 53;m= 14 in a reasonable amount of time. Each data point is an average over 10 distinct quantum circuit instances
  688. that di er in their single-qubit gates (for n= 39;42;43 only 2 instances were simulated). For each n, each instance is sampled
  689. with N
  690. s between 0:5M and 2:5M. The black line shows predicted F
  691. XEB based on single- and two-qubit gate and measurement
  692. errors. The close correspondence between all four curves, despite their vast di erences in complexity, justi es the use of elided
  693. circuits to estimate delity in the supremacy regime. b, Estimating F
  694. XEB in the quantum supremacy regime. Here, the
  695. two-qubit gates are applied in a non-simpli able tiling and sequence for which it is much harder to simulate. For the largest
  696. elided data (n= 53, m= 20, total N
  697. s = 30M), we nd an average F
  698. XEB >0.1% with 5˙con dence, where ˙includes both
  699. systematic and statistical uncertainties. The corresponding full circuit data, not simulated but archived, is expected to show
  700. similarly signi cant delity. For m= 20, obtaining 1M samples on the quantum processor takes 200 seconds, while an equal
  701. delity classical sampling would take 10,000 years on 1M cores, and verifying the delity would take millions of years.
  702. DETERMINING THE CLASSICAL
  703. COMPUTATIONAL COST
  704. We simulate the quantum circuits used in the exper-
  705. iment on classical computers for two purposes: verify-
  706. ing our quantum processor and benchmarking methods
  707. by computing F
  708. XEB where possible using simpli able
  709. circuits (Fig.4a), and estimating F
  710. XEB as well as the
  711. classical cost of sampling our hardest circuits (Fig.4b).
  712. Up to 43 qubits, we use a Schrodinger algorithm (SA)
  713. which simulates the evolution of the full quantum state;
  714. the Julich supercomputer(100k cores, 250TB) runs the
  715. largest cases. Above this size, there is not enough RAM
  716. to store the quantum state [42]. For larger qubit num-
  717. bers, we use a hybrid Schrodinger-Feynman algorithm
  718. (SFA)[43] running on Google data centers to compute
  719. the amplitudes of individual bitstrings. This algorithm
  720. breaks the circuit up into two patches of qubits and e-
  721. ciently simulates each patch using a Schrodinger method,
  722. before connecting them using an approach reminiscent of
  723. the Feynman path-integral. While it is more memory-
  724. ecient, SFA becomes exponentially more computation-
  725. ally expensive with increasing circuit depth due to the
  726. exponential growth of paths with the number of gates
  727. connecting the patches.
  728. To estimate the classical computational cost of the
  729. supremacy circuits (gray numbers, Fig.4b), we ran por-
  730. tions of the quantum circuit simulation on both the Sum-
  731. mit supercomputer as well as on Google clusters and ex-
  732. trapolated to the full cost. In this extrapolation, we
  733. account for the computational cost scaling with F
  734. XEB,
  735. e.g. the 0.1% delity decreases the cost by 1000[43, 44].
  736. On the Summit supercomputer, which is currently the
  737. most powerful in the world, we used a method inspired
  738. by Feynman path-integrals that is most ecient at low
  739. depth[44{47]. At m= 20 the tensors do not reasonably
  740. t in node memory, so we can only measure runtimes
  741. up to m= 14, for which we estimate that sampling 3M
  742. bitstrings with 1% delity would require 1 year.
  743. 6
  744. On Google Cloud servers, we estimate that perform-
  745. ing the same task for m= 20 with 0:1% delity using
  746. the SFA algorithm would cost 50 trillion core-hours and
  747. consume 1 petawatt hour of energy. To put this in per-
  748. spective, it took 600 seconds to sample the circuit on
  749. the quantum processor 3 million times, where sampling
  750. time is limited by control hardware communications; in
  751. fact, the net quantum processor time is only about 30
  752. seconds. The bitstring samples from this largest circuit
  753. are archived online.
  754. One may wonder to what extent algorithmic innova-
  755. tion can enhance classical simulations. Our assumption,
  756. based on insights from complexity theory, is that the cost
  757. of this algorithmic task is exponential in nas well as m.
  758. Indeed, simulation methods have improved steadily over
  759. the past few years[42{50]. We expect that lower simula-
  760. tion costs than reported here will eventually be achieved,
  761. but we also expect they will be consistently outpaced by
  762. hardware improvements on larger quantum processors.
  763. VERIFYING THE DIGITAL ERROR MODEL
  764. A key assumption underlying the theory of quantum
  765. error correction is that quantum state errors may be con-
  766. sidered digitized and localized [38, 51]. Under such a dig-
  767. ital model, all errors in the evolving quantum state may
  768. be characterized by a set of localized Pauli errors (bit-
  769. and/or phase-
  770. ips) interspersed into the circuit. Since
  771. continuous amplitudes are fundamental to quantum me-
  772. chanics, it needs to be tested whether errors in a quantum
  773. system could be treated as discrete and probabilistic. In-
  774. deed, our experimental observations support the validity
  775. of this model for our processor. Our system delity is
  776. well predicted by a simple model in which the individ-
  777. ually characterized delities of each gate are multiplied
  778. together (Fig 4).
  779. To be successfully described by a digitized error model,
  780. a system should be low in correlated errors. We achieve
  781. this in our experiment by choosing circuits that ran-
  782. domize and decorrelate errors, by optimizing control to
  783. minimize systematic errors and leakage, and by design-
  784. ing gates that operate much faster than correlated noise
  785. sources, such as 1=f
  786. ux noise [37]. Demonstrating a pre-
  787. dictive uncorrelated error model up to a Hilbert space of
  788. size 253 shows that we can build a system where quantum
  789. resources, such as entanglement, are not prohibitively
  790. fragile.
  791. WHAT DOES THE FUTURE HOLD?
  792. Quantum processors based on superconducting qubits
  793. can now perform computations in a Hilbert space of di-
  794. mension 253 ˇ9 1015, beyond the reach of the fastest
  795. classical supercomputers available today. To our knowl-
  796. edge, this experiment marks the rst computation that
  797. can only be performed on a quantum processor. Quan-
  798. tum processors have thus reached the regime of quantum
  799. supremacy. We expect their computational power will
  800. continue to grow at a double exponential rate: the clas-
  801. sical cost of simulating a quantum circuit increases expo-
  802. nentially with computational volume, and hardware im-
  803. provements will likely follow a quantum-processor equiv-
  804. alent of Moore’s law [52, 53], doubling this computational
  805. volume every few years. To sustain the double exponen-
  806. tial growth rate and to eventually o er the computational
  807. volume needed to run well-known quantum algorithms,
  808. such as the Shor or Grover algorithms [19, 54], the engi-
  809. neering of quantum error correction will have to become
  810. a focus of attention.
  811. The \Extended Church-Turing Thesis" formulated by
  812. Bernstein and Vazirani [55] asserts that any \reasonable"
  813. model of computation can be eciently simulated by a
  814. Turing machine. Our experiment suggests that a model
  815. of computation may now be available that violates this
  816. assertion. We have performed random quantum circuit
  817. sampling in polynomial time with a physically realized
  818. quantum processor (with suciently low error rates), yet
  819. no ecient method is known to exist for classical comput-
  820. ing machinery. As a result of these developments, quan-
  821. tum computing is transitioning from a research topic to a
  822. technology that unlocks new computational capabilities.
  823. We are only one creative algorithm away from valuable
  824. near-term applications.
  825. Acknowledgments We are grateful to Eric Schmidt,
  826. Sergey Brin, Je Dean, and Jay Yagnik for their executive
  827. sponsorship of the Google AI Quantum team, and for their
  828. continued engagement and support. We thank Peter Norvig
  829. for reviewing a draft of the manuscript, and Sergey Knysh
  830. for useful discussions. We thank Kevin Kissel, Joey Raso,
  831. Davinci Yonge-Mallo, Orion Martin, and Niranjan Sridhar
  832. for their help with simulations. We thank Gina Bortoli and
  833. Lily Laws for keeping our team organized. This research used
  834. resources from the Oak Ridge Leadership Computing Facility,
  835. which is a DOE Oce of Science User Facility supported un-
  836. der Contract DE-AC05-00OR22725. A portion of this work
  837. was performed in the UCSB Nanofabrication Facility, an open
  838. access laboratory.
  839. Author contributions The Google AI Quantum team
  840. conceived of the experiment. The applications and algorithms
  841. team provided the theoretical foundation and the speci cs of
  842. the algorithm. The hardware team carried out the experiment
  843. and collected the data. The data analysis was done jointly
  844. with outside collaborators. All authors wrote and revised the
  845. manuscript and supplement.
  846. Competing Interests The authors declare that they have
  847. no competing nancial interests.
  848. Correspondence and requests for materials should
  849. be addressed to John M. Martinis (jmartinis@google.com).
  850. 7
  851. y Frank Arute1, Kunal Arya1, Ryan Babbush1, Dave
  852. Bacon 1, Joseph C. Bardin ;2, Rami Barends , Ru-
  853. pak Biswas3, Sergio Boixo1, Fernando G.S.L. Brandao1;4,
  854. David Buell 1, Brian Burkett , Yu Chen , Zijun Chen1,
  855. Ben Chiaro5, Roberto Collins 1, William Courtney , An-
  856. drew Dunsworth 1, Edward Farhi , Brooks Foxen5, Austin
  857. Fowler 1, Craig Gidney , Marissa Giustina1, Rob Gra , Keith
  858. Guerin 1, Steve Habegger , Matthew P. Harrigan , Michael J.
  859. Hartmann 1;6, Alan Ho , Markus Ho mann , Trent Huang1,
  860. Travis S. Humble7, Sergei V. Isakov 1, Evan Je rey , Zhang
  861. Jiang 1, Dvir Kafri , Kostyantyn Kechedzhi , Julian Kelly ,
  862. Paul V. Klimov 1, Alexander Korotkov , Fedor Kostritsa1,
  863. David Landhuis 1, Mike Lindmark , Erik Lucero1, Dmitry
  864. Lyakh7, Salvatore Mandra3, Jarrod R. McClean1, Matt
  865. McEwen5,Anthony Megrant 1, Xiao Mi ,Kristel Michielsen8,
  866. Masoud Mohseni 1, Josh Mutus , Ofer Naaman , Matthew
  867. Neeley 1, Charles Neill , Murphy Yuezhen Niu , Eric Ostby1,
  868. Andre Petukhov 1, John C. Platt , Chris Quintana , Eleanor
  869. G. Rie el3, Pedram Roushan 1, Nicholas Rubin , Daniel
  870. Sank 1, Kevin J. Satzinger , Vadim Smelyanskiy , Kevin
  871. Sung 1, Matthew D. Trevithick , Amit Vainsencher , Ben-
  872. jamin Villalonga 1;9, Theodore White , Jamie Yao , Ping
  873. Yeh 1, Adam Zalcman , Hartmut Neven1, John M. Martinis ;5
  874. 1. Google Research, Mountain View, CA 94043, USA, 2.
  875. Department of Electrical and Computer Engineering, Uni-
  876. versity of Massachusetts Amherst, Amherst, MA, USA, 3.
  877. Quantum Arti cial Intelligence Lab. (QuAIL), NASA Ames
  878. Research Center, Mo ett Field, USA, 4. Institute for
  879. Quantum Information and Matter, Caltech, Pasadena, CA,
  880. USA, 5. Department of Physics, University of California,
  881. Santa Barbara, CA, USA, 6. Friedrich-Alexander University
  882. Erlangen-Nurn berg (FAU), Department of Physics, Erlangen,
  883. Germany, 7. Quantum Computing Institute, Oak Ridge Na-
  884. tional Laboratory, Oak Ridge, TN, USA, 8. Institute for
  885. Advanced Simulation, Julic h Supercomputing Centre, Julic h,
  886. Germany, 9. Department of Physics, University of Illinois
  887. at Urbana-Champaign, Urbana, IL, USA
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  1052. Title   BEFORE YOU CONTINUE
  1053. Author  n.l.heimerl
  1054. Created Date    9/4/2019 11:05:03 AM
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