module latch_FDDP_FDDN(
    input [0:1] SW,
    output [0:2] LEDR);

    D_latch latch1(SW[0],SW[1],LEDR[0]);
    FDD_posedge flipFlopPosedge(SW[0],SW[1],LEDR[1]);
    FDD_negedge flipFlopNegedge(SW[0],SW[1],LEDR[2]);

endmodule

module FDD_posedge(
    input D, Clk,
    output reg Q);

    always@(posedge Clk)
        Q<=D;

endmodule

module FDD_negedge(
    input D, Clk,
    output reg Q);

    always@(negedge Clk)
        Q<=D;

endmodule

module D_latch(
    input D, Clk,
    output reg Q);

    always@(D,Clk)
        if(Clk)
            Q=D;

endmodule