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- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
- Okt 01 15:09:26 cubieboard1 kernel: ------------[ cut here ]------------
- Okt 01 15:09:26 cubieboard1 kernel: WARNING: CPU: 0 PID: 432 at drivers/media/common/videobuf2/videobuf2-v4l2.c:161 vb2_warn_zero_bytesused.part.3+0x38/0x68 [videobuf2_v4l2]
- Okt 01 15:09:26 cubieboard1 kernel: Modules linked in: evdev sun4i_codec axp20x_battery axp20x_ac_power snd_soc_core axp20x_adc axp20x_pek lima snd_pcm_dmaengine gpu_sched snd_pcm ttm snd_timer sun4i_ts nvmem_sunxi_sid snd soundcore sunxi_wdt sunxi_cedrus(C) sun4i_drm_hdmi sun4i_ss des_generic v4l2_mem2mem videobuf2_dma_contig cec videobuf2_memops videobuf2_v4l2 videobuf2_common spi_sun4i cpufreq_dt leds_gpio ip_tables x_tables autofs4 ext4 crc32c_generic crc16 mbcache jbd2 fscrypto axp20x_usb_power industrialio pinctrl_axp209 axp20x_regulator ahci_sunxi libahci_platform libahci sunxi phy_generic libata i2c_mv64xxx musb_hdrc ohci_platform ohci_hcd udc_core ehci_platform ehci_hcd scsi_mod usbcore sunxi_mmc phy_sun4i_usb sun4i_emac
- Okt 01 15:09:26 cubieboard1 kernel: CPU: 0 PID: 432 Comm: v4l2-request-te Tainted: G C 4.19.0-rc4-armmp+ #21
- Okt 01 15:09:26 cubieboard1 kernel: Hardware name: Allwinner sun4i/sun5i Families
- Okt 01 15:09:26 cubieboard1 kernel: [<c01152d4>] (unwind_backtrace) from [<c010e8a4>] (show_stack+0x20/0x24)
- Okt 01 15:09:26 cubieboard1 kernel: [<c010e8a4>] (show_stack) from [<c08c7974>] (dump_stack+0x90/0xa4)
- Okt 01 15:09:26 cubieboard1 kernel: [<c08c7974>] (dump_stack) from [<c0143d38>] (__warn+0x104/0x11c)
- Okt 01 15:09:26 cubieboard1 kernel: [<c0143d38>] (__warn) from [<c0143e88>] (warn_slowpath_null+0x50/0x58)
- Okt 01 15:09:26 cubieboard1 kernel: [<c0143e88>] (warn_slowpath_null) from [<bf415148>] (vb2_warn_zero_bytesused.part.3+0x38/0x68 [videobuf2_v4l2])
- Okt 01 15:09:26 cubieboard1 kernel: [<bf415148>] (vb2_warn_zero_bytesused.part.3 [videobuf2_v4l2]) from [<bf415844>] (vb2_queue_or_prepare_buf.part.4+0x6cc/0x82c [videobuf2_v4l2])
- Okt 01 15:09:26 cubieboard1 kernel: [<bf415844>] (vb2_queue_or_prepare_buf.part.4 [videobuf2_v4l2]) from [<bf415a58>] (vb2_qbuf+0xb4/0x130 [videobuf2_v4l2])
- Okt 01 15:09:26 cubieboard1 kernel: [<bf415a58>] (vb2_qbuf [videobuf2_v4l2]) from [<bf4439d8>] (v4l2_m2m_qbuf+0x88/0xdc [v4l2_mem2mem])
- Okt 01 15:09:26 cubieboard1 kernel: [<bf4439d8>] (v4l2_m2m_qbuf [v4l2_mem2mem]) from [<bf443a4c>] (v4l2_m2m_ioctl_qbuf+0x20/0x24 [v4l2_mem2mem])
- Okt 01 15:09:26 cubieboard1 kernel: [<bf443a4c>] (v4l2_m2m_ioctl_qbuf [v4l2_mem2mem]) from [<c06e8c1c>] (v4l_qbuf+0x4c/0x50)
- Okt 01 15:09:26 cubieboard1 kernel: [<c06e8c1c>] (v4l_qbuf) from [<c06e7768>] (__video_do_ioctl+0x2d4/0x530)
- Okt 01 15:09:26 cubieboard1 kernel: [<c06e7768>] (__video_do_ioctl) from [<c06eb4ac>] (video_usercopy+0x2ac/0x6a0)
- Okt 01 15:09:26 cubieboard1 kernel: [<c06eb4ac>] (video_usercopy) from [<c06eb8c0>] (video_ioctl2+0x20/0x24)
- Okt 01 15:09:26 cubieboard1 kernel: [<c06eb8c0>] (video_ioctl2) from [<c06e3088>] (v4l2_ioctl+0x4c/0x60)
- Okt 01 15:09:26 cubieboard1 kernel: [<c06e3088>] (v4l2_ioctl) from [<c032f4b0>] (do_vfs_ioctl+0xc0/0x930)
- Okt 01 15:09:26 cubieboard1 kernel: [<c032f4b0>] (do_vfs_ioctl) from [<c032fd9c>] (ksys_ioctl+0x7c/0x8c)
- Okt 01 15:09:26 cubieboard1 kernel: [<c032fd9c>] (ksys_ioctl) from [<c032fdc4>] (sys_ioctl+0x18/0x1c)
- Okt 01 15:09:26 cubieboard1 kernel: [<c032fdc4>] (sys_ioctl) from [<c0101000>] (ret_fast_syscall+0x0/0x54)
- Okt 01 15:09:26 cubieboard1 kernel: Exception stack(0xc9d43fa8 to 0xc9d43ff0)
- Okt 01 15:09:26 cubieboard1 kernel: 3fa0: bec5ec60 00000001 00000003 c044560f bec5ecb4 bec5ecb4
- Okt 01 15:09:26 cubieboard1 kernel: 3fc0: bec5ec60 00000001 00000000 00000036 00426000 bec5eca0 00426000 00000000
- Okt 01 15:09:26 cubieboard1 kernel: 3fe0: 00426064 bec5ec5c 00410b49 b6eb9158
- Okt 01 15:09:26 cubieboard1 kernel: ---[ end trace d1360a1803f1a61d ]---
- Okt 01 15:09:26 cubieboard1 kernel: use of bytesused == 0 is deprecated and will be removed in the future,
- Okt 01 15:09:26 cubieboard1 kernel: use the actual size instead.
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 21a8d622)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 896fbb17)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 6f09baad)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 48fc4887)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 9523748f)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page c226e9d7)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 39fbf361)
- Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 730c91d8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: alloc_contig_range: [4ab00, 4ac00) PFNs busy
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): memory range at 730c91d8 is busy, retrying
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 730c91d8)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 896fbb17)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 6f09baad)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 48fc4887)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 9523748f)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page c226e9d7)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 39fbf361)
- Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 21a8d622)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: alloc_contig_range: [4ab00, 4ac00) PFNs busy
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): memory range at 730c91d8 is busy, retrying
- Okt 01 15:12:16 cubieboard1 kernel: alloc_contig_range: [4ac00, 4ad00) PFNs busy
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): memory range at 21a8d622 is busy, retrying
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 730c91d8)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 21a8d622)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 896fbb17)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 6f09baad)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 48fc4887)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 9523748f)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page c226e9d7)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 39fbf361)
- Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
- Okt 01 15:17:01 cubieboard1 CRON[464]: pam_unix(cron:session): session opened for user root by (uid=0)
- Okt 01 15:17:01 cubieboard1 CRON[465]: (root) CMD ( cd / && run-parts --report /etc/cron.hourly)
- Okt 01 15:17:01 cubieboard1 CRON[464]: pam_unix(cron:session): session closed for user root
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_stub_open]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_release] open_count = 1
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe200, open_count = 1
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (3)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (4)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (6)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_crtc_enable_vblank] Enabling VBLANK on crtc fd85b8b1
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_tcon_enable_vblank] Enabling VBLANK interrupt
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (1)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_stub_open]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_SET_VERSION
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_release] open_count = 1
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe200, open_count = 1
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 66 (1)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 66 (2)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (3)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (4)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (6)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 66 (1)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_stub_open]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 1
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open]
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe201, auth=1, DRM_IOCTL_SET_VERSION
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe201, auth=1, DRM_IOCTL_GET_UNIQUE
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe201, auth=1, DRM_IOCTL_GET_UNIQUE
- Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_release] open_count = 1
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe201, open_count = 1
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_lastclose]
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_stub_open]
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 0
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_open]
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
- Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_SET_CLIENT_CAP
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_SET_CLIENT_CAP
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETCONNECTOR
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:63:HDMI-A-1]
- Okt 01 15:18:20 cubieboard1 kernel: [drm:sun4i_hdmi_get_modes [sun4i_drm_hdmi]] Monitor is an HDMI monitor
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] non_desktop set to 0
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 30.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 36.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: Assigning HDMI sink color depth as 12 bpc.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does YCRCB444 in deep color.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (1)
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_edid_modes] ELD monitor MStar Demo
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_edid_modes] HDMI: latency present 0 0, video latency 160 1, audio latency 6 65
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_edid_modes] ELD size 36, SAD count 2
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] non_desktop set to 0
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 30.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 36.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: Assigning HDMI sink color depth as 12 bpc.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does YCRCB444 in deep color.
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 75:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x15
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 99:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 106:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 107:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 111:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x48 0x1c005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 112:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x48 0x4005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 116:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 117:"1280x720" 0 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 118:"1280x720" 0 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 119:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 120:"1280x720" 0 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 121:"1280x720" 0 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 0 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 124:"1920x1080" 0 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 125:"640x480" 0 25175 640 656 752 800 480 490 492 525 0x40 0x400a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 126:"640x480" 0 25175 640 656 752 800 480 490 492 525 0x40 0x1c00a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 127:"640x480" 0 25175 640 656 752 800 480 490 492 525 0x40 0x2000a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 128:"720x480" 0 27000 720 736 798 858 480 489 495 525 0x40 0x400a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 129:"720x480" 0 27000 720 736 798 858 480 489 495 525 0x40 0x1c00a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 130:"720x480" 0 27000 720 736 798 858 480 489 495 525 0x40 0x2000a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 133:"1280x720" 0 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 134:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x4015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 135:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x1c015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 137:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x501a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 138:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x1d01a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 139:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x2101a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 140:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 141:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 143:"720x576" 0 27000 720 732 796 864 576 581 586 625 0x40 0x400a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 144:"720x576" 0 27000 720 732 796 864 576 581 586 625 0x40 0x1c00a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 145:"720x576" 0 27000 720 732 796 864 576 581 586 625 0x40 0x2000a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 149:"1280x720" 0 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x20005
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 152:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x4015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 154:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x1c015
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 156:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x501a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 157:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x1d01a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 158:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x2101a
- Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 159:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 160:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 161:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 164:"1920x1080" 0 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 165:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 166:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 167:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 173:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 183:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 187:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 188:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 189:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 193:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 194:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 195:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0x400a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 196:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0x1c00a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 197:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0x2000a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 198:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0x400a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 199:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0x1c00a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 200:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0x2000a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 203:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 204:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x4015
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 205:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x1c015
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 207:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x501a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 208:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x1d01a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 209:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x2101a
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 210:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 211:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 212:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 215:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 216:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 217:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 218:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:63:HDMI-A-1] probed modes :
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 65:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x48 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 174:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 101:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 103:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 102:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 82:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 87:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 148:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 69:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 85:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 72:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 84:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 150:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 153:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 67:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 79:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 151:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 76:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETCONNECTOR
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETENCODER
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETCRTC
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANERESOURCES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANERESOURCES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4ac00000, size = 622592
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:71]
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4ad00000, size = 622592
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:73]
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4ae00000, size = 622592
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:74]
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4af00000, size = 622592
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:75]
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4b000000, size = 622592
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:77]
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4b100000, size = 622592
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:81]
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (5)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (6)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (5)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
- Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_release] open_count = 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe200, open_count = 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Disabling layer 1
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_lastclose]
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (3)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (4)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (6)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
- Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
- Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
- Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
- Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
- Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
- Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (1)
- Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
- Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 21a8d622)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 896fbb17)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 6f09baad)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 48fc4887)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 9523748f)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page c226e9d7)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 39fbf361)
- Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 730c91d8)
- Okt 01 15:18:32 cubieboard1 kernel: [drm:vblank_disable_fn] disabling vblank on crtc 0
- Okt 01 15:18:32 cubieboard1 kernel: [drm:sun4i_crtc_disable_vblank] Disabling VBLANK on crtc fd85b8b1
- Okt 01 15:18:32 cubieboard1 kernel: [drm:sun4i_tcon_enable_vblank] Disabling VBLANK interrupt
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