Advertisement
Guest User

Untitled

a guest
Oct 1st, 2018
152
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 193.07 KB | None | 0 0
  1. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  2. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
  3. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  4. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
  5. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  6. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
  7. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  8. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
  9. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  10. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
  11. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  12. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
  13. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  14. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
  15. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  16. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
  17. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  18. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
  19. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  20. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
  21. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  22. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
  23. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  24. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
  25. Okt 01 15:09:26 cubieboard1 kernel: ------------[ cut here ]------------
  26. Okt 01 15:09:26 cubieboard1 kernel: WARNING: CPU: 0 PID: 432 at drivers/media/common/videobuf2/videobuf2-v4l2.c:161 vb2_warn_zero_bytesused.part.3+0x38/0x68 [videobuf2_v4l2]
  27. Okt 01 15:09:26 cubieboard1 kernel: Modules linked in: evdev sun4i_codec axp20x_battery axp20x_ac_power snd_soc_core axp20x_adc axp20x_pek lima snd_pcm_dmaengine gpu_sched snd_pcm ttm snd_timer sun4i_ts nvmem_sunxi_sid snd soundcore sunxi_wdt sunxi_cedrus(C) sun4i_drm_hdmi sun4i_ss des_generic v4l2_mem2mem videobuf2_dma_contig cec videobuf2_memops videobuf2_v4l2 videobuf2_common spi_sun4i cpufreq_dt leds_gpio ip_tables x_tables autofs4 ext4 crc32c_generic crc16 mbcache jbd2 fscrypto axp20x_usb_power industrialio pinctrl_axp209 axp20x_regulator ahci_sunxi libahci_platform libahci sunxi phy_generic libata i2c_mv64xxx musb_hdrc ohci_platform ohci_hcd udc_core ehci_platform ehci_hcd scsi_mod usbcore sunxi_mmc phy_sun4i_usb sun4i_emac
  28. Okt 01 15:09:26 cubieboard1 kernel: CPU: 0 PID: 432 Comm: v4l2-request-te Tainted: G C 4.19.0-rc4-armmp+ #21
  29. Okt 01 15:09:26 cubieboard1 kernel: Hardware name: Allwinner sun4i/sun5i Families
  30. Okt 01 15:09:26 cubieboard1 kernel: [<c01152d4>] (unwind_backtrace) from [<c010e8a4>] (show_stack+0x20/0x24)
  31. Okt 01 15:09:26 cubieboard1 kernel: [<c010e8a4>] (show_stack) from [<c08c7974>] (dump_stack+0x90/0xa4)
  32. Okt 01 15:09:26 cubieboard1 kernel: [<c08c7974>] (dump_stack) from [<c0143d38>] (__warn+0x104/0x11c)
  33. Okt 01 15:09:26 cubieboard1 kernel: [<c0143d38>] (__warn) from [<c0143e88>] (warn_slowpath_null+0x50/0x58)
  34. Okt 01 15:09:26 cubieboard1 kernel: [<c0143e88>] (warn_slowpath_null) from [<bf415148>] (vb2_warn_zero_bytesused.part.3+0x38/0x68 [videobuf2_v4l2])
  35. Okt 01 15:09:26 cubieboard1 kernel: [<bf415148>] (vb2_warn_zero_bytesused.part.3 [videobuf2_v4l2]) from [<bf415844>] (vb2_queue_or_prepare_buf.part.4+0x6cc/0x82c [videobuf2_v4l2])
  36. Okt 01 15:09:26 cubieboard1 kernel: [<bf415844>] (vb2_queue_or_prepare_buf.part.4 [videobuf2_v4l2]) from [<bf415a58>] (vb2_qbuf+0xb4/0x130 [videobuf2_v4l2])
  37. Okt 01 15:09:26 cubieboard1 kernel: [<bf415a58>] (vb2_qbuf [videobuf2_v4l2]) from [<bf4439d8>] (v4l2_m2m_qbuf+0x88/0xdc [v4l2_mem2mem])
  38. Okt 01 15:09:26 cubieboard1 kernel: [<bf4439d8>] (v4l2_m2m_qbuf [v4l2_mem2mem]) from [<bf443a4c>] (v4l2_m2m_ioctl_qbuf+0x20/0x24 [v4l2_mem2mem])
  39. Okt 01 15:09:26 cubieboard1 kernel: [<bf443a4c>] (v4l2_m2m_ioctl_qbuf [v4l2_mem2mem]) from [<c06e8c1c>] (v4l_qbuf+0x4c/0x50)
  40. Okt 01 15:09:26 cubieboard1 kernel: [<c06e8c1c>] (v4l_qbuf) from [<c06e7768>] (__video_do_ioctl+0x2d4/0x530)
  41. Okt 01 15:09:26 cubieboard1 kernel: [<c06e7768>] (__video_do_ioctl) from [<c06eb4ac>] (video_usercopy+0x2ac/0x6a0)
  42. Okt 01 15:09:26 cubieboard1 kernel: [<c06eb4ac>] (video_usercopy) from [<c06eb8c0>] (video_ioctl2+0x20/0x24)
  43. Okt 01 15:09:26 cubieboard1 kernel: [<c06eb8c0>] (video_ioctl2) from [<c06e3088>] (v4l2_ioctl+0x4c/0x60)
  44. Okt 01 15:09:26 cubieboard1 kernel: [<c06e3088>] (v4l2_ioctl) from [<c032f4b0>] (do_vfs_ioctl+0xc0/0x930)
  45. Okt 01 15:09:26 cubieboard1 kernel: [<c032f4b0>] (do_vfs_ioctl) from [<c032fd9c>] (ksys_ioctl+0x7c/0x8c)
  46. Okt 01 15:09:26 cubieboard1 kernel: [<c032fd9c>] (ksys_ioctl) from [<c032fdc4>] (sys_ioctl+0x18/0x1c)
  47. Okt 01 15:09:26 cubieboard1 kernel: [<c032fdc4>] (sys_ioctl) from [<c0101000>] (ret_fast_syscall+0x0/0x54)
  48. Okt 01 15:09:26 cubieboard1 kernel: Exception stack(0xc9d43fa8 to 0xc9d43ff0)
  49. Okt 01 15:09:26 cubieboard1 kernel: 3fa0: bec5ec60 00000001 00000003 c044560f bec5ecb4 bec5ecb4
  50. Okt 01 15:09:26 cubieboard1 kernel: 3fc0: bec5ec60 00000001 00000000 00000036 00426000 bec5eca0 00426000 00000000
  51. Okt 01 15:09:26 cubieboard1 kernel: 3fe0: 00426064 bec5ec5c 00410b49 b6eb9158
  52. Okt 01 15:09:26 cubieboard1 kernel: ---[ end trace d1360a1803f1a61d ]---
  53. Okt 01 15:09:26 cubieboard1 kernel: use of bytesused == 0 is deprecated and will be removed in the future,
  54. Okt 01 15:09:26 cubieboard1 kernel: use the actual size instead.
  55. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 21a8d622)
  56. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
  57. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 896fbb17)
  58. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
  59. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 6f09baad)
  60. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 48fc4887)
  61. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
  62. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
  63. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 9523748f)
  64. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page c226e9d7)
  65. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 39fbf361)
  66. Okt 01 15:09:26 cubieboard1 kernel: cma: cma_release(page 730c91d8)
  67. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  68. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
  69. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  70. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
  71. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  72. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
  73. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  74. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
  75. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  76. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
  77. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  78. Okt 01 15:11:42 cubieboard1 kernel: alloc_contig_range: [4ab00, 4ac00) PFNs busy
  79. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): memory range at 730c91d8 is busy, retrying
  80. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
  81. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  82. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
  83. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  84. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
  85. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  86. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
  87. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  88. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
  89. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  90. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
  91. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  92. Okt 01 15:11:42 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
  93. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 730c91d8)
  94. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
  95. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 896fbb17)
  96. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
  97. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 6f09baad)
  98. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 48fc4887)
  99. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
  100. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
  101. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 9523748f)
  102. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page c226e9d7)
  103. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 39fbf361)
  104. Okt 01 15:11:43 cubieboard1 kernel: cma: cma_release(page 21a8d622)
  105. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  106. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
  107. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  108. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
  109. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  110. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
  111. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  112. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
  113. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  114. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
  115. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  116. Okt 01 15:12:16 cubieboard1 kernel: alloc_contig_range: [4ab00, 4ac00) PFNs busy
  117. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): memory range at 730c91d8 is busy, retrying
  118. Okt 01 15:12:16 cubieboard1 kernel: alloc_contig_range: [4ac00, 4ad00) PFNs busy
  119. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): memory range at 21a8d622 is busy, retrying
  120. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
  121. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  122. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
  123. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  124. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
  125. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  126. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
  127. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  128. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
  129. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  130. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
  131. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  132. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
  133. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 730c91d8)
  134. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 21a8d622)
  135. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 896fbb17)
  136. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
  137. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 6f09baad)
  138. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 48fc4887)
  139. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
  140. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
  141. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 9523748f)
  142. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page c226e9d7)
  143. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 39fbf361)
  144. Okt 01 15:12:16 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
  145. Okt 01 15:17:01 cubieboard1 CRON[464]: pam_unix(cron:session): session opened for user root by (uid=0)
  146. Okt 01 15:17:01 cubieboard1 CRON[465]: (root) CMD ( cd / && run-parts --report /etc/cron.hourly)
  147. Okt 01 15:17:01 cubieboard1 CRON[464]: pam_unix(cron:session): session closed for user root
  148. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_stub_open]
  149. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 0
  150. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open]
  151. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
  152. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
  153. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_release] open_count = 1
  154. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe200, open_count = 1
  155. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose]
  156. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  157. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  158. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  159. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (3)
  160. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (4)
  161. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
  162. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (6)
  163. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
  164. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
  165. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  166. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  167. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  168. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  169. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
  170. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  171. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  172. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  173. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_crtc_enable_vblank] Enabling VBLANK on crtc fd85b8b1
  174. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_tcon_enable_vblank] Enabling VBLANK interrupt
  175. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
  176. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  177. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  178. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  179. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  180. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  181. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  182. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  183. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  184. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  185. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  186. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  187. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  188. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  189. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
  190. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  191. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (1)
  192. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  193. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
  194. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_stub_open]
  195. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 0
  196. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open]
  197. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_SET_VERSION
  198. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
  199. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
  200. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_release] open_count = 1
  201. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe200, open_count = 1
  202. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose]
  203. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  204. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 66 (1)
  205. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 66 (2)
  206. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (3)
  207. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (4)
  208. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
  209. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (6)
  210. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
  211. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
  212. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  213. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  214. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  215. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  216. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
  217. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  218. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  219. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  220. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  221. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  222. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  223. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  224. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  225. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  226. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  227. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  228. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  229. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  230. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  231. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  232. Okt 01 15:18:19 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  233. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
  234. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  235. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 66 (1)
  236. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  237. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
  238. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_stub_open]
  239. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 1
  240. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_open]
  241. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe201, auth=1, DRM_IOCTL_SET_VERSION
  242. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe201, auth=1, DRM_IOCTL_GET_UNIQUE
  243. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe201, auth=1, DRM_IOCTL_GET_UNIQUE
  244. Okt 01 15:18:19 cubieboard1 kernel: [drm:drm_release] open_count = 1
  245. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe201, open_count = 1
  246. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_lastclose]
  247. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
  248. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_stub_open]
  249. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_open] pid = 496, minor = 0
  250. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_open]
  251. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
  252. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_VERSION
  253. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
  254. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GET_UNIQUE
  255. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  256. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned e0a3bbd3
  257. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  258. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned d0ae9c6d
  259. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  260. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 9523748f
  261. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  262. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned c226e9d7
  263. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  264. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 39fbf361
  265. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 256, align 8)
  266. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 730c91d8
  267. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  268. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 21a8d622
  269. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  270. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 5c22a6cb
  271. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  272. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 896fbb17
  273. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  274. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 04cc92e5
  275. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  276. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 6f09baad
  277. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(cma 47675697, count 152, align 8)
  278. Okt 01 15:18:20 cubieboard1 kernel: cma: cma_alloc(): returned 48fc4887
  279. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_SET_CLIENT_CAP
  280. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_SET_CLIENT_CAP
  281. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
  282. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
  283. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETCONNECTOR
  284. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:63:HDMI-A-1]
  285. Okt 01 15:18:20 cubieboard1 kernel: [drm:sun4i_hdmi_get_modes [sun4i_drm_hdmi]] Monitor is an HDMI monitor
  286. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] non_desktop set to 0
  287. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz
  288. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 30.
  289. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 36.
  290. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: Assigning HDMI sink color depth as 12 bpc.
  291. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does YCRCB444 in deep color.
  292. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (1)
  293. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_edid_modes] ELD monitor MStar Demo
  294. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_edid_modes] HDMI: latency present 0 0, video latency 160 1, audio latency 6 65
  295. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_edid_modes] ELD size 36, SAD count 2
  296. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] non_desktop set to 0
  297. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz
  298. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 30.
  299. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does deep color 36.
  300. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: Assigning HDMI sink color depth as 12 bpc.
  301. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_add_display_info] HDMI-A-1: HDMI sink does YCRCB444 in deep color.
  302. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
  303. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  304. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 75:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x15
  305. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  306. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
  307. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  308. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
  309. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  310. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 99:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
  311. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  312. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 106:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
  313. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  314. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 107:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
  315. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
  316. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 111:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x48 0x1c005
  317. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  318. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 112:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x48 0x4005
  319. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  320. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
  321. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  322. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
  323. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  324. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
  325. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  326. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 116:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
  327. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  328. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 117:"1280x720" 0 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
  329. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  330. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 118:"1280x720" 0 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
  331. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  332. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 119:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
  333. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  334. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 120:"1280x720" 0 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
  335. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  336. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 121:"1280x720" 0 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
  337. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  338. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
  339. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  340. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 0 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
  341. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  342. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 124:"1920x1080" 0 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
  343. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  344. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 125:"640x480" 0 25175 640 656 752 800 480 490 492 525 0x40 0x400a
  345. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
  346. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 126:"640x480" 0 25175 640 656 752 800 480 490 492 525 0x40 0x1c00a
  347. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
  348. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 127:"640x480" 0 25175 640 656 752 800 480 490 492 525 0x40 0x2000a
  349. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
  350. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 128:"720x480" 0 27000 720 736 798 858 480 489 495 525 0x40 0x400a
  351. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
  352. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 129:"720x480" 0 27000 720 736 798 858 480 489 495 525 0x40 0x1c00a
  353. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
  354. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 130:"720x480" 0 27000 720 736 798 858 480 489 495 525 0x40 0x2000a
  355. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
  356. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 133:"1280x720" 0 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
  357. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  358. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 134:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x4015
  359. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  360. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 135:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x1c015
  361. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  362. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 137:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x501a
  363. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  364. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 138:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x1d01a
  365. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  366. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 139:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x2101a
  367. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  368. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 140:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
  369. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  370. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 141:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
  371. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  372. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
  373. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  374. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 143:"720x576" 0 27000 720 732 796 864 576 581 586 625 0x40 0x400a
  375. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576 mode: NO_STEREO
  376. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 144:"720x576" 0 27000 720 732 796 864 576 581 586 625 0x40 0x1c00a
  377. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576 mode: NO_STEREO
  378. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 145:"720x576" 0 27000 720 732 796 864 576 581 586 625 0x40 0x2000a
  379. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576 mode: NO_STEREO
  380. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 149:"1280x720" 0 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x20005
  381. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  382. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 152:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x4015
  383. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  384. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 154:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x1c015
  385. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  386. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 156:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x501a
  387. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
  388. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 157:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x1d01a
  389. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
  390. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 158:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x2101a
  391. Okt 01 15:18:20 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
  392. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 159:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x4005
  393. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  394. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 160:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
  395. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  396. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 161:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
  397. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  398. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 164:"1920x1080" 0 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
  399. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  400. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 165:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
  401. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  402. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 166:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
  403. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  404. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 167:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
  405. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  406. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 173:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
  407. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  408. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 183:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
  409. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  410. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 187:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
  411. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  412. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 188:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
  413. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  414. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 189:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
  415. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  416. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 193:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
  417. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  418. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 194:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
  419. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  420. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 195:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0x400a
  421. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
  422. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 196:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0x1c00a
  423. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
  424. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 197:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0x2000a
  425. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 640x480 mode: NO_STEREO
  426. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 198:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0x400a
  427. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
  428. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 199:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0x1c00a
  429. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
  430. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 200:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0x2000a
  431. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480 mode: NO_STEREO
  432. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 203:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
  433. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1280x720 mode: NO_STEREO
  434. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 204:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x4015
  435. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  436. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 205:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x1c015
  437. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
  438. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 207:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x501a
  439. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  440. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 208:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x1d01a
  441. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  442. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 209:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x2101a
  443. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
  444. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 210:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
  445. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  446. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 211:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
  447. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  448. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 212:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
  449. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  450. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 215:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
  451. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  452. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 216:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
  453. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  454. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 217:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
  455. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  456. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 218:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
  457. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: NO_STEREO
  458. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:63:HDMI-A-1] probed modes :
  459. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 65:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x48 0x5
  460. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
  461. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 174:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
  462. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 101:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
  463. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 103:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
  464. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
  465. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 102:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
  466. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
  467. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 82:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
  468. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 87:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
  469. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
  470. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 148:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
  471. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 69:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
  472. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 85:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
  473. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
  474. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 72:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
  475. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 84:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
  476. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 150:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
  477. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 153:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
  478. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 67:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
  479. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 79:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
  480. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 151:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
  481. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 76:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
  482. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
  483. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  484. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETCONNECTOR
  485. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  486. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETENCODER
  487. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETCRTC
  488. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
  489. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETRESOURCES
  490. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANERESOURCES
  491. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANERESOURCES
  492. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
  493. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
  494. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  495. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  496. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  497. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  498. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
  499. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPLANE
  500. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  501. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  502. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  503. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  504. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  505. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  506. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  507. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  508. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  509. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  510. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  511. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  512. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  513. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  514. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  515. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  516. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  517. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  518. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  519. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  520. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  521. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  522. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  523. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  524. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  525. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  526. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  527. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  528. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  529. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  530. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  531. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  532. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  533. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  534. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  535. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  536. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  537. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  538. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  539. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  540. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  541. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  542. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  543. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  544. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  545. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  546. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  547. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  548. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  549. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  550. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  551. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  552. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  553. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  554. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  555. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  556. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  557. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  558. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  559. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  560. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  561. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  562. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  563. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  564. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  565. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  566. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  567. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  568. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  569. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  570. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  571. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  572. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  573. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  574. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  575. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  576. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  577. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  578. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  579. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  580. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  581. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  582. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  583. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  584. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  585. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  586. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  587. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  588. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  589. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  590. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  591. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  592. Okt 01 15:18:21 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  593. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  594. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  595. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  596. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  597. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  598. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  599. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  600. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  601. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  602. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  603. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  604. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  605. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  606. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  607. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  608. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  609. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  610. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  611. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  612. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  613. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  614. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  615. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  616. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  617. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  618. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  619. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  620. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  621. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  622. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  623. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  624. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  625. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  626. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  627. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  628. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  629. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  630. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  631. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  632. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  633. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  634. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  635. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  636. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  637. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  638. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  639. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  640. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  641. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  642. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  643. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  644. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  645. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  646. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  647. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  648. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  649. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  650. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  651. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  652. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  653. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  654. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  655. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  656. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  657. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  658. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  659. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  660. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  661. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  662. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  663. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  664. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  665. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  666. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  667. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  668. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  669. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  670. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  671. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  672. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  673. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  674. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  675. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  676. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  677. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  678. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  679. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  680. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  681. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  682. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  683. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  684. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  685. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  686. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  687. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  688. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  689. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  690. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  691. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  692. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  693. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  694. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  695. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  696. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  697. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
  698. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  699. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  700. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  701. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  702. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  703. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  704. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  705. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  706. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  707. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  708. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  709. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  710. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  711. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  712. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  713. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  714. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  715. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  716. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  717. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  718. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  719. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  720. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  721. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  722. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  723. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  724. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  725. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  726. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  727. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
  728. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
  729. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4ac00000, size = 622592
  730. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
  731. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:71]
  732. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
  733. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4ad00000, size = 622592
  734. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
  735. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:73]
  736. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
  737. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4ae00000, size = 622592
  738. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
  739. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:74]
  740. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
  741. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4af00000, size = 622592
  742. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
  743. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:75]
  744. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
  745. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4b000000, size = 622592
  746. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
  747. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:77]
  748. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_PRIME_FD_TO_HANDLE
  749. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_gem_cma_prime_import_sg_table] dma_addr = 0x4b100000, size = 622592
  750. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2
  751. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_addfb2] [FB:81]
  752. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  753. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  754. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
  755. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
  756. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  757. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  758. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  759. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  760. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  761. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  762. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  763. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  764. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  765. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  766. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  767. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  768. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  769. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  770. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  771. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  772. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  773. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  774. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  775. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  776. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  777. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  778. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  779. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  780. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
  781. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
  782. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  783. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  784. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  785. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  786. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  787. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  788. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  789. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  790. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  791. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  792. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
  793. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  794. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (5)
  795. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (6)
  796. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (5)
  797. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
  798. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  799. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  800. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  801. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  802. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  803. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  804. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  805. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  806. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  807. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  808. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  809. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  810. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  811. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  812. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  813. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  814. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  815. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  816. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  817. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  818. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  819. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  820. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  821. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
  822. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
  823. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  824. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  825. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  826. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  827. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  828. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  829. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  830. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  831. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  832. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  833. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  834. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
  835. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  836. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
  837. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  838. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
  839. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  840. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  841. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  842. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  843. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  844. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  845. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  846. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  847. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  848. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  849. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  850. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  851. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  852. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  853. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  854. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  855. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  856. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  857. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  858. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  859. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  860. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  861. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  862. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  863. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
  864. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
  865. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  866. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  867. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  868. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  869. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  870. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  871. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  872. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  873. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  874. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
  875. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  876. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
  877. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  878. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
  879. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  880. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
  881. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  882. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  883. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  884. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  885. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  886. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  887. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  888. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  889. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  890. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  891. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  892. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  893. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  894. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  895. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  896. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  897. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  898. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  899. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  900. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  901. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  902. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  903. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  904. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  905. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
  906. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
  907. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  908. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  909. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  910. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  911. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  912. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  913. Okt 01 15:18:22 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  914. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  915. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  916. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
  917. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  918. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
  919. Okt 01 15:18:22 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  920. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
  921. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  922. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
  923. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  924. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  925. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  926. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  927. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  928. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  929. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  930. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  931. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  932. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  933. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  934. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  935. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  936. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  937. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  938. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  939. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  940. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  941. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  942. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  943. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  944. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  945. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  946. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  947. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
  948. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
  949. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  950. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  951. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  952. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  953. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  954. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  955. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  956. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  957. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  958. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
  959. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  960. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
  961. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  962. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
  963. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  964. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
  965. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  966. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  967. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  968. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  969. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  970. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  971. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  972. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  973. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  974. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  975. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  976. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  977. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  978. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  979. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  980. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  981. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  982. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  983. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  984. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  985. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  986. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  987. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  988. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  989. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
  990. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
  991. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  992. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  993. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  994. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  995. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  996. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  997. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  998. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  999. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1000. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
  1001. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1002. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
  1003. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1004. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
  1005. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1006. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
  1007. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1008. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1009. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1010. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1011. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1012. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1013. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1014. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1015. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1016. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1017. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1018. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1019. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1020. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1021. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1022. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1023. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1024. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1025. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1026. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1027. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1028. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1029. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1030. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1031. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
  1032. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
  1033. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1034. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1035. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1036. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1037. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1038. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1039. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1040. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1041. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1042. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
  1043. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1044. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
  1045. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1046. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
  1047. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1048. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
  1049. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1050. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1051. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1052. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1053. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1054. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1055. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1056. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1057. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1058. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1059. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1060. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1061. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1062. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1063. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1064. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1065. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1066. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1067. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1068. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1069. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1070. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1071. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1072. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1073. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
  1074. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
  1075. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1076. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1077. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1078. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1079. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1080. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1081. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1082. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1083. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1084. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
  1085. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1086. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
  1087. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1088. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
  1089. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1090. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
  1091. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  1092. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1093. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1094. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1095. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1096. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1097. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1098. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1099. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1100. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1101. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1102. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1103. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1104. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1105. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1106. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1107. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1108. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1109. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1110. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1111. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1112. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1113. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1114. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1115. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
  1116. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
  1117. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1118. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1119. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1120. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1121. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1122. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1123. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1124. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1125. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1126. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
  1127. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1128. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
  1129. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1130. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
  1131. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  1132. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
  1133. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  1134. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1135. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1136. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1137. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1138. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1139. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1140. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1141. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1142. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1143. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1144. Okt 01 15:18:23 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1145. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1146. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1147. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1148. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1149. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1150. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1151. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1152. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1153. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1154. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1155. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1156. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1157. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
  1158. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
  1159. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1160. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1161. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1162. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1163. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1164. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1165. Okt 01 15:18:23 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1166. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1167. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1168. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
  1169. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1170. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
  1171. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1172. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
  1173. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  1174. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
  1175. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  1176. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1177. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1178. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1179. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1180. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1181. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1182. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1183. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1184. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1185. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1186. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1187. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1188. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1189. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1190. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1191. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1192. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1193. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1194. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1195. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1196. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1197. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1198. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1199. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
  1200. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
  1201. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1202. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1203. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1204. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1205. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1206. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1207. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1208. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1209. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1210. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
  1211. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1212. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
  1213. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1214. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
  1215. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  1216. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
  1217. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1218. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1219. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1220. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1221. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1222. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1223. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1224. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1225. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1226. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1227. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1228. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1229. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1230. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1231. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1232. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1233. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1234. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1235. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1236. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1237. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1238. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1239. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1240. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1241. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
  1242. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
  1243. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1244. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1245. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1246. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1247. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1248. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1249. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1250. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1251. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1252. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
  1253. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1254. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
  1255. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1256. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
  1257. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1258. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
  1259. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1260. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1261. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1262. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1263. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1264. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1265. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1266. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1267. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1268. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1269. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1270. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1271. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1272. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1273. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1274. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1275. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1276. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1277. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1278. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1279. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1280. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1281. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1282. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1283. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
  1284. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
  1285. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1286. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1287. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1288. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1289. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1290. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1291. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1292. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1293. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1294. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
  1295. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1296. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
  1297. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1298. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
  1299. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1300. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
  1301. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1302. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1303. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1304. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1305. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1306. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1307. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1308. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1309. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1310. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1311. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1312. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1313. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1314. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1315. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1316. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1317. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1318. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1319. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1320. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1321. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1322. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1323. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1324. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1325. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
  1326. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
  1327. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1328. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1329. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1330. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1331. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1332. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1333. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1334. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1335. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1336. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
  1337. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1338. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
  1339. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1340. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
  1341. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1342. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
  1343. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  1344. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1345. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1346. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1347. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1348. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1349. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1350. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1351. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1352. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1353. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1354. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1355. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1356. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1357. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1358. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1359. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1360. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1361. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1362. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1363. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1364. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1365. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1366. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1367. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
  1368. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
  1369. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1370. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1371. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1372. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1373. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1374. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1375. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1376. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1377. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1378. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
  1379. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1380. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
  1381. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1382. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
  1383. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  1384. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
  1385. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  1386. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1387. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1388. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1389. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1390. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1391. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1392. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1393. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1394. Okt 01 15:18:24 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1395. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1396. Okt 01 15:18:24 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1397. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1398. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1399. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1400. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1401. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1402. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1403. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1404. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1405. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1406. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1407. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1408. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1409. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
  1410. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
  1411. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1412. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1413. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1414. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1415. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1416. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1417. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1418. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1419. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1420. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
  1421. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1422. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
  1423. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1424. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
  1425. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  1426. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
  1427. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  1428. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1429. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1430. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1431. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1432. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1433. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1434. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1435. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1436. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1437. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1438. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1439. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1440. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1441. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1442. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1443. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1444. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1445. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1446. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1447. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1448. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1449. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1450. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1451. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
  1452. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
  1453. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1454. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1455. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1456. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1457. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1458. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1459. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1460. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1461. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1462. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
  1463. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1464. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
  1465. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1466. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
  1467. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  1468. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
  1469. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1470. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1471. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1472. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1473. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1474. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1475. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1476. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1477. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1478. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1479. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1480. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1481. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1482. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1483. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1484. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1485. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1486. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1487. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1488. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1489. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1490. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1491. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1492. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1493. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
  1494. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
  1495. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1496. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1497. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1498. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1499. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1500. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1501. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1502. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1503. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1504. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
  1505. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1506. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
  1507. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1508. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
  1509. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1510. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
  1511. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1512. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1513. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1514. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1515. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1516. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1517. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1518. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1519. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1520. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1521. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1522. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1523. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1524. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1525. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1526. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1527. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1528. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1529. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1530. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1531. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1532. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1533. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1534. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1535. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
  1536. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
  1537. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1538. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1539. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1540. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1541. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1542. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1543. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1544. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1545. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1546. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
  1547. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1548. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
  1549. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1550. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
  1551. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1552. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
  1553. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1554. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1555. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1556. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1557. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1558. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1559. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1560. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1561. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1562. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1563. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1564. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1565. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1566. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1567. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1568. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1569. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1570. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1571. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1572. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1573. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1574. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1575. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1576. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1577. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
  1578. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
  1579. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1580. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1581. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1582. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1583. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1584. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1585. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1586. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1587. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1588. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
  1589. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1590. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
  1591. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1592. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (3)
  1593. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1594. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (4)
  1595. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  1596. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1597. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1598. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1599. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1600. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1601. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1602. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1603. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1604. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1605. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1606. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1607. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1608. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1609. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1610. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1611. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1612. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1613. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1614. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1615. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1616. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1617. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1618. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1619. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ad00000
  1620. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ad65400
  1621. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1622. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1623. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1624. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1625. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1626. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1627. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1628. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1629. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1630. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
  1631. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1632. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 73 (2)
  1633. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1634. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (3)
  1635. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (3)
  1636. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (4)
  1637. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  1638. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1639. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1640. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1641. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1642. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1643. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1644. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1645. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1646. Okt 01 15:18:25 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1647. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1648. Okt 01 15:18:25 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1649. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1650. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1651. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1652. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1653. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1654. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1655. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1656. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1657. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1658. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1659. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1660. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1661. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ae00000
  1662. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ae65400
  1663. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1664. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1665. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1666. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1667. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1668. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1669. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1670. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1671. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1672. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (2)
  1673. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1674. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 74 (2)
  1675. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1676. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (3)
  1677. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (3)
  1678. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (4)
  1679. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  1680. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1681. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1682. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1683. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1684. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1685. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1686. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1687. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1688. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1689. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1690. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1691. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1692. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1693. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1694. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1695. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1696. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1697. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1698. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1699. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1700. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1701. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1702. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1703. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4af00000
  1704. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4af65400
  1705. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1706. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1707. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1708. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1709. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1710. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1711. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1712. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1713. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1714. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (2)
  1715. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1716. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 75 (2)
  1717. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1718. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (3)
  1719. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (3)
  1720. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (4)
  1721. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1722. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1723. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1724. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1725. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1726. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1727. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1728. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1729. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1730. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1731. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1732. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1733. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1734. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1735. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1736. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1737. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1738. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1739. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1740. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1741. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1742. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1743. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1744. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1745. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b000000
  1746. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b065400
  1747. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1748. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1749. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1750. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1751. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1752. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1753. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1754. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1755. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1756. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (2)
  1757. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1758. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 77 (2)
  1759. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1760. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (3)
  1761. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (3)
  1762. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (4)
  1763. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1764. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1765. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1766. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1767. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1768. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1769. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1770. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1771. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1772. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1773. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1774. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1775. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1776. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1777. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1778. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1779. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1780. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1781. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1782. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1783. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1784. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1785. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1786. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1787. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4b100000
  1788. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4b165400
  1789. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1790. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1791. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1792. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1793. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1794. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1795. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1796. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1797. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1798. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (2)
  1799. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
  1800. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 81 (2)
  1801. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1802. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (3)
  1803. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (3)
  1804. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (4)
  1805. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1806. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1807. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1808. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1809. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1810. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1811. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Using the frontend for plane 1
  1812. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is NV12 little-endian (0x3231564e)
  1813. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 1
  1814. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 2 planes, 0 alpha, 1 video, 0 YUV
  1815. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1816. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1817. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1818. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1819. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1820. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1821. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1822. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1823. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1824. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1825. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1826. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1827. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1828. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_coord] Frontend crtc size W: 1280 H: 719
  1829. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #0 address to 0x4ac00000
  1830. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_frontend_update_buffer] Setting buffer #1 address to 0x4ac65400
  1831. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 1
  1832. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 719
  1833. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1834. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 1's priority to 1 and pipe 0
  1835. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 1
  1836. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1837. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1838. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1839. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1840. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (2)
  1841. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
  1842. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
  1843. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
  1844. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
  1845. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
  1846. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_ioctl] pid=496, dev=0xe200, auth=1, DRM_IOCTL_GEM_CLOSE
  1847. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_release] open_count = 1
  1848. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_file_free] pid = 496, device = 0xe200, open_count = 1
  1849. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 81 (1)
  1850. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 77 (1)
  1851. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 75 (1)
  1852. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 74 (1)
  1853. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 73 (1)
  1854. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 71 (2)
  1855. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1856. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (3)
  1857. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1858. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1859. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1860. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1861. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1862. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
  1863. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1864. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1865. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1866. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1867. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1868. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1869. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1870. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1871. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1872. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1873. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1874. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1875. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1876. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Disabling layer 1
  1877. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1878. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1879. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1880. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1881. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (2)
  1882. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 71 (1)
  1883. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_lastclose]
  1884. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (2)
  1885. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 70 (1)
  1886. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (2)
  1887. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 68 (3)
  1888. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (4)
  1889. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
  1890. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (6)
  1891. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
  1892. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_mode_object_get] OBJ ID: 63 (5)
  1893. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1894. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Input size 1280x720, output size 1280x720
  1895. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane FB format is XR24 little-endian (0x34325258)
  1896. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Plane zpos is 0
  1897. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0 alpha, 0 video, 0 YUV
  1898. Okt 01 15:18:26 cubieboard1 kernel: [drm:sun4i_backend_atomic_check] Starting checking our planes
  1899. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: hwmode: htotal 1650, vtotal 750, vdisplay 720
  1900. Okt 01 15:18:26 cubieboard1 kernel: [drm:drm_calc_timestamping_constants] crtc 44: clock 74250 kHz framedur 16666666 linedur 22222
  1901. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_formats] Switching display backend interlaced mode off
  1902. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Layer line width: 40960 bits
  1903. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting buffer address to 0x4a100000
  1904. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address lower bits to 0x50800000
  1905. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_buffer] Setting address high bits to 0x2
  1906. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Updating layer 0
  1907. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Primary layer, updating global size W: 1280 H: 720
  1908. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer size W: 1280 H: 720
  1909. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
  1910. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority to 0 and pipe 0
  1911. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_layer_enable] Enabling layer 0
  1912. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_crtc_atomic_flush] Committing plane changes
  1913. Okt 01 15:18:27 cubieboard1 kernel: [drm:sun4i_backend_commit] Committing changes
  1914. Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (6)
  1915. Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 63 (5)
  1916. Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 70 (1)
  1917. Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_mode_object_put] OBJ ID: 68 (3)
  1918. Okt 01 15:18:27 cubieboard1 kernel: [drm:drm_lastclose] driver lastclose completed
  1919. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 21a8d622)
  1920. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 5c22a6cb)
  1921. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 896fbb17)
  1922. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 04cc92e5)
  1923. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 6f09baad)
  1924. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 48fc4887)
  1925. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page e0a3bbd3)
  1926. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page d0ae9c6d)
  1927. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 9523748f)
  1928. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page c226e9d7)
  1929. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 39fbf361)
  1930. Okt 01 15:18:27 cubieboard1 kernel: cma: cma_release(page 730c91d8)
  1931. Okt 01 15:18:32 cubieboard1 kernel: [drm:vblank_disable_fn] disabling vblank on crtc 0
  1932. Okt 01 15:18:32 cubieboard1 kernel: [drm:sun4i_crtc_disable_vblank] Disabling VBLANK on crtc fd85b8b1
  1933. Okt 01 15:18:32 cubieboard1 kernel: [drm:sun4i_tcon_enable_vblank] Disabling VBLANK interrupt
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement