WongWC1998

class notes

Oct 6th, 2020 (edited)
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  1. 5539:
  2. Switch: is black box
  3. Radio interface:(Dimensioning) (limiting step)
  4. Datapath between client and mobile station
  5. vs
  6. Backhaul:
  7. Datapath between different base mobile stations: fixed line(backhaul)
  8.  
  9. Radio interface is limiting step because once a ch
  10.  
  11. Information is represented by information entropy
  12.  
  13. Signals: Periodic signals(frequency/angular frequency/cycle, amplitude & phase)
  14. Asin(ωt+θ)=[A exp(jθ) exp(jωt)]/[Z exp(jωt)](Z is called complex amplitude)
  15. Sum of 2 periodic signals is not periodic if it involves irrational numbers.
  16. Aperiodic signals: unit step, unit impulse, unit ramp
  17.  
  18. ADC: Discretizaion of time(sampling), or s(t)(quantisation)
  19. Sampling: Nyquist sampling theorem: fs > 2W(highest frequency). If fs < 2W aliasing occurs.
  20. Quantisation is irreversible.
  21. quantisation: N bits, 2^N levels.
  22. E.g. 44.1khz, 16 bits, 2 stereo channels, 1.411MB per second, so we use compression algorithms such as mp3 or flac.
  23.  
  24. Analog: Noise directly affects signal quality, SNR is increased by amplification.
  25. Digital: SNR is now irrelevant to communication(binary now), amplification is no longer necessary.
  26.  
  27. 5000:
  28. More transistors give more performance, but are more difficult to design, and more expensive to design and manufacture.(E.g. server processor are more expensive)
  29.  
  30. Design: area of chip,
  31.  
  32. transistor is turned by controlling gate voltage(field effect). resistance is essential to controlling to channel, so polycide is used to control it. In strained silicon, other metals is added distance to silicon lattice to increase conductivity. Originally we used metal gates(MOS) that are faster, but now we use poly silicon gates(POS) because they are made faster. but we switched back to MOS because POS had a lot of resistance and didn't have good performance. Smaller transistor area, smaller resistance, larger current with same voltage, faster switching speed(e.g. clock rate), also more transistors from same wafer, less cost. metal is insulated from silicon, and it's a switch. between metal and silicon
  33.  
  34. 5650:
  35. computers are cheap so digital wins over analog
  36.  
  37. 5060:
  38. voltage controller is used for power supply
  39.  
  40. bus is used for communication trasnfer
  41.  
  42. cross bar structure: costs increases exponentially as components amount increase(n!/2 connections for larger systems)
  43.  
  44. 5000:
  45. carrier recombination: 1 electron filling a hole, and leaving another hole in silicon doping.
  46.  
  47. in NMOS, every gate is connect to lowest reference voltage on the chip(a.k.a. GND); in PMOS it's highest.
  48.  
  49. smaller transistors, higher speed/current, more parallelism, but more leakage, more power consumption
  50. wider transistors consume more power
  51.  
  52. 5538:
  53. Rectangular pulses consume more power than wave pulses, so we use a pulse shaping filter for every signal. Bit rate is the same though.
  54.  
  55. Energy=0.5*signal 1 Energy(integrate signal energy over time)+0.5*signal 2 Energy(integrate signal energy over time)
  56. Power=Energy/Time
  57. Increase bandwidth by decreasing symbol time(decreasing bandwidth too), or using a larger symbol set(E.g. Quaternary modulator takes in 2 bits to create 4 possible waveforms, bandwidth stays the same, but higher bit error rate)
  58. bit rate(bits per second)=bits per symbol*bandwidth(symbols per second)
  59. baud rate(symbol rate)=1/symbol duration
  60.  
  61. 5060:
  62. 2 types of sensors: chemical and optical
  63.  
  64. xnor.ai: ai2go compresses machine learning algorithms to smaller scale so they can work on other hand-held embedded devices and makes ai more deployable.
  65.  
  66. cache memory can be accessed in the same cycle.
  67.  
  68. 5000:
  69. IDS_NMOS
  70. ISD_PMOS(inverted)
  71.  
  72. 5539:
  73. Error rate down, judgement overlap area down, dmin(minimum distance btw 2 points) up
  74. bpsk & bask: same bandwidth and bit rate
  75. bpsk: half(3db) of energy for same bit error as bask.
  76. bpsk has better bit error rate(collinear, same magnitude, separation is 2), ask has lesser power consumption(one of the signals has zero energy and zero norm)
  77.  
  78. question: bpsk has half energy but same dmin as bask, conserve more energy?
  79.  
  80. bfsk also is equidistant, they are orthogonal so separation is not large as bpsk(separation is sqrt 2)
  81.  
  82. bpsk has largest dmin compared to bfsk or bask for same energy.
  83.  
  84. inner product of two vectors positive: angle is acute
  85.  
  86. qpsk is also called iq modulator
  87.  
  88. X-qam is better than X-psk because dmin is larger
  89.  
  90. higher qam gives you more bandwidth but more ber, so it's used where SNR is large(E.g. Ethernet & cable TV), not when SNR is low(E.g. cellular networks and Wi-Fi rarely have high dimensions)
  91.  
  92. high bandwidth efficiency: mqam
  93.  
  94. high energy efficiency: mfsk(double frequencies require double bandwidth 16PSK> 16 QAM, Same Bandwidth and ber, 16 psk and 16fsk not so straightforward)
  95.  
  96. ---------IMPORTANT! EXAM QUESTIONS WILL ASK YOU TO MAKE DESIGN DECISIONS BASED ON CONDITIONS! SUCH AS DETERMINING MQAM VS MFSK IN SATELLITES(mfsk because of energy transportaion costs) AND TERRESTRIAL STATIONS(mqam because of bandwidth licensing costs)!---------
  97.  
  98. 5000:
  99. current increase: decrease sd distance or increase sd voltage
  100. velocity saturation: velocity of electrons increase up to a saturation point, which cause current to saturate.
  101. nmos pass 0, cmos pass 1
  102.  
  103. 5539:
  104. Power is O(d^(-2))(order of, or inversely proportional)
  105.  
  106.  
  107. Path loss dynamic range: 2km ~ 140 dB!!(speed of signal amplitude change due to distance change is slowest)
  108. Shadowing dynamic range: 8-10dB(slow)
  109. Multipath: waves from different path causes con/de-structive inteference(similar to double slit experiment) dynamic range: 40dB according to Rayleigh distribution (fast)
  110. We are working with Linear Time VARIANT System in fading.
  111.  
  112. 5060:
  113. every hardware componene that has firmware has a processor, e.g. CPU talks to intermediary processor in hdd to store data in hdd
  114.  
  115. memory is often structured in square blocks of arrays because otherwise chips would be too long
  116.  
  117. 5000:
  118. change body doping to change threshold voltage
  119.  
  120. presence of foreign wells changes threshold voltage in a direction that decreases the voltage
  121.  
  122. electron mobility technology are more developed than that of hole mobility, so NMOS is preferred(this class assumes n well by default)
  123.  
  124. select/active: select is concentrated area of doping used for transistor contacts, active is less concentrated area of doping used for wells
  125.  
  126. yield=no. of good chips/no. of total chips
  127.  
  128. chips are not getting smallers because error of layout is bigger, so channel and diffusion length error, and then current and transistor speed error is bigger
  129.  
  130. 5000:
  131. m1-5 are used for different purposes so they are different(m1&2 is often used for short distance)
  132.  
  133. 5650:
  134. multipath effect is frequency selective
  135.  
  136. ISI is caused by echo(P of matrix is related to delay spread)
  137.  
  138. y5=h0s5+h1s4+h2s3+h3s2+n5(p=4)
  139.  
  140. 5539:
  141. selection combining has 3db penalty
  142.  
  143. receiver composed of RF, ADC, & most of all, baseband DSP.
  144.  
  145. each diversity signal requires 1 RF & ADC that is combined into 1 MRC, so we usually use only 1 RF ACD & baseband with a switch between multiple signals. We use a preamble to estimate/switch between the antenna(preamble is usually time divided). More antennas, so estimation/switching between antenna is less accurate.
  146.  
  147. 5000:
  148. weak 0 & weak 1 is caused by vdd-vtn and vgnd+vtp: threshold voltage
  149.  
  150. Vgs has to be large enough
  151.  
  152. larger diffusion area, waste silicon, take up too much space, more electronc travel distance & resistance, lesser electron speed & current
  153.  
  154. 5000:
  155. load capacitance of nand w/ 3 inverters is different than nand w/ 1 inverter so speed is different
  156.  
  157. given same shared diffusion area, it's better to have as little contacts as possibe because contacts take up a lot of area.
  158.  
  159. 5000:
  160. complementary networks are not used sometimes because or/and networks can take up more metal, need more gates than transmission gates, or other reasons.
  161.  
  162.  
  163.  
  164. 5000:
  165. Velocity saturation causes resistance to be constant as voltage increases
  166. PMOS res>NMOS res because electron mobility>hole mobility
  167. NMOS velocity saturation reached w/ smaller voltage
  168.  
  169. Critical path delay: delay of longest path in CMOS system(limiting steo)
  170. Cpacaitors are placed in switching nodes btw transistors
  171. Different place use different gates depending on requirement of gate's place
  172.  
  173. parasitic capacitance caused little voltage overshoots because you need time to discharge capacitance
  174.  
  175. ceramic capacitors can't be used in IC because too large, we use MOSFET or MIM(more accurate) for capacitance.
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