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M68000 Assembler 7.81 KB | None | 0 0
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  1. ;*******************************************************************
  2. ;                               TEMPLATE PROVIDED BY CENTRE
  3.  
  4. ;         TITLE:  Vault
  5. ;         AUTHOR: Dominik Tarnowski
  6. ;
  7.  
  8. ;******************************************************************
  9. ; PROGRAM DESCRIPTION:
  10. ;
  11. ; Program takes an input of 4 numbers between 0 and 9 and unlocks the vault provided that the inputs match a pre-defined passcode.
  12. ;
  13. ;*********************************************************************
  14. ;           DEFINITIONS
  15. ;*********************************************************************
  16.     list    p=16F88                 ; tells the assembler which PIC chip to program for
  17.     radix   dec                     ; set default number radix to decimal
  18.     ;radix  hex                     uncomment this to  set  radix to hex
  19.     __config h'2007', 0x3F50    ; internal oscillator, RA5 as i/o, wdt off
  20.     __config h'2008', 0x3FFF   
  21.     errorlevel -302                 ; hide page warnings
  22.  
  23. W               EQU h'00'   ; pointer to Working register
  24. F               EQU h'01'   ; pointer to file
  25.  
  26. ;****** REGISTER USAGE ******
  27.  
  28. ; Register page 1
  29. TRISA   EQU h'85'   ; data direction registers
  30. TRISB   EQU h'86'
  31. OSCCON  EQU h'8F'   ; internal oscillator speed
  32. ANSEL   EQU h'9B'   ; ADC port enable bits
  33.  
  34. ; Register page 0        
  35. STATUS  EQU h'03'   ; status
  36. PORTA   EQU h'05'   ; input / output ports
  37. PORTB   EQU h'06'
  38. INTCON  EQU h'0B'   ; interrupt control
  39. ADRESH  EQU h'1E'   ; ADC result
  40. ADCON0  EQU h'1F'   ; ADC control
  41.  
  42. P0  EQU h'20'   ; general use byte registers B0 to B27
  43. P1  EQU h'21'
  44. V0  EQU h'22'
  45. V1  EQU h'23'
  46. N   EQU h'24'
  47. INPUT   EQU h'25'
  48.  
  49. B6  EQU h'26'
  50. B7  EQU h'27'
  51. B8  EQU h'28'
  52. B9  EQU h'29'
  53. B10 EQU h'2A'
  54. B11 EQU h'2B'
  55. B12 EQU h'2C'
  56. B13 EQU h'2D'
  57. B14 EQU h'2E'
  58. B15 EQU h'2F'
  59. B16 EQU h'30'
  60. B17 EQU h'31'
  61. B18 EQU h'32'
  62. B19 EQU h'33'
  63. B20 EQU h'34'   ; used in interrupt routine
  64. B21 EQU h'35'   ; used in interrupt routine
  65. B22 EQU h'36'
  66. B23 EQU h'37'
  67. B24 EQU h'38'
  68. B25 EQU h'39'
  69. B26 EQU h'3A'
  70. B27 EQU h'3B'
  71.  
  72. WAIT1   EQU h'3C'   ; counters used in wait delays
  73. WAIT10  EQU h'3D'
  74. WAIT100 EQU h'3E'
  75. WAIT1000    EQU h'3F'
  76. ADCTEMP EQU h'40'   ; adc loop counter
  77.  
  78. ;****** REGISTER BITS ******
  79.  
  80. C           EQU h'00'   ; carry flag
  81. Z               EQU h'02'   ; zero flag
  82. RP0             EQU h'05'   ; register page bit
  83. INT0IF          EQU h'01'   ; interrupt 0 flag
  84. INT0IE      EQU h'04'   ; interrupt 0 enable
  85. GIE             EQU h'07'   ; global interrupt enable
  86.  
  87. ;*********************************************************************
  88. ;           VECTORS
  89. ;*********************************************************************
  90.  
  91. ;The PIC16F88 reset vectors
  92.  
  93.     ORG     h'00'           ; reset vector address
  94.     goto    start   ; goes to first instruction on reset/power-up
  95. ;*********************************************************************
  96. ;           SUBROUTINES
  97. ;*********************************************************************
  98. ; Predefined wait subroutines - wait1ms, wait10ms, wait100ms, wait1000ms
  99.  
  100. wait1ms     ; (199 x 5) + 5 instructions = 1000us = 1ms @ 4MHz resonator
  101.     movlw d'199'    ; 1
  102.     movwf WAIT1     ; 1
  103. loop5ns
  104.     clrwdt          ; 1 this loop 1+1+1+2 = 5 instructions
  105.     nop             ; 1
  106.     decfsz WAIT1,F  ; 1
  107.     goto loop5ns    ; 2
  108.     nop             ; 1
  109.     return              ; 2
  110. wait10ms
  111.     movlw d'10'         ; 10 x 1ms = 10ms
  112.     movwf WAIT10   
  113. loop10ms
  114.     call    wait1ms
  115.     decfsz  WAIT10,F   
  116.     goto    loop10ms     
  117.     return          
  118.  
  119. wait100ms
  120.     movlw d'100'    ; 100 x 1ms = 100ms
  121.     movwf WAIT100  
  122. loop100ms
  123.     call    wait1ms
  124.     decfsz  WAIT100,F
  125.     goto    loop100ms    
  126.     return          
  127.  
  128. wait1000ms
  129.     movlw   d'10'     ; 10 x 100ms = 1000ms
  130.     movwf   WAIT1000     
  131. loop1000ms
  132.     call    wait100ms  
  133.     decfsz  WAIT1000,F
  134.     goto    loop1000ms 
  135.     return          
  136.  
  137. ;*********************************************************************
  138. ;           MAIN PROGRAM
  139. ;*********************************************************************
  140.  
  141. ;****** INITIALISATION ******
  142. start
  143.     bsf         STATUS,RP0  ; select register page 1
  144.     movlw   b'01100000' ; set to 4MHz internal operation
  145.     movwf   OSCCON 
  146.     clrf    ANSEL       ; disable ADC (enabled at power-up)
  147.     bcf         STATUS,RP0  ; select register page 0
  148.  
  149. ;The data direction registers TRISA and TRISB live in the special register set. A '1' in
  150. ;these registers sets the corresponding port line to an Input, and a
  151. ;'0' makes the corresponding line an output.
  152.  
  153. Init
  154.     clrf        PORTA       ; make sure PORTA output latches are low
  155.         clrf        PORTB       ; make sure PORTB output latches are low  
  156.     bsf         STATUS,RP0  ; select register page 1
  157. ;Modify the next line to correspond with your input output reqirements 
  158.     movlw   b'00000000' ; set port A data direction (0 = output bit, 1 = input bit)
  159.     movwf   TRISA       ;
  160. ;Modify the next line to correspond with your input output requirements
  161.     movlw   b'00000000' ; set port B data direction (0 = output bit, 1 = input bit)
  162.     movwf   TRISB       ;  
  163.     bcf         STATUS,RP0  ; select register page 0
  164.  
  165. ;****** MAIN PROGRAM ******
  166. ;************* remove semicolons from next two lines to enable interrupt routine************
  167.     ; bsf       INTCON,INT0IE  ; set external interrupt enable
  168.     ; bsf       INTCON,GIE        ; enable all interrupts
  169.  
  170. main
  171. ;*********************************************************************
  172.  
  173. ; set the passcode
  174. movlw b'00010001'
  175. movwf P0
  176. movlw b'00010001'
  177. movwf P1
  178.    
  179. ; debuging purposes only: set input values
  180. movlw b'00000010'
  181. movwf PORTA
  182. movlw b'00000000'
  183. movwf PORTB
  184.    
  185. ; initialise variables
  186. clrf N
  187. clrf V0
  188. clrf V1
  189.  
  190. loop
  191.     call get_input
  192.     movwf INPUT
  193.     call wait100ms
  194.     call get_input
  195.    
  196.     subwf INPUT
  197.     ; if not the same button pressed after 100ms, loop again
  198.     btfss STATUS,Z
  199.     goto loop
  200.    
  201.     movwf INPUT
  202.    
  203.     sublw b'11111111'
  204.     ; if input = 11111111
  205.     btfss STATUS,Z
  206.     call handle_input; called when any button is pressed
  207.    
  208.     goto loop
  209.    
  210. handle_input
  211.     movf INPUT, W
  212.     movwf PORTB ; debugging purposes
  213.    
  214.     btfss N, 1; if n = 0 or n = 1
  215.     call write_v0
  216.     btfsc N, 1; if n = 2 or n = 3
  217.     call write_v1
  218.    
  219.     incf N
  220.     btfsc N, 2; if n = 4
  221.     call check_passcode
  222.     return
  223.  
  224. ; returns all 1s if no keys are pressed
  225. ; if key pressed, its binary equivalent will be stored in the W register    
  226. get_input
  227.     movlw b'11111111'
  228.     btfsc PORTA, 0
  229.     movlw b'1'
  230.     btfsc PORTA, 1
  231.     movlw b'1'
  232.     btfsc PORTA, 2
  233.     movlw b'10'
  234.     btfsc PORTA, 3
  235.     movlw b'11'
  236.     btfsc PORTA, 4
  237.     movlw b'100'
  238.     btfsc PORTA, 5
  239.     movlw b'101'
  240.     btfsc PORTA, 6
  241.     movlw b'110'
  242.     btfsc PORTA, 7
  243.     movlw b'111'
  244.    
  245. ;    btfsc PORTB, 7
  246. ;    movlw b'1000'
  247. ;    btfsc PORTB, 6
  248. ;    movlw b'1001'
  249.     return
  250.        
  251.    
  252. write_v0
  253.     btfss N, 0; if n = 0
  254.     call write_v0_n0
  255.     btfsc N, 0; if n = 1
  256.     call write_v0_n1
  257.     return
  258.  
  259. write_v0_n0
  260.     movf INPUT, W
  261.     movwf V0
  262.     return
  263. write_v0_n1
  264.     rlf V0, F
  265.     bcf V0, 0; clear rightmost bit as rlf seems to put 1 there the 1st time when it should be 0?
  266.     rlf V0, F
  267.     rlf V0, F
  268.     rlf V0, F
  269.     movf INPUT, W
  270.     addwf V0
  271.     return
  272.    
  273. write_v1
  274.     btfss N, 0; if n = 2
  275.     call write_v1_n2
  276.     btfsc N, 0; if n = 3
  277.     call write_v1_n3
  278.     return
  279.    
  280. write_v1_n2
  281.     movf INPUT, W
  282.     movwf V1
  283.     return
  284. write_v1_n3
  285.     rlf V1, F
  286.     bcf V1, 0; clear rightmost bit as rlf seems to put 1 there the 1st time when it should be 0?
  287.     rlf V1, F
  288.     rlf V1, F
  289.     rlf V1, F
  290.     movf INPUT, W
  291.     addwf V1
  292.     return
  293.  
  294. check_passcode
  295.     movf P0, W
  296.     subwf V0
  297.     btfsc STATUS, Z
  298.     call check_passcode2
  299.     ; TODO: if V0 != P0 -> LOCK
  300.     ; TODO: if V1 != P1 -> LOCK
  301.     ; TODO: else unlock
  302.     btfss STATUS, Z
  303.     call lock
  304.     return
  305.  
  306. check_passcode2
  307.     movf P1, W
  308.     subwf V1
  309.     btfsc STATUS, Z
  310.     call unlock
  311.     return
  312.    
  313. unlock
  314.     movlw b'10000001'
  315.     movwf PORTB
  316.     return
  317.    
  318. lock
  319.     movlw b'11000111'
  320.     movwf PORTB
  321.     return
  322.    
  323. END
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