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reversyn
Mar 24th, 2014
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  1. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
  2. target triple = "x86_64-linux-gnu"
  3.  
  4. declare  ccc i8* @memcpy(i8*, i8*, i64)
  5.  
  6. declare  ccc i8* @memmove(i8*, i8*, i64)
  7.  
  8. declare  ccc i8* @memset(i8*, i64, i64)
  9.  
  10. declare  ccc i64 @newSpark(i8*, i8*)
  11.  
  12. !0 = metadata !{metadata !"top"}
  13. !1 = metadata !{metadata !"stack",metadata !0}
  14. !2 = metadata !{metadata !"heap",metadata !0}
  15. !3 = metadata !{metadata !"rx",metadata !2}
  16. !4 = metadata !{metadata !"base",metadata !0}
  17. !5 = metadata !{metadata !"other",metadata !0}
  18.  
  19.  
  20. %__stginit_Main_struct = type <{}>
  21. @__stginit_Main =  global %__stginit_Main_struct<{}>
  22.                  
  23. %Main_zdwfactorial_closure_struct = type <{i64}>
  24. @Main_zdwfactorial_closure =  global %Main_zdwfactorial_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_zdwfactorial_info to i64)}>
  25.                              
  26. %Main_factorial_closure_struct = type <{i64}>
  27. @Main_factorial_closure =  global %Main_factorial_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_factorial_info to i64)}>
  28.                          
  29. %Main_main2_closure_struct = type <{i64, i64, i64, i64}>
  30. @Main_main2_closure =  global %Main_main2_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main2_info to i64), i64 0, i64 0, i64 0}>
  31.                      
  32. %Main_main1_srt_struct = type <{i64, i64, i64}>
  33. @Main_main1_srt = internal constant %Main_main1_srt_struct<{i64 ptrtoint ([0 x i64]* @base_GHCziIOziHandleziText_hPutStr2_closure to i64), i64 ptrtoint ([0 x i64]* @base_GHCziIOziHandleziFD_stdout_closure to i64), i64 ptrtoint (%Main_main2_closure_struct* @Main_main2_closure to i64)}>
  34.                  
  35. @base_GHCziIOziHandleziText_hPutStr2_closure = external global [0 x i64]
  36.                                                
  37. @base_GHCziIOziHandleziFD_stdout_closure = external global [0 x i64]
  38.                                            
  39. %Main_main1_closure_struct = type <{i64, i64}>
  40. @Main_main1_closure =  global %Main_main1_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main1_info to i64), i64 0}>
  41.                      
  42. %Main_main_srt_struct = type <{i64}>
  43. @Main_main_srt = internal constant %Main_main_srt_struct<{i64 ptrtoint (%Main_main1_closure_struct* @Main_main1_closure to i64)}>
  44.                  
  45. %Main_main_closure_struct = type <{i64, i64}>
  46. @Main_main_closure =  global %Main_main_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main_info to i64), i64 0}>
  47.                      
  48. %Main_main3_srt_struct = type <{i64, i64}>
  49. @Main_main3_srt = internal constant %Main_main3_srt_struct<{i64 ptrtoint ([0 x i64]* @base_GHCziTopHandler_runMainIO1_closure to i64), i64 ptrtoint (%Main_main1_closure_struct* @Main_main1_closure to i64)}>
  50.                  
  51. @base_GHCziTopHandler_runMainIO1_closure = external global [0 x i64]
  52.                                            
  53. %Main_main3_closure_struct = type <{i64, i64}>
  54. @Main_main3_closure =  global %Main_main3_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main3_info to i64), i64 0}>
  55.                      
  56. %ZCMain_main_srt_struct = type <{i64}>
  57. @ZCMain_main_srt = internal constant %ZCMain_main_srt_struct<{i64 ptrtoint (%Main_main3_closure_struct* @Main_main3_closure to i64)}>
  58.                    
  59. %ZCMain_main_closure_struct = type <{i64, i64}>
  60. @ZCMain_main_closure =  global %ZCMain_main_closure_struct<{i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @ZCMain_main_info to i64), i64 0}>
  61.                        
  62.  
  63. %s1Ip_ret_struct = type <{i64, i64}>
  64. @s1Ip_info_itable = internal constant %s1Ip_ret_struct<{i64 65, i64 32}>, section "X98A__STRIP,__me0", align 8
  65.                    
  66. define internal cc 10 void @s1Ip_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  67. {
  68. c1JJ:
  69.   %Base_Var = alloca i64*, i32 1
  70.   store i64* %Base_Arg, i64** %Base_Var
  71.   %Sp_Var = alloca i64*, i32 1
  72.   store i64* %Sp_Arg, i64** %Sp_Var
  73.   %Hp_Var = alloca i64*, i32 1
  74.   store i64* %Hp_Arg, i64** %Hp_Var
  75.   %R1_Var = alloca i64, i32 1
  76.   store i64 %R1_Arg, i64* %R1_Var
  77.   %R2_Var = alloca i64, i32 1
  78.   store i64 %R2_Arg, i64* %R2_Var
  79.   %R3_Var = alloca i64, i32 1
  80.   store i64 %R3_Arg, i64* %R3_Var
  81.   %R4_Var = alloca i64, i32 1
  82.   store i64 %R4_Arg, i64* %R4_Var
  83.   %R5_Var = alloca i64, i32 1
  84.   store i64 %R5_Arg, i64* %R5_Var
  85.   %R6_Var = alloca i64, i32 1
  86.   store i64 %R6_Arg, i64* %R6_Var
  87.   %SpLim_Var = alloca i64, i32 1
  88.   store i64 %SpLim_Arg, i64* %SpLim_Var
  89.   %F1_Var = alloca float, i32 1
  90.   store float %F1_Arg, float* %F1_Var
  91.   %F2_Var = alloca float, i32 1
  92.   store float %F2_Arg, float* %F2_Var
  93.   %F3_Var = alloca float, i32 1
  94.   store float %F3_Arg, float* %F3_Var
  95.   %F4_Var = alloca float, i32 1
  96.   store float %F4_Arg, float* %F4_Var
  97.   %D1_Var = alloca double, i32 1
  98.   store double %D1_Arg, double* %D1_Var
  99.   %D2_Var = alloca double, i32 1
  100.   store double %D2_Arg, double* %D2_Var
  101.   %lc1Jm = alloca i64, i32 1
  102.   %ln1JK = load i64** %Sp_Var
  103.   %ln1JL = getelementptr inbounds i64* %ln1JK, i32 1
  104.   %ln1JM = bitcast i64* %ln1JL to i64*
  105.   %ln1JN = load i64* %ln1JM, !tbaa !1
  106.   %ln1JO = load i64* %R1_Var
  107.   %ln1JP = mul i64 %ln1JN, %ln1JO
  108.   store i64 %ln1JP, i64* %lc1Jm
  109.   %ln1JQ = load i64* %lc1Jm
  110.   store i64 %ln1JQ, i64* %R1_Var
  111.   %ln1JR = load i64** %Sp_Var
  112.   %ln1JS = getelementptr inbounds i64* %ln1JR, i32 2
  113.   %ln1JT = ptrtoint i64* %ln1JS to i64
  114.   %ln1JU = inttoptr i64 %ln1JT to i64*
  115.   store i64* %ln1JU, i64** %Sp_Var
  116.   %ln1JV = load i64** %Sp_Var
  117.   %ln1JW = getelementptr inbounds i64* %ln1JV, i32 0
  118.   %ln1JX = bitcast i64* %ln1JW to i64*
  119.   %ln1JY = load i64* %ln1JX, !tbaa !1
  120.   %ln1JZ = inttoptr i64 %ln1JY to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  121.   %ln1K0 = load i64** %Base_Var
  122.   %ln1K1 = load i64** %Sp_Var
  123.   %ln1K2 = load i64** %Hp_Var
  124.   %ln1K3 = load i64* %R1_Var
  125.   %ln1K4 = load i64* %SpLim_Var
  126.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1JZ( i64* %ln1K0, i64* %ln1K1, i64* %ln1K2, i64 %ln1K3, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1K4, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  127.   ret void
  128.  
  129. }
  130.  
  131.  
  132.  
  133. %Main_zdwfactorial_info_struct = type <{i64, i64, i64}>
  134. @Main_zdwfactorial_info_itable =  constant %Main_zdwfactorial_info_struct<{i64 4294967300, i64 0, i64 15}>, section "X98A__STRIP,__me0", align 8
  135.                                  
  136. define  cc 10 void @Main_zdwfactorial_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  137. {
  138. c1KV:
  139.   %Base_Var = alloca i64*, i32 1
  140.   store i64* %Base_Arg, i64** %Base_Var
  141.   %Sp_Var = alloca i64*, i32 1
  142.   store i64* %Sp_Arg, i64** %Sp_Var
  143.   %Hp_Var = alloca i64*, i32 1
  144.   store i64* %Hp_Arg, i64** %Hp_Var
  145.   %R1_Var = alloca i64, i32 1
  146.   store i64 %R1_Arg, i64* %R1_Var
  147.   %R2_Var = alloca i64, i32 1
  148.   store i64 %R2_Arg, i64* %R2_Var
  149.   %R3_Var = alloca i64, i32 1
  150.   store i64 %R3_Arg, i64* %R3_Var
  151.   %R4_Var = alloca i64, i32 1
  152.   store i64 %R4_Arg, i64* %R4_Var
  153.   %R5_Var = alloca i64, i32 1
  154.   store i64 %R5_Arg, i64* %R5_Var
  155.   %R6_Var = alloca i64, i32 1
  156.   store i64 %R6_Arg, i64* %R6_Var
  157.   %SpLim_Var = alloca i64, i32 1
  158.   store i64 %SpLim_Arg, i64* %SpLim_Var
  159.   %F1_Var = alloca float, i32 1
  160.   store float %F1_Arg, float* %F1_Var
  161.   %F2_Var = alloca float, i32 1
  162.   store float %F2_Arg, float* %F2_Var
  163.   %F3_Var = alloca float, i32 1
  164.   store float %F3_Arg, float* %F3_Var
  165.   %F4_Var = alloca float, i32 1
  166.   store float %F4_Arg, float* %F4_Var
  167.   %D1_Var = alloca double, i32 1
  168.   store double %D1_Arg, double* %D1_Var
  169.   %D2_Var = alloca double, i32 1
  170.   store double %D2_Arg, double* %D2_Var
  171.   %ls1Im = alloca i64, i32 1
  172.   %ls1IE = alloca i64, i32 1
  173.   %ln1KW = load i64** %Sp_Var
  174.   %ln1KX = getelementptr inbounds i64* %ln1KW, i32 -2
  175.   %ln1KY = ptrtoint i64* %ln1KX to i64
  176.   %ln1KZ = load i64* %SpLim_Var
  177.   %ln1L0 = icmp ult i64 %ln1KY, %ln1KZ
  178.   br i1 %ln1L0, label %c1L2, label %n1L3
  179.  
  180. n1L3:
  181.   %ln1L4 = load i64* %R2_Var
  182.   store i64 %ln1L4, i64* %ls1Im
  183.   %ln1L5 = load i64* %ls1Im
  184.   %ln1L6 = icmp ne i64 %ln1L5, 0
  185.   br i1 %ln1L6, label %c1L8, label %n1L9
  186.  
  187. n1L9:
  188.   store i64 1, i64* %R1_Var
  189.   %ln1La = load i64** %Sp_Var
  190.   %ln1Lb = getelementptr inbounds i64* %ln1La, i32 0
  191.   %ln1Lc = bitcast i64* %ln1Lb to i64*
  192.   %ln1Ld = load i64* %ln1Lc, !tbaa !1
  193.   %ln1Le = inttoptr i64 %ln1Ld to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  194.   %ln1Lf = load i64** %Base_Var
  195.   %ln1Lg = load i64** %Sp_Var
  196.   %ln1Lh = load i64** %Hp_Var
  197.   %ln1Li = load i64* %R1_Var
  198.   %ln1Lj = load i64* %SpLim_Var
  199.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1Le( i64* %ln1Lf, i64* %ln1Lg, i64* %ln1Lh, i64 %ln1Li, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Lj, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  200.   ret void
  201.  
  202. c1L2:
  203.   %ln1Lk = ptrtoint %Main_zdwfactorial_closure_struct* @Main_zdwfactorial_closure to i64
  204.   store i64 %ln1Lk, i64* %R1_Var
  205.   %ln1Ll = load i64** %Base_Var
  206.   %ln1Lm = getelementptr inbounds i64* %ln1Ll, i32 -1
  207.   %ln1Ln = bitcast i64* %ln1Lm to i64*
  208.   %ln1Lo = load i64* %ln1Ln, !tbaa !4
  209.   %ln1Lp = inttoptr i64 %ln1Lo to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  210.   %ln1Lq = load i64** %Base_Var
  211.   %ln1Lr = load i64** %Sp_Var
  212.   %ln1Ls = load i64** %Hp_Var
  213.   %ln1Lt = load i64* %R1_Var
  214.   %ln1Lu = load i64* %R2_Var
  215.   %ln1Lv = load i64* %SpLim_Var
  216.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1Lp( i64* %ln1Lq, i64* %ln1Lr, i64* %ln1Ls, i64 %ln1Lt, i64 %ln1Lu, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Lv, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  217.   ret void
  218.  
  219. c1L8:
  220.   %ln1Lw = load i64* %ls1Im
  221.   %ln1Lx = sub i64 %ln1Lw, 1
  222.   store i64 %ln1Lx, i64* %ls1IE
  223.   %ln1Ly = load i64* %ls1Im
  224.   %ln1Lz = load i64** %Sp_Var
  225.   %ln1LA = getelementptr inbounds i64* %ln1Lz, i32 -1
  226.   store i64 %ln1Ly, i64* %ln1LA, !tbaa !1
  227.   %ln1LB = load i64* %ls1IE
  228.   store i64 %ln1LB, i64* %R2_Var
  229.   %ln1LC = ptrtoint void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @s1Ip_info to i64
  230.   %ln1LD = load i64** %Sp_Var
  231.   %ln1LE = getelementptr inbounds i64* %ln1LD, i32 -2
  232.   store i64 %ln1LC, i64* %ln1LE, !tbaa !1
  233.   %ln1LF = load i64** %Sp_Var
  234.   %ln1LG = getelementptr inbounds i64* %ln1LF, i32 -2
  235.   %ln1LH = ptrtoint i64* %ln1LG to i64
  236.   %ln1LI = inttoptr i64 %ln1LH to i64*
  237.   store i64* %ln1LI, i64** %Sp_Var
  238.   %ln1LJ = load i64** %Base_Var
  239.   %ln1LK = load i64** %Sp_Var
  240.   %ln1LL = load i64** %Hp_Var
  241.   %ln1LM = load i64* %R1_Var
  242.   %ln1LN = load i64* %R2_Var
  243.   %ln1LO = load i64* %SpLim_Var
  244.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @Main_zdwfactorial_info( i64* %ln1LJ, i64* %ln1LK, i64* %ln1LL, i64 %ln1LM, i64 %ln1LN, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1LO, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  245.   ret void
  246.  
  247. }
  248.  
  249.  
  250.  
  251. %s1Iw_ret_struct = type <{i64, i64}>
  252. @s1Iw_info_itable = internal constant %s1Iw_ret_struct<{i64 0, i64 32}>, section "X98A__STRIP,__me0", align 8
  253.                    
  254. define internal cc 10 void @s1Iw_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  255. {
  256. c1MG:
  257.   %Base_Var = alloca i64*, i32 1
  258.   store i64* %Base_Arg, i64** %Base_Var
  259.   %Sp_Var = alloca i64*, i32 1
  260.   store i64* %Sp_Arg, i64** %Sp_Var
  261.   %Hp_Var = alloca i64*, i32 1
  262.   store i64* %Hp_Arg, i64** %Hp_Var
  263.   %R1_Var = alloca i64, i32 1
  264.   store i64 %R1_Arg, i64* %R1_Var
  265.   %R2_Var = alloca i64, i32 1
  266.   store i64 %R2_Arg, i64* %R2_Var
  267.   %R3_Var = alloca i64, i32 1
  268.   store i64 %R3_Arg, i64* %R3_Var
  269.   %R4_Var = alloca i64, i32 1
  270.   store i64 %R4_Arg, i64* %R4_Var
  271.   %R5_Var = alloca i64, i32 1
  272.   store i64 %R5_Arg, i64* %R5_Var
  273.   %R6_Var = alloca i64, i32 1
  274.   store i64 %R6_Arg, i64* %R6_Var
  275.   %SpLim_Var = alloca i64, i32 1
  276.   store i64 %SpLim_Arg, i64* %SpLim_Var
  277.   %F1_Var = alloca float, i32 1
  278.   store float %F1_Arg, float* %F1_Var
  279.   %F2_Var = alloca float, i32 1
  280.   store float %F2_Arg, float* %F2_Var
  281.   %F3_Var = alloca float, i32 1
  282.   store float %F3_Arg, float* %F3_Var
  283.   %F4_Var = alloca float, i32 1
  284.   store float %F4_Arg, float* %F4_Var
  285.   %D1_Var = alloca double, i32 1
  286.   store double %D1_Arg, double* %D1_Var
  287.   %D2_Var = alloca double, i32 1
  288.   store double %D2_Arg, double* %D2_Var
  289.   %ln1MH = load i64** %Hp_Var
  290.   %ln1MI = getelementptr inbounds i64* %ln1MH, i32 2
  291.   %ln1MJ = ptrtoint i64* %ln1MI to i64
  292.   %ln1MK = inttoptr i64 %ln1MJ to i64*
  293.   store i64* %ln1MK, i64** %Hp_Var
  294.   %ln1ML = load i64** %Hp_Var
  295.   %ln1MM = ptrtoint i64* %ln1ML to i64
  296.   %ln1MN = load i64** %Base_Var
  297.   %ln1MO = getelementptr inbounds i64* %ln1MN, i32 18
  298.   %ln1MP = bitcast i64* %ln1MO to i64*
  299.   %ln1MQ = load i64* %ln1MP, !tbaa !4
  300.   %ln1MR = icmp ugt i64 %ln1MM, %ln1MQ
  301.   br i1 %ln1MR, label %c1MX, label %n1MY
  302.  
  303. n1MY:
  304.   %ln1MZ = ptrtoint [0 x i64]* @ghczmprim_GHCziTypes_Izh_con_info to i64
  305.   %ln1N0 = load i64** %Hp_Var
  306.   %ln1N1 = getelementptr inbounds i64* %ln1N0, i32 -1
  307.   store i64 %ln1MZ, i64* %ln1N1, !tbaa !2
  308.   %ln1N2 = load i64* %R1_Var
  309.   %ln1N3 = load i64** %Hp_Var
  310.   %ln1N4 = getelementptr inbounds i64* %ln1N3, i32 0
  311.   store i64 %ln1N2, i64* %ln1N4, !tbaa !2
  312.   %ln1N5 = load i64** %Hp_Var
  313.   %ln1N6 = ptrtoint i64* %ln1N5 to i64
  314.   %ln1N7 = add i64 %ln1N6, -7
  315.   store i64 %ln1N7, i64* %R1_Var
  316.   %ln1N8 = load i64** %Sp_Var
  317.   %ln1N9 = getelementptr inbounds i64* %ln1N8, i32 1
  318.   %ln1Na = ptrtoint i64* %ln1N9 to i64
  319.   %ln1Nb = inttoptr i64 %ln1Na to i64*
  320.   store i64* %ln1Nb, i64** %Sp_Var
  321.   %ln1Nc = load i64** %Sp_Var
  322.   %ln1Nd = getelementptr inbounds i64* %ln1Nc, i32 0
  323.   %ln1Ne = bitcast i64* %ln1Nd to i64*
  324.   %ln1Nf = load i64* %ln1Ne, !tbaa !1
  325.   %ln1Ng = inttoptr i64 %ln1Nf to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  326.   %ln1Nh = load i64** %Base_Var
  327.   %ln1Ni = load i64** %Sp_Var
  328.   %ln1Nj = load i64** %Hp_Var
  329.   %ln1Nk = load i64* %R1_Var
  330.   %ln1Nl = load i64* %SpLim_Var
  331.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1Ng( i64* %ln1Nh, i64* %ln1Ni, i64* %ln1Nj, i64 %ln1Nk, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Nl, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  332.   ret void
  333.  
  334. c1Nm:
  335.   %ln1Nn = load i64** %Base_Var
  336.   %ln1No = load i64** %Sp_Var
  337.   %ln1Np = load i64** %Hp_Var
  338.   %ln1Nq = load i64* %R1_Var
  339.   %ln1Nr = load i64* %SpLim_Var
  340.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @stg_gc_unbx_r1( i64* %ln1Nn, i64* %ln1No, i64* %ln1Np, i64 %ln1Nq, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Nr, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  341.   ret void
  342.  
  343. c1MX:
  344.   %ln1Ns = load i64** %Base_Var
  345.   %ln1Nt = getelementptr inbounds i64* %ln1Ns, i32 24
  346.   store i64 16, i64* %ln1Nt, !tbaa !4
  347.   br label %c1Nm
  348.  
  349. }
  350.  
  351.  
  352. @ghczmprim_GHCziTypes_Izh_con_info = external global [0 x i64]
  353.                                      
  354. declare  cc 10 void @stg_gc_unbx_r1(i64* noalias nocapture, i64* noalias nocapture, i64* noalias nocapture, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double) align 8
  355.  
  356.  
  357. %s1IR_ret_struct = type <{i64, i64}>
  358. @s1IR_info_itable = internal constant %s1IR_ret_struct<{i64 0, i64 32}>, section "X98A__STRIP,__me0", align 8
  359.                    
  360. define internal cc 10 void @s1IR_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  361. {
  362. c1NI:
  363.   %Base_Var = alloca i64*, i32 1
  364.   store i64* %Base_Arg, i64** %Base_Var
  365.   %Sp_Var = alloca i64*, i32 1
  366.   store i64* %Sp_Arg, i64** %Sp_Var
  367.   %Hp_Var = alloca i64*, i32 1
  368.   store i64* %Hp_Arg, i64** %Hp_Var
  369.   %R1_Var = alloca i64, i32 1
  370.   store i64 %R1_Arg, i64* %R1_Var
  371.   %R2_Var = alloca i64, i32 1
  372.   store i64 %R2_Arg, i64* %R2_Var
  373.   %R3_Var = alloca i64, i32 1
  374.   store i64 %R3_Arg, i64* %R3_Var
  375.   %R4_Var = alloca i64, i32 1
  376.   store i64 %R4_Arg, i64* %R4_Var
  377.   %R5_Var = alloca i64, i32 1
  378.   store i64 %R5_Arg, i64* %R5_Var
  379.   %R6_Var = alloca i64, i32 1
  380.   store i64 %R6_Arg, i64* %R6_Var
  381.   %SpLim_Var = alloca i64, i32 1
  382.   store i64 %SpLim_Arg, i64* %SpLim_Var
  383.   %F1_Var = alloca float, i32 1
  384.   store float %F1_Arg, float* %F1_Var
  385.   %F2_Var = alloca float, i32 1
  386.   store float %F2_Arg, float* %F2_Var
  387.   %F3_Var = alloca float, i32 1
  388.   store float %F3_Arg, float* %F3_Var
  389.   %F4_Var = alloca float, i32 1
  390.   store float %F4_Arg, float* %F4_Var
  391.   %D1_Var = alloca double, i32 1
  392.   store double %D1_Arg, double* %D1_Var
  393.   %D2_Var = alloca double, i32 1
  394.   store double %D2_Arg, double* %D2_Var
  395.   %ln1NJ = load i64* %R1_Var
  396.   %ln1NK = add i64 %ln1NJ, 7
  397.   %ln1NL = inttoptr i64 %ln1NK to i64*
  398.   %ln1NM = load i64* %ln1NL, !tbaa !3
  399.   store i64 %ln1NM, i64* %R2_Var
  400.   %ln1NN = ptrtoint void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @s1Iw_info to i64
  401.   %ln1NO = load i64** %Sp_Var
  402.   %ln1NP = getelementptr inbounds i64* %ln1NO, i32 0
  403.   store i64 %ln1NN, i64* %ln1NP, !tbaa !1
  404.   %ln1NQ = load i64** %Base_Var
  405.   %ln1NR = load i64** %Sp_Var
  406.   %ln1NS = load i64** %Hp_Var
  407.   %ln1NT = load i64* %R1_Var
  408.   %ln1NU = load i64* %R2_Var
  409.   %ln1NV = load i64* %SpLim_Var
  410.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @Main_zdwfactorial_info( i64* %ln1NQ, i64* %ln1NR, i64* %ln1NS, i64 %ln1NT, i64 %ln1NU, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1NV, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  411.   ret void
  412.  
  413. }
  414.  
  415.  
  416.  
  417. %Main_factorial_info_struct = type <{i64, i64, i64}>
  418. @Main_factorial_info_itable =  constant %Main_factorial_info_struct<{i64 4294967301, i64 0, i64 15}>, section "X98A__STRIP,__me0", align 8
  419.                              
  420. define  cc 10 void @Main_factorial_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  421. {
  422. c1OF:
  423.   %Base_Var = alloca i64*, i32 1
  424.   store i64* %Base_Arg, i64** %Base_Var
  425.   %Sp_Var = alloca i64*, i32 1
  426.   store i64* %Sp_Arg, i64** %Sp_Var
  427.   %Hp_Var = alloca i64*, i32 1
  428.   store i64* %Hp_Arg, i64** %Hp_Var
  429.   %R1_Var = alloca i64, i32 1
  430.   store i64 %R1_Arg, i64* %R1_Var
  431.   %R2_Var = alloca i64, i32 1
  432.   store i64 %R2_Arg, i64* %R2_Var
  433.   %R3_Var = alloca i64, i32 1
  434.   store i64 %R3_Arg, i64* %R3_Var
  435.   %R4_Var = alloca i64, i32 1
  436.   store i64 %R4_Arg, i64* %R4_Var
  437.   %R5_Var = alloca i64, i32 1
  438.   store i64 %R5_Arg, i64* %R5_Var
  439.   %R6_Var = alloca i64, i32 1
  440.   store i64 %R6_Arg, i64* %R6_Var
  441.   %SpLim_Var = alloca i64, i32 1
  442.   store i64 %SpLim_Arg, i64* %SpLim_Var
  443.   %F1_Var = alloca float, i32 1
  444.   store float %F1_Arg, float* %F1_Var
  445.   %F2_Var = alloca float, i32 1
  446.   store float %F2_Arg, float* %F2_Var
  447.   %F3_Var = alloca float, i32 1
  448.   store float %F3_Arg, float* %F3_Var
  449.   %F4_Var = alloca float, i32 1
  450.   store float %F4_Arg, float* %F4_Var
  451.   %D1_Var = alloca double, i32 1
  452.   store double %D1_Arg, double* %D1_Var
  453.   %D2_Var = alloca double, i32 1
  454.   store double %D2_Arg, double* %D2_Var
  455.   %ln1OG = load i64** %Sp_Var
  456.   %ln1OH = getelementptr inbounds i64* %ln1OG, i32 -1
  457.   %ln1OI = ptrtoint i64* %ln1OH to i64
  458.   %ln1OJ = load i64* %SpLim_Var
  459.   %ln1OK = icmp ult i64 %ln1OI, %ln1OJ
  460.   br i1 %ln1OK, label %c1OM, label %n1ON
  461.  
  462. n1ON:
  463.   %ln1OO = load i64* %R2_Var
  464.   store i64 %ln1OO, i64* %R1_Var
  465.   %ln1OP = ptrtoint void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @s1IR_info to i64
  466.   %ln1OQ = load i64** %Sp_Var
  467.   %ln1OR = getelementptr inbounds i64* %ln1OQ, i32 -1
  468.   store i64 %ln1OP, i64* %ln1OR, !tbaa !1
  469.   %ln1OS = load i64** %Sp_Var
  470.   %ln1OT = getelementptr inbounds i64* %ln1OS, i32 -1
  471.   %ln1OU = ptrtoint i64* %ln1OT to i64
  472.   %ln1OV = inttoptr i64 %ln1OU to i64*
  473.   store i64* %ln1OV, i64** %Sp_Var
  474.   %ln1OW = load i64* %R1_Var
  475.   %ln1OX = and i64 %ln1OW, 7
  476.   %ln1OY = icmp ne i64 %ln1OX, 0
  477.   br i1 %ln1OY, label %c1P1, label %n1P2
  478.  
  479. n1P2:
  480.   %ln1P3 = load i64* %R1_Var
  481.   %ln1P4 = inttoptr i64 %ln1P3 to i64*
  482.   %ln1P5 = load i64* %ln1P4, !tbaa !3
  483.   %ln1P6 = inttoptr i64 %ln1P5 to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  484.   %ln1P7 = load i64** %Base_Var
  485.   %ln1P8 = load i64** %Sp_Var
  486.   %ln1P9 = load i64** %Hp_Var
  487.   %ln1Pa = load i64* %R1_Var
  488.   %ln1Pb = load i64* %SpLim_Var
  489.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1P6( i64* %ln1P7, i64* %ln1P8, i64* %ln1P9, i64 %ln1Pa, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Pb, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  490.   ret void
  491.  
  492. c1OM:
  493.   %ln1Pc = ptrtoint %Main_factorial_closure_struct* @Main_factorial_closure to i64
  494.   store i64 %ln1Pc, i64* %R1_Var
  495.   %ln1Pd = load i64** %Base_Var
  496.   %ln1Pe = getelementptr inbounds i64* %ln1Pd, i32 -1
  497.   %ln1Pf = bitcast i64* %ln1Pe to i64*
  498.   %ln1Pg = load i64* %ln1Pf, !tbaa !4
  499.   %ln1Ph = inttoptr i64 %ln1Pg to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  500.   %ln1Pi = load i64** %Base_Var
  501.   %ln1Pj = load i64** %Sp_Var
  502.   %ln1Pk = load i64** %Hp_Var
  503.   %ln1Pl = load i64* %R1_Var
  504.   %ln1Pm = load i64* %R2_Var
  505.   %ln1Pn = load i64* %SpLim_Var
  506.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1Ph( i64* %ln1Pi, i64* %ln1Pj, i64* %ln1Pk, i64 %ln1Pl, i64 %ln1Pm, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Pn, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  507.   ret void
  508.  
  509. c1P1:
  510.   %ln1Po = load i64** %Base_Var
  511.   %ln1Pp = load i64** %Sp_Var
  512.   %ln1Pq = load i64** %Hp_Var
  513.   %ln1Pr = load i64* %R1_Var
  514.   %ln1Ps = load i64* %SpLim_Var
  515.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @s1IR_info( i64* %ln1Po, i64* %ln1Pp, i64* %ln1Pq, i64 %ln1Pr, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Ps, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  516.   ret void
  517.  
  518. }
  519.  
  520.  
  521.  
  522. %s1Iy_ret_struct = type <{i64, i64}>
  523. @s1Iy_info_itable = internal constant %s1Iy_ret_struct<{i64 0, i64 32}>, section "X98A__STRIP,__me0", align 8
  524.                    
  525. define internal cc 10 void @s1Iy_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  526. {
  527. c1PR:
  528.   %Base_Var = alloca i64*, i32 1
  529.   store i64* %Base_Arg, i64** %Base_Var
  530.   %Sp_Var = alloca i64*, i32 1
  531.   store i64* %Sp_Arg, i64** %Sp_Var
  532.   %Hp_Var = alloca i64*, i32 1
  533.   store i64* %Hp_Arg, i64** %Hp_Var
  534.   %R1_Var = alloca i64, i32 1
  535.   store i64 %R1_Arg, i64* %R1_Var
  536.   %R2_Var = alloca i64, i32 1
  537.   store i64 %R2_Arg, i64* %R2_Var
  538.   %R3_Var = alloca i64, i32 1
  539.   store i64 %R3_Arg, i64* %R3_Var
  540.   %R4_Var = alloca i64, i32 1
  541.   store i64 %R4_Arg, i64* %R4_Var
  542.   %R5_Var = alloca i64, i32 1
  543.   store i64 %R5_Arg, i64* %R5_Var
  544.   %R6_Var = alloca i64, i32 1
  545.   store i64 %R6_Arg, i64* %R6_Var
  546.   %SpLim_Var = alloca i64, i32 1
  547.   store i64 %SpLim_Arg, i64* %SpLim_Var
  548.   %F1_Var = alloca float, i32 1
  549.   store float %F1_Arg, float* %F1_Var
  550.   %F2_Var = alloca float, i32 1
  551.   store float %F2_Arg, float* %F2_Var
  552.   %F3_Var = alloca float, i32 1
  553.   store float %F3_Arg, float* %F3_Var
  554.   %F4_Var = alloca float, i32 1
  555.   store float %F4_Arg, float* %F4_Var
  556.   %D1_Var = alloca double, i32 1
  557.   store double %D1_Arg, double* %D1_Var
  558.   %D2_Var = alloca double, i32 1
  559.   store double %D2_Arg, double* %D2_Var
  560.   store i64 0, i64* %R2_Var
  561.   %ln1PS = load i64* %R1_Var
  562.   store i64 %ln1PS, i64* %R3_Var
  563.   %ln1PT = ptrtoint [0 x i64]* @ghczmprim_GHCziTypes_ZMZN_closure to i64
  564.   %ln1PU = add i64 %ln1PT, 1
  565.   store i64 %ln1PU, i64* %R4_Var
  566.   %ln1PV = load i64** %Sp_Var
  567.   %ln1PW = getelementptr inbounds i64* %ln1PV, i32 1
  568.   %ln1PX = ptrtoint i64* %ln1PW to i64
  569.   %ln1PY = inttoptr i64 %ln1PX to i64*
  570.   store i64* %ln1PY, i64** %Sp_Var
  571.   %ln1PZ = load i64** %Base_Var
  572.   %ln1Q0 = load i64** %Sp_Var
  573.   %ln1Q1 = load i64** %Hp_Var
  574.   %ln1Q2 = load i64* %R1_Var
  575.   %ln1Q3 = load i64* %R2_Var
  576.   %ln1Q4 = load i64* %R3_Var
  577.   %ln1Q5 = load i64* %R4_Var
  578.   %ln1Q6 = load i64* %SpLim_Var
  579.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @base_GHCziShow_zdwshowSignedInt_info( i64* %ln1PZ, i64* %ln1Q0, i64* %ln1Q1, i64 %ln1Q2, i64 %ln1Q3, i64 %ln1Q4, i64 %ln1Q5, i64 undef, i64 undef, i64 %ln1Q6, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  580.   ret void
  581.  
  582. }
  583.  
  584.  
  585. @ghczmprim_GHCziTypes_ZMZN_closure = external global [0 x i64]
  586.                                      
  587. declare  cc 10 void @base_GHCziShow_zdwshowSignedInt_info(i64* noalias nocapture, i64* noalias nocapture, i64* noalias nocapture, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double) align 8
  588.  
  589.  
  590. %Main_main2_info_struct = type <{i64, i64}>
  591. @Main_main2_info_itable =  constant %Main_main2_info_struct<{i64 0, i64 22}>, section "X98A__STRIP,__me0", align 8
  592.                          
  593. define  cc 10 void @Main_main2_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  594. {
  595. c1Ru:
  596.   %Base_Var = alloca i64*, i32 1
  597.   store i64* %Base_Arg, i64** %Base_Var
  598.   %Sp_Var = alloca i64*, i32 1
  599.   store i64* %Sp_Arg, i64** %Sp_Var
  600.   %Hp_Var = alloca i64*, i32 1
  601.   store i64* %Hp_Arg, i64** %Hp_Var
  602.   %R1_Var = alloca i64, i32 1
  603.   store i64 %R1_Arg, i64* %R1_Var
  604.   %R2_Var = alloca i64, i32 1
  605.   store i64 %R2_Arg, i64* %R2_Var
  606.   %R3_Var = alloca i64, i32 1
  607.   store i64 %R3_Arg, i64* %R3_Var
  608.   %R4_Var = alloca i64, i32 1
  609.   store i64 %R4_Arg, i64* %R4_Var
  610.   %R5_Var = alloca i64, i32 1
  611.   store i64 %R5_Arg, i64* %R5_Var
  612.   %R6_Var = alloca i64, i32 1
  613.   store i64 %R6_Arg, i64* %R6_Var
  614.   %SpLim_Var = alloca i64, i32 1
  615.   store i64 %SpLim_Arg, i64* %SpLim_Var
  616.   %F1_Var = alloca float, i32 1
  617.   store float %F1_Arg, float* %F1_Var
  618.   %F2_Var = alloca float, i32 1
  619.   store float %F2_Arg, float* %F2_Var
  620.   %F3_Var = alloca float, i32 1
  621.   store float %F3_Arg, float* %F3_Var
  622.   %F4_Var = alloca float, i32 1
  623.   store float %F4_Arg, float* %F4_Var
  624.   %D1_Var = alloca double, i32 1
  625.   store double %D1_Arg, double* %D1_Var
  626.   %D2_Var = alloca double, i32 1
  627.   store double %D2_Arg, double* %D2_Var
  628.   %lc1QH = alloca i64, i32 1
  629.   %ln1Rv = load i64** %Sp_Var
  630.   %ln1Rw = getelementptr inbounds i64* %ln1Rv, i32 -3
  631.   %ln1Rx = ptrtoint i64* %ln1Rw to i64
  632.   %ln1Ry = load i64* %SpLim_Var
  633.   %ln1Rz = icmp ult i64 %ln1Rx, %ln1Ry
  634.   br i1 %ln1Rz, label %c1RB, label %n1RC
  635.  
  636. n1RC:
  637.   %ln1RD = load i64** %Hp_Var
  638.   %ln1RE = getelementptr inbounds i64* %ln1RD, i32 2
  639.   %ln1RF = ptrtoint i64* %ln1RE to i64
  640.   %ln1RG = inttoptr i64 %ln1RF to i64*
  641.   store i64* %ln1RG, i64** %Hp_Var
  642.   %ln1RH = load i64** %Hp_Var
  643.   %ln1RI = ptrtoint i64* %ln1RH to i64
  644.   %ln1RJ = load i64** %Base_Var
  645.   %ln1RK = getelementptr inbounds i64* %ln1RJ, i32 18
  646.   %ln1RL = bitcast i64* %ln1RK to i64*
  647.   %ln1RM = load i64* %ln1RL, !tbaa !4
  648.   %ln1RN = icmp ugt i64 %ln1RI, %ln1RM
  649.   br i1 %ln1RN, label %c1RP, label %n1RQ
  650.  
  651. n1RQ:
  652.   %ln1RR = ptrtoint [0 x i64]* @stg_CAF_BLACKHOLE_info to i64
  653.   %ln1RS = load i64** %Hp_Var
  654.   %ln1RT = getelementptr inbounds i64* %ln1RS, i32 -1
  655.   store i64 %ln1RR, i64* %ln1RT, !tbaa !2
  656.   %ln1RU = load i64** %Base_Var
  657.   %ln1RV = getelementptr inbounds i64* %ln1RU, i32 20
  658.   %ln1RW = bitcast i64* %ln1RV to i64*
  659.   %ln1RX = load i64* %ln1RW, !tbaa !4
  660.   %ln1RY = load i64** %Hp_Var
  661.   %ln1RZ = getelementptr inbounds i64* %ln1RY, i32 0
  662.   store i64 %ln1RX, i64* %ln1RZ, !tbaa !2
  663.   %ln1S0 = load i64** %Base_Var
  664.   %ln1S1 = ptrtoint i64* %ln1S0 to i64
  665.   %ln1S2 = inttoptr i64 %ln1S1 to i8*
  666.   %ln1S3 = load i64* %R1_Var
  667.   %ln1S4 = inttoptr i64 %ln1S3 to i8*
  668.   %ln1S5 = load i64** %Hp_Var
  669.   %ln1S6 = getelementptr inbounds i64* %ln1S5, i32 -1
  670.   %ln1S7 = ptrtoint i64* %ln1S6 to i64
  671.   %ln1S8 = inttoptr i64 %ln1S7 to i8*
  672.   store i64 undef, i64* %R3_Var
  673.   store i64 undef, i64* %R4_Var
  674.   store i64 undef, i64* %R5_Var
  675.   store i64 undef, i64* %R6_Var
  676.   store float undef, float* %F1_Var
  677.   store float undef, float* %F2_Var
  678.   store float undef, float* %F3_Var
  679.   store float undef, float* %F4_Var
  680.   store double undef, double* %D1_Var
  681.   store double undef, double* %D2_Var
  682.   %ln1S9 = call ccc i64 (i8*,i8*,i8*)* @newCAF( i8* %ln1S2, i8* %ln1S4, i8* %ln1S8 ) nounwind
  683.   store i64 %ln1S9, i64* %lc1QH
  684.   %ln1Sa = load i64* %lc1QH
  685.   %ln1Sb = icmp eq i64 %ln1Sa, 0
  686.   br i1 %ln1Sb, label %c1Sc, label %n1Sd
  687.  
  688. n1Sd:
  689.   br label %c1Se
  690.  
  691. c1RB:
  692.   %ln1Sf = load i64** %Base_Var
  693.   %ln1Sg = getelementptr inbounds i64* %ln1Sf, i32 -2
  694.   %ln1Sh = bitcast i64* %ln1Sg to i64*
  695.   %ln1Si = load i64* %ln1Sh, !tbaa !4
  696.   %ln1Sj = inttoptr i64 %ln1Si to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  697.   %ln1Sk = load i64** %Base_Var
  698.   %ln1Sl = load i64** %Sp_Var
  699.   %ln1Sm = load i64** %Hp_Var
  700.   %ln1Sn = load i64* %R1_Var
  701.   %ln1So = load i64* %SpLim_Var
  702.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1Sj( i64* %ln1Sk, i64* %ln1Sl, i64* %ln1Sm, i64 %ln1Sn, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1So, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  703.   ret void
  704.  
  705. c1RP:
  706.   %ln1Sp = load i64** %Base_Var
  707.   %ln1Sq = getelementptr inbounds i64* %ln1Sp, i32 24
  708.   store i64 16, i64* %ln1Sq, !tbaa !4
  709.   br label %c1RB
  710.  
  711. c1Sc:
  712.   %ln1Sr = load i64* %R1_Var
  713.   %ln1Ss = inttoptr i64 %ln1Sr to i64*
  714.   %ln1St = load i64* %ln1Ss, !tbaa !3
  715.   %ln1Su = inttoptr i64 %ln1St to void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)*
  716.   %ln1Sv = load i64** %Base_Var
  717.   %ln1Sw = load i64** %Sp_Var
  718.   %ln1Sx = load i64** %Hp_Var
  719.   %ln1Sy = load i64* %R1_Var
  720.   %ln1Sz = load i64* %SpLim_Var
  721.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* %ln1Su( i64* %ln1Sv, i64* %ln1Sw, i64* %ln1Sx, i64 %ln1Sy, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Sz, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  722.   ret void
  723.  
  724. c1Se:
  725.   %ln1SA = ptrtoint [0 x i64]* @stg_bh_upd_frame_info to i64
  726.   %ln1SB = load i64** %Sp_Var
  727.   %ln1SC = getelementptr inbounds i64* %ln1SB, i32 -2
  728.   store i64 %ln1SA, i64* %ln1SC, !tbaa !1
  729.   %ln1SD = load i64** %Hp_Var
  730.   %ln1SE = getelementptr inbounds i64* %ln1SD, i32 -1
  731.   %ln1SF = ptrtoint i64* %ln1SE to i64
  732.   %ln1SG = load i64** %Sp_Var
  733.   %ln1SH = getelementptr inbounds i64* %ln1SG, i32 -1
  734.   store i64 %ln1SF, i64* %ln1SH, !tbaa !1
  735.   store i64 10, i64* %R2_Var
  736.   %ln1SI = ptrtoint void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @s1Iy_info to i64
  737.   %ln1SJ = load i64** %Sp_Var
  738.   %ln1SK = getelementptr inbounds i64* %ln1SJ, i32 -3
  739.   store i64 %ln1SI, i64* %ln1SK, !tbaa !1
  740.   %ln1SL = load i64** %Sp_Var
  741.   %ln1SM = getelementptr inbounds i64* %ln1SL, i32 -3
  742.   %ln1SN = ptrtoint i64* %ln1SM to i64
  743.   %ln1SO = inttoptr i64 %ln1SN to i64*
  744.   store i64* %ln1SO, i64** %Sp_Var
  745.   %ln1SP = load i64** %Base_Var
  746.   %ln1SQ = load i64** %Sp_Var
  747.   %ln1SR = load i64** %Hp_Var
  748.   %ln1SS = load i64* %R1_Var
  749.   %ln1ST = load i64* %R2_Var
  750.   %ln1SU = load i64* %SpLim_Var
  751.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @Main_zdwfactorial_info( i64* %ln1SP, i64* %ln1SQ, i64* %ln1SR, i64 %ln1SS, i64 %ln1ST, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1SU, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  752.   ret void
  753.  
  754. }
  755.  
  756.  
  757. @stg_CAF_BLACKHOLE_info = external global [0 x i64]
  758.                          
  759. declare  ccc i64 @newCAF(i8*, i8*, i8*) align 8
  760.  
  761. @stg_bh_upd_frame_info = external global [0 x i64]
  762.                          
  763.  
  764. %Main_main1_info_struct = type <{i64, i64, i64, i64}>
  765. @Main_main1_info_itable =  constant %Main_main1_info_struct<{i64 add (i64 sub (i64 ptrtoint (%Main_main1_srt_struct* @Main_main1_srt to i64),i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main1_info to i64)),i64 0), i64 4294967299, i64 0, i64 30064771087}>, section "X98A__STRIP,__me0", align 8
  766.                          
  767. define  cc 10 void @Main_main1_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  768. {
  769. c1Tb:
  770.   %Base_Var = alloca i64*, i32 1
  771.   store i64* %Base_Arg, i64** %Base_Var
  772.   %Sp_Var = alloca i64*, i32 1
  773.   store i64* %Sp_Arg, i64** %Sp_Var
  774.   %Hp_Var = alloca i64*, i32 1
  775.   store i64* %Hp_Arg, i64** %Hp_Var
  776.   %R1_Var = alloca i64, i32 1
  777.   store i64 %R1_Arg, i64* %R1_Var
  778.   %R2_Var = alloca i64, i32 1
  779.   store i64 %R2_Arg, i64* %R2_Var
  780.   %R3_Var = alloca i64, i32 1
  781.   store i64 %R3_Arg, i64* %R3_Var
  782.   %R4_Var = alloca i64, i32 1
  783.   store i64 %R4_Arg, i64* %R4_Var
  784.   %R5_Var = alloca i64, i32 1
  785.   store i64 %R5_Arg, i64* %R5_Var
  786.   %R6_Var = alloca i64, i32 1
  787.   store i64 %R6_Arg, i64* %R6_Var
  788.   %SpLim_Var = alloca i64, i32 1
  789.   store i64 %SpLim_Arg, i64* %SpLim_Var
  790.   %F1_Var = alloca float, i32 1
  791.   store float %F1_Arg, float* %F1_Var
  792.   %F2_Var = alloca float, i32 1
  793.   store float %F2_Arg, float* %F2_Var
  794.   %F3_Var = alloca float, i32 1
  795.   store float %F3_Arg, float* %F3_Var
  796.   %F4_Var = alloca float, i32 1
  797.   store float %F4_Arg, float* %F4_Var
  798.   %D1_Var = alloca double, i32 1
  799.   store double %D1_Arg, double* %D1_Var
  800.   %D2_Var = alloca double, i32 1
  801.   store double %D2_Arg, double* %D2_Var
  802.   %ln1Tc = ptrtoint [0 x i64]* @base_GHCziIOziHandleziFD_stdout_closure to i64
  803.   store i64 %ln1Tc, i64* %R2_Var
  804.   %ln1Td = ptrtoint %Main_main2_closure_struct* @Main_main2_closure to i64
  805.   store i64 %ln1Td, i64* %R3_Var
  806.   %ln1Te = ptrtoint [0 x i64]* @ghczmprim_GHCziTypes_True_closure to i64
  807.   %ln1Tf = add i64 %ln1Te, 2
  808.   store i64 %ln1Tf, i64* %R4_Var
  809.   %ln1Tg = load i64** %Base_Var
  810.   %ln1Th = load i64** %Sp_Var
  811.   %ln1Ti = load i64** %Hp_Var
  812.   %ln1Tj = load i64* %R1_Var
  813.   %ln1Tk = load i64* %R2_Var
  814.   %ln1Tl = load i64* %R3_Var
  815.   %ln1Tm = load i64* %R4_Var
  816.   %ln1Tn = load i64* %SpLim_Var
  817.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @base_GHCziIOziHandleziText_hPutStr2_info( i64* %ln1Tg, i64* %ln1Th, i64* %ln1Ti, i64 %ln1Tj, i64 %ln1Tk, i64 %ln1Tl, i64 %ln1Tm, i64 undef, i64 undef, i64 %ln1Tn, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  818.   ret void
  819.  
  820. }
  821.  
  822.  
  823. @ghczmprim_GHCziTypes_True_closure = external global [0 x i64]
  824.                                      
  825. declare  cc 10 void @base_GHCziIOziHandleziText_hPutStr2_info(i64* noalias nocapture, i64* noalias nocapture, i64* noalias nocapture, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double) align 8
  826.  
  827.  
  828. %Main_main_info_struct = type <{i64, i64, i64, i64}>
  829. @Main_main_info_itable =  constant %Main_main_info_struct<{i64 add (i64 sub (i64 ptrtoint (%Main_main_srt_struct* @Main_main_srt to i64),i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main_info to i64)),i64 0), i64 4294967299, i64 0, i64 4294967311}>, section "X98A__STRIP,__me0", align 8
  830.                          
  831. define  cc 10 void @Main_main_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  832. {
  833. c1Tx:
  834.   %Base_Var = alloca i64*, i32 1
  835.   store i64* %Base_Arg, i64** %Base_Var
  836.   %Sp_Var = alloca i64*, i32 1
  837.   store i64* %Sp_Arg, i64** %Sp_Var
  838.   %Hp_Var = alloca i64*, i32 1
  839.   store i64* %Hp_Arg, i64** %Hp_Var
  840.   %R1_Var = alloca i64, i32 1
  841.   store i64 %R1_Arg, i64* %R1_Var
  842.   %R2_Var = alloca i64, i32 1
  843.   store i64 %R2_Arg, i64* %R2_Var
  844.   %R3_Var = alloca i64, i32 1
  845.   store i64 %R3_Arg, i64* %R3_Var
  846.   %R4_Var = alloca i64, i32 1
  847.   store i64 %R4_Arg, i64* %R4_Var
  848.   %R5_Var = alloca i64, i32 1
  849.   store i64 %R5_Arg, i64* %R5_Var
  850.   %R6_Var = alloca i64, i32 1
  851.   store i64 %R6_Arg, i64* %R6_Var
  852.   %SpLim_Var = alloca i64, i32 1
  853.   store i64 %SpLim_Arg, i64* %SpLim_Var
  854.   %F1_Var = alloca float, i32 1
  855.   store float %F1_Arg, float* %F1_Var
  856.   %F2_Var = alloca float, i32 1
  857.   store float %F2_Arg, float* %F2_Var
  858.   %F3_Var = alloca float, i32 1
  859.   store float %F3_Arg, float* %F3_Var
  860.   %F4_Var = alloca float, i32 1
  861.   store float %F4_Arg, float* %F4_Var
  862.   %D1_Var = alloca double, i32 1
  863.   store double %D1_Arg, double* %D1_Var
  864.   %D2_Var = alloca double, i32 1
  865.   store double %D2_Arg, double* %D2_Var
  866.   %ln1Ty = load i64** %Base_Var
  867.   %ln1Tz = load i64** %Sp_Var
  868.   %ln1TA = load i64** %Hp_Var
  869.   %ln1TB = load i64* %R1_Var
  870.   %ln1TC = load i64* %SpLim_Var
  871.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @Main_main1_info( i64* %ln1Ty, i64* %ln1Tz, i64* %ln1TA, i64 %ln1TB, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1TC, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  872.   ret void
  873.  
  874. }
  875.  
  876.  
  877.  
  878. %Main_main3_info_struct = type <{i64, i64, i64, i64}>
  879. @Main_main3_info_itable =  constant %Main_main3_info_struct<{i64 add (i64 sub (i64 ptrtoint (%Main_main3_srt_struct* @Main_main3_srt to i64),i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @Main_main3_info to i64)),i64 0), i64 4294967299, i64 0, i64 12884901903}>, section "X98A__STRIP,__me0", align 8
  880.                          
  881. define  cc 10 void @Main_main3_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  882. {
  883. c1TP:
  884.   %Base_Var = alloca i64*, i32 1
  885.   store i64* %Base_Arg, i64** %Base_Var
  886.   %Sp_Var = alloca i64*, i32 1
  887.   store i64* %Sp_Arg, i64** %Sp_Var
  888.   %Hp_Var = alloca i64*, i32 1
  889.   store i64* %Hp_Arg, i64** %Hp_Var
  890.   %R1_Var = alloca i64, i32 1
  891.   store i64 %R1_Arg, i64* %R1_Var
  892.   %R2_Var = alloca i64, i32 1
  893.   store i64 %R2_Arg, i64* %R2_Var
  894.   %R3_Var = alloca i64, i32 1
  895.   store i64 %R3_Arg, i64* %R3_Var
  896.   %R4_Var = alloca i64, i32 1
  897.   store i64 %R4_Arg, i64* %R4_Var
  898.   %R5_Var = alloca i64, i32 1
  899.   store i64 %R5_Arg, i64* %R5_Var
  900.   %R6_Var = alloca i64, i32 1
  901.   store i64 %R6_Arg, i64* %R6_Var
  902.   %SpLim_Var = alloca i64, i32 1
  903.   store i64 %SpLim_Arg, i64* %SpLim_Var
  904.   %F1_Var = alloca float, i32 1
  905.   store float %F1_Arg, float* %F1_Var
  906.   %F2_Var = alloca float, i32 1
  907.   store float %F2_Arg, float* %F2_Var
  908.   %F3_Var = alloca float, i32 1
  909.   store float %F3_Arg, float* %F3_Var
  910.   %F4_Var = alloca float, i32 1
  911.   store float %F4_Arg, float* %F4_Var
  912.   %D1_Var = alloca double, i32 1
  913.   store double %D1_Arg, double* %D1_Var
  914.   %D2_Var = alloca double, i32 1
  915.   store double %D2_Arg, double* %D2_Var
  916.   %ln1TQ = ptrtoint %Main_main1_closure_struct* @Main_main1_closure to i64
  917.   %ln1TR = add i64 %ln1TQ, 1
  918.   store i64 %ln1TR, i64* %R2_Var
  919.   %ln1TS = load i64** %Base_Var
  920.   %ln1TT = load i64** %Sp_Var
  921.   %ln1TU = load i64** %Hp_Var
  922.   %ln1TV = load i64* %R1_Var
  923.   %ln1TW = load i64* %R2_Var
  924.   %ln1TX = load i64* %SpLim_Var
  925.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @base_GHCziTopHandler_runMainIO1_info( i64* %ln1TS, i64* %ln1TT, i64* %ln1TU, i64 %ln1TV, i64 %ln1TW, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1TX, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  926.   ret void
  927.  
  928. }
  929.  
  930.  
  931. declare  cc 10 void @base_GHCziTopHandler_runMainIO1_info(i64* noalias nocapture, i64* noalias nocapture, i64* noalias nocapture, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double) align 8
  932.  
  933.  
  934. %ZCMain_main_info_struct = type <{i64, i64, i64, i64}>
  935. @ZCMain_main_info_itable =  constant %ZCMain_main_info_struct<{i64 add (i64 sub (i64 ptrtoint (%ZCMain_main_srt_struct* @ZCMain_main_srt to i64),i64 ptrtoint (void (i64*, i64*, i64*, i64, i64, i64, i64, i64, i64, i64, float, float, float, float, double, double)* @ZCMain_main_info to i64)),i64 0), i64 4294967299, i64 0, i64 4294967311}>, section "X98A__STRIP,__me0", align 8
  936.                            
  937. define  cc 10 void @ZCMain_main_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapture %Hp_Arg, i64 %R1_Arg, i64 %R2_Arg, i64 %R3_Arg, i64 %R4_Arg, i64 %R5_Arg, i64 %R6_Arg, i64 %SpLim_Arg, float %F1_Arg, float %F2_Arg, float %F3_Arg, float %F4_Arg, double %D1_Arg, double %D2_Arg) align 8 nounwind section "X98A__STRIP,__me1"
  938. {
  939. c1U7:
  940.   %Base_Var = alloca i64*, i32 1
  941.   store i64* %Base_Arg, i64** %Base_Var
  942.   %Sp_Var = alloca i64*, i32 1
  943.   store i64* %Sp_Arg, i64** %Sp_Var
  944.   %Hp_Var = alloca i64*, i32 1
  945.   store i64* %Hp_Arg, i64** %Hp_Var
  946.   %R1_Var = alloca i64, i32 1
  947.   store i64 %R1_Arg, i64* %R1_Var
  948.   %R2_Var = alloca i64, i32 1
  949.   store i64 %R2_Arg, i64* %R2_Var
  950.   %R3_Var = alloca i64, i32 1
  951.   store i64 %R3_Arg, i64* %R3_Var
  952.   %R4_Var = alloca i64, i32 1
  953.   store i64 %R4_Arg, i64* %R4_Var
  954.   %R5_Var = alloca i64, i32 1
  955.   store i64 %R5_Arg, i64* %R5_Var
  956.   %R6_Var = alloca i64, i32 1
  957.   store i64 %R6_Arg, i64* %R6_Var
  958.   %SpLim_Var = alloca i64, i32 1
  959.   store i64 %SpLim_Arg, i64* %SpLim_Var
  960.   %F1_Var = alloca float, i32 1
  961.   store float %F1_Arg, float* %F1_Var
  962.   %F2_Var = alloca float, i32 1
  963.   store float %F2_Arg, float* %F2_Var
  964.   %F3_Var = alloca float, i32 1
  965.   store float %F3_Arg, float* %F3_Var
  966.   %F4_Var = alloca float, i32 1
  967.   store float %F4_Arg, float* %F4_Var
  968.   %D1_Var = alloca double, i32 1
  969.   store double %D1_Arg, double* %D1_Var
  970.   %D2_Var = alloca double, i32 1
  971.   store double %D2_Arg, double* %D2_Var
  972.   %ln1U8 = load i64** %Base_Var
  973.   %ln1U9 = load i64** %Sp_Var
  974.   %ln1Ua = load i64** %Hp_Var
  975.   %ln1Ub = load i64* %R1_Var
  976.   %ln1Uc = load i64* %SpLim_Var
  977.   tail call cc 10 void (i64*,i64*,i64*,i64,i64,i64,i64,i64,i64,i64,float,float,float,float,double,double)* @Main_main3_info( i64* %ln1U8, i64* %ln1U9, i64* %ln1Ua, i64 %ln1Ub, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 %ln1Uc, float undef, float undef, float undef, float undef, double undef, double undef ) nounwind
  978.   ret void
  979.  
  980. }
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