Sequential_multiplier

module seq_mul (out,P,a,b,done,clk,rst,start);
output reg done;
output reg[7:0] P;
output reg [7:0] out;
input clk, start , rst;
input [3:0] a , b;
reg C;
reg [3:0] M,N;
parameter s0=2'b00 ,s1=2'b01 ,s2=2'b10 ,s3=4'b11;
reg[1:0] pr_state, next_state;
always @ (posedge clk)
begin
if(start & (!rst))
begin
pr_state<=s0;
M<=a ; N<=b;
C<=0;
end
else
P=8'b00000000;
end

always @ (pr_state ,N)
case (pr_state)
s0 : begin
    if(N[0])
    {C,P}= M+P[7:4];
    {C,P}={1'b0,C,P[7:1]};
    next_state = s1;
end

s1 : begin
    if(N[1])
     {C,P}= M+P[7:4];
    {C,P}={1'b0,C,P[7:1]};
    next_state = s2;
    end
s2 : begin
    if(N[2])
    {C,P}= M+P[7:4];
    {C,P}={1'b0,C,P[7:1]};
    next_state = s3;
    done=0 ;
    end
s3 : begin
    if(N[3])
         {C,P}= M+P[7:4];
    {C,P}={1'b0,C,P[7:1]};
    done=1;
out = P;
    end
endcase

endmodule