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- INFO:SoC: __ _ __ _ __
- INFO:SoC: / / (_) /____ | |/_/
- INFO:SoC: / /__/ / __/ -_)> <
- INFO:SoC: /____/_/\__/\__/_/|_|
- INFO:SoC: Build your hardware, easily!
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoC:Creating SoC... (2021-08-24 15:47:57)
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoC:FPGA device : xc7a200t-fbg484-2.
- INFO:SoC:System clock: 100.00MHz.
- INFO:SoCBusHandler:Creating Bus Handler...
- INFO:SoCBusHandler:32-bit wishbone Bus, 4.0GiB Address Space.
- INFO:SoCBusHandler:Adding reserved Bus Regions...
- INFO:SoCBusHandler:Bus Handler created.
- INFO:SoCCSRHandler:Creating CSR Handler...
- INFO:SoCCSRHandler:32-bit CSR Bus, 32-bit Aligned, 16.0KiB Address Space, 2048B Paging, big Ordering (Up to 32 Locations).
- INFO:SoCCSRHandler:Adding reserved CSRs...
- INFO:SoCCSRHandler:CSR Handler created.
- INFO:SoCIRQHandler:Creating IRQ Handler...
- INFO:SoCIRQHandler:IRQ Handler (up to 32 Locations).
- INFO:SoCIRQHandler:Adding reserved IRQs...
- INFO:SoCIRQHandler:IRQ Handler created.
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoC:Initial SoC:
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoC:32-bit wishbone Bus, 4.0GiB Address Space.
- INFO:SoC:32-bit CSR Bus, 32-bit Aligned, 16.0KiB Address Space, 2048B Paging, big Ordering (Up to 32 Locations).
- INFO:SoC:IRQ Handler (up to 32 Locations).
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoCBusHandler:io0 Region added at Origin: 0x80000000, Size: 0x80000000, Mode: RW, Cached: False Linker: False.
- INFO:SoC:CPU overriding rom mapping from 0x0 to 0x0.
- INFO:SoC:CPU overriding sram mapping from 0x1000000 to 0x10000000.
- INFO:SoC:CPU overriding main_ram mapping from 0x40000000 to 0x40000000.
- INFO:SoCBusHandler:cpu_bus0 added as Bus Master.
- INFO:SoCBusHandler:cpu_bus1 added as Bus Master.
- INFO:SoCBusHandler:rom Region added at Origin: 0x00000000, Size: 0x00020000, Mode: R, Cached: True Linker: False.
- INFO:SoCBusHandler:rom added as Bus Slave.
- INFO:SoC:RAM rom added Origin: 0x00000000, Size: 0x00020000, Mode: R, Cached: True Linker: False.
- INFO:SoCBusHandler:sram Region added at Origin: 0x10000000, Size: 0x00002000, Mode: RW, Cached: True Linker: False.
- INFO:SoCBusHandler:sram added as Bus Slave.
- INFO:SoC:RAM sram added Origin: 0x10000000, Size: 0x00002000, Mode: RW, Cached: True Linker: False.
- INFO:SoCIRQHandler:uart IRQ allocated at Location 0.
- INFO:SoCIRQHandler:timer0 IRQ allocated at Location 1.
- INFO:S7PLL:Creating S7PLL, speedgrade -1.
- INFO:S7PLL:Registering Differential ClkIn of 200.00MHz.
- INFO:S7PLL:Creating ClkOut0 sys of 100.00MHz (+-10000.00ppm).
- INFO:S7PLL:Creating ClkOut1 sys4x of 400.00MHz (+-10000.00ppm).
- INFO:S7PLL:Creating ClkOut2 sys4x_dqs of 400.00MHz (+-10000.00ppm).
- INFO:S7PLL:Creating ClkOut3 idelay of 200.00MHz (+-10000.00ppm).
- INFO:SoCBusHandler:main_ram Region added at Origin: 0x40000000, Size: 0x40000000, Mode: RW, Cached: True Linker: False.
- INFO:SoCBusHandler:main_ram added as Bus Slave.
- INFO:SoCBusHandler:master2 added as Bus Master.
- INFO:S7PLL:Config:
- divclk_divide : 1
- clkout0_freq : 100.00MHz
- clkout0_divide: 16
- clkout0_phase : 0.00°
- clkout1_freq : 400.00MHz
- clkout1_divide: 4
- clkout1_phase : 0.00°
- clkout2_freq : 400.00MHz
- clkout2_divide: 4
- clkout2_phase : 90.00°
- clkout3_freq : 200.00MHz
- clkout3_divide: 8
- clkout3_phase : 0.00°
- vco : 1600.00MHz
- clkfbout_mult : 8
- INFO:SoCBusHandler:csr Region added at Origin: 0xf0000000, Size: 0x00010000, Mode: RW, Cached: False Linker: False.
- INFO:SoCBusHandler:csr added as Bus Slave.
- INFO:SoCCSRHandler:bridge added as CSR Master.
- INFO:SoCBusHandler:Interconnect: InterconnectShared (3 <-> 4).
- INFO:SoCCSRHandler:ctrl CSR allocated at Location 0.
- INFO:SoCCSRHandler:ddrphy CSR allocated at Location 1.
- INFO:SoCCSRHandler:flash CSR allocated at Location 2.
- INFO:SoCCSRHandler:flash_cs_n CSR allocated at Location 3.
- INFO:SoCCSRHandler:icap CSR allocated at Location 4.
- INFO:SoCCSRHandler:identifier_mem CSR allocated at Location 5.
- INFO:SoCCSRHandler:leds CSR allocated at Location 6.
- INFO:SoCCSRHandler:pcie_dma0 CSR allocated at Location 7.
- INFO:SoCCSRHandler:pcie_msi CSR allocated at Location 8.
- INFO:SoCCSRHandler:pcie_phy CSR allocated at Location 9.
- INFO:SoCCSRHandler:sdram CSR allocated at Location 10.
- INFO:SoCCSRHandler:timer0 CSR allocated at Location 11.
- INFO:SoCCSRHandler:uart CSR allocated at Location 12.
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoC:Finalized SoC:
- INFO:SoC:--------------------------------------------------------------------------------
- INFO:SoC:32-bit wishbone Bus, 4.0GiB Address Space.
- IO Regions: (1)
- io0 : Origin: 0x80000000, Size: 0x80000000, Mode: RW, Cached: False Linker: False
- Bus Regions: (4)
- rom : Origin: 0x00000000, Size: 0x00020000, Mode: R, Cached: True Linker: False
- sram : Origin: 0x10000000, Size: 0x00002000, Mode: RW, Cached: True Linker: False
- main_ram : Origin: 0x40000000, Size: 0x40000000, Mode: RW, Cached: True Linker: False
- csr : Origin: 0xf0000000, Size: 0x00010000, Mode: RW, Cached: False Linker: False
- Bus Masters: (3)
- - cpu_bus0
- - cpu_bus1
- - master2
- Bus Slaves: (4)
- - rom
- - sram
- - main_ram
- - csr
- INFO:SoC:32-bit CSR Bus, 32-bit Aligned, 16.0KiB Address Space, 2048B Paging, big Ordering (Up to 32 Locations).
- CSR Locations: (13)
- - ctrl : 0
- - ddrphy : 1
- - flash : 2
- - flash_cs_n : 3
- - icap : 4
- - identifier_mem : 5
- - leds : 6
- - pcie_dma0 : 7
- - pcie_msi : 8
- - pcie_phy : 9
- - sdram : 10
- - timer0 : 11
- - uart : 12
- INFO:SoC:IRQ Handler (up to 32 Locations).
- IRQ Locations: (2)
- - uart : 0
- - timer0 : 1
- INFO:SoC:--------------------------------------------------------------------------------
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libcompiler_rt'
- make: Nothing to be done for 'all'.
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libcompiler_rt'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libbase'
- CC exception.o
- CC console.o
- CC system.o
- CC id.o
- CC uart.o
- CC time.o
- CC spiflash.o
- CC i2c.o
- CC memtest.o
- CC sim_debug.o
- AR libbase.a
- AR libbase-nofloat.a
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libbase'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libfatfs'
- make: Nothing to be done for 'all'.
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libfatfs'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitespi'
- CC spiflash.o
- AR liblitespi.a
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitespi'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitedram'
- CC sdram.o
- CC bist.o
- CC sdram_dbg.o
- AR liblitedram.a
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitedram'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libliteeth'
- CC udp.o
- CC mdio.o
- AR libliteeth.a
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/libliteeth'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitesdcard'
- CC sdcard.o
- CC spisdcard.o
- AR liblitesdcard.a
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitesdcard'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitesata'
- CC sata.o
- AR liblitesata.a
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/liblitesata'
- make: Entering directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/bios'
- CC isr.o
- CC boot.o
- CC cmd_bios.o
- CC cmd_mem.o
- CC cmd_boot.o
- CC cmd_i2c.o
- CC cmd_spiflash.o
- CC cmd_litedram.o
- CC cmd_liteeth.o
- CC cmd_litesdcard.o
- CC cmd_litesata.o
- CC main.o
- CC bios.elf
- chmod -x bios.elf
- OBJCOPY bios.bin
- chmod -x bios.bin
- python3 -m litex.soc.software.mkmscimg bios.bin --little
- python3 -m litex.soc.software.memusage bios.elf /home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/bios/../include/generated/regions.ld riscv64-unknown-elf
- ROM usage: 26.87KiB (20.99%)
- RAM usage: 1.69KiB (21.09%)
- make: Leaving directory '/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/software/bios'
- INFO:SoC:Initializing ROM rom with contents (Size: 0x6b80).
- INFO:SoC:Auto-Resizing ROM rom from 0x20000 to 0x6b80.
- ****** Vivado v2020.2 (64-bit)
- **** SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020
- **** IP Build 3064653 on Wed Nov 18 14:17:31 MST 2020
- ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.
- source sqrl_acorn.tcl
- # create_project -force -name sqrl_acorn -part xc7a200t-fbg484-2
- # set_msg_config -id {Common 17-55} -new_severity {Warning}
- # read_verilog {/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v}
- # read_verilog {/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_pipe_clock.v}
- # read_verilog {/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7_support.v}
- # read_verilog {/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v}
- # read_ip {/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7.xci}
- INFO: [IP_Flow 19-234] Refreshing IP repositories
- INFO: [IP_Flow 19-1704] No user IP repositories specified
- INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2020.2/data/ip'.
- # upgrade_ip [get_ips pcie_s7]
- WARNING: [Coretcl 2-1042] No IP was identified for upgrade.
- # generate_target all [get_ips pcie_s7]
- # synth_ip [get_ips pcie_s7] -force
- CRITICAL WARNING: [Vivado 12-5447] synth_ip is not supported in project mode, please use non-project mode.
- INFO: [IP_Flow 19-1686] Generating 'Instantiation Template' target for IP 'pcie_s7'...
- INFO: [IP_Flow 19-1686] Generating 'Synthesis' target for IP 'pcie_s7'...
- INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'pcie_s7'...
- INFO: [IP_Flow 19-1686] Generating 'Change Log' target for IP 'pcie_s7'...
- INFO: [IP_Flow 19-234] Refreshing IP repositories
- INFO: [IP_Flow 19-1704] No user IP repositories specified
- INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2020.2/data/ip'.
- Command: synth_design -top pcie_s7 -part xc7a200tfbg484-2 -mode out_of_context
- Starting synth_design
- Attempting to get a license for feature 'Synthesis' and/or device 'xc7a200t'
- INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7a200t'
- INFO: [Device 21-403] Loading part xc7a200tfbg484-2
- INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 4 processes.
- INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes
- INFO: [Synth 8-7075] Helper process launched with PID 11039
- ---------------------------------------------------------------------------------
- Starting RTL Elaboration : Time (s): cpu = 00:00:02 ; elapsed = 00:00:03 . Memory (MB): peak = 2338.488 ; gain = 0.000 ; free physical = 30361 ; free virtual = 59955
- ---------------------------------------------------------------------------------
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7.v:66]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie2_top' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie2_top.v:59]
- Parameter c_component_name bound to: pcie - type: string
- Parameter dev_port_type bound to: 0000 - type: string
- Parameter c_dev_port_type bound to: 0 - type: string
- Parameter c_header_type bound to: 00 - type: string
- Parameter c_upstream_facing bound to: TRUE - type: string
- Parameter max_lnk_wdt bound to: 000100 - type: string
- Parameter max_lnk_spd bound to: 2 - type: string
- Parameter c_gen1 bound to: 1'b1
- Parameter c_int_width bound to: 64 - type: integer
- Parameter pci_exp_int_freq bound to: 2 - type: integer
- Parameter c_pcie_fast_config bound to: 0 - type: integer
- Parameter bar_0 bound to: FFF00000 - type: string
- Parameter bar_1 bound to: 00000000 - type: string
- Parameter bar_2 bound to: 00000000 - type: string
- Parameter bar_3 bound to: 00000000 - type: string
- Parameter bar_4 bound to: 00000000 - type: string
- Parameter bar_5 bound to: 00000000 - type: string
- Parameter xrom_bar bound to: 00000000 - type: string
- Parameter cost_table bound to: 1 - type: integer
- Parameter ven_id bound to: 10EE - type: string
- Parameter dev_id bound to: 7024 - type: string
- Parameter rev_id bound to: 00 - type: string
- Parameter subsys_ven_id bound to: 10EE - type: string
- Parameter subsys_id bound to: 0007 - type: string
- Parameter class_code bound to: 058000 - type: string
- Parameter cardbus_cis_ptr bound to: 00000000 - type: string
- Parameter cap_ver bound to: 2 - type: string
- Parameter c_pcie_cap_slot_implemented bound to: FALSE - type: string
- Parameter mps bound to: 010 - type: string
- Parameter cmps bound to: 2 - type: string
- Parameter ext_tag_fld_sup bound to: FALSE - type: string
- Parameter c_dev_control_ext_tag_default bound to: FALSE - type: string
- Parameter phantm_func_sup bound to: 00 - type: string
- Parameter c_phantom_functions bound to: 0 - type: string
- Parameter ep_l0s_accpt_lat bound to: 000 - type: string
- Parameter c_ep_l0s_accpt_lat bound to: 0 - type: string
- Parameter ep_l1_accpt_lat bound to: 111 - type: string
- Parameter c_ep_l1_accpt_lat bound to: 7 - type: string
- Parameter c_cpl_timeout_disable_sup bound to: FALSE - type: string
- Parameter c_cpl_timeout_range bound to: 0010 - type: string
- Parameter c_cpl_timeout_ranges_sup bound to: 2 - type: string
- Parameter c_buf_opt_bma bound to: FALSE - type: string
- Parameter c_perf_level_high bound to: TRUE - type: string
- Parameter c_tx_last_tlp bound to: 29 - type: string
- Parameter c_rx_ram_limit bound to: 7FF - type: string
- Parameter c_fc_ph bound to: 4 - type: string
- Parameter c_fc_pd bound to: 64 - type: string
- Parameter c_fc_nph bound to: 4 - type: string
- Parameter c_fc_npd bound to: 8 - type: string
- Parameter c_fc_cplh bound to: 72 - type: string
- Parameter c_fc_cpld bound to: 850 - type: string
- Parameter c_cpl_inf bound to: TRUE - type: string
- Parameter c_cpl_infinite bound to: TRUE - type: string
- Parameter c_surprise_dn_err_cap bound to: FALSE - type: string
- Parameter c_dll_lnk_actv_cap bound to: FALSE - type: string
- Parameter c_lnk_bndwdt_notif bound to: FALSE - type: string
- Parameter c_external_clocking bound to: TRUE - type: string
- Parameter c_trgt_lnk_spd bound to: 2 - type: string
- Parameter c_hw_auton_spd_disable bound to: FALSE - type: string
- Parameter c_de_emph bound to: FALSE - type: string
- Parameter slot_clk bound to: TRUE - type: string
- Parameter c_rcb bound to: 0 - type: string
- Parameter c_root_cap_crs bound to: FALSE - type: string
- Parameter c_slot_cap_attn_butn bound to: FALSE - type: string
- Parameter c_slot_cap_attn_ind bound to: FALSE - type: string
- Parameter c_slot_cap_pwr_ctrl bound to: FALSE - type: string
- Parameter c_slot_cap_pwr_ind bound to: FALSE - type: string
- Parameter c_slot_cap_hotplug_surprise bound to: FALSE - type: string
- Parameter c_slot_cap_hotplug_cap bound to: FALSE - type: string
- Parameter c_slot_cap_mrl bound to: FALSE - type: string
- Parameter c_slot_cap_elec_interlock bound to: FALSE - type: string
- Parameter c_slot_cap_no_cmd_comp_sup bound to: FALSE - type: string
- Parameter c_slot_cap_pwr_limit_value bound to: 0 - type: string
- Parameter c_slot_cap_pwr_limit_scale bound to: 0 - type: string
- Parameter c_slot_cap_physical_slot_num bound to: 0 - type: string
- Parameter intx bound to: FALSE - type: string
- Parameter int_pin bound to: 0 - type: string
- Parameter c_msi_cap_on bound to: TRUE - type: string
- Parameter c_pm_cap_next_ptr bound to: 48 - type: string
- Parameter c_msi_64b_addr bound to: FALSE - type: string
- Parameter c_msi bound to: 0 - type: string
- Parameter c_msi_mult_msg_extn bound to: 0 - type: string
- Parameter c_msi_per_vctr_mask_cap bound to: FALSE - type: string
- Parameter c_msix_cap_on bound to: FALSE - type: string
- Parameter c_msix_next_ptr bound to: 00 - type: string
- Parameter c_pcie_cap_next_ptr bound to: 00 - type: string
- Parameter c_msix_table_size bound to: 000 - type: string
- Parameter c_msix_table_offset bound to: 0 - type: string
- Parameter c_msix_table_bir bound to: 0 - type: string
- Parameter c_msix_pba_offset bound to: 0 - type: string
- Parameter c_msix_pba_bir bound to: 0 - type: string
- Parameter dsi bound to: 0 - type: string
- Parameter c_dsi_bool bound to: FALSE - type: string
- Parameter d1_sup bound to: 0 - type: string
- Parameter c_d1_support bound to: FALSE - type: string
- Parameter d2_sup bound to: 0 - type: string
- Parameter c_d2_support bound to: FALSE - type: string
- Parameter pme_sup bound to: 0F - type: string
- Parameter c_pme_support bound to: 0F - type: string
- Parameter no_soft_rst bound to: TRUE - type: string
- Parameter pwr_con_d0_state bound to: 00 - type: string
- Parameter con_scl_fctr_d0_state bound to: 0 - type: string
- Parameter pwr_con_d1_state bound to: 00 - type: string
- Parameter con_scl_fctr_d1_state bound to: 0 - type: string
- Parameter pwr_con_d2_state bound to: 00 - type: string
- Parameter con_scl_fctr_d2_state bound to: 0 - type: string
- Parameter pwr_con_d3_state bound to: 00 - type: string
- Parameter con_scl_fctr_d3_state bound to: 0 - type: string
- Parameter pwr_dis_d0_state bound to: 00 - type: string
- Parameter dis_scl_fctr_d0_state bound to: 0 - type: string
- Parameter pwr_dis_d1_state bound to: 00 - type: string
- Parameter dis_scl_fctr_d1_state bound to: 0 - type: string
- Parameter pwr_dis_d2_state bound to: 00 - type: string
- Parameter dis_scl_fctr_d2_state bound to: 0 - type: string
- Parameter pwr_dis_d3_state bound to: 00 - type: string
- Parameter dis_scl_fctr_d3_state bound to: 0 - type: string
- Parameter c_dsn_cap_enabled bound to: TRUE - type: string
- Parameter c_dsn_base_ptr bound to: 100 - type: string
- Parameter c_vc_cap_enabled bound to: FALSE - type: string
- Parameter c_vc_base_ptr bound to: 000 - type: string
- Parameter c_vc_cap_reject_snoop bound to: FALSE - type: string
- Parameter c_vsec_cap_enabled bound to: FALSE - type: string
- Parameter c_vsec_base_ptr bound to: 000 - type: string
- Parameter c_vsec_next_ptr bound to: 000 - type: string
- Parameter c_dsn_next_ptr bound to: 000 - type: string
- Parameter c_vc_next_ptr bound to: 000 - type: string
- Parameter c_pci_cfg_space_addr bound to: 3F - type: string
- Parameter c_ext_pci_cfg_space_addr bound to: 3FF - type: string
- Parameter c_last_cfg_dw bound to: 10C - type: string
- Parameter c_enable_msg_route bound to: 00000000000 - type: string
- Parameter bram_lat bound to: 0 - type: string
- Parameter c_rx_raddr_lat bound to: 0 - type: string
- Parameter c_rx_rdata_lat bound to: 2 - type: string
- Parameter c_rx_write_lat bound to: 0 - type: string
- Parameter c_tx_raddr_lat bound to: 0 - type: string
- Parameter c_tx_rdata_lat bound to: 2 - type: string
- Parameter c_tx_write_lat bound to: 0 - type: string
- Parameter c_ll_ack_timeout_enable bound to: FALSE - type: string
- Parameter c_ll_ack_timeout_function bound to: 0 - type: string
- Parameter c_ll_ack_timeout bound to: 0000 - type: string
- Parameter c_ll_replay_timeout_enable bound to: FALSE - type: string
- Parameter c_ll_replay_timeout_func bound to: 1 - type: string
- Parameter c_ll_replay_timeout bound to: 0000 - type: string
- Parameter c_dis_lane_reverse bound to: TRUE - type: string
- Parameter c_upconfig_capable bound to: TRUE - type: string
- Parameter c_disable_scrambling bound to: FALSE - type: string
- Parameter c_disable_tx_aspm_l0s bound to: FALSE - type: string
- Parameter c_rev_gt_order bound to: FALSE - type: string
- Parameter c_pcie_dbg_ports bound to: TRUE - type: string
- Parameter pci_exp_ref_freq bound to: 0 - type: string
- Parameter c_xlnx_ref_board bound to: NONE - type: string
- Parameter c_pcie_blk_locn bound to: 0 - type: string
- Parameter c_ur_atomic bound to: FALSE - type: string
- Parameter c_dev_cap2_atomicop32_completer_supported bound to: FALSE - type: string
- Parameter c_dev_cap2_atomicop64_completer_supported bound to: FALSE - type: string
- Parameter c_dev_cap2_cas128_completer_supported bound to: FALSE - type: string
- Parameter c_dev_cap2_tph_completer_supported bound to: 00 - type: string
- Parameter c_dev_cap2_ari_forwarding_supported bound to: FALSE - type: string
- Parameter c_dev_cap2_atomicop_routing_supported bound to: FALSE - type: string
- Parameter c_link_cap_aspm_optionality bound to: FALSE - type: string
- Parameter c_aer_cap_on bound to: FALSE - type: string
- Parameter c_aer_base_ptr bound to: 000 - type: string
- Parameter c_aer_cap_nextptr bound to: 000 - type: string
- Parameter c_aer_cap_ecrc_check_capable bound to: FALSE - type: string
- Parameter c_aer_cap_multiheader bound to: FALSE - type: string
- Parameter c_aer_cap_permit_rooterr_update bound to: FALSE - type: string
- Parameter c_rbar_cap_on bound to: FALSE - type: string
- Parameter c_rbar_base_ptr bound to: 000 - type: string
- Parameter c_rbar_cap_nextptr bound to: 000 - type: string
- Parameter c_rbar_num bound to: 0 - type: string
- Parameter c_rbar_cap_sup0 bound to: 00001 - type: string
- Parameter c_rbar_cap_index0 bound to: 0 - type: string
- Parameter c_rbar_cap_control_encodedbar0 bound to: 00 - type: string
- Parameter c_rbar_cap_sup1 bound to: 00001 - type: string
- Parameter c_rbar_cap_index1 bound to: 0 - type: string
- Parameter c_rbar_cap_control_encodedbar1 bound to: 00 - type: string
- Parameter c_rbar_cap_sup2 bound to: 00001 - type: string
- Parameter c_rbar_cap_index2 bound to: 0 - type: string
- Parameter c_rbar_cap_control_encodedbar2 bound to: 00 - type: string
- Parameter c_rbar_cap_sup3 bound to: 00001 - type: string
- Parameter c_rbar_cap_index3 bound to: 0 - type: string
- Parameter c_rbar_cap_control_encodedbar3 bound to: 00 - type: string
- Parameter c_rbar_cap_sup4 bound to: 00001 - type: string
- Parameter c_rbar_cap_index4 bound to: 0 - type: string
- Parameter c_rbar_cap_control_encodedbar4 bound to: 00 - type: string
- Parameter c_rbar_cap_sup5 bound to: 00001 - type: string
- Parameter c_rbar_cap_index5 bound to: 0 - type: string
- Parameter c_rbar_cap_control_encodedbar5 bound to: 00 - type: string
- Parameter c_recrc_check bound to: 0 - type: string
- Parameter c_recrc_check_trim bound to: FALSE - type: string
- Parameter c_disable_rx_poisoned_resp bound to: FALSE - type: string
- Parameter c_trn_np_fc bound to: TRUE - type: string
- Parameter c_ur_inv_req bound to: TRUE - type: string
- Parameter c_ur_prs_response bound to: TRUE - type: string
- Parameter c_silicon_rev bound to: 2 - type: string
- Parameter c_aer_cap_optional_err_support bound to: 000000 - type: string
- Parameter PIPE_SIM bound to: FALSE - type: string
- Parameter PCIE_EXT_CLK bound to: TRUE - type: string
- Parameter PCIE_EXT_GT_COMMON bound to: FALSE - type: string
- Parameter EXT_CH_GT_DRP bound to: FALSE - type: string
- Parameter TRANSCEIVER_CTRL_STATUS_PORTS bound to: FALSE - type: string
- Parameter SHARED_LOGIC_IN_CORE bound to: FALSE - type: string
- Parameter PL_INTERFACE bound to: TRUE - type: string
- Parameter CFG_MGMT_IF bound to: TRUE - type: string
- Parameter CFG_CTL_IF bound to: TRUE - type: string
- Parameter CFG_STATUS_IF bound to: TRUE - type: string
- Parameter RCV_MSG_IF bound to: TRUE - type: string
- Parameter CFG_FC_IF bound to: TRUE - type: string
- Parameter ERR_REPORTING_IF bound to: TRUE - type: string
- Parameter c_aer_cap_ecrc_gen_capable bound to: FALSE - type: string
- Parameter EXT_PIPE_INTERFACE bound to: FALSE - type: string
- Parameter EXT_STARTUP_PRIMITIVE bound to: FALSE - type: string
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- Parameter PCIE_ASYNC_EN bound to: FALSE - type: string
- Parameter ENABLE_JTAG_DBG bound to: FALSE - type: string
- Parameter REDUCE_OOB_FREQ bound to: FALSE - type: string
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_core_top' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_core_top.v:65]
- Parameter CFG_VEND_ID bound to: 16'b0001000011101110
- Parameter CFG_DEV_ID bound to: 16'b0111000000100100
- Parameter CFG_REV_ID bound to: 8'b00000000
- Parameter CFG_SUBSYS_VEND_ID bound to: 16'b0001000011101110
- Parameter CFG_SUBSYS_ID bound to: 16'b0000000000000111
- Parameter EXT_PIPE_SIM bound to: FALSE - type: string
- Parameter ALLOW_X8_GEN2 bound to: FALSE - type: string
- Parameter PIPE_PIPELINE_STAGES bound to: 1 - type: integer
- Parameter AER_BASE_PTR bound to: 12'b000000000000
- Parameter AER_CAP_ECRC_CHECK_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ECRC_GEN_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_MULTIHEADER bound to: FALSE - type: string
- Parameter AER_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter AER_CAP_OPTIONAL_ERR_SUPPORT bound to: 24'b000000000000000000000000
- Parameter AER_CAP_ON bound to: FALSE - type: string
- Parameter AER_CAP_PERMIT_ROOTERR_UPDATE bound to: FALSE - type: string
- Parameter BAR0 bound to: -1048576 - type: integer
- Parameter BAR1 bound to: 0 - type: integer
- Parameter BAR2 bound to: 0 - type: integer
- Parameter BAR3 bound to: 0 - type: integer
- Parameter BAR4 bound to: 0 - type: integer
- Parameter BAR5 bound to: 0 - type: integer
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter CARDBUS_CIS_POINTER bound to: 0 - type: integer
- Parameter CLASS_CODE bound to: 24'b000001011000000000000000
- Parameter CMD_INTX_IMPLEMENTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_DISABLE_SUPPORTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_RANGES_SUPPORTED bound to: 4'b0010
- Parameter DEV_CAP_ENDPOINT_L0S_LATENCY bound to: 0 - type: integer
- Parameter DEV_CAP_ENDPOINT_L1_LATENCY bound to: 7 - type: integer
- Parameter DEV_CAP_EXT_TAG_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED bound to: 2 - type: integer
- Parameter DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT bound to: 0 - type: integer
- Parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_TPH_COMPLETER_SUPPORTED bound to: 2'b00
- Parameter DEV_CONTROL_EXT_TAG_DEFAULT bound to: FALSE - type: string
- Parameter DISABLE_LANE_REVERSAL bound to: TRUE - type: string
- Parameter DISABLE_RX_POISONED_RESP bound to: FALSE - type: string
- Parameter DISABLE_SCRAMBLING bound to: FALSE - type: string
- Parameter DSN_BASE_PTR bound to: 12'b000100000000
- Parameter DSN_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter DSN_CAP_ON bound to: TRUE - type: string
- Parameter ENABLE_MSG_ROUTE bound to: 11'b00000000000
- Parameter ENABLE_RX_TD_ECRC_TRIM bound to: FALSE - type: string
- Parameter EXPANSION_ROM bound to: 0 - type: integer
- Parameter EXT_CFG_CAP_PTR bound to: 6'b111111
- Parameter EXT_CFG_XP_CAP_PTR bound to: 10'b1111111111
- Parameter HEADER_TYPE bound to: 8'b00000000
- Parameter INTERRUPT_PIN bound to: 8'b00000000
- Parameter LAST_CONFIG_DWORD bound to: 10'b1111111111
- Parameter LINK_CAP_ASPM_OPTIONALITY bound to: FALSE - type: string
- Parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter LINK_CTRL2_DEEMPHASIS bound to: FALSE - type: string
- Parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE bound to: FALSE - type: string
- Parameter LINK_CTRL2_TARGET_LINK_SPEED bound to: 4'b0010
- Parameter LINK_STATUS_SLOT_CLOCK_CONFIG bound to: TRUE - type: string
- Parameter LL_ACK_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_ACK_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_ACK_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter LL_REPLAY_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_REPLAY_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_REPLAY_TIMEOUT_FUNC bound to: 1 - type: integer
- Parameter LTSSM_MAX_LINK_WIDTH bound to: 6'b000100
- Parameter MSI_CAP_MULTIMSGCAP bound to: 0 - type: integer
- Parameter MSI_CAP_MULTIMSG_EXTENSION bound to: 0 - type: integer
- Parameter MSI_CAP_ON bound to: TRUE - type: string
- Parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE bound to: FALSE - type: string
- Parameter MSI_CAP_64_BIT_ADDR_CAPABLE bound to: FALSE - type: string
- Parameter MSIX_CAP_ON bound to: FALSE - type: string
- Parameter MSIX_CAP_PBA_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_PBA_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_TABLE_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_SIZE bound to: 11'b00000000000
- Parameter PCIE_CAP_DEVICE_PORT_TYPE bound to: 4'b0000
- Parameter PCIE_CAP_NEXTPTR bound to: 8'b00000000
- Parameter PM_CAP_DSI bound to: FALSE - type: string
- Parameter PM_CAP_D1SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_D2SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_NEXTPTR bound to: 8'b01001000
- Parameter PM_CAP_PMESUPPORT bound to: 5'b01111
- Parameter PM_CSR_NOSOFTRST bound to: TRUE - type: string
- Parameter PM_DATA_SCALE0 bound to: 2'b00
- Parameter PM_DATA_SCALE1 bound to: 2'b00
- Parameter PM_DATA_SCALE2 bound to: 2'b00
- Parameter PM_DATA_SCALE3 bound to: 2'b00
- Parameter PM_DATA_SCALE4 bound to: 2'b00
- Parameter PM_DATA_SCALE5 bound to: 2'b00
- Parameter PM_DATA_SCALE6 bound to: 2'b00
- Parameter PM_DATA_SCALE7 bound to: 2'b00
- Parameter PM_DATA0 bound to: 8'b00000000
- Parameter PM_DATA1 bound to: 8'b00000000
- Parameter PM_DATA2 bound to: 8'b00000000
- Parameter PM_DATA3 bound to: 8'b00000000
- Parameter PM_DATA4 bound to: 8'b00000000
- Parameter PM_DATA5 bound to: 8'b00000000
- Parameter PM_DATA6 bound to: 8'b00000000
- Parameter PM_DATA7 bound to: 8'b00000000
- Parameter RBAR_BASE_PTR bound to: 12'b000000000000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR0 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR1 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR2 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR3 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR4 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR5 bound to: 5'b00000
- Parameter RBAR_CAP_INDEX0 bound to: 3'b000
- Parameter RBAR_CAP_INDEX1 bound to: 3'b000
- Parameter RBAR_CAP_INDEX2 bound to: 3'b000
- Parameter RBAR_CAP_INDEX3 bound to: 3'b000
- Parameter RBAR_CAP_INDEX4 bound to: 3'b000
- Parameter RBAR_CAP_INDEX5 bound to: 3'b000
- Parameter RBAR_CAP_ON bound to: FALSE - type: string
- Parameter RBAR_CAP_SUP0 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP1 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP2 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP3 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP4 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP5 bound to: 1 - type: integer
- Parameter RBAR_NUM bound to: 3'b000
- Parameter RECRC_CHK bound to: 0 - type: integer
- Parameter RECRC_CHK_TRIM bound to: FALSE - type: string
- Parameter REF_CLK_FREQ bound to: 0 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- Parameter TL_RX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_RX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TL_TX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_TX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TL_RX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_TX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TRN_NP_FC bound to: TRUE - type: string
- Parameter TRN_DW bound to: TRUE - type: string
- Parameter UPCONFIG_CAPABLE bound to: TRUE - type: string
- Parameter UPSTREAM_FACING bound to: TRUE - type: string
- Parameter UR_ATOMIC bound to: FALSE - type: string
- Parameter UR_INV_REQ bound to: TRUE - type: string
- Parameter UR_PRS_RESPONSE bound to: TRUE - type: string
- Parameter USER_CLK_FREQ bound to: 3 - type: integer
- Parameter USER_CLK2_DIV2 bound to: TRUE - type: string
- Parameter VC_BASE_PTR bound to: 12'b000000000000
- Parameter VC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VC_CAP_ON bound to: FALSE - type: string
- Parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS bound to: FALSE - type: string
- Parameter VC0_CPL_INFINITE bound to: TRUE - type: string
- Parameter VC0_RX_RAM_LIMIT bound to: 13'b0011111111111
- Parameter VC0_TOTAL_CREDITS_CD bound to: 850 - type: integer
- Parameter VC0_TOTAL_CREDITS_CH bound to: 72 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPH bound to: 4 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPD bound to: 8 - type: integer
- Parameter VC0_TOTAL_CREDITS_PD bound to: 64 - type: integer
- Parameter VC0_TOTAL_CREDITS_PH bound to: 4 - type: integer
- Parameter VC0_TX_LASTPACKET bound to: 29 - type: integer
- Parameter VSEC_BASE_PTR bound to: 12'b000000000000
- Parameter VSEC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VSEC_CAP_ON bound to: FALSE - type: string
- Parameter DISABLE_ASPM_L1_TIMER bound to: FALSE - type: string
- Parameter DISABLE_BAR_FILTERING bound to: FALSE - type: string
- Parameter DISABLE_ID_CHECK bound to: FALSE - type: string
- Parameter DISABLE_RX_TC_FILTER bound to: FALSE - type: string
- Parameter DNSTREAM_LINK_NUM bound to: 8'b00000000
- Parameter DSN_CAP_ID bound to: 16'b0000000000000011
- Parameter DSN_CAP_VERSION bound to: 4'b0001
- Parameter ENTER_RVRY_EI_L0 bound to: TRUE - type: string
- Parameter INFER_EI bound to: 5'b00000
- Parameter IS_SWITCH bound to: FALSE - type: string
- Parameter LINK_CAP_ASPM_SUPPORT bound to: 1 - type: integer
- Parameter LINK_CAP_CLOCK_POWER_MANAGEMENT bound to: FALSE - type: string
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_RSVD_23 bound to: 0 - type: integer
- Parameter LINK_CONTROL_RCB bound to: 0 - type: integer
- Parameter MSI_BASE_PTR bound to: 8'b01001000
- Parameter MSI_CAP_ID bound to: 8'b00000101
- Parameter MSI_CAP_NEXTPTR bound to: 8'b01100000
- Parameter MSIX_BASE_PTR bound to: 8'b10011100
- Parameter MSIX_CAP_ID bound to: 8'b00010001
- Parameter MSIX_CAP_NEXTPTR bound to: 8'b00000000
- Parameter N_FTS_COMCLK_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_COMCLK_GEN2 bound to: 255 - type: integer
- Parameter N_FTS_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_GEN2 bound to: 255 - type: integer
- Parameter PCIE_BASE_PTR bound to: 8'b01100000
- Parameter PCIE_CAP_CAPABILITY_ID bound to: 8'b00010000
- Parameter PCIE_CAP_CAPABILITY_VERSION bound to: 4'b0010
- Parameter PCIE_CAP_ON bound to: TRUE - type: string
- Parameter PCIE_CAP_RSVD_15_14 bound to: 0 - type: integer
- Parameter PCIE_CAP_SLOT_IMPLEMENTED bound to: FALSE - type: string
- Parameter PCIE_REVISION bound to: 2 - type: integer
- Parameter PL_AUTO_CONFIG bound to: 0 - type: integer
- Parameter PL_FAST_TRAIN bound to: FALSE - type: string
- Parameter PCIE_EXT_CLK bound to: TRUE - type: string
- Parameter PCIE_EXT_GT_COMMON bound to: FALSE - type: string
- Parameter EXT_CH_GT_DRP bound to: FALSE - type: string
- Parameter TRANSCEIVER_CTRL_STATUS_PORTS bound to: FALSE - type: string
- Parameter SHARED_LOGIC_IN_CORE bound to: FALSE - type: string
- Parameter PM_BASE_PTR bound to: 8'b01000000
- Parameter PM_CAP_AUXCURRENT bound to: 0 - type: integer
- Parameter PM_CAP_ID bound to: 8'b00000001
- Parameter PM_CAP_ON bound to: TRUE - type: string
- Parameter PM_CAP_PME_CLOCK bound to: FALSE - type: string
- Parameter PM_CAP_RSVD_04 bound to: 0 - type: integer
- Parameter PM_CAP_VERSION bound to: 3 - type: integer
- Parameter PM_CSR_BPCCEN bound to: FALSE - type: string
- Parameter PM_CSR_B2B3 bound to: FALSE - type: string
- Parameter ROOT_CAP_CRS_SW_VISIBILITY bound to: FALSE - type: string
- Parameter SELECT_DLL_IF bound to: FALSE - type: string
- Parameter SLOT_CAP_ATT_BUTTON_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ATT_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_CAPABLE bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_SURPRISE bound to: FALSE - type: string
- Parameter SLOT_CAP_MRL_SENSOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT bound to: FALSE - type: string
- Parameter SLOT_CAP_PHYSICAL_SLOT_NUM bound to: 13'b0000000000000
- Parameter SLOT_CAP_POWER_CONTROLLER_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_POWER_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_SCALE bound to: 0 - type: integer
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_VALUE bound to: 8'b00000000
- Parameter SPARE_BIT0 bound to: 0 - type: integer
- Parameter SPARE_BIT1 bound to: 0 - type: integer
- Parameter SPARE_BIT2 bound to: 0 - type: integer
- Parameter SPARE_BIT3 bound to: 0 - type: integer
- Parameter SPARE_BIT4 bound to: 0 - type: integer
- Parameter SPARE_BIT5 bound to: 0 - type: integer
- Parameter SPARE_BIT6 bound to: 0 - type: integer
- Parameter SPARE_BIT7 bound to: 0 - type: integer
- Parameter SPARE_BIT8 bound to: 0 - type: integer
- Parameter SPARE_BYTE0 bound to: 8'b00000000
- Parameter SPARE_BYTE1 bound to: 8'b00000000
- Parameter SPARE_BYTE2 bound to: 8'b00000000
- Parameter SPARE_BYTE3 bound to: 8'b00000000
- Parameter SPARE_WORD0 bound to: 0 - type: integer
- Parameter SPARE_WORD1 bound to: 0 - type: integer
- Parameter SPARE_WORD2 bound to: 0 - type: integer
- Parameter SPARE_WORD3 bound to: 0 - type: integer
- Parameter TL_RBYPASS bound to: FALSE - type: string
- Parameter TL_TFC_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_CHECKS_DISABLE bound to: FALSE - type: string
- Parameter EXIT_LOOPBACK_ON_EI bound to: TRUE - type: string
- Parameter CFG_ECRC_ERR_CPLSTAT bound to: 0 - type: integer
- Parameter CAPABILITIES_PTR bound to: 8'b01000000
- Parameter CRM_MODULE_RSTS bound to: 7'b0000000
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE bound to: TRUE - type: string
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE bound to: TRUE - type: string
- Parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE bound to: FALSE - type: string
- Parameter DEV_CAP_ROLE_BASED_ERROR bound to: TRUE - type: string
- Parameter DEV_CAP_RSVD_14_12 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_17_16 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_31_29 bound to: 0 - type: integer
- Parameter DEV_CONTROL_AUX_POWER_SUPPORTED bound to: FALSE - type: string
- Parameter VC_CAP_ID bound to: 16'b0000000000000010
- Parameter VC_CAP_VERSION bound to: 4'b0001
- Parameter VSEC_CAP_HDR_ID bound to: 16'b0001001000110100
- Parameter VSEC_CAP_HDR_LENGTH bound to: 12'b000000011000
- Parameter VSEC_CAP_HDR_REVISION bound to: 4'b0001
- Parameter VSEC_CAP_ID bound to: 16'b0000000000001011
- Parameter VSEC_CAP_IS_LINK_VISIBLE bound to: TRUE - type: string
- Parameter VSEC_CAP_VERSION bound to: 4'b0001
- Parameter DISABLE_ERR_MSG bound to: FALSE - type: string
- Parameter DISABLE_LOCKED_FILTER bound to: FALSE - type: string
- Parameter DISABLE_PPM_FILTER bound to: FALSE - type: string
- Parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter INTERRUPT_STAT_AUTO bound to: TRUE - type: string
- Parameter MPS_FORCE bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT bound to: 15'b000000000000000
- Parameter PM_ASPML0S_TIMEOUT_EN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter PM_ASPM_FASTEXIT bound to: FALSE - type: string
- Parameter PM_MF bound to: FALSE - type: string
- Parameter RP_AUTO_SPD bound to: 2'b01
- Parameter RP_AUTO_SPD_LOOPCNT bound to: 5'b11111
- Parameter SIM_VERSION bound to: 1.0 - type: string
- Parameter SSL_MESSAGE_AUTO bound to: FALSE - type: string
- Parameter TECRC_EP_INV bound to: FALSE - type: string
- Parameter UR_CFG1 bound to: TRUE - type: string
- Parameter USE_RID_PINS bound to: FALSE - type: string
- Parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_MAX_ENDEND_TLP_PREFIXES bound to: 2'b00
- Parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING bound to: FALSE - type: string
- Parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ID bound to: 16'b0000000000000001
- Parameter AER_CAP_VERSION bound to: 4'b0001
- Parameter RBAR_CAP_ID bound to: 16'b0000000000010101
- Parameter RBAR_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter RBAR_CAP_VERSION bound to: 4'b0001
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_CHAN_BOND bound to: 1 - type: integer
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_ASYNC_EN bound to: FALSE - type: string
- Parameter PCIE_TXBUF_EN bound to: FALSE - type: string
- Parameter PL_INTERFACE bound to: TRUE - type: string
- Parameter CFG_MGMT_IF bound to: TRUE - type: string
- Parameter CFG_CTL_IF bound to: TRUE - type: string
- Parameter CFG_STATUS_IF bound to: TRUE - type: string
- Parameter RCV_MSG_IF bound to: TRUE - type: string
- Parameter CFG_FC_IF bound to: TRUE - type: string
- Parameter EXT_PIPE_INTERFACE bound to: FALSE - type: string
- Parameter TX_MARGIN_FULL_0 bound to: 7'b1001111
- Parameter TX_MARGIN_FULL_1 bound to: 7'b1001110
- Parameter TX_MARGIN_FULL_2 bound to: 7'b1001101
- Parameter TX_MARGIN_FULL_3 bound to: 7'b1001100
- Parameter TX_MARGIN_FULL_4 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_0 bound to: 7'b1000101
- Parameter TX_MARGIN_LOW_1 bound to: 7'b1000110
- Parameter TX_MARGIN_LOW_2 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_3 bound to: 7'b1000010
- Parameter TX_MARGIN_LOW_4 bound to: 7'b1000000
- Parameter ENABLE_JTAG_DBG bound to: FALSE - type: string
- Parameter REDUCE_OOB_FREQ bound to: FALSE - type: string
- Parameter TCQ bound to: 100 - type: integer
- Parameter ENABLE_FAST_SIM_TRAINING bound to: TRUE - type: string
- INFO: [Synth 8-6157] synthesizing module 'xpm_cdc_single' [/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:153]
- Parameter DEST_SYNC_FF bound to: 2 - type: integer
- Parameter INIT_SYNC_FF bound to: 0 - type: integer
- Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
- Parameter SRC_INPUT_REG bound to: 0 - type: integer
- Parameter VERSION bound to: 0 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'xpm_cdc_single' (1#1) [/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:153]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_top' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_top.v:62]
- Parameter PIPE_PIPELINE_STAGES bound to: 1 - type: integer
- Parameter AER_BASE_PTR bound to: 12'b000000000000
- Parameter AER_CAP_ECRC_CHECK_CAPABLE bound to: FALSE - type: string
- Parameter DEV_CAP_ROLE_BASED_ERROR bound to: TRUE - type: string
- Parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ECRC_GEN_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ID bound to: 16'b0000000000000001
- Parameter AER_CAP_MULTIHEADER bound to: FALSE - type: string
- Parameter AER_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter AER_CAP_ON bound to: FALSE - type: string
- Parameter AER_CAP_OPTIONAL_ERR_SUPPORT bound to: 24'b000000000000000000000000
- Parameter AER_CAP_PERMIT_ROOTERR_UPDATE bound to: FALSE - type: string
- Parameter AER_CAP_VERSION bound to: 4'b0001
- Parameter ALLOW_X8_GEN2 bound to: FALSE - type: string
- Parameter BAR0 bound to: -1048576 - type: integer
- Parameter BAR1 bound to: 0 - type: integer
- Parameter BAR2 bound to: 0 - type: integer
- Parameter BAR3 bound to: 0 - type: integer
- Parameter BAR4 bound to: 0 - type: integer
- Parameter BAR5 bound to: 0 - type: integer
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- Parameter CAPABILITIES_PTR bound to: 8'b01000000
- Parameter CARDBUS_CIS_POINTER bound to: 0 - type: integer
- Parameter CLASS_CODE bound to: 24'b000001011000000000000000
- Parameter CFG_ECRC_ERR_CPLSTAT bound to: 0 - type: integer
- Parameter CMD_INTX_IMPLEMENTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_DISABLE_SUPPORTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_RANGES_SUPPORTED bound to: 4'b0010
- Parameter CRM_MODULE_RSTS bound to: 7'b0000000
- Parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_MAX_ENDEND_TLP_PREFIXES bound to: 2'b00
- Parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING bound to: FALSE - type: string
- Parameter DEV_CAP2_TPH_COMPLETER_SUPPORTED bound to: 2'b00
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE bound to: TRUE - type: string
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE bound to: TRUE - type: string
- Parameter DEV_CAP_ENDPOINT_L0S_LATENCY bound to: 0 - type: integer
- Parameter DEV_CAP_ENDPOINT_L1_LATENCY bound to: 7 - type: integer
- Parameter DEV_CAP_EXT_TAG_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE bound to: FALSE - type: string
- Parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED bound to: 2 - type: integer
- Parameter DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_14_12 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_17_16 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_31_29 bound to: 0 - type: integer
- Parameter DEV_CONTROL_AUX_POWER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CONTROL_EXT_TAG_DEFAULT bound to: FALSE - type: string
- Parameter DISABLE_ASPM_L1_TIMER bound to: FALSE - type: string
- Parameter DISABLE_BAR_FILTERING bound to: FALSE - type: string
- Parameter DISABLE_ERR_MSG bound to: FALSE - type: string
- Parameter DISABLE_ID_CHECK bound to: FALSE - type: string
- Parameter DISABLE_LANE_REVERSAL bound to: TRUE - type: string
- Parameter DISABLE_LOCKED_FILTER bound to: FALSE - type: string
- Parameter DISABLE_PPM_FILTER bound to: FALSE - type: string
- Parameter DISABLE_RX_POISONED_RESP bound to: FALSE - type: string
- Parameter DISABLE_RX_TC_FILTER bound to: FALSE - type: string
- Parameter DISABLE_SCRAMBLING bound to: FALSE - type: string
- Parameter DNSTREAM_LINK_NUM bound to: 8'b00000000
- Parameter DSN_BASE_PTR bound to: 12'b000100000000
- Parameter DSN_CAP_ID bound to: 16'b0000000000000011
- Parameter DSN_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter DSN_CAP_ON bound to: TRUE - type: string
- Parameter DSN_CAP_VERSION bound to: 4'b0001
- Parameter ENABLE_MSG_ROUTE bound to: 11'b00000000000
- Parameter ENABLE_RX_TD_ECRC_TRIM bound to: FALSE - type: string
- Parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter ENTER_RVRY_EI_L0 bound to: TRUE - type: string
- Parameter EXIT_LOOPBACK_ON_EI bound to: TRUE - type: string
- Parameter EXPANSION_ROM bound to: 0 - type: integer
- Parameter EXT_CFG_CAP_PTR bound to: 6'b111111
- Parameter EXT_CFG_XP_CAP_PTR bound to: 10'b1111111111
- Parameter HEADER_TYPE bound to: 8'b00000000
- Parameter INFER_EI bound to: 5'b00000
- Parameter INTERRUPT_PIN bound to: 8'b00000000
- Parameter INTERRUPT_STAT_AUTO bound to: TRUE - type: string
- Parameter IS_SWITCH bound to: FALSE - type: string
- Parameter LAST_CONFIG_DWORD bound to: 10'b1111111111
- Parameter LINK_CAP_ASPM_OPTIONALITY bound to: FALSE - type: string
- Parameter LINK_CAP_ASPM_SUPPORT bound to: 1 - type: integer
- Parameter LINK_CAP_CLOCK_POWER_MANAGEMENT bound to: FALSE - type: string
- Parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter LINK_CAP_RSVD_23 bound to: 0 - type: integer
- Parameter LINK_CONTROL_RCB bound to: 0 - type: integer
- Parameter LINK_CTRL2_DEEMPHASIS bound to: FALSE - type: string
- Parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE bound to: FALSE - type: string
- Parameter LINK_CTRL2_TARGET_LINK_SPEED bound to: 4'b0010
- Parameter LINK_STATUS_SLOT_CLOCK_CONFIG bound to: TRUE - type: string
- Parameter LL_ACK_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_ACK_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_ACK_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter LL_REPLAY_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_REPLAY_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_REPLAY_TIMEOUT_FUNC bound to: 1 - type: integer
- Parameter LTSSM_MAX_LINK_WIDTH bound to: 6'b000100
- Parameter MPS_FORCE bound to: FALSE - type: string
- Parameter MSIX_BASE_PTR bound to: 8'b10011100
- Parameter MSIX_CAP_ID bound to: 8'b00010001
- Parameter MSIX_CAP_NEXTPTR bound to: 8'b00000000
- Parameter MSIX_CAP_ON bound to: FALSE - type: string
- Parameter MSIX_CAP_PBA_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_PBA_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_TABLE_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_SIZE bound to: 11'b00000000000
- Parameter MSI_BASE_PTR bound to: 8'b01001000
- Parameter MSI_CAP_64_BIT_ADDR_CAPABLE bound to: FALSE - type: string
- Parameter MSI_CAP_ID bound to: 8'b00000101
- Parameter MSI_CAP_MULTIMSGCAP bound to: 0 - type: integer
- Parameter MSI_CAP_MULTIMSG_EXTENSION bound to: 0 - type: integer
- Parameter MSI_CAP_NEXTPTR bound to: 8'b01100000
- Parameter MSI_CAP_ON bound to: TRUE - type: string
- Parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE bound to: FALSE - type: string
- Parameter N_FTS_COMCLK_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_COMCLK_GEN2 bound to: 255 - type: integer
- Parameter N_FTS_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_GEN2 bound to: 255 - type: integer
- Parameter PCIE_BASE_PTR bound to: 8'b01100000
- Parameter PCIE_CAP_CAPABILITY_ID bound to: 8'b00010000
- Parameter PCIE_CAP_CAPABILITY_VERSION bound to: 4'b0010
- Parameter PCIE_CAP_DEVICE_PORT_TYPE bound to: 4'b0000
- Parameter PCIE_CAP_NEXTPTR bound to: 8'b00000000
- Parameter PCIE_CAP_ON bound to: TRUE - type: string
- Parameter PCIE_CAP_RSVD_15_14 bound to: 0 - type: integer
- Parameter PCIE_CAP_SLOT_IMPLEMENTED bound to: FALSE - type: string
- Parameter PCIE_REVISION bound to: 2 - type: integer
- Parameter PL_AUTO_CONFIG bound to: 0 - type: integer
- Parameter PL_FAST_TRAIN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT bound to: 15'b000000000000000
- Parameter PM_ASPML0S_TIMEOUT_EN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter PM_ASPM_FASTEXIT bound to: FALSE - type: string
- Parameter PM_BASE_PTR bound to: 8'b01000000
- Parameter PM_CAP_AUXCURRENT bound to: 0 - type: integer
- Parameter PM_CAP_D1SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_D2SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_DSI bound to: FALSE - type: string
- Parameter PM_CAP_ID bound to: 8'b00000001
- Parameter PM_CAP_NEXTPTR bound to: 8'b01001000
- Parameter PM_CAP_ON bound to: TRUE - type: string
- Parameter PM_CAP_PMESUPPORT bound to: 5'b01111
- Parameter PM_CAP_PME_CLOCK bound to: FALSE - type: string
- Parameter PM_CAP_RSVD_04 bound to: 0 - type: integer
- Parameter PM_CAP_VERSION bound to: 3 - type: integer
- Parameter PM_CSR_B2B3 bound to: FALSE - type: string
- Parameter PM_CSR_BPCCEN bound to: FALSE - type: string
- Parameter PM_CSR_NOSOFTRST bound to: TRUE - type: string
- Parameter PM_DATA0 bound to: 8'b00000000
- Parameter PM_DATA1 bound to: 8'b00000000
- Parameter PM_DATA2 bound to: 8'b00000000
- Parameter PM_DATA3 bound to: 8'b00000000
- Parameter PM_DATA4 bound to: 8'b00000000
- Parameter PM_DATA5 bound to: 8'b00000000
- Parameter PM_DATA6 bound to: 8'b00000000
- Parameter PM_DATA7 bound to: 8'b00000000
- Parameter PM_DATA_SCALE0 bound to: 2'b00
- Parameter PM_DATA_SCALE1 bound to: 2'b00
- Parameter PM_DATA_SCALE2 bound to: 2'b00
- Parameter PM_DATA_SCALE3 bound to: 2'b00
- Parameter PM_DATA_SCALE4 bound to: 2'b00
- Parameter PM_DATA_SCALE5 bound to: 2'b00
- Parameter PM_DATA_SCALE6 bound to: 2'b00
- Parameter PM_DATA_SCALE7 bound to: 2'b00
- Parameter PM_MF bound to: FALSE - type: string
- Parameter RBAR_BASE_PTR bound to: 12'b000000000000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR0 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR1 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR2 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR3 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR4 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR5 bound to: 5'b00000
- Parameter RBAR_CAP_ID bound to: 16'b0000000000010101
- Parameter RBAR_CAP_INDEX0 bound to: 3'b000
- Parameter RBAR_CAP_INDEX1 bound to: 3'b000
- Parameter RBAR_CAP_INDEX2 bound to: 3'b000
- Parameter RBAR_CAP_INDEX3 bound to: 3'b000
- Parameter RBAR_CAP_INDEX4 bound to: 3'b000
- Parameter RBAR_CAP_INDEX5 bound to: 3'b000
- Parameter RBAR_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter RBAR_CAP_ON bound to: FALSE - type: string
- Parameter RBAR_CAP_SUP0 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP1 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP2 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP3 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP4 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP5 bound to: 1 - type: integer
- Parameter RBAR_CAP_VERSION bound to: 4'b0001
- Parameter RBAR_NUM bound to: 3'b000
- Parameter RECRC_CHK bound to: 0 - type: integer
- Parameter RECRC_CHK_TRIM bound to: FALSE - type: string
- Parameter ROOT_CAP_CRS_SW_VISIBILITY bound to: FALSE - type: string
- Parameter RP_AUTO_SPD bound to: 2'b01
- Parameter RP_AUTO_SPD_LOOPCNT bound to: 5'b11111
- Parameter SELECT_DLL_IF bound to: FALSE - type: string
- Parameter SIM_VERSION bound to: 1.0 - type: string
- Parameter SLOT_CAP_ATT_BUTTON_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ATT_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_CAPABLE bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_SURPRISE bound to: FALSE - type: string
- Parameter SLOT_CAP_MRL_SENSOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT bound to: FALSE - type: string
- Parameter SLOT_CAP_PHYSICAL_SLOT_NUM bound to: 13'b0000000000000
- Parameter SLOT_CAP_POWER_CONTROLLER_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_POWER_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_SCALE bound to: 0 - type: integer
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_VALUE bound to: 8'b00000000
- Parameter SPARE_BIT0 bound to: 0 - type: integer
- Parameter SPARE_BIT1 bound to: 0 - type: integer
- Parameter SPARE_BIT2 bound to: 0 - type: integer
- Parameter SPARE_BIT3 bound to: 0 - type: integer
- Parameter SPARE_BIT4 bound to: 0 - type: integer
- Parameter SPARE_BIT5 bound to: 0 - type: integer
- Parameter SPARE_BIT6 bound to: 0 - type: integer
- Parameter SPARE_BIT7 bound to: 0 - type: integer
- Parameter SPARE_BIT8 bound to: 0 - type: integer
- Parameter SPARE_BYTE0 bound to: 8'b00000000
- Parameter SPARE_BYTE1 bound to: 8'b00000000
- Parameter SPARE_BYTE2 bound to: 8'b00000000
- Parameter SPARE_BYTE3 bound to: 8'b00000000
- Parameter SPARE_WORD0 bound to: 0 - type: integer
- Parameter SPARE_WORD1 bound to: 0 - type: integer
- Parameter SPARE_WORD2 bound to: 0 - type: integer
- Parameter SPARE_WORD3 bound to: 0 - type: integer
- Parameter SSL_MESSAGE_AUTO bound to: FALSE - type: string
- Parameter TECRC_EP_INV bound to: FALSE - type: string
- Parameter TL_RBYPASS bound to: FALSE - type: string
- Parameter TL_RX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_RX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_RX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TL_TFC_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_CHECKS_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_TX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_TX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TRN_DW bound to: TRUE - type: string
- Parameter TRN_NP_FC bound to: TRUE - type: string
- Parameter UPCONFIG_CAPABLE bound to: TRUE - type: string
- Parameter UPSTREAM_FACING bound to: TRUE - type: string
- Parameter UR_ATOMIC bound to: FALSE - type: string
- Parameter UR_CFG1 bound to: TRUE - type: string
- Parameter UR_INV_REQ bound to: TRUE - type: string
- Parameter UR_PRS_RESPONSE bound to: TRUE - type: string
- Parameter USER_CLK2_DIV2 bound to: TRUE - type: string
- Parameter USER_CLK_FREQ bound to: 3 - type: integer
- Parameter USE_RID_PINS bound to: FALSE - type: string
- Parameter VC0_CPL_INFINITE bound to: TRUE - type: string
- Parameter VC0_RX_RAM_LIMIT bound to: 13'b0011111111111
- Parameter VC0_TOTAL_CREDITS_CD bound to: 850 - type: integer
- Parameter VC0_TOTAL_CREDITS_CH bound to: 72 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPD bound to: 8 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPH bound to: 4 - type: integer
- Parameter VC0_TOTAL_CREDITS_PD bound to: 64 - type: integer
- Parameter VC0_TOTAL_CREDITS_PH bound to: 4 - type: integer
- Parameter VC0_TX_LASTPACKET bound to: 29 - type: integer
- Parameter VC_BASE_PTR bound to: 12'b000000000000
- Parameter VC_CAP_ID bound to: 16'b0000000000000010
- Parameter VC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VC_CAP_ON bound to: FALSE - type: string
- Parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS bound to: FALSE - type: string
- Parameter VC_CAP_VERSION bound to: 4'b0001
- Parameter VSEC_BASE_PTR bound to: 12'b000000000000
- Parameter VSEC_CAP_HDR_ID bound to: 16'b0001001000110100
- Parameter VSEC_CAP_HDR_LENGTH bound to: 12'b000000011000
- Parameter VSEC_CAP_HDR_REVISION bound to: 4'b0001
- Parameter VSEC_CAP_ID bound to: 16'b0000000000001011
- Parameter VSEC_CAP_IS_LINK_VISIBLE bound to: TRUE - type: string
- Parameter VSEC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VSEC_CAP_ON bound to: FALSE - type: string
- Parameter VSEC_CAP_VERSION bound to: 4'b0001
- Parameter ENABLE_JTAG_DBG bound to: FALSE - type: string
- Parameter REDUCE_OOB_FREQ bound to: FALSE - type: string
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_top' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_top.v:68]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter C_FAMILY bound to: X7 - type: string
- Parameter C_ROOT_PORT bound to: FALSE - type: string
- Parameter C_PM_PRIORITY bound to: FALSE - type: string
- Parameter TCQ bound to: 1 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_rx' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx.v:70]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter C_FAMILY bound to: X7 - type: string
- Parameter C_ROOT_PORT bound to: FALSE - type: string
- Parameter C_PM_PRIORITY bound to: FALSE - type: string
- Parameter TCQ bound to: 1 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_rx_pipeline' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx_pipeline.v:70]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter C_FAMILY bound to: X7 - type: string
- Parameter TCQ bound to: 1 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_rx_pipeline' (2#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx_pipeline.v:70]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_rx_null_gen' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx_null_gen.v:71]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter TCQ bound to: 1 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- Parameter INTERFACE_WIDTH_DWORDS bound to: 11'b00000000100
- Parameter IDLE bound to: 0 - type: integer
- Parameter IN_PACKET bound to: 1 - type: integer
- INFO: [Synth 8-226] default block is never used [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx_null_gen.v:252]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_rx_null_gen' (3#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx_null_gen.v:71]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_rx' (4#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_rx.v:70]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_tx' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx.v:70]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter C_FAMILY bound to: X7 - type: string
- Parameter C_ROOT_PORT bound to: FALSE - type: string
- Parameter C_PM_PRIORITY bound to: FALSE - type: string
- Parameter TCQ bound to: 1 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_tx_thrtl_ctl' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx_thrtl_ctl.v:71]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter C_FAMILY bound to: X7 - type: string
- Parameter C_ROOT_PORT bound to: FALSE - type: string
- Parameter TCQ bound to: 1 - type: integer
- Parameter TBUF_AV_MIN bound to: 5 - type: integer
- Parameter TBUF_AV_GAP bound to: 6 - type: integer
- Parameter TBUF_GAP_TIME bound to: 4 - type: integer
- Parameter TCFG_LATENCY_TIME bound to: 2'b10
- Parameter TCFG_GNT_PIPE_STAGES bound to: 3 - type: integer
- Parameter LINKSTATE_L0 bound to: 3'b000
- Parameter LINKSTATE_PPM_L1 bound to: 3'b001
- Parameter LINKSTATE_PPM_L1_TRANS bound to: 3'b101
- Parameter LINKSTATE_PPM_L23R_TRANS bound to: 3'b110
- Parameter PM_ENTER_L1 bound to: 8'b00100000
- Parameter POWERSTATE_D0 bound to: 2'b00
- Parameter IDLE bound to: 0 - type: integer
- Parameter THROTTLE bound to: 1 - type: integer
- INFO: [Synth 8-226] default block is never used [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx_thrtl_ctl.v:572]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_tx_thrtl_ctl' (5#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx_thrtl_ctl.v:71]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_axi_basic_tx_pipeline' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx_pipeline.v:71]
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter C_PM_PRIORITY bound to: FALSE - type: string
- Parameter TCQ bound to: 1 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_tx_pipeline' (6#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx_pipeline.v:71]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_tx' (7#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_tx.v:70]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_axi_basic_top' (8#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_axi_basic_top.v:68]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_7x' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_7x.v:63]
- Parameter AER_BASE_PTR bound to: 12'b000000000000
- Parameter AER_CAP_ECRC_CHECK_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ECRC_GEN_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ID bound to: 16'b0000000000000001
- Parameter AER_CAP_MULTIHEADER bound to: FALSE - type: string
- Parameter AER_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter AER_CAP_ON bound to: FALSE - type: string
- Parameter AER_CAP_OPTIONAL_ERR_SUPPORT bound to: 24'b000000000000000000000000
- Parameter AER_CAP_PERMIT_ROOTERR_UPDATE bound to: FALSE - type: string
- Parameter AER_CAP_VERSION bound to: 4'b0001
- Parameter ALLOW_X8_GEN2 bound to: FALSE - type: string
- Parameter BAR0 bound to: -1048576 - type: integer
- Parameter BAR1 bound to: 0 - type: integer
- Parameter BAR2 bound to: 0 - type: integer
- Parameter BAR3 bound to: 0 - type: integer
- Parameter BAR4 bound to: 0 - type: integer
- Parameter BAR5 bound to: 0 - type: integer
- Parameter CAPABILITIES_PTR bound to: 8'b01000000
- Parameter CARDBUS_CIS_POINTER bound to: 0 - type: integer
- Parameter CFG_ECRC_ERR_CPLSTAT bound to: 0 - type: integer
- Parameter CLASS_CODE bound to: 24'b000001011000000000000000
- Parameter CMD_INTX_IMPLEMENTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_DISABLE_SUPPORTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_RANGES_SUPPORTED bound to: 4'b0010
- Parameter CRM_MODULE_RSTS bound to: 7'b0000000
- Parameter C_DATA_WIDTH bound to: 128 - type: integer
- Parameter REM_WIDTH bound to: 2 - type: integer
- Parameter KEEP_WIDTH bound to: 16 - type: integer
- Parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_MAX_ENDEND_TLP_PREFIXES bound to: 2'b00
- Parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING bound to: FALSE - type: string
- Parameter DEV_CAP2_TPH_COMPLETER_SUPPORTED bound to: 2'b00
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE bound to: TRUE - type: string
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE bound to: TRUE - type: string
- Parameter DEV_CAP_ENDPOINT_L0S_LATENCY bound to: 0 - type: integer
- Parameter DEV_CAP_ENDPOINT_L1_LATENCY bound to: 7 - type: integer
- Parameter DEV_CAP_EXT_TAG_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE bound to: FALSE - type: string
- Parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED bound to: 2 - type: integer
- Parameter DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT bound to: 0 - type: integer
- Parameter DEV_CAP_ROLE_BASED_ERROR bound to: TRUE - type: string
- Parameter DEV_CAP_RSVD_14_12 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_17_16 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_31_29 bound to: 0 - type: integer
- Parameter DEV_CONTROL_AUX_POWER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CONTROL_EXT_TAG_DEFAULT bound to: FALSE - type: string
- Parameter DISABLE_ASPM_L1_TIMER bound to: FALSE - type: string
- Parameter DISABLE_BAR_FILTERING bound to: FALSE - type: string
- Parameter DISABLE_ERR_MSG bound to: FALSE - type: string
- Parameter DISABLE_ID_CHECK bound to: FALSE - type: string
- Parameter DISABLE_LANE_REVERSAL bound to: TRUE - type: string
- Parameter DISABLE_LOCKED_FILTER bound to: FALSE - type: string
- Parameter DISABLE_PPM_FILTER bound to: FALSE - type: string
- Parameter DISABLE_RX_POISONED_RESP bound to: FALSE - type: string
- Parameter DISABLE_RX_TC_FILTER bound to: FALSE - type: string
- Parameter DISABLE_SCRAMBLING bound to: FALSE - type: string
- Parameter DNSTREAM_LINK_NUM bound to: 8'b00000000
- Parameter DSN_BASE_PTR bound to: 12'b000100000000
- Parameter DSN_CAP_ID bound to: 16'b0000000000000011
- Parameter DSN_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter DSN_CAP_ON bound to: TRUE - type: string
- Parameter DSN_CAP_VERSION bound to: 4'b0001
- Parameter ENABLE_MSG_ROUTE bound to: 11'b00000000000
- Parameter ENABLE_RX_TD_ECRC_TRIM bound to: FALSE - type: string
- Parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter ENTER_RVRY_EI_L0 bound to: TRUE - type: string
- Parameter EXIT_LOOPBACK_ON_EI bound to: TRUE - type: string
- Parameter EXPANSION_ROM bound to: 0 - type: integer
- Parameter EXT_CFG_CAP_PTR bound to: 6'b111111
- Parameter EXT_CFG_XP_CAP_PTR bound to: 10'b1111111111
- Parameter HEADER_TYPE bound to: 8'b00000000
- Parameter INFER_EI bound to: 5'b00000
- Parameter INTERRUPT_PIN bound to: 8'b00000000
- Parameter INTERRUPT_STAT_AUTO bound to: TRUE - type: string
- Parameter IS_SWITCH bound to: FALSE - type: string
- Parameter LAST_CONFIG_DWORD bound to: 10'b1111111111
- Parameter LINK_CAP_ASPM_OPTIONALITY bound to: FALSE - type: string
- Parameter LINK_CAP_ASPM_SUPPORT bound to: 1 - type: integer
- Parameter LINK_CAP_CLOCK_POWER_MANAGEMENT bound to: FALSE - type: string
- Parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter LINK_CAP_RSVD_23 bound to: 0 - type: integer
- Parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE bound to: FALSE - type: string
- Parameter LINK_CONTROL_RCB bound to: 0 - type: integer
- Parameter LINK_CTRL2_DEEMPHASIS bound to: FALSE - type: string
- Parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE bound to: FALSE - type: string
- Parameter LINK_CTRL2_TARGET_LINK_SPEED bound to: 4'b0010
- Parameter LINK_STATUS_SLOT_CLOCK_CONFIG bound to: TRUE - type: string
- Parameter LL_ACK_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_ACK_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_ACK_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter LL_REPLAY_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_REPLAY_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_REPLAY_TIMEOUT_FUNC bound to: 1 - type: integer
- Parameter LTSSM_MAX_LINK_WIDTH bound to: 6'b000100
- Parameter MPS_FORCE bound to: FALSE - type: string
- Parameter MSIX_BASE_PTR bound to: 8'b10011100
- Parameter MSIX_CAP_ID bound to: 8'b00010001
- Parameter MSIX_CAP_NEXTPTR bound to: 8'b00000000
- Parameter MSIX_CAP_ON bound to: FALSE - type: string
- Parameter MSIX_CAP_PBA_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_PBA_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_TABLE_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_SIZE bound to: 11'b00000000000
- Parameter MSI_BASE_PTR bound to: 8'b01001000
- Parameter MSI_CAP_64_BIT_ADDR_CAPABLE bound to: FALSE - type: string
- Parameter MSI_CAP_ID bound to: 8'b00000101
- Parameter MSI_CAP_MULTIMSGCAP bound to: 0 - type: integer
- Parameter MSI_CAP_MULTIMSG_EXTENSION bound to: 0 - type: integer
- Parameter MSI_CAP_NEXTPTR bound to: 8'b01100000
- Parameter MSI_CAP_ON bound to: TRUE - type: string
- Parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE bound to: FALSE - type: string
- Parameter N_FTS_COMCLK_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_COMCLK_GEN2 bound to: 255 - type: integer
- Parameter N_FTS_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_GEN2 bound to: 255 - type: integer
- Parameter PCIE_BASE_PTR bound to: 8'b01100000
- Parameter PCIE_CAP_CAPABILITY_ID bound to: 8'b00010000
- Parameter PCIE_CAP_CAPABILITY_VERSION bound to: 4'b0010
- Parameter PCIE_CAP_DEVICE_PORT_TYPE bound to: 4'b0000
- Parameter PCIE_CAP_NEXTPTR bound to: 8'b00000000
- Parameter PCIE_CAP_ON bound to: TRUE - type: string
- Parameter PCIE_CAP_RSVD_15_14 bound to: 0 - type: integer
- Parameter PCIE_CAP_SLOT_IMPLEMENTED bound to: FALSE - type: string
- Parameter PCIE_REVISION bound to: 2 - type: integer
- Parameter PL_AUTO_CONFIG bound to: 0 - type: integer
- Parameter PL_FAST_TRAIN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT bound to: 15'b000000000000000
- Parameter PM_ASPML0S_TIMEOUT_EN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter PM_ASPM_FASTEXIT bound to: FALSE - type: string
- Parameter PM_BASE_PTR bound to: 8'b01000000
- Parameter PM_CAP_AUXCURRENT bound to: 0 - type: integer
- Parameter PM_CAP_D1SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_D2SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_DSI bound to: FALSE - type: string
- Parameter PM_CAP_ID bound to: 8'b00000001
- Parameter PM_CAP_NEXTPTR bound to: 8'b01001000
- Parameter PM_CAP_ON bound to: TRUE - type: string
- Parameter PM_CAP_PMESUPPORT bound to: 5'b01111
- Parameter PM_CAP_PME_CLOCK bound to: FALSE - type: string
- Parameter PM_CAP_RSVD_04 bound to: 0 - type: integer
- Parameter PM_CAP_VERSION bound to: 3 - type: integer
- Parameter PM_CSR_B2B3 bound to: FALSE - type: string
- Parameter PM_CSR_BPCCEN bound to: FALSE - type: string
- Parameter PM_CSR_NOSOFTRST bound to: TRUE - type: string
- Parameter PM_DATA0 bound to: 8'b00000000
- Parameter PM_DATA1 bound to: 8'b00000000
- Parameter PM_DATA2 bound to: 8'b00000000
- Parameter PM_DATA3 bound to: 8'b00000000
- Parameter PM_DATA4 bound to: 8'b00000000
- Parameter PM_DATA5 bound to: 8'b00000000
- Parameter PM_DATA6 bound to: 8'b00000000
- Parameter PM_DATA7 bound to: 8'b00000000
- Parameter PM_DATA_SCALE0 bound to: 2'b00
- Parameter PM_DATA_SCALE1 bound to: 2'b00
- Parameter PM_DATA_SCALE2 bound to: 2'b00
- Parameter PM_DATA_SCALE3 bound to: 2'b00
- Parameter PM_DATA_SCALE4 bound to: 2'b00
- Parameter PM_DATA_SCALE5 bound to: 2'b00
- Parameter PM_DATA_SCALE6 bound to: 2'b00
- Parameter PM_DATA_SCALE7 bound to: 2'b00
- Parameter PM_MF bound to: FALSE - type: string
- Parameter RBAR_BASE_PTR bound to: 12'b000000000000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR0 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR1 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR2 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR3 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR4 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR5 bound to: 5'b00000
- Parameter RBAR_CAP_ID bound to: 16'b0000000000010101
- Parameter RBAR_CAP_INDEX0 bound to: 3'b000
- Parameter RBAR_CAP_INDEX1 bound to: 3'b000
- Parameter RBAR_CAP_INDEX2 bound to: 3'b000
- Parameter RBAR_CAP_INDEX3 bound to: 3'b000
- Parameter RBAR_CAP_INDEX4 bound to: 3'b000
- Parameter RBAR_CAP_INDEX5 bound to: 3'b000
- Parameter RBAR_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter RBAR_CAP_ON bound to: FALSE - type: string
- Parameter RBAR_CAP_SUP0 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP1 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP2 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP3 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP4 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP5 bound to: 1 - type: integer
- Parameter RBAR_CAP_VERSION bound to: 4'b0001
- Parameter RBAR_NUM bound to: 3'b000
- Parameter RECRC_CHK bound to: 0 - type: integer
- Parameter RECRC_CHK_TRIM bound to: FALSE - type: string
- Parameter ROOT_CAP_CRS_SW_VISIBILITY bound to: FALSE - type: string
- Parameter RP_AUTO_SPD bound to: 2'b01
- Parameter RP_AUTO_SPD_LOOPCNT bound to: 5'b11111
- Parameter SELECT_DLL_IF bound to: FALSE - type: string
- Parameter SIM_VERSION bound to: 1.0 - type: string
- Parameter SLOT_CAP_ATT_BUTTON_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ATT_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_CAPABLE bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_SURPRISE bound to: FALSE - type: string
- Parameter SLOT_CAP_MRL_SENSOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT bound to: FALSE - type: string
- Parameter SLOT_CAP_PHYSICAL_SLOT_NUM bound to: 13'b0000000000000
- Parameter SLOT_CAP_POWER_CONTROLLER_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_POWER_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_SCALE bound to: 0 - type: integer
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_VALUE bound to: 8'b00000000
- Parameter SPARE_BIT0 bound to: 0 - type: integer
- Parameter SPARE_BIT1 bound to: 0 - type: integer
- Parameter SPARE_BIT2 bound to: 0 - type: integer
- Parameter SPARE_BIT3 bound to: 0 - type: integer
- Parameter SPARE_BIT4 bound to: 0 - type: integer
- Parameter SPARE_BIT5 bound to: 0 - type: integer
- Parameter SPARE_BIT6 bound to: 0 - type: integer
- Parameter SPARE_BIT7 bound to: 0 - type: integer
- Parameter SPARE_BIT8 bound to: 0 - type: integer
- Parameter SPARE_BYTE0 bound to: 8'b00000000
- Parameter SPARE_BYTE1 bound to: 8'b00000000
- Parameter SPARE_BYTE2 bound to: 8'b00000000
- Parameter SPARE_BYTE3 bound to: 8'b00000000
- Parameter SPARE_WORD0 bound to: 0 - type: integer
- Parameter SPARE_WORD1 bound to: 0 - type: integer
- Parameter SPARE_WORD2 bound to: 0 - type: integer
- Parameter SPARE_WORD3 bound to: 0 - type: integer
- Parameter SSL_MESSAGE_AUTO bound to: FALSE - type: string
- Parameter TECRC_EP_INV bound to: FALSE - type: string
- Parameter TL_RBYPASS bound to: FALSE - type: string
- Parameter TL_RX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_RX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_RX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TL_TFC_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_CHECKS_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_TX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_TX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TRN_DW bound to: TRUE - type: string
- Parameter TRN_NP_FC bound to: TRUE - type: string
- Parameter UPCONFIG_CAPABLE bound to: TRUE - type: string
- Parameter UPSTREAM_FACING bound to: TRUE - type: string
- Parameter UR_ATOMIC bound to: FALSE - type: string
- Parameter UR_CFG1 bound to: TRUE - type: string
- Parameter UR_INV_REQ bound to: TRUE - type: string
- Parameter UR_PRS_RESPONSE bound to: TRUE - type: string
- Parameter USER_CLK2_DIV2 bound to: TRUE - type: string
- Parameter USER_CLK_FREQ bound to: 3 - type: integer
- Parameter USE_RID_PINS bound to: FALSE - type: string
- Parameter VC0_CPL_INFINITE bound to: TRUE - type: string
- Parameter VC0_RX_RAM_LIMIT bound to: 13'b0011111111111
- Parameter VC0_TOTAL_CREDITS_CD bound to: 850 - type: integer
- Parameter VC0_TOTAL_CREDITS_CH bound to: 72 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPD bound to: 8 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPH bound to: 4 - type: integer
- Parameter VC0_TOTAL_CREDITS_PD bound to: 64 - type: integer
- Parameter VC0_TOTAL_CREDITS_PH bound to: 4 - type: integer
- Parameter VC0_TX_LASTPACKET bound to: 29 - type: integer
- Parameter VC_BASE_PTR bound to: 12'b000000000000
- Parameter VC_CAP_ID bound to: 16'b0000000000000010
- Parameter VC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VC_CAP_ON bound to: FALSE - type: string
- Parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS bound to: FALSE - type: string
- Parameter VC_CAP_VERSION bound to: 4'b0001
- Parameter VSEC_BASE_PTR bound to: 12'b000000000000
- Parameter VSEC_CAP_HDR_ID bound to: 16'b0001001000110100
- Parameter VSEC_CAP_HDR_LENGTH bound to: 12'b000000011000
- Parameter VSEC_CAP_HDR_REVISION bound to: 4'b0001
- Parameter VSEC_CAP_ID bound to: 16'b0000000000001011
- Parameter VSEC_CAP_IS_LINK_VISIBLE bound to: TRUE - type: string
- Parameter VSEC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VSEC_CAP_ON bound to: FALSE - type: string
- Parameter VSEC_CAP_VERSION bound to: 4'b0001
- Parameter ENABLE_JTAG_DBG bound to: FALSE - type: string
- Parameter TCQ bound to: 1 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_bram_top_7x' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_top_7x.v:72]
- Parameter IMPL_TARGET bound to: HARD - type: string
- Parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED bound to: 2 - type: integer
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter VC0_TX_LASTPACKET bound to: 29 - type: integer
- Parameter TLM_TX_OVERHEAD bound to: 24 - type: integer
- Parameter TL_TX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_TX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_TX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter VC0_RX_RAM_LIMIT bound to: 13'b0011111111111
- Parameter TL_RX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_RX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_RX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter MPS_BYTES bound to: 512 - type: integer
- Parameter BYTES_TX bound to: 16080 - type: integer
- Parameter ROWS_TX bound to: 1 - type: integer
- Parameter COLS_TX bound to: 4 - type: integer
- Parameter ROWS_RX bound to: 1 - type: integer
- Parameter COLS_RX bound to: 4 - type: integer
- WARNING: [Synth 8-639] system function call 'time' not supported [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_top_7x.v:138]
- INFO: [Synth 8-251] [1'b0] ROWS_TX 1 COLS_TX 4 [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_top_7x.v:138]
- WARNING: [Synth 8-639] system function call 'time' not supported [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_top_7x.v:139]
- INFO: [Synth 8-251] [1'b0] ROWS_RX 1 COLS_RX 4 [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_top_7x.v:139]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_brams_7x' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_brams_7x.v:65]
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter IMPL_TARGET bound to: HARD - type: string
- Parameter NUM_BRAMS bound to: 4 - type: integer
- Parameter RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TCQ bound to: 1 - type: integer
- Parameter DOB_REG bound to: 1 - type: integer
- Parameter WIDTH bound to: 7'b0010010
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_bram_7x' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_7x.v:63]
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter IMPL_TARGET bound to: HARD - type: string
- Parameter DOB_REG bound to: 1 - type: integer
- Parameter WIDTH bound to: 7'b0010010
- Parameter ADDR_MSB bound to: 10 - type: integer
- Parameter ADDR_LO_BITS bound to: 4 - type: integer
- Parameter D_MSB bound to: 15 - type: integer
- Parameter DP_LSB bound to: 16 - type: integer
- Parameter DP_MSB bound to: 17 - type: integer
- Parameter DPW bound to: 2 - type: integer
- Parameter WRITE_MODE bound to: NO_CHANGE - type: string
- Parameter DEVICE bound to: 7SERIES - type: string
- Parameter BRAM_SIZE bound to: 36Kb - type: string
- Parameter WE_WIDTH bound to: 2 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'BRAM_TDP_MACRO' [/tools/Xilinx/Vivado/2020.2/data/verilog/src/unimacro/BRAM_TDP_MACRO.v:30]
- Parameter BRAM_SIZE bound to: 36Kb - type: string
- Parameter DEVICE bound to: 7SERIES - type: string
- Parameter DOA_REG bound to: 0 - type: integer
- Parameter DOB_REG bound to: 1 - type: integer
- Parameter INIT_A bound to: 36'b000000000000000000000000000000000000
- Parameter INIT_B bound to: 36'b000000000000000000000000000000000000
- Parameter INIT_00 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_01 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_02 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_03 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_04 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_05 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_06 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_07 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_08 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_09 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_10 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_11 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_12 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_13 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_14 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_15 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_16 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_17 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_18 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_19 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_20 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_21 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_22 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_23 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_24 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_25 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_26 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_27 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_28 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_29 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_30 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_31 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_32 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_33 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_34 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_35 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_36 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_37 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_38 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_39 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_40 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_41 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_42 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_43 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_44 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_45 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_46 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_47 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_48 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_49 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_50 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_51 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_52 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_53 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_54 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_55 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_56 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_57 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_58 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_59 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_60 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_61 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_62 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_63 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_64 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_65 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_66 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_67 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_68 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_69 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_70 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_71 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_72 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_73 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_74 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_75 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_76 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_77 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_78 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_79 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_00 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_01 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_02 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_03 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_04 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_05 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_06 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_07 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_08 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_09 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_FILE bound to: NONE - type: string
- Parameter READ_WIDTH_A bound to: 7'b0010010
- Parameter READ_WIDTH_B bound to: 7'b0010010
- Parameter SIM_COLLISION_CHECK bound to: ALL - type: string
- Parameter SIM_MODE bound to: FAST - type: string
- Parameter SRVAL_A bound to: 36'b000000000000000000000000000000000000
- Parameter SRVAL_B bound to: 36'b000000000000000000000000000000000000
- Parameter WRITE_MODE_A bound to: NO_CHANGE - type: string
- Parameter WRITE_MODE_B bound to: WRITE_FIRST - type: string
- Parameter WRITE_WIDTH_A bound to: 7'b0010010
- Parameter WRITE_WIDTH_B bound to: 7'b0010010
- Parameter WRITEA_P bound to: TRUE - type: string
- Parameter WRITEB_P bound to: TRUE - type: string
- Parameter READA_P bound to: TRUE - type: string
- Parameter READB_P bound to: TRUE - type: string
- Parameter valid_width_a bound to: TRUE - type: string
- Parameter valid_width_b bound to: TRUE - type: string
- Parameter rd_width_a bound to: 18 - type: integer
- Parameter rd_width_b bound to: 18 - type: integer
- Parameter wr_width_a bound to: 18 - type: integer
- Parameter wr_width_b bound to: 18 - type: integer
- Parameter DIA_WIDTH bound to: 16 - type: integer
- Parameter DIB_WIDTH bound to: 16 - type: integer
- Parameter DOA_WIDTH bound to: 16 - type: integer
- Parameter DOB_WIDTH bound to: 16 - type: integer
- Parameter DIPA_WIDTH bound to: 2 - type: integer
- Parameter DIPB_WIDTH bound to: 2 - type: integer
- Parameter DOPA_WIDTH bound to: 2 - type: integer
- Parameter DOPB_WIDTH bound to: 2 - type: integer
- Parameter WEA_WIDTH bound to: 2 - type: integer
- Parameter WEB_WIDTH bound to: 2 - type: integer
- Parameter least_width_A bound to: 16 - type: integer
- Parameter least_width_B bound to: 16 - type: integer
- Parameter RDA_BYTE_WIDTH bound to: 2 - type: integer
- Parameter RDB_BYTE_WIDTH bound to: 2 - type: integer
- Parameter WRA_WIDTHP bound to: 2 - type: integer
- Parameter WRB_WIDTHP bound to: 2 - type: integer
- Parameter RDA_WIDTHP bound to: 2 - type: integer
- Parameter RDB_WIDTHP bound to: 2 - type: integer
- Parameter ADDRA_WIDTH bound to: 11 - type: integer
- Parameter ADDRB_WIDTH bound to: 11 - type: integer
- Parameter MAX_ADDRA_SIZE bound to: 16 - type: integer
- Parameter MAX_ADDRB_SIZE bound to: 16 - type: integer
- Parameter MAX_DIA_SIZE bound to: 32 - type: integer
- Parameter MAX_DIB_SIZE bound to: 32 - type: integer
- Parameter MAX_DIPA_SIZE bound to: 4 - type: integer
- Parameter MAX_DIPB_SIZE bound to: 4 - type: integer
- Parameter MAX_DOA_SIZE bound to: 32 - type: integer
- Parameter MAX_DOB_SIZE bound to: 32 - type: integer
- Parameter MAX_DOPA_SIZE bound to: 4 - type: integer
- Parameter MAX_DOPB_SIZE bound to: 4 - type: integer
- Parameter MAX_WEA_SIZE bound to: 4 - type: integer
- Parameter MAX_WEB_SIZE bound to: 4 - type: integer
- Parameter fin_rd_widtha bound to: 18 - type: integer
- Parameter fin_rd_widthb bound to: 18 - type: integer
- Parameter fin_wr_widtha bound to: 18 - type: integer
- Parameter fin_wr_widthb bound to: 18 - type: integer
- Parameter INIT_SRVAL_WIDTH_SIZE bound to: 36 - type: integer
- Parameter inita_tmp bound to: 72'b000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter initb_tmp bound to: 72'b000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter srvala_tmp bound to: 72'b000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter srvalb_tmp bound to: 72'b000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter sim_device_pm bound to: 7SERIES - type: string
- INFO: [Synth 8-6157] synthesizing module 'RAMB36E1' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:75938]
- Parameter DOA_REG bound to: 0 - type: integer
- Parameter DOB_REG bound to: 1 - type: integer
- Parameter EN_ECC_READ bound to: FALSE - type: string
- Parameter EN_ECC_WRITE bound to: FALSE - type: string
- Parameter INITP_00 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_01 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_02 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_03 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_04 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_05 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_06 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_07 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_08 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_09 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INITP_0F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_00 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_01 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_02 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_03 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_04 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_05 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_06 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_07 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_08 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_09 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_0F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_10 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_11 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_12 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_13 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_14 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_15 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_16 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_17 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_18 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_19 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_1F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_20 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_21 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_22 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_23 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_24 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_25 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_26 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_27 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_28 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_29 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_2F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_30 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_31 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_32 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_33 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_34 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_35 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_36 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_37 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_38 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_39 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_3F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_40 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_41 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_42 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_43 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_44 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_45 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_46 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_47 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_48 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_49 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_4F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_50 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_51 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_52 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_53 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_54 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_55 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_56 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_57 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_58 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_59 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_5F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_60 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_61 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_62 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_63 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_64 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_65 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_66 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_67 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_68 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_69 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_6F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_70 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_71 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_72 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_73 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_74 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_75 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_76 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_77 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_78 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_79 bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7A bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7B bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7C bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7D bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7E bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_7F bound to: 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter INIT_A bound to: 36'b000000000000000000000000000000000000
- Parameter INIT_B bound to: 36'b000000000000000000000000000000000000
- Parameter INIT_FILE bound to: NONE - type: string
- Parameter IS_CLKARDCLK_INVERTED bound to: 1'b0
- Parameter IS_CLKBWRCLK_INVERTED bound to: 1'b0
- Parameter IS_ENARDEN_INVERTED bound to: 1'b0
- Parameter IS_ENBWREN_INVERTED bound to: 1'b0
- Parameter IS_RSTRAMARSTRAM_INVERTED bound to: 1'b0
- Parameter IS_RSTRAMB_INVERTED bound to: 1'b0
- Parameter IS_RSTREGARSTREG_INVERTED bound to: 1'b0
- Parameter IS_RSTREGB_INVERTED bound to: 1'b0
- Parameter RAM_EXTENSION_A bound to: NONE - type: string
- Parameter RAM_EXTENSION_B bound to: NONE - type: string
- Parameter RAM_MODE bound to: TDP - type: string
- Parameter RDADDR_COLLISION_HWCONFIG bound to: DELAYED_WRITE - type: string
- Parameter READ_WIDTH_A bound to: 18 - type: integer
- Parameter READ_WIDTH_B bound to: 18 - type: integer
- Parameter RSTREG_PRIORITY_A bound to: RSTREG - type: string
- Parameter RSTREG_PRIORITY_B bound to: RSTREG - type: string
- Parameter SIM_COLLISION_CHECK bound to: ALL - type: string
- Parameter SIM_DEVICE bound to: 7SERIES - type: string
- Parameter SRVAL_A bound to: 36'b000000000000000000000000000000000000
- Parameter SRVAL_B bound to: 36'b000000000000000000000000000000000000
- Parameter WRITE_MODE_A bound to: NO_CHANGE - type: string
- Parameter WRITE_MODE_B bound to: WRITE_FIRST - type: string
- Parameter WRITE_WIDTH_A bound to: 18 - type: integer
- Parameter WRITE_WIDTH_B bound to: 18 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'RAMB36E1' (9#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:75938]
- INFO: [Synth 8-6155] done synthesizing module 'BRAM_TDP_MACRO' (10#1) [/tools/Xilinx/Vivado/2020.2/data/verilog/src/unimacro/BRAM_TDP_MACRO.v:30]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_bram_7x' (11#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_7x.v:63]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_brams_7x' (12#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_brams_7x.v:65]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_bram_top_7x' (13#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_bram_top_7x.v:72]
- INFO: [Synth 8-6157] synthesizing module 'PCIE_2_1' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:56852]
- Parameter AER_BASE_PTR bound to: 12'b000000000000
- Parameter AER_CAP_ECRC_CHECK_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ECRC_GEN_CAPABLE bound to: FALSE - type: string
- Parameter AER_CAP_ID bound to: 16'b0000000000000001
- Parameter AER_CAP_MULTIHEADER bound to: FALSE - type: string
- Parameter AER_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter AER_CAP_ON bound to: FALSE - type: string
- Parameter AER_CAP_OPTIONAL_ERR_SUPPORT bound to: 24'b000000000000000000000000
- Parameter AER_CAP_PERMIT_ROOTERR_UPDATE bound to: FALSE - type: string
- Parameter AER_CAP_VERSION bound to: 4'b0001
- Parameter ALLOW_X8_GEN2 bound to: FALSE - type: string
- Parameter BAR0 bound to: -1048576 - type: integer
- Parameter BAR1 bound to: 0 - type: integer
- Parameter BAR2 bound to: 0 - type: integer
- Parameter BAR3 bound to: 0 - type: integer
- Parameter BAR4 bound to: 0 - type: integer
- Parameter BAR5 bound to: 0 - type: integer
- Parameter CAPABILITIES_PTR bound to: 8'b01000000
- Parameter CARDBUS_CIS_POINTER bound to: 0 - type: integer
- Parameter CFG_ECRC_ERR_CPLSTAT bound to: 0 - type: integer
- Parameter CLASS_CODE bound to: 24'b000001011000000000000000
- Parameter CMD_INTX_IMPLEMENTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_DISABLE_SUPPORTED bound to: FALSE - type: string
- Parameter CPL_TIMEOUT_RANGES_SUPPORTED bound to: 4'b0010
- Parameter CRM_MODULE_RSTS bound to: 7'b0000000
- Parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP2_MAX_ENDEND_TLP_PREFIXES bound to: 2'b00
- Parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING bound to: FALSE - type: string
- Parameter DEV_CAP2_TPH_COMPLETER_SUPPORTED bound to: 2'b00
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE bound to: TRUE - type: string
- Parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE bound to: TRUE - type: string
- Parameter DEV_CAP_ENDPOINT_L0S_LATENCY bound to: 0 - type: integer
- Parameter DEV_CAP_ENDPOINT_L1_LATENCY bound to: 7 - type: integer
- Parameter DEV_CAP_EXT_TAG_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE bound to: FALSE - type: string
- Parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED bound to: 2 - type: integer
- Parameter DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT bound to: 0 - type: integer
- Parameter DEV_CAP_ROLE_BASED_ERROR bound to: TRUE - type: string
- Parameter DEV_CAP_RSVD_14_12 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_17_16 bound to: 0 - type: integer
- Parameter DEV_CAP_RSVD_31_29 bound to: 0 - type: integer
- Parameter DEV_CONTROL_AUX_POWER_SUPPORTED bound to: FALSE - type: string
- Parameter DEV_CONTROL_EXT_TAG_DEFAULT bound to: FALSE - type: string
- Parameter DISABLE_ASPM_L1_TIMER bound to: FALSE - type: string
- Parameter DISABLE_BAR_FILTERING bound to: FALSE - type: string
- Parameter DISABLE_ERR_MSG bound to: FALSE - type: string
- Parameter DISABLE_ID_CHECK bound to: FALSE - type: string
- Parameter DISABLE_LANE_REVERSAL bound to: TRUE - type: string
- Parameter DISABLE_LOCKED_FILTER bound to: FALSE - type: string
- Parameter DISABLE_PPM_FILTER bound to: FALSE - type: string
- Parameter DISABLE_RX_POISONED_RESP bound to: FALSE - type: string
- Parameter DISABLE_RX_TC_FILTER bound to: FALSE - type: string
- Parameter DISABLE_SCRAMBLING bound to: FALSE - type: string
- Parameter DNSTREAM_LINK_NUM bound to: 8'b00000000
- Parameter DSN_BASE_PTR bound to: 12'b000100000000
- Parameter DSN_CAP_ID bound to: 16'b0000000000000011
- Parameter DSN_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter DSN_CAP_ON bound to: TRUE - type: string
- Parameter DSN_CAP_VERSION bound to: 4'b0001
- Parameter ENABLE_MSG_ROUTE bound to: 11'b00000000000
- Parameter ENABLE_RX_TD_ECRC_TRIM bound to: FALSE - type: string
- Parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED bound to: FALSE - type: string
- Parameter ENTER_RVRY_EI_L0 bound to: TRUE - type: string
- Parameter EXIT_LOOPBACK_ON_EI bound to: TRUE - type: string
- Parameter EXPANSION_ROM bound to: 0 - type: integer
- Parameter EXT_CFG_CAP_PTR bound to: 6'b111111
- Parameter EXT_CFG_XP_CAP_PTR bound to: 10'b1111111111
- Parameter HEADER_TYPE bound to: 8'b00000000
- Parameter INFER_EI bound to: 5'b00000
- Parameter INTERRUPT_PIN bound to: 8'b00000000
- Parameter INTERRUPT_STAT_AUTO bound to: TRUE - type: string
- Parameter IS_SWITCH bound to: FALSE - type: string
- Parameter LAST_CONFIG_DWORD bound to: 10'b1111111111
- Parameter LINK_CAP_ASPM_OPTIONALITY bound to: FALSE - type: string
- Parameter LINK_CAP_ASPM_SUPPORT bound to: 1 - type: integer
- Parameter LINK_CAP_CLOCK_POWER_MANAGEMENT bound to: FALSE - type: string
- Parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L0S_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN1 bound to: 7 - type: integer
- Parameter LINK_CAP_L1_EXIT_LATENCY_GEN2 bound to: 7 - type: integer
- Parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP bound to: FALSE - type: string
- Parameter LINK_CAP_MAX_LINK_SPEED bound to: 4'b0010
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter LINK_CAP_RSVD_23 bound to: 0 - type: integer
- Parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE bound to: FALSE - type: string
- Parameter LINK_CONTROL_RCB bound to: 0 - type: integer
- Parameter LINK_CTRL2_DEEMPHASIS bound to: FALSE - type: string
- Parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE bound to: FALSE - type: string
- Parameter LINK_CTRL2_TARGET_LINK_SPEED bound to: 4'b0010
- Parameter LINK_STATUS_SLOT_CLOCK_CONFIG bound to: TRUE - type: string
- Parameter LL_ACK_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_ACK_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_ACK_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter LL_REPLAY_TIMEOUT bound to: 15'b000000000000000
- Parameter LL_REPLAY_TIMEOUT_EN bound to: FALSE - type: string
- Parameter LL_REPLAY_TIMEOUT_FUNC bound to: 1 - type: integer
- Parameter LTSSM_MAX_LINK_WIDTH bound to: 6'b000100
- Parameter MPS_FORCE bound to: FALSE - type: string
- Parameter MSIX_BASE_PTR bound to: 8'b10011100
- Parameter MSIX_CAP_ID bound to: 8'b00010001
- Parameter MSIX_CAP_NEXTPTR bound to: 8'b00000000
- Parameter MSIX_CAP_ON bound to: FALSE - type: string
- Parameter MSIX_CAP_PBA_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_PBA_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_BIR bound to: 0 - type: integer
- Parameter MSIX_CAP_TABLE_OFFSET bound to: 29'b00000000000000000000000000000
- Parameter MSIX_CAP_TABLE_SIZE bound to: 11'b00000000000
- Parameter MSI_BASE_PTR bound to: 8'b01001000
- Parameter MSI_CAP_64_BIT_ADDR_CAPABLE bound to: FALSE - type: string
- Parameter MSI_CAP_ID bound to: 8'b00000101
- Parameter MSI_CAP_MULTIMSGCAP bound to: 0 - type: integer
- Parameter MSI_CAP_MULTIMSG_EXTENSION bound to: 0 - type: integer
- Parameter MSI_CAP_NEXTPTR bound to: 8'b01100000
- Parameter MSI_CAP_ON bound to: TRUE - type: string
- Parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE bound to: FALSE - type: string
- Parameter N_FTS_COMCLK_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_COMCLK_GEN2 bound to: 255 - type: integer
- Parameter N_FTS_GEN1 bound to: 255 - type: integer
- Parameter N_FTS_GEN2 bound to: 255 - type: integer
- Parameter PCIE_BASE_PTR bound to: 8'b01100000
- Parameter PCIE_CAP_CAPABILITY_ID bound to: 8'b00010000
- Parameter PCIE_CAP_CAPABILITY_VERSION bound to: 4'b0010
- Parameter PCIE_CAP_DEVICE_PORT_TYPE bound to: 4'b0000
- Parameter PCIE_CAP_NEXTPTR bound to: 8'b00000000
- Parameter PCIE_CAP_ON bound to: TRUE - type: string
- Parameter PCIE_CAP_RSVD_15_14 bound to: 0 - type: integer
- Parameter PCIE_CAP_SLOT_IMPLEMENTED bound to: FALSE - type: string
- Parameter PCIE_REVISION bound to: 2 - type: integer
- Parameter PL_AUTO_CONFIG bound to: 0 - type: integer
- Parameter PL_FAST_TRAIN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT bound to: 15'b000000000000000
- Parameter PM_ASPML0S_TIMEOUT_EN bound to: FALSE - type: string
- Parameter PM_ASPML0S_TIMEOUT_FUNC bound to: 0 - type: integer
- Parameter PM_ASPM_FASTEXIT bound to: FALSE - type: string
- Parameter PM_BASE_PTR bound to: 8'b01000000
- Parameter PM_CAP_AUXCURRENT bound to: 0 - type: integer
- Parameter PM_CAP_D1SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_D2SUPPORT bound to: FALSE - type: string
- Parameter PM_CAP_DSI bound to: FALSE - type: string
- Parameter PM_CAP_ID bound to: 8'b00000001
- Parameter PM_CAP_NEXTPTR bound to: 8'b01001000
- Parameter PM_CAP_ON bound to: TRUE - type: string
- Parameter PM_CAP_PMESUPPORT bound to: 5'b01111
- Parameter PM_CAP_PME_CLOCK bound to: FALSE - type: string
- Parameter PM_CAP_RSVD_04 bound to: 0 - type: integer
- Parameter PM_CAP_VERSION bound to: 3 - type: integer
- Parameter PM_CSR_B2B3 bound to: FALSE - type: string
- Parameter PM_CSR_BPCCEN bound to: FALSE - type: string
- Parameter PM_CSR_NOSOFTRST bound to: TRUE - type: string
- Parameter PM_DATA0 bound to: 8'b00000000
- Parameter PM_DATA1 bound to: 8'b00000000
- Parameter PM_DATA2 bound to: 8'b00000000
- Parameter PM_DATA3 bound to: 8'b00000000
- Parameter PM_DATA4 bound to: 8'b00000000
- Parameter PM_DATA5 bound to: 8'b00000000
- Parameter PM_DATA6 bound to: 8'b00000000
- Parameter PM_DATA7 bound to: 8'b00000000
- Parameter PM_DATA_SCALE0 bound to: 2'b00
- Parameter PM_DATA_SCALE1 bound to: 2'b00
- Parameter PM_DATA_SCALE2 bound to: 2'b00
- Parameter PM_DATA_SCALE3 bound to: 2'b00
- Parameter PM_DATA_SCALE4 bound to: 2'b00
- Parameter PM_DATA_SCALE5 bound to: 2'b00
- Parameter PM_DATA_SCALE6 bound to: 2'b00
- Parameter PM_DATA_SCALE7 bound to: 2'b00
- Parameter PM_MF bound to: FALSE - type: string
- Parameter RBAR_BASE_PTR bound to: 12'b000000000000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR0 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR1 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR2 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR3 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR4 bound to: 5'b00000
- Parameter RBAR_CAP_CONTROL_ENCODEDBAR5 bound to: 5'b00000
- Parameter RBAR_CAP_ID bound to: 16'b0000000000010101
- Parameter RBAR_CAP_INDEX0 bound to: 3'b000
- Parameter RBAR_CAP_INDEX1 bound to: 3'b000
- Parameter RBAR_CAP_INDEX2 bound to: 3'b000
- Parameter RBAR_CAP_INDEX3 bound to: 3'b000
- Parameter RBAR_CAP_INDEX4 bound to: 3'b000
- Parameter RBAR_CAP_INDEX5 bound to: 3'b000
- Parameter RBAR_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter RBAR_CAP_ON bound to: FALSE - type: string
- Parameter RBAR_CAP_SUP0 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP1 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP2 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP3 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP4 bound to: 1 - type: integer
- Parameter RBAR_CAP_SUP5 bound to: 1 - type: integer
- Parameter RBAR_CAP_VERSION bound to: 4'b0001
- Parameter RBAR_NUM bound to: 3'b000
- Parameter RECRC_CHK bound to: 0 - type: integer
- Parameter RECRC_CHK_TRIM bound to: FALSE - type: string
- Parameter ROOT_CAP_CRS_SW_VISIBILITY bound to: FALSE - type: string
- Parameter RP_AUTO_SPD bound to: 2'b01
- Parameter RP_AUTO_SPD_LOOPCNT bound to: 5'b11111
- Parameter SELECT_DLL_IF bound to: FALSE - type: string
- Parameter SIM_VERSION bound to: 1.0 - type: string
- Parameter SLOT_CAP_ATT_BUTTON_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ATT_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_CAPABLE bound to: FALSE - type: string
- Parameter SLOT_CAP_HOTPLUG_SURPRISE bound to: FALSE - type: string
- Parameter SLOT_CAP_MRL_SENSOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT bound to: FALSE - type: string
- Parameter SLOT_CAP_PHYSICAL_SLOT_NUM bound to: 13'b0000000000000
- Parameter SLOT_CAP_POWER_CONTROLLER_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_POWER_INDICATOR_PRESENT bound to: FALSE - type: string
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_SCALE bound to: 0 - type: integer
- Parameter SLOT_CAP_SLOT_POWER_LIMIT_VALUE bound to: 8'b00000000
- Parameter SPARE_BIT0 bound to: 0 - type: integer
- Parameter SPARE_BIT1 bound to: 0 - type: integer
- Parameter SPARE_BIT2 bound to: 0 - type: integer
- Parameter SPARE_BIT3 bound to: 0 - type: integer
- Parameter SPARE_BIT4 bound to: 0 - type: integer
- Parameter SPARE_BIT5 bound to: 0 - type: integer
- Parameter SPARE_BIT6 bound to: 0 - type: integer
- Parameter SPARE_BIT7 bound to: 0 - type: integer
- Parameter SPARE_BIT8 bound to: 0 - type: integer
- Parameter SPARE_BYTE0 bound to: 8'b00000000
- Parameter SPARE_BYTE1 bound to: 8'b00000000
- Parameter SPARE_BYTE2 bound to: 8'b00000000
- Parameter SPARE_BYTE3 bound to: 8'b00000000
- Parameter SPARE_WORD0 bound to: 0 - type: integer
- Parameter SPARE_WORD1 bound to: 0 - type: integer
- Parameter SPARE_WORD2 bound to: 0 - type: integer
- Parameter SPARE_WORD3 bound to: 0 - type: integer
- Parameter SSL_MESSAGE_AUTO bound to: FALSE - type: string
- Parameter TECRC_EP_INV bound to: FALSE - type: string
- Parameter TL_RBYPASS bound to: FALSE - type: string
- Parameter TL_RX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_RX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_RX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TL_TFC_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_CHECKS_DISABLE bound to: FALSE - type: string
- Parameter TL_TX_RAM_RADDR_LATENCY bound to: 0 - type: integer
- Parameter TL_TX_RAM_RDATA_LATENCY bound to: 2 - type: integer
- Parameter TL_TX_RAM_WRITE_LATENCY bound to: 0 - type: integer
- Parameter TRN_DW bound to: TRUE - type: string
- Parameter TRN_NP_FC bound to: TRUE - type: string
- Parameter UPCONFIG_CAPABLE bound to: TRUE - type: string
- Parameter UPSTREAM_FACING bound to: TRUE - type: string
- Parameter UR_ATOMIC bound to: FALSE - type: string
- Parameter UR_CFG1 bound to: TRUE - type: string
- Parameter UR_INV_REQ bound to: TRUE - type: string
- Parameter UR_PRS_RESPONSE bound to: TRUE - type: string
- Parameter USER_CLK2_DIV2 bound to: TRUE - type: string
- Parameter USER_CLK_FREQ bound to: 3 - type: integer
- Parameter USE_RID_PINS bound to: FALSE - type: string
- Parameter VC0_CPL_INFINITE bound to: TRUE - type: string
- Parameter VC0_RX_RAM_LIMIT bound to: 13'b0011111111111
- Parameter VC0_TOTAL_CREDITS_CD bound to: 850 - type: integer
- Parameter VC0_TOTAL_CREDITS_CH bound to: 72 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPD bound to: 8 - type: integer
- Parameter VC0_TOTAL_CREDITS_NPH bound to: 4 - type: integer
- Parameter VC0_TOTAL_CREDITS_PD bound to: 64 - type: integer
- Parameter VC0_TOTAL_CREDITS_PH bound to: 4 - type: integer
- Parameter VC0_TX_LASTPACKET bound to: 29 - type: integer
- Parameter VC_BASE_PTR bound to: 12'b000000000000
- Parameter VC_CAP_ID bound to: 16'b0000000000000010
- Parameter VC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VC_CAP_ON bound to: FALSE - type: string
- Parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS bound to: FALSE - type: string
- Parameter VC_CAP_VERSION bound to: 4'b0001
- Parameter VSEC_BASE_PTR bound to: 12'b000000000000
- Parameter VSEC_CAP_HDR_ID bound to: 16'b0001001000110100
- Parameter VSEC_CAP_HDR_LENGTH bound to: 12'b000000011000
- Parameter VSEC_CAP_HDR_REVISION bound to: 4'b0001
- Parameter VSEC_CAP_ID bound to: 16'b0000000000001011
- Parameter VSEC_CAP_IS_LINK_VISIBLE bound to: TRUE - type: string
- Parameter VSEC_CAP_NEXTPTR bound to: 12'b000000000000
- Parameter VSEC_CAP_ON bound to: FALSE - type: string
- Parameter VSEC_CAP_VERSION bound to: 4'b0001
- INFO: [Synth 8-6155] done synthesizing module 'PCIE_2_1' (14#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:56852]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_7x' (15#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_7x.v:63]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_pipe_pipeline' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_pipe_pipeline.v:63]
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter PIPE_PIPELINE_STAGES bound to: 1 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_pipe_lane' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_pipe_lane.v:63]
- Parameter PIPE_PIPELINE_STAGES bound to: 1 - type: integer
- Parameter TCQ bound to: 1 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_pipe_lane' (16#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_pipe_lane.v:63]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pcie_pipe_misc' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_pipe_misc.v:63]
- Parameter PIPE_PIPELINE_STAGES bound to: 1 - type: integer
- Parameter TCQ bound to: 1 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_pipe_misc' (17#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_pipe_misc.v:63]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_pipe_pipeline' (18#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_pipe_pipeline.v:63]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie_top' (19#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie_top.v:62]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gt_top' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_top.v:62]
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 4 - type: integer
- Parameter REF_CLK_FREQ bound to: 0 - type: integer
- Parameter USER_CLK2_DIV2 bound to: TRUE - type: string
- Parameter USER_CLK_FREQ bound to: 3 - type: integer
- Parameter PL_FAST_TRAIN bound to: FALSE - type: string
- Parameter PCIE_EXT_CLK bound to: TRUE - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_ASYNC_EN bound to: FALSE - type: string
- Parameter PCIE_TXBUF_EN bound to: FALSE - type: string
- Parameter PCIE_EXT_GT_COMMON bound to: FALSE - type: string
- Parameter EXT_CH_GT_DRP bound to: FALSE - type: string
- Parameter TX_MARGIN_FULL_0 bound to: 7'b1001111
- Parameter TX_MARGIN_FULL_1 bound to: 7'b1001110
- Parameter TX_MARGIN_FULL_2 bound to: 7'b1001101
- Parameter TX_MARGIN_FULL_3 bound to: 7'b1001100
- Parameter TX_MARGIN_FULL_4 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_0 bound to: 7'b1000101
- Parameter TX_MARGIN_LOW_1 bound to: 7'b1000110
- Parameter TX_MARGIN_LOW_2 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_3 bound to: 7'b1000010
- Parameter TX_MARGIN_LOW_4 bound to: 7'b1000000
- Parameter PCIE_CHAN_BOND bound to: 1 - type: integer
- Parameter TCQ bound to: 1 - type: integer
- Parameter USERCLK2_FREQ bound to: 2 - type: integer
- Parameter PCIE_LPM_DFE bound to: LPM - type: string
- Parameter PCIE_LINK_SPEED bound to: 3 - type: integer
- Parameter PCIE_OOBCLK_MODE_ENABLE bound to: 1 - type: integer
- Parameter PCIE_TX_EIDLE_ASSERT_DELAY bound to: 3'b010
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gt_rx_valid_filter_7x' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_rx_valid_filter_7x.v:62]
- Parameter CLK_COR_MIN_LAT bound to: 28 - type: integer
- Parameter TCQ bound to: 1 - type: integer
- Parameter EIOS_DET_IDL bound to: 5'b00001
- Parameter EIOS_DET_NO_STR0 bound to: 5'b00010
- Parameter EIOS_DET_STR0 bound to: 5'b00100
- Parameter EIOS_DET_STR1 bound to: 5'b01000
- Parameter EIOS_DET_DONE bound to: 5'b10000
- Parameter EIOS_COM bound to: 8'b10111100
- Parameter EIOS_IDL bound to: 8'b01111100
- Parameter FTSOS_COM bound to: 8'b10111100
- Parameter FTSOS_FTS bound to: 8'b00111100
- Parameter USER_RXVLD_IDL bound to: 4'b0001
- Parameter USER_RXVLD_EI bound to: 4'b0010
- Parameter USER_RXVLD_EI_DB0 bound to: 4'b0100
- Parameter USER_RXVLD_EI_DB1 bound to: 4'b1000
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_rx_valid_filter_7x.v:190]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gt_rx_valid_filter_7x' (20#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_rx_valid_filter_7x.v:62]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pipe_wrapper' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_wrapper.v:156]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_SIM_SPEEDUP bound to: FALSE - type: string
- Parameter PCIE_SIM_TX_EIDLE_DRIVE_LEVEL bound to: 1 - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_AUX_CDR_GEN3_EN bound to: TRUE - type: string
- Parameter PCIE_LPM_DFE bound to: LPM - type: string
- Parameter PCIE_LPM_DFE_GEN3 bound to: DFE - type: string
- Parameter PCIE_EXT_CLK bound to: TRUE - type: string
- Parameter PCIE_EXT_GT_COMMON bound to: FALSE - type: string
- Parameter EXT_CH_GT_DRP bound to: FALSE - type: string
- Parameter TX_MARGIN_FULL_0 bound to: 7'b1001111
- Parameter TX_MARGIN_FULL_1 bound to: 7'b1001110
- Parameter TX_MARGIN_FULL_2 bound to: 7'b1001101
- Parameter TX_MARGIN_FULL_3 bound to: 7'b1001100
- Parameter TX_MARGIN_FULL_4 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_0 bound to: 7'b1000101
- Parameter TX_MARGIN_LOW_1 bound to: 7'b1000110
- Parameter TX_MARGIN_LOW_2 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_3 bound to: 7'b1000010
- Parameter TX_MARGIN_LOW_4 bound to: 7'b1000000
- Parameter PCIE_POWER_SAVING bound to: TRUE - type: string
- Parameter PCIE_ASYNC_EN bound to: FALSE - type: string
- Parameter PCIE_TXBUF_EN bound to: FALSE - type: string
- Parameter PCIE_RXBUF_EN bound to: TRUE - type: string
- Parameter PCIE_TXSYNC_MODE bound to: 0 - type: integer
- Parameter PCIE_RXSYNC_MODE bound to: 0 - type: integer
- Parameter PCIE_CHAN_BOND bound to: 1 - type: integer
- Parameter PCIE_CHAN_BOND_EN bound to: TRUE - type: string
- Parameter PCIE_LANE bound to: 4 - type: integer
- Parameter PCIE_LINK_SPEED bound to: 3 - type: integer
- Parameter PCIE_REFCLK_FREQ bound to: 0 - type: integer
- Parameter PCIE_USERCLK1_FREQ bound to: 4 - type: integer
- Parameter PCIE_USERCLK2_FREQ bound to: 3 - type: integer
- Parameter PCIE_TX_EIDLE_ASSERT_DELAY bound to: 3'b010
- Parameter PCIE_RXEQ_MODE_GEN3 bound to: 1 - type: integer
- Parameter PCIE_OOBCLK_MODE bound to: 1 - type: integer
- Parameter PCIE_JTAG_MODE bound to: 0 - type: integer
- Parameter PCIE_DEBUG_MODE bound to: 0 - type: integer
- Parameter TXEQ_FS bound to: 6'b101000
- Parameter TXEQ_LF bound to: 6'b001111
- Parameter GC_XSDB_SLAVE_TYPE bound to: 16'b0000010000000000
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gtp_pipe_reset' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_pipe_reset.v:67]
- Parameter PCIE_SIM_SPEEDUP bound to: FALSE - type: string
- Parameter PCIE_LANE bound to: 4 - type: integer
- Parameter CFG_WAIT_MAX bound to: 6'b111111
- Parameter BYPASS_RXCDRLOCK bound to: 1 - type: integer
- Parameter FSM_IDLE bound to: 5'b00000
- Parameter FSM_CFG_WAIT bound to: 5'b00001
- Parameter FSM_PLLRESET bound to: 5'b00010
- Parameter FSM_DRP_X16_START bound to: 5'b00011
- Parameter FSM_DRP_X16_DONE bound to: 5'b00100
- Parameter FSM_PLLLOCK bound to: 5'b00101
- Parameter FSM_GTRESET bound to: 5'b00110
- Parameter FSM_RXPMARESETDONE_1 bound to: 5'b00111
- Parameter FSM_RXPMARESETDONE_2 bound to: 5'b01000
- Parameter FSM_DRP_X20_START bound to: 5'b01001
- Parameter FSM_DRP_X20_DONE bound to: 5'b01010
- Parameter FSM_MMCM_LOCK bound to: 5'b01011
- Parameter FSM_RESETDONE bound to: 5'b01100
- Parameter FSM_TXSYNC_START bound to: 5'b01101
- Parameter FSM_TXSYNC_DONE bound to: 5'b01110
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gtp_pipe_reset' (21#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_pipe_reset.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_qpll_reset' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_qpll_reset.v:66]
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_POWER_SAVING bound to: TRUE - type: string
- Parameter PCIE_LANE bound to: 4 - type: integer
- Parameter BYPASS_COARSE_OVRD bound to: 1 - type: integer
- Parameter FSM_IDLE bound to: 1 - type: integer
- Parameter FSM_WAIT_LOCK bound to: 2 - type: integer
- Parameter FSM_MMCM_LOCK bound to: 3 - type: integer
- Parameter FSM_DRP_START_NOM bound to: 4 - type: integer
- Parameter FSM_DRP_DONE_NOM bound to: 5 - type: integer
- Parameter FSM_QPLLLOCK bound to: 6 - type: integer
- Parameter FSM_DRP_START_OPT bound to: 7 - type: integer
- Parameter FSM_DRP_DONE_OPT bound to: 8 - type: integer
- Parameter FSM_QPLL_RESET bound to: 9 - type: integer
- Parameter FSM_QPLLLOCK2 bound to: 10 - type: integer
- Parameter FSM_QPLL_PDRESET bound to: 11 - type: integer
- Parameter FSM_QPLL_PD bound to: 12 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_qpll_reset' (22#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_qpll_reset.v:66]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gtp_pipe_rate' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_pipe_rate.v:67]
- Parameter PCIE_SIM_SPEEDUP bound to: FALSE - type: string
- Parameter TXDATA_WAIT_MAX bound to: 4'b1111
- Parameter FSM_IDLE bound to: 0 - type: integer
- Parameter FSM_TXDATA_WAIT bound to: 1 - type: integer
- Parameter FSM_PCLK_SEL bound to: 2 - type: integer
- Parameter FSM_DRP_X16_START bound to: 3 - type: integer
- Parameter FSM_DRP_X16_DONE bound to: 4 - type: integer
- Parameter FSM_RATE_SEL bound to: 5 - type: integer
- Parameter FSM_RXPMARESETDONE bound to: 6 - type: integer
- Parameter FSM_DRP_X20_START bound to: 7 - type: integer
- Parameter FSM_DRP_X20_DONE bound to: 8 - type: integer
- Parameter FSM_RATE_DONE bound to: 9 - type: integer
- Parameter FSM_TXSYNC_START bound to: 10 - type: integer
- Parameter FSM_TXSYNC_DONE bound to: 11 - type: integer
- Parameter FSM_DONE bound to: 12 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gtp_pipe_rate' (23#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_pipe_rate.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gtp_pipe_drp' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_pipe_drp.v:67]
- Parameter LOAD_CNT_MAX bound to: 2'b01
- Parameter INDEX_MAX bound to: 1'b0
- Parameter ADDR_RX_DATAWIDTH bound to: 9'b000010001
- Parameter MASK_RX_DATAWIDTH bound to: 16'b1111011111111111
- Parameter X16_RX_DATAWIDTH bound to: 16'b0000000000000000
- Parameter X20_RX_DATAWIDTH bound to: 16'b0000100000000000
- Parameter FSM_IDLE bound to: 0 - type: integer
- Parameter FSM_LOAD bound to: 1 - type: integer
- Parameter FSM_READ bound to: 2 - type: integer
- Parameter FSM_RRDY bound to: 3 - type: integer
- Parameter FSM_WRITE bound to: 4 - type: integer
- Parameter FSM_WRDY bound to: 5 - type: integer
- Parameter FSM_DONE bound to: 6 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gtp_pipe_drp' (24#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_pipe_drp.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pipe_eq' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_eq.v:67]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_RXEQ_MODE_GEN3 bound to: 1 - type: integer
- Parameter FSM_TXEQ_IDLE bound to: 6'b000001
- Parameter FSM_TXEQ_PRESET bound to: 6'b000010
- Parameter FSM_TXEQ_TXCOEFF bound to: 6'b000100
- Parameter FSM_TXEQ_REMAP bound to: 6'b001000
- Parameter FSM_TXEQ_QUERY bound to: 6'b010000
- Parameter FSM_TXEQ_DONE bound to: 6'b100000
- Parameter FSM_RXEQ_IDLE bound to: 6'b000001
- Parameter FSM_RXEQ_PRESET bound to: 6'b000010
- Parameter FSM_RXEQ_TXCOEFF bound to: 6'b000100
- Parameter FSM_RXEQ_LF bound to: 6'b001000
- Parameter FSM_RXEQ_NEW_TXCOEFF_REQ bound to: 6'b010000
- Parameter FSM_RXEQ_DONE bound to: 6'b100000
- Parameter TXPRECURSOR_00 bound to: 6'b000000
- Parameter TXMAINCURSOR_00 bound to: 7'b0111100
- Parameter TXPOSTCURSOR_00 bound to: 6'b010100
- Parameter TXPRECURSOR_01 bound to: 6'b000000
- Parameter TXMAINCURSOR_01 bound to: 7'b1000100
- Parameter TXPOSTCURSOR_01 bound to: 6'b001101
- Parameter TXPRECURSOR_02 bound to: 6'b000000
- Parameter TXMAINCURSOR_02 bound to: 7'b1000000
- Parameter TXPOSTCURSOR_02 bound to: 6'b010000
- Parameter TXPRECURSOR_03 bound to: 6'b000000
- Parameter TXMAINCURSOR_03 bound to: 7'b1000110
- Parameter TXPOSTCURSOR_03 bound to: 6'b001010
- Parameter TXPRECURSOR_04 bound to: 6'b000000
- Parameter TXMAINCURSOR_04 bound to: 7'b1010000
- Parameter TXPOSTCURSOR_04 bound to: 6'b000000
- Parameter TXPRECURSOR_05 bound to: 6'b001000
- Parameter TXMAINCURSOR_05 bound to: 7'b1001000
- Parameter TXPOSTCURSOR_05 bound to: 6'b000000
- Parameter TXPRECURSOR_06 bound to: 6'b001010
- Parameter TXMAINCURSOR_06 bound to: 7'b1000110
- Parameter TXPOSTCURSOR_06 bound to: 6'b000000
- Parameter TXPRECURSOR_07 bound to: 6'b001000
- Parameter TXMAINCURSOR_07 bound to: 7'b0111000
- Parameter TXPOSTCURSOR_07 bound to: 6'b010000
- Parameter TXPRECURSOR_08 bound to: 6'b001010
- Parameter TXMAINCURSOR_08 bound to: 7'b0111100
- Parameter TXPOSTCURSOR_08 bound to: 6'b001010
- Parameter TXPRECURSOR_09 bound to: 6'b001101
- Parameter TXMAINCURSOR_09 bound to: 7'b1000100
- Parameter TXPOSTCURSOR_09 bound to: 6'b000000
- Parameter TXPRECURSOR_10 bound to: 6'b000000
- Parameter TXMAINCURSOR_10 bound to: 7'b0111000
- Parameter TXPOSTCURSOR_10 bound to: 6'b011001
- INFO: [Synth 8-226] default block is never used [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_eq.v:401]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_rxeq_scan' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_rxeq_scan.v:66]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_RXEQ_MODE_GEN3 bound to: 1 - type: integer
- Parameter CONVERGE_MAX bound to: 22'b1011111010111100001000
- Parameter CONVERGE_MAX_BYPASS bound to: 22'b0111111100101000000101
- Parameter FSM_IDLE bound to: 4'b0001
- Parameter FSM_PRESET bound to: 4'b0010
- Parameter FSM_CONVERGE bound to: 4'b0100
- Parameter FSM_NEW_TXCOEFF_REQ bound to: 4'b1000
- Parameter converge_max_cnt bound to: 22'b1011111010111100001000
- Parameter converge_max_bypass_cnt bound to: 22'b0111111100101000000101
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_rxeq_scan' (25#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_rxeq_scan.v:66]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pipe_eq' (26#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_eq.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gt_common' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_common.v:56]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_REFCLK_FREQ bound to: 0 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_qpll_drp' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_qpll_drp.v:67]
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_REFCLK_FREQ bound to: 0 - type: integer
- Parameter LOAD_CNT_MAX bound to: 2'b11
- Parameter INDEX_MAX bound to: 3'b110
- Parameter ADDR_QPLL_FBDIV bound to: 8'b00110110
- Parameter ADDR_QPLL_CFG bound to: 8'b00110010
- Parameter ADDR_QPLL_LPF bound to: 8'b00110001
- Parameter ADDR_CRSCODE bound to: 8'b10001000
- Parameter ADDR_QPLL_COARSE_FREQ_OVRD bound to: 8'b00110101
- Parameter ADDR_QPLL_COARSE_FREQ_OVRD_EN bound to: 8'b00110110
- Parameter ADDR_QPLL_LOCK_CFG bound to: 8'b00110100
- Parameter MASK_QPLL_FBDIV bound to: 16'b1111110000000000
- Parameter MASK_QPLL_CFG bound to: 16'b1111111110111111
- Parameter MASK_QPLL_LPF bound to: 16'b1000011111111111
- Parameter MASK_QPLL_COARSE_FREQ_OVRD bound to: 16'b0000001111111111
- Parameter MASK_QPLL_COARSE_FREQ_OVRD_EN bound to: 16'b1111011111111111
- Parameter MASK_QPLL_LOCK_CFG bound to: 16'b1110011111111111
- Parameter NORM_QPLL_COARSE_FREQ_OVRD bound to: 16'b0000000000000000
- Parameter NORM_QPLL_COARSE_FREQ_OVRD_EN bound to: 16'b0000000000000000
- Parameter NORM_QPLL_LOCK_CFG bound to: 16'b0000000000000000
- Parameter OVRD_QPLL_COARSE_FREQ_OVRD bound to: 16'b0000000000000000
- Parameter OVRD_QPLL_COARSE_FREQ_OVRD_EN bound to: 16'b0000100000000000
- Parameter OVRD_QPLL_LOCK_CFG bound to: 16'b0000000000000000
- Parameter QPLL_FBDIV bound to: 16'b0000000100100000
- Parameter GEN12_QPLL_FBDIV bound to: 16'b0000000101110000
- Parameter GEN3_QPLL_FBDIV bound to: 16'b0000000100100000
- Parameter GEN12_QPLL_CFG bound to: 16'b0000000001000000
- Parameter GEN3_QPLL_CFG bound to: 16'b0000000001000000
- Parameter GEN12_QPLL_LPF bound to: 16'b0110100000000000
- Parameter GEN3_QPLL_LPF bound to: 16'b0110100000000000
- Parameter FSM_IDLE bound to: 9'b000000001
- Parameter FSM_LOAD bound to: 9'b000000010
- Parameter FSM_READ bound to: 9'b000000100
- Parameter FSM_RRDY bound to: 9'b000001000
- Parameter FSM_WRITE bound to: 9'b000010000
- Parameter FSM_WRDY bound to: 9'b000100000
- Parameter FSM_DONE bound to: 9'b001000000
- Parameter FSM_QPLLRESET bound to: 9'b010000000
- Parameter FSM_QPLLLOCK bound to: 9'b100000000
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_qpll_drp' (27#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_qpll_drp.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_qpll_wrapper' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_qpll_wrapper.v:67]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_REFCLK_FREQ bound to: 0 - type: integer
- Parameter QPLL_FBDIV bound to: 10'b0100100000
- Parameter GTP_QPLL_FBDIV bound to: 3'b101
- Parameter BIAS_CFG bound to: 64'b0000000000000000000001000010000000000000000000000001000000000000
- INFO: [Synth 8-6157] synthesizing module 'GTPE2_COMMON' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:20679]
- Parameter BIAS_CFG bound to: 64'b0000000000000000000000000000000000000000000001010000000000000001
- Parameter COMMON_CFG bound to: 0 - type: integer
- Parameter IS_DRPCLK_INVERTED bound to: 1'b0
- Parameter IS_GTGREFCLK0_INVERTED bound to: 1'b0
- Parameter IS_GTGREFCLK1_INVERTED bound to: 1'b0
- Parameter IS_PLL0LOCKDETCLK_INVERTED bound to: 1'b0
- Parameter IS_PLL1LOCKDETCLK_INVERTED bound to: 1'b0
- Parameter PLL0_CFG bound to: 27'b000000111110000001001001100
- Parameter PLL0_DMON_CFG bound to: 1'b0
- Parameter PLL0_FBDIV bound to: 5 - type: integer
- Parameter PLL0_FBDIV_45 bound to: 5 - type: integer
- Parameter PLL0_INIT_CFG bound to: 24'b000000000000000000011110
- Parameter PLL0_LOCK_CFG bound to: 9'b111101000
- Parameter PLL0_REFCLK_DIV bound to: 1 - type: integer
- Parameter PLL1_CFG bound to: 27'b000000111110000001001001100
- Parameter PLL1_DMON_CFG bound to: 1'b0
- Parameter PLL1_FBDIV bound to: 5 - type: integer
- Parameter PLL1_FBDIV_45 bound to: 5 - type: integer
- Parameter PLL1_INIT_CFG bound to: 24'b000000000000000000011110
- Parameter PLL1_LOCK_CFG bound to: 9'b111101000
- Parameter PLL1_REFCLK_DIV bound to: 1 - type: integer
- Parameter PLL_CLKOUT_CFG bound to: 8'b00000000
- Parameter RSVD_ATTR0 bound to: 16'b0000000000000000
- Parameter RSVD_ATTR1 bound to: 16'b0000000000000000
- Parameter SIM_PLL0REFCLK_SEL bound to: 3'b001
- Parameter SIM_PLL1REFCLK_SEL bound to: 3'b001
- Parameter SIM_RESET_SPEEDUP bound to: FALSE - type: string
- Parameter SIM_VERSION bound to: 1.0 - type: string
- INFO: [Synth 8-6155] done synthesizing module 'GTPE2_COMMON' (28#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:20679]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gtp_cpllpd_ovrd' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_cpllpd_ovrd.v:54]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gtp_cpllpd_ovrd' (29#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtp_cpllpd_ovrd.v:54]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_qpll_wrapper' (30#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_qpll_wrapper.v:67]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gt_common' (31#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_common.v:56]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pipe_user' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_user.v:67]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_OOBCLK_MODE bound to: 1 - type: integer
- Parameter RXCDRLOCK_MAX bound to: 4'b1111
- Parameter RXVALID_MAX bound to: 4'b1111
- Parameter CONVERGE_MAX bound to: 22'b1011111010111100001000
- Parameter FSM_IDLE bound to: 2'b00
- Parameter FSM_RESETOVRD bound to: 2'b01
- Parameter FSM_RESET_INIT bound to: 2'b10
- Parameter FSM_RESET bound to: 2'b11
- Parameter converge_max_cnt bound to: 22'b1011111010111100001000
- INFO: [Synth 8-226] default block is never used [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_user.v:353]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pipe_user' (32#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_user.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_pipe_sync' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_sync.v:71]
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_TXBUF_EN bound to: FALSE - type: string
- Parameter PCIE_RXBUF_EN bound to: TRUE - type: string
- Parameter PCIE_TXSYNC_MODE bound to: 0 - type: integer
- Parameter PCIE_RXSYNC_MODE bound to: 0 - type: integer
- Parameter PCIE_LANE bound to: 4 - type: integer
- Parameter PCIE_LINK_SPEED bound to: 3 - type: integer
- Parameter BYPASS_TXDELAY_ALIGN bound to: 0 - type: integer
- Parameter BYPASS_RXDELAY_ALIGN bound to: 0 - type: integer
- Parameter FSM_TXSYNC_IDLE bound to: 6'b000001
- Parameter FSM_MMCM_LOCK bound to: 6'b000010
- Parameter FSM_TXSYNC_START bound to: 6'b000100
- Parameter FSM_TXPHINITDONE bound to: 6'b001000
- Parameter FSM_TXSYNC_DONE1 bound to: 6'b010000
- Parameter FSM_TXSYNC_DONE2 bound to: 6'b100000
- Parameter FSM_RXSYNC_IDLE bound to: 7'b0000001
- Parameter FSM_RXCDRLOCK bound to: 7'b0000010
- Parameter FSM_RXSYNC_START bound to: 7'b0000100
- Parameter FSM_RXSYNC_DONE1 bound to: 7'b0001000
- Parameter FSM_RXSYNC_DONE2 bound to: 7'b0010000
- Parameter FSM_RXSYNC_DONES bound to: 7'b0100000
- Parameter FSM_RXSYNC_DONEM bound to: 7'b1000000
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pipe_sync' (33#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_sync.v:71]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gt_wrapper' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_wrapper.v:67]
- Parameter PCIE_SIM_MODE bound to: FALSE - type: string
- Parameter PCIE_SIM_SPEEDUP bound to: FALSE - type: string
- Parameter PCIE_SIM_TX_EIDLE_DRIVE_LEVEL bound to: 1 - type: string
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_USE_MODE bound to: 1.0 - type: string
- Parameter PCIE_PLL_SEL bound to: CPLL - type: string
- Parameter PCIE_LPM_DFE bound to: LPM - type: string
- Parameter PCIE_LPM_DFE_GEN3 bound to: DFE - type: string
- Parameter PCIE_ASYNC_EN bound to: FALSE - type: string
- Parameter PCIE_TXBUF_EN bound to: FALSE - type: string
- Parameter PCIE_TXSYNC_MODE bound to: 0 - type: integer
- Parameter PCIE_RXSYNC_MODE bound to: 0 - type: integer
- Parameter PCIE_CHAN_BOND bound to: 1 - type: integer
- Parameter PCIE_CHAN_BOND_EN bound to: TRUE - type: string
- Parameter PCIE_LANE bound to: 4 - type: integer
- Parameter PCIE_REFCLK_FREQ bound to: 0 - type: integer
- Parameter PCIE_TX_EIDLE_ASSERT_DELAY bound to: 3'b010
- Parameter PCIE_OOBCLK_MODE bound to: 1 - type: integer
- Parameter TX_MARGIN_FULL_0 bound to: 7'b1001111
- Parameter TX_MARGIN_FULL_1 bound to: 7'b1001110
- Parameter TX_MARGIN_FULL_2 bound to: 7'b1001101
- Parameter TX_MARGIN_FULL_3 bound to: 7'b1001100
- Parameter TX_MARGIN_FULL_4 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_0 bound to: 7'b1000101
- Parameter TX_MARGIN_LOW_1 bound to: 7'b1000110
- Parameter TX_MARGIN_LOW_2 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_3 bound to: 7'b1000010
- Parameter TX_MARGIN_LOW_4 bound to: 7'b1000000
- Parameter PCIE_DEBUG_MODE bound to: 0 - type: integer
- Parameter CPLL_REFCLK_DIV bound to: 1 - type: integer
- Parameter CPLL_FBDIV_45 bound to: 5 - type: integer
- Parameter CPLL_FBDIV bound to: 5 - type: integer
- Parameter OUT_DIV bound to: 2 - type: integer
- Parameter CLK25_DIV bound to: 4 - type: integer
- Parameter CLKMUX_PD bound to: 1'b0
- Parameter CPLL_CFG bound to: 24'b101101000000011111001100
- Parameter TX_XCLK_SEL bound to: TXUSR - type: string
- Parameter TX_RXDETECT_CFG bound to: 14'b00000001100100
- Parameter TX_RXDETECT_REF bound to: 3'b000
- Parameter OOBCLK_SEL bound to: 1'b1
- Parameter RXOOB_CLK_CFG bound to: FABRIC - type: string
- Parameter PCS_RSVD_ATTR bound to: 48'b000000000000000000000000000000000000000111001001
- Parameter RXCDR_CFG_GTX bound to: 72'b000100010000011111111110010000000110000000000001000001000000000000000000
- Parameter RXCDR_CFG_GTH bound to: 83'b00000000000001000000000011111111110001000000000000011000010000010000000000000011000
- Parameter RXCDR_CFG_GTP bound to: 83'b00000000000000000010000011111111110010000000110000000000001000001000001000000010000
- Parameter TXSYNC_OVRD bound to: 1'b1
- Parameter RXSYNC_OVRD bound to: 1'b1
- Parameter TXSYNC_MULTILANE bound to: 1'b1
- Parameter RXSYNC_MULTILANE bound to: 1'b1
- Parameter CLK_COR_MIN_LAT bound to: 19 - type: integer
- Parameter CLK_COR_MAX_LAT bound to: 21 - type: integer
- INFO: [Synth 8-6157] synthesizing module 'GTPE2_CHANNEL' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:19977]
- Parameter ACJTAG_DEBUG_MODE bound to: 1'b0
- Parameter ACJTAG_MODE bound to: 1'b0
- Parameter ACJTAG_RESET bound to: 1'b0
- Parameter ADAPT_CFG0 bound to: 20'b00000000000000000000
- Parameter ALIGN_COMMA_DOUBLE bound to: FALSE - type: string
- Parameter ALIGN_COMMA_ENABLE bound to: 10'b1111111111
- Parameter ALIGN_COMMA_WORD bound to: 1 - type: integer
- Parameter ALIGN_MCOMMA_DET bound to: TRUE - type: string
- Parameter ALIGN_MCOMMA_VALUE bound to: 10'b1010000011
- Parameter ALIGN_PCOMMA_DET bound to: TRUE - type: string
- Parameter ALIGN_PCOMMA_VALUE bound to: 10'b0101111100
- Parameter CBCC_DATA_SOURCE_SEL bound to: DECODED - type: string
- Parameter CFOK_CFG bound to: 43'b1001001000000000000000001000000111010000000
- Parameter CFOK_CFG2 bound to: 7'b0100000
- Parameter CFOK_CFG3 bound to: 7'b0100000
- Parameter CFOK_CFG4 bound to: 1'b0
- Parameter CFOK_CFG5 bound to: 2'b00
- Parameter CFOK_CFG6 bound to: 4'b0000
- Parameter CHAN_BOND_KEEP_ALIGN bound to: TRUE - type: string
- Parameter CHAN_BOND_MAX_SKEW bound to: 7 - type: integer
- Parameter CHAN_BOND_SEQ_1_1 bound to: 10'b0001001010
- Parameter CHAN_BOND_SEQ_1_2 bound to: 10'b0001001010
- Parameter CHAN_BOND_SEQ_1_3 bound to: 10'b0001001010
- Parameter CHAN_BOND_SEQ_1_4 bound to: 10'b0110111100
- Parameter CHAN_BOND_SEQ_1_ENABLE bound to: 4'b1111
- Parameter CHAN_BOND_SEQ_2_1 bound to: 10'b0001000101
- Parameter CHAN_BOND_SEQ_2_2 bound to: 10'b0001000101
- Parameter CHAN_BOND_SEQ_2_3 bound to: 10'b0001000101
- Parameter CHAN_BOND_SEQ_2_4 bound to: 10'b0110111100
- Parameter CHAN_BOND_SEQ_2_ENABLE bound to: 4'b1111
- Parameter CHAN_BOND_SEQ_2_USE bound to: TRUE - type: string
- Parameter CHAN_BOND_SEQ_LEN bound to: 4 - type: integer
- Parameter CLK_COMMON_SWING bound to: 1'b0
- Parameter CLK_CORRECT_USE bound to: TRUE - type: string
- Parameter CLK_COR_KEEP_IDLE bound to: TRUE - type: string
- Parameter CLK_COR_MAX_LAT bound to: 21 - type: integer
- Parameter CLK_COR_MIN_LAT bound to: 19 - type: integer
- Parameter CLK_COR_PRECEDENCE bound to: TRUE - type: string
- Parameter CLK_COR_REPEAT_WAIT bound to: 0 - type: integer
- Parameter CLK_COR_SEQ_1_1 bound to: 10'b0100011100
- Parameter CLK_COR_SEQ_1_2 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_1_3 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_1_4 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_1_ENABLE bound to: 4'b1111
- Parameter CLK_COR_SEQ_2_1 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_2_2 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_2_3 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_2_4 bound to: 10'b0000000000
- Parameter CLK_COR_SEQ_2_ENABLE bound to: 4'b0000
- Parameter CLK_COR_SEQ_2_USE bound to: FALSE - type: string
- Parameter CLK_COR_SEQ_LEN bound to: 1 - type: integer
- Parameter DEC_MCOMMA_DETECT bound to: TRUE - type: string
- Parameter DEC_PCOMMA_DETECT bound to: TRUE - type: string
- Parameter DEC_VALID_COMMA_ONLY bound to: FALSE - type: string
- Parameter DMONITOR_CFG bound to: 24'b000000000000101100000001
- Parameter ES_CLK_PHASE_SEL bound to: 1'b0
- Parameter ES_CONTROL bound to: 6'b000000
- Parameter ES_ERRDET_EN bound to: FALSE - type: string
- Parameter ES_EYE_SCAN_EN bound to: FALSE - type: string
- Parameter ES_HORZ_OFFSET bound to: 12'b000000010000
- Parameter ES_PMA_CFG bound to: 10'b0000000000
- Parameter ES_PRESCALE bound to: 5'b00000
- Parameter ES_QUALIFIER bound to: 80'b00000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter ES_QUAL_MASK bound to: 80'b00000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter ES_SDATA_MASK bound to: 80'b00000000000000000000000000000000000000000000000000000000000000000000000000000000
- Parameter ES_VERT_OFFSET bound to: 9'b000000000
- Parameter FTS_DESKEW_SEQ_ENABLE bound to: 4'b1111
- Parameter FTS_LANE_DESKEW_CFG bound to: 4'b1111
- Parameter FTS_LANE_DESKEW_EN bound to: TRUE - type: string
- Parameter GEARBOX_MODE bound to: 3'b000
- Parameter IS_CLKRSVD0_INVERTED bound to: 1'b0
- Parameter IS_CLKRSVD1_INVERTED bound to: 1'b0
- Parameter IS_DMONITORCLK_INVERTED bound to: 1'b0
- Parameter IS_DRPCLK_INVERTED bound to: 1'b0
- Parameter IS_RXUSRCLK2_INVERTED bound to: 1'b0
- Parameter IS_RXUSRCLK_INVERTED bound to: 1'b0
- Parameter IS_SIGVALIDCLK_INVERTED bound to: 1'b0
- Parameter IS_TXPHDLYTSTCLK_INVERTED bound to: 1'b0
- Parameter IS_TXUSRCLK2_INVERTED bound to: 1'b0
- Parameter IS_TXUSRCLK_INVERTED bound to: 1'b0
- Parameter LOOPBACK_CFG bound to: 1'b0
- Parameter OUTREFCLK_SEL_INV bound to: 2'b11
- Parameter PCS_PCIE_EN bound to: TRUE - type: string
- Parameter PCS_RSVD_ATTR bound to: 48'b000000000000000000000000000000000000000100000000
- Parameter PD_TRANS_TIME_FROM_P2 bound to: 12'b000000111100
- Parameter PD_TRANS_TIME_NONE_P2 bound to: 8'b00001001
- Parameter PD_TRANS_TIME_TO_P2 bound to: 8'b01100100
- Parameter PMA_LOOPBACK_CFG bound to: 1'b0
- Parameter PMA_RSV bound to: 819 - type: integer
- Parameter PMA_RSV2 bound to: 8256 - type: integer
- Parameter PMA_RSV3 bound to: 2'b00
- Parameter PMA_RSV4 bound to: 4'b0000
- Parameter PMA_RSV5 bound to: 1'b0
- Parameter PMA_RSV6 bound to: 1'b0
- Parameter PMA_RSV7 bound to: 1'b0
- Parameter RXBUFRESET_TIME bound to: 5'b00001
- Parameter RXBUF_ADDR_MODE bound to: FULL - type: string
- Parameter RXBUF_EIDLE_HI_CNT bound to: 4'b0100
- Parameter RXBUF_EIDLE_LO_CNT bound to: 4'b0000
- Parameter RXBUF_EN bound to: TRUE - type: string
- Parameter RXBUF_RESET_ON_CB_CHANGE bound to: TRUE - type: string
- Parameter RXBUF_RESET_ON_COMMAALIGN bound to: FALSE - type: string
- Parameter RXBUF_RESET_ON_EIDLE bound to: TRUE - type: string
- Parameter RXBUF_RESET_ON_RATE_CHANGE bound to: TRUE - type: string
- Parameter RXBUF_THRESH_OVFLW bound to: 61 - type: integer
- Parameter RXBUF_THRESH_OVRD bound to: FALSE - type: string
- Parameter RXBUF_THRESH_UNDFLW bound to: 4 - type: integer
- Parameter RXCDRFREQRESET_TIME bound to: 5'b00001
- Parameter RXCDRPHRESET_TIME bound to: 5'b00001
- Parameter RXCDR_CFG bound to: 83'b00000000000000000010000011111111110010000000110000000000001000001000001000000010000
- Parameter RXCDR_FR_RESET_ON_EIDLE bound to: 1'b0
- Parameter RXCDR_HOLD_DURING_EIDLE bound to: 1'b1
- Parameter RXCDR_LOCK_CFG bound to: 6'b010101
- Parameter RXCDR_PH_RESET_ON_EIDLE bound to: 1'b0
- Parameter RXDLY_CFG bound to: 16'b0000000000011111
- Parameter RXDLY_LCFG bound to: 9'b000110000
- Parameter RXDLY_TAP_CFG bound to: 16'b0000000000000000
- Parameter RXGEARBOX_EN bound to: FALSE - type: string
- Parameter RXISCANRESET_TIME bound to: 5'b00001
- Parameter RXLPMRESET_TIME bound to: 7'b0001111
- Parameter RXLPM_BIAS_STARTUP_DISABLE bound to: 1'b0
- Parameter RXLPM_CFG bound to: 4'b0110
- Parameter RXLPM_CFG1 bound to: 1'b0
- Parameter RXLPM_CM_CFG bound to: 1'b0
- Parameter RXLPM_GC_CFG bound to: 9'b111100010
- Parameter RXLPM_GC_CFG2 bound to: 3'b001
- Parameter RXLPM_HF_CFG bound to: 14'b00001111110000
- Parameter RXLPM_HF_CFG2 bound to: 5'b01010
- Parameter RXLPM_HF_CFG3 bound to: 4'b0000
- Parameter RXLPM_HOLD_DURING_EIDLE bound to: 1'b1
- Parameter RXLPM_INCM_CFG bound to: 1'b1
- Parameter RXLPM_IPCM_CFG bound to: 1'b0
- Parameter RXLPM_LF_CFG bound to: 18'b000000001111110000
- Parameter RXLPM_LF_CFG2 bound to: 5'b01010
- Parameter RXLPM_OSINT_CFG bound to: 3'b100
- Parameter RXOOB_CFG bound to: 7'b0000110
- Parameter RXOOB_CLK_CFG bound to: FABRIC - type: string
- Parameter RXOSCALRESET_TIME bound to: 5'b00011
- Parameter RXOSCALRESET_TIMEOUT bound to: 5'b00000
- Parameter RXOUT_DIV bound to: 2 - type: integer
- Parameter RXPCSRESET_TIME bound to: 5'b00001
- Parameter RXPHDLY_CFG bound to: 24'b000000000100000000100000
- Parameter RXPH_CFG bound to: 24'b000000000000000000000000
- Parameter RXPH_MONITOR_SEL bound to: 5'b00000
- Parameter RXPI_CFG0 bound to: 3'b000
- Parameter RXPI_CFG1 bound to: 1'b1
- Parameter RXPI_CFG2 bound to: 1'b1
- Parameter RXPMARESET_TIME bound to: 5'b00011
- Parameter RXPRBS_ERR_LOOPBACK bound to: 1'b0
- Parameter RXSLIDE_AUTO_WAIT bound to: 7 - type: integer
- Parameter RXSLIDE_MODE bound to: PMA - type: string
- Parameter RXSYNC_MULTILANE bound to: 1'b1
- Parameter RXSYNC_OVRD bound to: 1'b1
- Parameter RXSYNC_SKIP_DA bound to: 1'b0
- Parameter RX_BIAS_CFG bound to: 16'b0000111100110011
- Parameter RX_BUFFER_CFG bound to: 6'b000000
- Parameter RX_CLK25_DIV bound to: 4 - type: integer
- Parameter RX_CLKMUX_EN bound to: 1'b1
- Parameter RX_CM_SEL bound to: 2'b11
- Parameter RX_CM_TRIM bound to: 4'b1010
- Parameter RX_DATA_WIDTH bound to: 20 - type: integer
- Parameter RX_DDI_SEL bound to: 6'b000000
- Parameter RX_DEBUG_CFG bound to: 14'b00000000000000
- Parameter RX_DEFER_RESET_BUF_EN bound to: TRUE - type: string
- Parameter RX_DISPERR_SEQ_MATCH bound to: TRUE - type: string
- Parameter RX_OS_CFG bound to: 13'b0000010000000
- Parameter RX_SIG_VALID_DLY bound to: 10 - type: integer
- Parameter RX_XCLK_SEL bound to: RXREC - type: string
- Parameter SAS_MAX_COM bound to: 64 - type: integer
- Parameter SAS_MIN_COM bound to: 36 - type: integer
- Parameter SATA_BURST_SEQ_LEN bound to: 4'b1111
- Parameter SATA_BURST_VAL bound to: 3'b100
- Parameter SATA_EIDLE_VAL bound to: 3'b100
- Parameter SATA_MAX_BURST bound to: 8 - type: integer
- Parameter SATA_MAX_INIT bound to: 21 - type: integer
- Parameter SATA_MAX_WAKE bound to: 7 - type: integer
- Parameter SATA_MIN_BURST bound to: 4 - type: integer
- Parameter SATA_MIN_INIT bound to: 12 - type: integer
- Parameter SATA_MIN_WAKE bound to: 4 - type: integer
- Parameter SATA_PLL_CFG bound to: VCO_3000MHZ - type: string
- Parameter SHOW_REALIGN_COMMA bound to: FALSE - type: string
- Parameter SIM_RECEIVER_DETECT_PASS bound to: TRUE - type: string
- Parameter SIM_RESET_SPEEDUP bound to: FALSE - type: string
- Parameter SIM_TX_EIDLE_DRIVE_LEVEL bound to: 1 - type: string
- Parameter SIM_VERSION bound to: 1.0 - type: string
- Parameter TERM_RCAL_CFG bound to: 15'b100001000010000
- Parameter TERM_RCAL_OVRD bound to: 3'b000
- Parameter TRANS_TIME_RATE bound to: 8'b00001110
- Parameter TST_RSV bound to: 0 - type: integer
- Parameter TXBUF_EN bound to: FALSE - type: string
- Parameter TXBUF_RESET_ON_RATE_CHANGE bound to: TRUE - type: string
- Parameter TXDLY_CFG bound to: 16'b0000000000011111
- Parameter TXDLY_LCFG bound to: 9'b000110000
- Parameter TXDLY_TAP_CFG bound to: 16'b0000000000000000
- Parameter TXGEARBOX_EN bound to: FALSE - type: string
- Parameter TXOOB_CFG bound to: 1'b1
- Parameter TXOUT_DIV bound to: 2 - type: integer
- Parameter TXPCSRESET_TIME bound to: 5'b00001
- Parameter TXPHDLY_CFG bound to: 24'b000010000100000000100000
- Parameter TXPH_CFG bound to: 16'b0000011110000000
- Parameter TXPH_MONITOR_SEL bound to: 5'b00000
- Parameter TXPI_CFG0 bound to: 2'b00
- Parameter TXPI_CFG1 bound to: 2'b00
- Parameter TXPI_CFG2 bound to: 2'b00
- Parameter TXPI_CFG3 bound to: 1'b0
- Parameter TXPI_CFG4 bound to: 1'b0
- Parameter TXPI_CFG5 bound to: 3'b000
- Parameter TXPI_GREY_SEL bound to: 1'b0
- Parameter TXPI_INVSTROBE_SEL bound to: 1'b0
- Parameter TXPI_PPMCLK_SEL bound to: TXUSRCLK2 - type: string
- Parameter TXPI_PPM_CFG bound to: 8'b00000000
- Parameter TXPI_SYNFREQ_PPM bound to: 3'b000
- Parameter TXPMARESET_TIME bound to: 5'b00011
- Parameter TXSYNC_MULTILANE bound to: 1'b1
- Parameter TXSYNC_OVRD bound to: 1'b1
- Parameter TXSYNC_SKIP_DA bound to: 1'b0
- Parameter TX_CLK25_DIV bound to: 4 - type: integer
- Parameter TX_CLKMUX_EN bound to: 1'b1
- Parameter TX_DATA_WIDTH bound to: 20 - type: integer
- Parameter TX_DEEMPH0 bound to: 6'b010100
- Parameter TX_DEEMPH1 bound to: 6'b001011
- Parameter TX_DRIVE_MODE bound to: PIPE - type: string
- Parameter TX_EIDLE_ASSERT_DELAY bound to: 3'b010
- Parameter TX_EIDLE_DEASSERT_DELAY bound to: 3'b010
- Parameter TX_LOOPBACK_DRIVE_HIZ bound to: FALSE - type: string
- Parameter TX_MAINCURSOR_SEL bound to: 1'b0
- Parameter TX_MARGIN_FULL_0 bound to: 7'b1001111
- Parameter TX_MARGIN_FULL_1 bound to: 7'b1001110
- Parameter TX_MARGIN_FULL_2 bound to: 7'b1001101
- Parameter TX_MARGIN_FULL_3 bound to: 7'b1001100
- Parameter TX_MARGIN_FULL_4 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_0 bound to: 7'b1000101
- Parameter TX_MARGIN_LOW_1 bound to: 7'b1000110
- Parameter TX_MARGIN_LOW_2 bound to: 7'b1000011
- Parameter TX_MARGIN_LOW_3 bound to: 7'b1000010
- Parameter TX_MARGIN_LOW_4 bound to: 7'b1000000
- Parameter TX_PREDRIVER_MODE bound to: 1'b0
- Parameter TX_RXDETECT_CFG bound to: 14'b00000001100100
- Parameter TX_RXDETECT_REF bound to: 3'b011
- Parameter TX_XCLK_SEL bound to: TXUSR - type: string
- Parameter UCODEER_CLR bound to: 1'b0
- Parameter USE_PCS_CLK_PHASE_SEL bound to: 1'b0
- INFO: [Synth 8-6155] done synthesizing module 'GTPE2_CHANNEL' (34#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:19977]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7_gtx_cpllpd_ovrd' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtx_cpllpd_ovrd.v:54]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gtx_cpllpd_ovrd' (35#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gtx_cpllpd_ovrd.v:54]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gt_wrapper' (36#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_wrapper.v:67]
- INFO: [Synth 8-6157] synthesizing module 'BUFG' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:1083]
- INFO: [Synth 8-6155] done synthesizing module 'BUFG' (37#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:1083]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pipe_wrapper' (38#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pipe_wrapper.v:156]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_gt_top' (39#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_gt_top.v:62]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_core_top' (40#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_core_top.v:65]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7_pcie2_top' (41#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie_s7_pcie2_top.v:59]
- WARNING: [Synth 8-7071] port 'pipe_debug_0' of module 'pcie_s7_pcie2_top' is unconnected for instance 'inst' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7.v:815]
- WARNING: [Synth 8-7023] instance 'inst' of module 'pcie_s7_pcie2_top' has 290 connections declared, but only 289 given [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7.v:815]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7' (42#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7.v:66]
- ---------------------------------------------------------------------------------
- Finished RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 2338.488 ; gain = 0.000 ; free physical = 31123 ; free virtual = 60718
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Handling Custom Attributes
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Handling Custom Attributes : Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 2338.488 ; gain = 0.000 ; free physical = 31127 ; free virtual = 60722
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 2338.488 ; gain = 0.000 ; free physical = 31127 ; free virtual = 60722
- ---------------------------------------------------------------------------------
- Netlist sorting complete. Time (s): cpu = 00:00:00.09 ; elapsed = 00:00:00.08 . Memory (MB): peak = 2338.488 ; gain = 0.000 ; free physical = 31115 ; free virtual = 60710
- INFO: [Netlist 29-17] Analyzing 8 Unisim elements for replacement
- INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
- INFO: [Project 1-570] Preparing netlist for logic optimization
- Processing XDC Constraints
- Initializing timing engine
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7_ooc.xdc] for cell 'inst'
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7_ooc.xdc] for cell 'inst'
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc] for cell 'inst'
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc] for cell 'inst'
- INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/pcie_s7_propImpl.xdc].
- Resolution: To avoid this warning, move constraints listed in [.Xil/pcie_s7_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
- INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/tcl/xpm_cdc_single.tcl]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/pcie_s7_propImpl.xdc].
- Resolution: To avoid this warning, move constraints listed in [.Xil/pcie_s7_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
- INFO: [Project 1-1715] 1 XPM XDC files have been applied to the design.
- Completed Processing XDC Constraints
- Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2405.406 ; gain = 0.000 ; free physical = 31013 ; free virtual = 60609
- INFO: [Project 1-111] Unisim Transformation Summary:
- No Unisim elements were transformed.
- Constraint Validation Runtime : Time (s): cpu = 00:00:00.11 ; elapsed = 00:00:00.07 . Memory (MB): peak = 2408.375 ; gain = 2.969 ; free physical = 31013 ; free virtual = 60608
- ---------------------------------------------------------------------------------
- Finished Constraint Validation : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 2408.375 ; gain = 69.887 ; free physical = 31104 ; free virtual = 60700
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Loading Part and Timing Information
- ---------------------------------------------------------------------------------
- Loading part: xc7a200tfbg484-2
- ---------------------------------------------------------------------------------
- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 2408.375 ; gain = 69.887 ; free physical = 31104 ; free virtual = 60700
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Applying 'set_property' XDC Constraints
- ---------------------------------------------------------------------------------
- Applied set_property KEEP_HIERARCHY = SOFT for inst. (constraint file auto generated constraint).
- Applied set_property KEEP_HIERARCHY = SOFT for inst/inst/phy_lnk_up_cdc. (constraint file auto generated constraint).
- Applied set_property KEEP_HIERARCHY = SOFT for inst/inst/pl_received_hot_rst_cdc. (constraint file auto generated constraint).
- ---------------------------------------------------------------------------------
- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 2408.375 ; gain = 69.887 ; free physical = 31104 ; free virtual = 60700
- ---------------------------------------------------------------------------------
- INFO: [Synth 8-802] inferred FSM for state register 'reg_state_eios_det_reg' in module 'pcie_s7_gt_rx_valid_filter_7x'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_reg' in module 'pcie_s7_gtp_pipe_reset'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_reg' in module 'pcie_s7_qpll_reset'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_reg' in module 'pcie_s7_gtp_pipe_rate'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_reg' in module 'pcie_s7_rxeq_scan'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_tx_reg' in module 'pcie_s7_pipe_eq'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_rx_reg' in module 'pcie_s7_pipe_eq'
- INFO: [Synth 8-802] inferred FSM for state register 'fsm_reg' in module 'pcie_s7_qpll_drp'
- INFO: [Synth 8-802] inferred FSM for state register 'resetovrd.fsm_reg' in module 'pcie_s7_pipe_user'
- INFO: [Synth 8-802] inferred FSM for state register 'txsync_fsm.fsm_tx_reg' in module 'pcie_s7_pipe_sync'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- *
- EIOS_DET_IDL | 00001 | 00001
- EIOS_DET_NO_STR0 | 00010 | 00010
- EIOS_DET_STR0 | 00100 | 00100
- EIOS_DET_STR1 | 01000 | 01000
- EIOS_DET_DONE | 10000 | 10000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3898] No Re-encoding of one hot register 'reg_state_eios_det_reg' in module 'pcie_s7_gt_rx_valid_filter_7x'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- FSM_CFG_WAIT | 000000000000001 | 00001
- FSM_PLLRESET | 001000000000000 | 00010
- FSM_DRP_X16_START | 000001000000000 | 00011
- FSM_DRP_X16_DONE | 000010000000000 | 00100
- FSM_PLLLOCK | 000000100000000 | 00101
- FSM_GTRESET | 000000001000000 | 00110
- FSM_RXPMARESETDONE_1 | 000000000000100 | 00111
- FSM_RXPMARESETDONE_2 | 000000000001000 | 01000
- FSM_DRP_X20_START | 000000000010000 | 01001
- FSM_DRP_X20_DONE | 000000000100000 | 01010
- FSM_MMCM_LOCK | 100000000000000 | 01011
- FSM_RESETDONE | 010000000000000 | 01100
- FSM_TXSYNC_START | 000100000000000 | 01101
- FSM_TXSYNC_DONE | 000000010000000 | 01110
- FSM_IDLE | 000000000000010 | 00000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'fsm_reg' using encoding 'one-hot' in module 'pcie_s7_gtp_pipe_reset'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- FSM_WAIT_LOCK | 00000001 | 0010
- FSM_MMCM_LOCK | 00000010 | 0011
- FSM_DRP_START_NOM | 00000100 | 0100
- FSM_DRP_DONE_NOM | 00001000 | 0101
- FSM_QPLLLOCK | 00010000 | 0110
- FSM_QPLL_PDRESET | 00100000 | 1011
- FSM_QPLL_PD | 01000000 | 1100
- FSM_IDLE | 10000000 | 0001
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'fsm_reg' using encoding 'one-hot' in module 'pcie_s7_qpll_reset'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- FSM_IDLE | 0000000010000 | 0000
- FSM_TXDATA_WAIT | 0000100000000 | 0001
- FSM_PCLK_SEL | 0000000001000 | 0010
- FSM_DRP_X16_START | 0000000000001 | 0011
- FSM_DRP_X16_DONE | 0000000000010 | 0100
- FSM_RATE_SEL | 0000000000100 | 0101
- FSM_RXPMARESETDONE | 1000000000000 | 0110
- FSM_DRP_X20_START | 0001000000000 | 0111
- FSM_DRP_X20_DONE | 0010000000000 | 1000
- FSM_RATE_DONE | 0100000000000 | 1001
- FSM_TXSYNC_START | 0000010000000 | 1010
- FSM_TXSYNC_DONE | 0000001000000 | 1011
- FSM_DONE | 0000000100000 | 1100
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'fsm_reg' using encoding 'one-hot' in module 'pcie_s7_gtp_pipe_rate'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 00001 | 0000
- *
- FSM_IDLE | 00010 | 0001
- FSM_PRESET | 00100 | 0010
- FSM_CONVERGE | 01000 | 0100
- FSM_NEW_TXCOEFF_REQ | 10000 | 1000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'fsm_reg' using encoding 'one-hot' in module 'pcie_s7_rxeq_scan'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 000 | 000000
- *
- FSM_TXEQ_IDLE | 001 | 000001
- FSM_TXEQ_PRESET | 010 | 000010
- FSM_TXEQ_TXCOEFF | 011 | 000100
- FSM_TXEQ_REMAP | 100 | 001000
- FSM_TXEQ_QUERY | 101 | 010000
- FSM_TXEQ_DONE | 110 | 100000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'fsm_tx_reg' using encoding 'sequential' in module 'pcie_s7_pipe_eq'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 0000001 | 000000
- *
- FSM_RXEQ_IDLE | 0000010 | 000001
- FSM_RXEQ_PRESET | 0000100 | 000010
- FSM_RXEQ_TXCOEFF | 0001000 | 000100
- FSM_RXEQ_LF | 0010000 | 001000
- FSM_RXEQ_NEW_TXCOEFF_REQ | 0100000 | 010000
- FSM_RXEQ_DONE | 1000000 | 100000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'fsm_rx_reg' using encoding 'one-hot' in module 'pcie_s7_pipe_eq'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- *
- FSM_IDLE | 000000001 | 000000001
- FSM_LOAD | 000000010 | 000000010
- FSM_READ | 000000100 | 000000100
- FSM_RRDY | 000001000 | 000001000
- FSM_WRITE | 000010000 | 000010000
- FSM_WRDY | 000100000 | 000100000
- FSM_DONE | 001000000 | 001000000
- FSM_QPLLRESET | 010000000 | 010000000
- FSM_QPLLLOCK | 100000000 | 100000000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3898] No Re-encoding of one hot register 'fsm_reg' in module 'pcie_s7_qpll_drp'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- FSM_IDLE | 0010 | 00
- FSM_RESETOVRD | 1000 | 01
- FSM_RESET_INIT | 0100 | 10
- FSM_RESET | 0001 | 11
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'resetovrd.fsm_reg' using encoding 'one-hot' in module 'pcie_s7_pipe_user'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 0000001 | 000000
- *
- FSM_TXSYNC_IDLE | 0000010 | 000001
- FSM_MMCM_LOCK | 0000100 | 000010
- FSM_TXSYNC_START | 0001000 | 000100
- FSM_TXPHINITDONE | 0010000 | 001000
- FSM_TXSYNC_DONE1 | 0100000 | 010000
- FSM_TXSYNC_DONE2 | 1000000 | 100000
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'txsync_fsm.fsm_tx_reg' using encoding 'one-hot' in module 'pcie_s7_pipe_sync'
- ---------------------------------------------------------------------------------
- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:13 ; elapsed = 00:00:14 . Memory (MB): peak = 2408.375 ; gain = 69.887 ; free physical = 31096 ; free virtual = 60693
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start RTL Component Statistics
- ---------------------------------------------------------------------------------
- Detailed RTL Component Info :
- +---Adders :
- 2 Input 22 Bit Adders := 4
- 2 Input 12 Bit Adders := 2
- 2 Input 8 Bit Adders := 4
- 2 Input 6 Bit Adders := 2
- 2 Input 5 Bit Adders := 4
- 2 Input 4 Bit Adders := 12
- 2 Input 3 Bit Adders := 6
- 2 Input 2 Bit Adders := 15
- 2 Input 1 Bit Adders := 4
- +---Registers :
- 128 Bit Registers := 8
- 96 Bit Registers := 5
- 22 Bit Registers := 5
- 19 Bit Registers := 4
- 18 Bit Registers := 32
- 16 Bit Registers := 28
- 12 Bit Registers := 1
- 9 Bit Registers := 4
- 8 Bit Registers := 10
- 7 Bit Registers := 5
- 6 Bit Registers := 47
- 5 Bit Registers := 5
- 4 Bit Registers := 65
- 3 Bit Registers := 45
- 2 Bit Registers := 59
- 1 Bit Registers := 607
- +---Muxes :
- 2 Input 128 Bit Muxes := 1
- 2 Input 22 Bit Muxes := 7
- 5 Input 22 Bit Muxes := 4
- 2 Input 19 Bit Muxes := 4
- 7 Input 19 Bit Muxes := 4
- 2 Input 18 Bit Muxes := 12
- 24 Input 18 Bit Muxes := 4
- 7 Input 18 Bit Muxes := 8
- 2 Input 16 Bit Muxes := 5
- 15 Input 15 Bit Muxes := 1
- 2 Input 15 Bit Muxes := 13
- 13 Input 13 Bit Muxes := 4
- 2 Input 13 Bit Muxes := 40
- 2 Input 12 Bit Muxes := 7
- 2 Input 10 Bit Muxes := 2
- 2 Input 9 Bit Muxes := 10
- 10 Input 9 Bit Muxes := 1
- 3 Input 9 Bit Muxes := 1
- 8 Input 8 Bit Muxes := 2
- 2 Input 8 Bit Muxes := 15
- 2 Input 7 Bit Muxes := 49
- 7 Input 7 Bit Muxes := 8
- 4 Input 7 Bit Muxes := 4
- 2 Input 6 Bit Muxes := 5
- 7 Input 6 Bit Muxes := 12
- 8 Input 6 Bit Muxes := 1
- 2 Input 5 Bit Muxes := 62
- 5 Input 5 Bit Muxes := 5
- 6 Input 5 Bit Muxes := 4
- 15 Input 5 Bit Muxes := 1
- 8 Input 5 Bit Muxes := 4
- 8 Input 4 Bit Muxes := 2
- 2 Input 4 Bit Muxes := 49
- 7 Input 4 Bit Muxes := 4
- 4 Input 4 Bit Muxes := 4
- 2 Input 3 Bit Muxes := 53
- 13 Input 3 Bit Muxes := 4
- 7 Input 3 Bit Muxes := 12
- 4 Input 3 Bit Muxes := 4
- 10 Input 3 Bit Muxes := 1
- 2 Input 2 Bit Muxes := 19
- 7 Input 2 Bit Muxes := 4
- 2 Input 1 Bit Muxes := 123
- 6 Input 1 Bit Muxes := 12
- 15 Input 1 Bit Muxes := 3
- 8 Input 1 Bit Muxes := 9
- 13 Input 1 Bit Muxes := 4
- 9 Input 1 Bit Muxes := 4
- 5 Input 1 Bit Muxes := 32
- 4 Input 1 Bit Muxes := 8
- 7 Input 1 Bit Muxes := 68
- 10 Input 1 Bit Muxes := 3
- ---------------------------------------------------------------------------------
- Finished RTL Component Statistics
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Part Resource Summary
- ---------------------------------------------------------------------------------
- Part Resources:
- DSPs: 740 (col length:100)
- BRAMs: 730 (col length: RAMB18 100 RAMB36 50)
- ---------------------------------------------------------------------------------
- Finished Part Resource Summary
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Cross Boundary and Area Optimization
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:19 ; elapsed = 00:00:21 . Memory (MB): peak = 2408.375 ; gain = 69.887 ; free physical = 31064 ; free virtual = 60669
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Applying XDC Timing Constraints
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 2409.359 ; gain = 70.871 ; free physical = 30851 ; free virtual = 60456
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Timing Optimization
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Timing Optimization : Time (s): cpu = 00:00:24 ; elapsed = 00:00:26 . Memory (MB): peak = 2446.406 ; gain = 107.918 ; free physical = 30830 ; free virtual = 60435
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Technology Mapping
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Technology Mapping : Time (s): cpu = 00:00:26 ; elapsed = 00:00:27 . Memory (MB): peak = 2456.430 ; gain = 117.941 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start IO Insertion
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Flattening Before IO Insertion
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Flattening Before IO Insertion
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Final Netlist Cleanup
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Final Netlist Cleanup
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished IO Insertion : Time (s): cpu = 00:00:28 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Renaming Generated Instances
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Renaming Generated Instances : Time (s): cpu = 00:00:28 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Rebuilding User Hierarchy
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:29 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Renaming Generated Ports
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Renaming Generated Ports : Time (s): cpu = 00:00:29 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Handling Custom Attributes
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Handling Custom Attributes : Time (s): cpu = 00:00:29 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Renaming Generated Nets
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Renaming Generated Nets : Time (s): cpu = 00:00:29 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- Static Shift Register Report:
- +------------------+---------------------------------------------------------------------------------------------------------------------------------------------------+--------+-------+--------------+--------------------+-------------------+--------+---------+
- |Module Name | RTL Name | Length | Width | Reset Signal | Pull out first Reg | Pull out last Reg | SRL16E | SRLC32E |
- +------------------+---------------------------------------------------------------------------------------------------------------------------------------------------+--------+-------+--------------+--------------------+-------------------+--------+---------+
- |pcie_s7_pcie2_top | inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].pipe_quad.gt_common_enabled.gt_common_int.gt_common_i/qpll_wrapper_i/cpllPDInst/cpllpd_wait_reg[95] | 96 | 1 | NO | NO | YES | 0 | 3 |
- |pcie_s7_pcie2_top | inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].pipe_quad.gt_common_enabled.gt_common_int.gt_common_i/qpll_wrapper_i/cpllPDInst/cpllreset_wait_reg[127] | 128 | 1 | NO | NO | YES | 0 | 4 |
- |pcie_s7_pcie2_top | inst/ltssm_reg2_reg[5] | 3 | 6 | NO | NO | YES | 6 | 0 |
- +------------------+---------------------------------------------------------------------------------------------------------------------------------------------------+--------+-------+--------------+--------------------+-------------------+--------+---------+
- ---------------------------------------------------------------------------------
- Finished ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Writing Synthesis Report
- ---------------------------------------------------------------------------------
- Report BlackBoxes:
- +-+--------------+----------+
- | |BlackBox name |Instances |
- +-+--------------+----------+
- +-+--------------+----------+
- Report Cell Usage:
- +------+--------------+------+
- | |Cell |Count |
- +------+--------------+------+
- |1 |BUFG | 1|
- |2 |CARRY4 | 30|
- |3 |GTPE2_CHANNEL | 4|
- |4 |GTPE2_COMMON | 1|
- |5 |LUT1 | 65|
- |6 |LUT2 | 262|
- |7 |LUT3 | 367|
- |8 |LUT4 | 275|
- |9 |LUT5 | 386|
- |10 |LUT6 | 384|
- |11 |PCIE_2 | 1|
- |12 |RAMB36E1 | 8|
- |13 |SRL16E | 6|
- |14 |SRLC32E | 7|
- |15 |FDCE | 9|
- |16 |FDPE | 2|
- |17 |FDRE | 2953|
- |18 |FDSE | 98|
- +------+--------------+------+
- ---------------------------------------------------------------------------------
- Finished Writing Synthesis Report : Time (s): cpu = 00:00:29 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.398 ; gain = 120.910 ; free physical = 30827 ; free virtual = 60432
- ---------------------------------------------------------------------------------
- Synthesis finished with 0 errors, 0 critical warnings and 0 warnings.
- Synthesis Optimization Runtime : Time (s): cpu = 00:00:26 ; elapsed = 00:00:27 . Memory (MB): peak = 2459.398 ; gain = 51.023 ; free physical = 30879 ; free virtual = 60484
- Synthesis Optimization Complete : Time (s): cpu = 00:00:29 ; elapsed = 00:00:30 . Memory (MB): peak = 2459.406 ; gain = 120.910 ; free physical = 30879 ; free virtual = 60484
- INFO: [Project 1-571] Translating synthesized netlist
- Netlist sorting complete. Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.06 . Memory (MB): peak = 2459.406 ; gain = 0.000 ; free physical = 30964 ; free virtual = 60569
- INFO: [Netlist 29-17] Analyzing 38 Unisim elements for replacement
- INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
- INFO: [Project 1-570] Preparing netlist for logic optimization
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7_ooc.xdc] for cell 'inst'
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/synth/pcie_s7_ooc.xdc] for cell 'inst'
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc] for cell 'inst'
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc] for cell 'inst'
- INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
- Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2511.227 ; gain = 0.000 ; free physical = 30896 ; free virtual = 60501
- INFO: [Project 1-111] Unisim Transformation Summary:
- No Unisim elements were transformed.
- INFO: [Common 17-83] Releasing license: Synthesis
- 133 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
- synth_design completed successfully
- synth_design: Time (s): cpu = 00:00:37 ; elapsed = 00:00:35 . Memory (MB): peak = 2511.227 ; gain = 172.820 ; free physical = 31142 ; free virtual = 60747
- INFO: [Coretcl 2-1174] Renamed 78 cell refs.
- INFO: [Timing 38-35] Done setting XDC timing constraints.
- INFO: [Timing 38-480] Writing timing data to binary archive.
- Writing placer database...
- Writing XDEF routing.
- Writing XDEF routing logical nets.
- Writing XDEF routing special nets.
- Write XDEF Complete: Time (s): cpu = 00:00:00.08 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2787.059 ; gain = 2.969 ; free physical = 30804 ; free virtual = 60411
- INFO: [Common 17-1381] The checkpoint '/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7.dcp' has been generated.
- INFO: [Vivado 12-3441] generate_netlist_ip - operation complete
- synth_ip: Time (s): cpu = 00:00:44 ; elapsed = 00:00:42 . Memory (MB): peak = 2789.020 ; gain = 493.629 ; free physical = 30894 ; free virtual = 60495
- # get_files -all -of_objects [get_files {/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7.xci}]
- # read_xdc sqrl_acorn.xdc
- # set_property PROCESSING_ORDER EARLY [get_files sqrl_acorn.xdc]
- # synth_design -directive default -top sqrl_acorn -part xc7a200t-fbg484-2
- Command: synth_design -directive default -top sqrl_acorn -part xc7a200t-fbg484-2
- Starting synth_design
- Attempting to get a license for feature 'Synthesis' and/or device 'xc7a200t'
- INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7a200t'
- INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 4 processes.
- ---------------------------------------------------------------------------------
- Starting RTL Elaboration : Time (s): cpu = 00:00:03 ; elapsed = 00:00:03 . Memory (MB): peak = 2789.020 ; gain = 0.000 ; free physical = 29862 ; free virtual = 59463
- ---------------------------------------------------------------------------------
- INFO: [Synth 8-6157] synthesizing module 'sqrl_acorn' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- INFO: [Synth 8-3876] $readmem data file 'mem.init' is read successfully [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18215]
- INFO: [Synth 8-3876] $readmem data file 'mem_1.init' is read successfully [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18235]
- INFO: [Synth 8-3876] $readmem data file 'mem_2.init' is read successfully [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18247]
- INFO: [Synth 8-226] default block is never used [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:9287]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:14356]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:14376]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16900]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16945]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16968]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17036]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17086]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17098]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17129]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17141]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17273]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17296]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17325]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17477]
- INFO: [Synth 8-155] case statement is not full and has no default [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:17532]
- INFO: [Synth 8-6157] synthesizing module 'BUFG' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:1083]
- INFO: [Synth 8-6155] done synthesizing module 'BUFG' (1#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:1083]
- WARNING: [Synth 8-4446] all outputs are unconnected for this instance and logic may be removed [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18321]
- INFO: [Synth 8-6157] synthesizing module 'IDELAYCTRL' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:35060]
- Parameter SIM_DEVICE bound to: 7SERIES - type: string
- INFO: [Synth 8-6155] done synthesizing module 'IDELAYCTRL' (2#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:35060]
- WARNING: [Synth 8-7071] port 'RDY' of module 'IDELAYCTRL' is unconnected for instance 'IDELAYCTRL' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18321]
- WARNING: [Synth 8-7023] instance 'IDELAYCTRL' of module 'IDELAYCTRL' has 3 connections declared, but only 2 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18321]
- INFO: [Synth 8-6157] synthesizing module 'OSERDESE2' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:50398]
- Parameter DATA_RATE_OQ bound to: DDR - type: string
- Parameter DATA_RATE_TQ bound to: BUF - type: string
- Parameter DATA_WIDTH bound to: 8 - type: integer
- Parameter INIT_OQ bound to: 1'b0
- Parameter INIT_TQ bound to: 1'b0
- Parameter IS_CLKDIV_INVERTED bound to: 1'b0
- Parameter IS_CLK_INVERTED bound to: 1'b0
- Parameter IS_D1_INVERTED bound to: 1'b0
- Parameter IS_D2_INVERTED bound to: 1'b0
- Parameter IS_D3_INVERTED bound to: 1'b0
- Parameter IS_D4_INVERTED bound to: 1'b0
- Parameter IS_D5_INVERTED bound to: 1'b0
- Parameter IS_D6_INVERTED bound to: 1'b0
- Parameter IS_D7_INVERTED bound to: 1'b0
- Parameter IS_D8_INVERTED bound to: 1'b0
- Parameter IS_T1_INVERTED bound to: 1'b0
- Parameter IS_T2_INVERTED bound to: 1'b0
- Parameter IS_T3_INVERTED bound to: 1'b0
- Parameter IS_T4_INVERTED bound to: 1'b0
- Parameter SERDES_MODE bound to: MASTER - type: string
- Parameter SRVAL_OQ bound to: 1'b0
- Parameter SRVAL_TQ bound to: 1'b0
- Parameter TBYTE_CTL bound to: FALSE - type: string
- Parameter TBYTE_SRC bound to: FALSE - type: string
- Parameter TRISTATE_WIDTH bound to: 1 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'OSERDESE2' (3#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:50398]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- WARNING: [Synth 8-7023] instance 'OSERDESE2' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18332]
- INFO: [Synth 8-6157] synthesizing module 'OBUFDS' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:46332]
- Parameter CAPACITANCE bound to: DONT_CARE - type: string
- Parameter IOSTANDARD bound to: DEFAULT - type: string
- Parameter SLEW bound to: SLOW - type: string
- INFO: [Synth 8-6155] done synthesizing module 'OBUFDS' (4#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:46332]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_1' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_1' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18360]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_2' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_2' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18382]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_3' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_3' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18404]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_4' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_4' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18426]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_5' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_5' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18448]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'SHIFTOUT1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'SHIFTOUT2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'TBYTEOUT' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'TFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'TQ' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'SHIFTIN1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'SHIFTIN2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'T1' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'T2' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'T3' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'T4' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'TBYTEIN' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'TCE' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_6' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_6' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18470]
- WARNING: [Synth 8-7071] port 'OFB' of module 'OSERDESE2' is unconnected for instance 'OSERDESE2_7' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18492]
- INFO: [Common 17-14] Message 'Synth 8-7071' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
- WARNING: [Synth 8-7023] instance 'OSERDESE2_7' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18492]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_8' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18514]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_9' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18536]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_10' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18558]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_11' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18580]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_12' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18602]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_13' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18624]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_14' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18646]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_15' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18668]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_16' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18690]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_17' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18712]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_18' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18734]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_19' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18756]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_20' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18778]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_21' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18800]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_22' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18822]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_23' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18844]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_24' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18866]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_25' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18888]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_26' of module 'OSERDESE2' has 27 connections declared, but only 17 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18910]
- INFO: [Synth 8-6157] synthesizing module 'IOBUFDS' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:36259]
- Parameter DIFF_TERM bound to: FALSE - type: string
- Parameter DQS_BIAS bound to: FALSE - type: string
- Parameter IBUF_LOW_PWR bound to: TRUE - type: string
- Parameter IOSTANDARD bound to: DEFAULT - type: string
- Parameter SLEW bound to: SLOW - type: string
- INFO: [Synth 8-6155] done synthesizing module 'IOBUFDS' (5#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:36259]
- WARNING: [Synth 8-7023] instance 'IOBUFDS' of module 'IOBUFDS' has 5 connections declared, but only 4 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18930]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_27' of module 'OSERDESE2' has 27 connections declared, but only 17 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18943]
- WARNING: [Synth 8-7023] instance 'IOBUFDS_1' of module 'IOBUFDS' has 5 connections declared, but only 4 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18963]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_28' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18976]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_29' of module 'OSERDESE2' has 27 connections declared, but only 13 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:18998]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_30' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19020]
- INFO: [Synth 8-6157] synthesizing module 'ISERDESE2' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:38620]
- Parameter DATA_RATE bound to: DDR - type: string
- Parameter DATA_WIDTH bound to: 8 - type: integer
- Parameter DYN_CLKDIV_INV_EN bound to: FALSE - type: string
- Parameter DYN_CLK_INV_EN bound to: FALSE - type: string
- Parameter INIT_Q1 bound to: 1'b0
- Parameter INIT_Q2 bound to: 1'b0
- Parameter INIT_Q3 bound to: 1'b0
- Parameter INIT_Q4 bound to: 1'b0
- Parameter INTERFACE_TYPE bound to: NETWORKING - type: string
- Parameter IOBDELAY bound to: IFD - type: string
- Parameter IS_CLKB_INVERTED bound to: 1'b0
- Parameter IS_CLKDIVP_INVERTED bound to: 1'b0
- Parameter IS_CLKDIV_INVERTED bound to: 1'b0
- Parameter IS_CLK_INVERTED bound to: 1'b0
- Parameter IS_D_INVERTED bound to: 1'b0
- Parameter IS_OCLKB_INVERTED bound to: 1'b0
- Parameter IS_OCLK_INVERTED bound to: 1'b0
- Parameter NUM_CE bound to: 1 - type: integer
- Parameter OFB_USED bound to: FALSE - type: string
- Parameter SERDES_MODE bound to: MASTER - type: string
- Parameter SRVAL_Q1 bound to: 1'b0
- Parameter SRVAL_Q2 bound to: 1'b0
- Parameter SRVAL_Q3 bound to: 1'b0
- Parameter SRVAL_Q4 bound to: 1'b0
- INFO: [Synth 8-6155] done synthesizing module 'ISERDESE2' (6#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:38620]
- WARNING: [Synth 8-7023] instance 'ISERDESE2' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19046]
- INFO: [Synth 8-6157] synthesizing module 'IDELAYE2' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:35073]
- Parameter CINVCTRL_SEL bound to: FALSE - type: string
- Parameter DELAY_SRC bound to: IDATAIN - type: string
- Parameter HIGH_PERFORMANCE_MODE bound to: TRUE - type: string
- Parameter IDELAY_TYPE bound to: VARIABLE - type: string
- Parameter IDELAY_VALUE bound to: 0 - type: integer
- Parameter IS_C_INVERTED bound to: 1'b0
- Parameter IS_DATAIN_INVERTED bound to: 1'b0
- Parameter IS_IDATAIN_INVERTED bound to: 1'b0
- Parameter PIPE_SEL bound to: FALSE - type: string
- Parameter REFCLK_FREQUENCY bound to: 200.000000 - type: double
- Parameter SIGNAL_PATTERN bound to: DATA - type: string
- Parameter SIM_DELAY_D bound to: 0 - type: integer
- INFO: [Synth 8-6155] done synthesizing module 'IDELAYE2' (7#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:35073]
- WARNING: [Synth 8-7023] instance 'IDELAYE2' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19073]
- INFO: [Synth 8-6157] synthesizing module 'IOBUF' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:36242]
- Parameter DRIVE bound to: 12 - type: integer
- Parameter IBUF_LOW_PWR bound to: TRUE - type: string
- Parameter IOSTANDARD bound to: DEFAULT - type: string
- Parameter SLEW bound to: SLOW - type: string
- INFO: [Synth 8-6155] done synthesizing module 'IOBUF' (8#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:36242]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_31' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19096]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_1' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19122]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_1' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19149]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_32' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19172]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_2' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19198]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_2' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19225]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_33' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19248]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_3' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19274]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_3' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19301]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_34' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19324]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_4' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19350]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_4' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19377]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_35' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19400]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_5' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19426]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_5' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19453]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_36' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19476]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_6' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19502]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_6' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19529]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_37' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19552]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_7' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19578]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_7' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19605]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_38' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19628]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_8' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19654]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_8' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19681]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_39' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19704]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_9' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19730]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_9' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19757]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_40' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19780]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_10' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19806]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_10' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19833]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_41' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19856]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_11' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19882]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_11' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19909]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_42' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19932]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_12' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19958]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_12' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:19985]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_43' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20008]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_13' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20034]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_13' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20061]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_44' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20084]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_14' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20110]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_14' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20137]
- WARNING: [Synth 8-7023] instance 'OSERDESE2_45' of module 'OSERDESE2' has 27 connections declared, but only 16 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20160]
- WARNING: [Synth 8-7023] instance 'ISERDESE2_15' of module 'ISERDESE2' has 28 connections declared, but only 15 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20186]
- WARNING: [Synth 8-7023] instance 'IDELAYE2_15' of module 'IDELAYE2' has 12 connections declared, but only 7 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20213]
- INFO: [Synth 8-6157] synthesizing module 'IBUFDS_GTE2' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:33137]
- Parameter CLKCM_CFG bound to: TRUE - type: string
- Parameter CLKRCV_TRST bound to: TRUE - type: string
- Parameter CLKSWING_CFG bound to: 2'b11
- INFO: [Synth 8-6155] done synthesizing module 'IBUFDS_GTE2' (9#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:33137]
- WARNING: [Synth 8-7023] instance 'IBUFDS_GTE2' of module 'IBUFDS_GTE2' has 5 connections declared, but only 4 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20352]
- WARNING: [Synth 8-4446] all outputs are unconnected for this instance and logic may be removed [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20505]
- INFO: [Synth 8-6157] synthesizing module 'ICAPE2' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:34801]
- Parameter DEVICE_ID bound to: 56955027 - type: integer
- Parameter ICAP_WIDTH bound to: X32 - type: string
- Parameter SIM_CFG_FILE_NAME bound to: NONE - type: string
- INFO: [Synth 8-6155] done synthesizing module 'ICAPE2' (10#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:34801]
- WARNING: [Synth 8-7023] instance 'ICAPE2' of module 'ICAPE2' has 5 connections declared, but only 4 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20505]
- WARNING: [Synth 8-4446] all outputs are unconnected for this instance and logic may be removed [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20512]
- INFO: [Synth 8-6157] synthesizing module 'STARTUPE2' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:78204]
- Parameter PROG_USR bound to: FALSE - type: string
- Parameter SIM_CCLK_FREQ bound to: 0.000000 - type: double
- INFO: [Synth 8-6155] done synthesizing module 'STARTUPE2' (11#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:78204]
- WARNING: [Synth 8-7023] instance 'STARTUPE2' of module 'STARTUPE2' has 13 connections declared, but only 9 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20512]
- INFO: [Synth 8-6157] synthesizing module 'VexRiscv' [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:46]
- INFO: [Synth 8-6157] synthesizing module 'InstructionCache' [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:6019]
- INFO: [Synth 8-6155] done synthesizing module 'InstructionCache' (12#1) [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:6019]
- INFO: [Synth 8-6157] synthesizing module 'DataCache' [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:5188]
- INFO: [Synth 8-6155] done synthesizing module 'DataCache' (13#1) [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:5188]
- INFO: [Synth 8-6155] done synthesizing module 'VexRiscv' (14#1) [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:46]
- INFO: [Synth 8-6157] synthesizing module 'FD' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:13483]
- Parameter INIT bound to: 1'b0
- INFO: [Synth 8-6155] done synthesizing module 'FD' (15#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:13483]
- INFO: [Synth 8-6157] synthesizing module 'PLLE2_ADV' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:61526]
- Parameter BANDWIDTH bound to: OPTIMIZED - type: string
- Parameter CLKFBOUT_MULT bound to: 8 - type: integer
- Parameter CLKFBOUT_PHASE bound to: 0.000000 - type: double
- Parameter CLKIN1_PERIOD bound to: 5.000000 - type: double
- Parameter CLKIN2_PERIOD bound to: 0.000000 - type: double
- Parameter CLKOUT0_DIVIDE bound to: 16 - type: integer
- Parameter CLKOUT0_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT0_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT1_DIVIDE bound to: 4 - type: integer
- Parameter CLKOUT1_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT1_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT2_DIVIDE bound to: 4 - type: integer
- Parameter CLKOUT2_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT2_PHASE bound to: 90.000000 - type: double
- Parameter CLKOUT3_DIVIDE bound to: 8 - type: integer
- Parameter CLKOUT3_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT3_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT4_DIVIDE bound to: 1 - type: integer
- Parameter CLKOUT4_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT4_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT5_DIVIDE bound to: 1 - type: integer
- Parameter CLKOUT5_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT5_PHASE bound to: 0.000000 - type: double
- Parameter COMPENSATION bound to: ZHOLD - type: string
- Parameter DIVCLK_DIVIDE bound to: 1 - type: integer
- Parameter IS_CLKINSEL_INVERTED bound to: 1'b0
- Parameter IS_PWRDWN_INVERTED bound to: 1'b0
- Parameter IS_RST_INVERTED bound to: 1'b0
- Parameter REF_JITTER1 bound to: 0.010000 - type: double
- Parameter REF_JITTER2 bound to: 0.010000 - type: double
- Parameter STARTUP_WAIT bound to: FALSE - type: string
- INFO: [Synth 8-6155] done synthesizing module 'PLLE2_ADV' (16#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:61526]
- WARNING: [Synth 8-7023] instance 'PLLE2_ADV' of module 'PLLE2_ADV' has 21 connections declared, but only 10 given [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20617]
- INFO: [Synth 8-6157] synthesizing module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7_support.v:61]
- Parameter LINK_CAP_MAX_LINK_WIDTH bound to: 3'b100
- Parameter CLK_SHARING_EN bound to: FALSE - type: string
- Parameter C_DATA_WIDTH bound to: 8'b10000000
- Parameter KEEP_WIDTH bound to: 5'b10000
- Parameter PCIE_REFCLK_FREQ bound to: 1'b0
- Parameter PCIE_USERCLK1_FREQ bound to: 3'b100
- Parameter PCIE_USERCLK2_FREQ bound to: 2'b11
- Parameter PCIE_GT_DEVICE bound to: GTP - type: string
- Parameter PCIE_USE_MODE bound to: 2.1 - type: string
- INFO: [Synth 8-6157] synthesizing module 'pcie_pipe_clock' [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_pipe_clock.v:67]
- Parameter PCIE_ASYNC_EN bound to: FALSE - type: string
- Parameter PCIE_TXBUF_EN bound to: FALSE - type: string
- Parameter PCIE_CLK_SHARING_EN bound to: FALSE - type: string
- Parameter PCIE_LANE bound to: 3'b100
- Parameter PCIE_LINK_SPEED bound to: 3 - type: integer
- Parameter PCIE_REFCLK_FREQ bound to: 1'b0
- Parameter PCIE_USERCLK1_FREQ bound to: 3'b100
- Parameter PCIE_USERCLK2_FREQ bound to: 2'b11
- Parameter PCIE_OOBCLK_MODE bound to: 1 - type: integer
- Parameter PCIE_DEBUG_MODE bound to: 0 - type: integer
- Parameter DIVCLK_DIVIDE bound to: 1 - type: integer
- Parameter CLKFBOUT_MULT_F bound to: 10 - type: integer
- Parameter CLKIN1_PERIOD bound to: 10 - type: integer
- Parameter CLKOUT0_DIVIDE_F bound to: 8 - type: integer
- Parameter CLKOUT1_DIVIDE bound to: 4 - type: integer
- Parameter CLKOUT2_DIVIDE bound to: 4 - type: integer
- Parameter CLKOUT3_DIVIDE bound to: 8 - type: integer
- Parameter CLKOUT4_DIVIDE bound to: 20 - type: integer
- Parameter PCIE_GEN1_MODE bound to: 1'b0
- INFO: [Synth 8-6157] synthesizing module 'BUFGCTRL' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:1144]
- Parameter CE_TYPE_CE0 bound to: SYNC - type: string
- Parameter CE_TYPE_CE1 bound to: SYNC - type: string
- Parameter INIT_OUT bound to: 0 - type: integer
- Parameter IS_CE0_INVERTED bound to: 1'b0
- Parameter IS_CE1_INVERTED bound to: 1'b0
- Parameter IS_I0_INVERTED bound to: 1'b0
- Parameter IS_I1_INVERTED bound to: 1'b0
- Parameter IS_IGNORE0_INVERTED bound to: 1'b0
- Parameter IS_IGNORE1_INVERTED bound to: 1'b0
- Parameter IS_S0_INVERTED bound to: 1'b0
- Parameter IS_S1_INVERTED bound to: 1'b0
- Parameter PRESELECT_I0 bound to: FALSE - type: string
- Parameter PRESELECT_I1 bound to: FALSE - type: string
- Parameter SIM_DEVICE bound to: ULTRASCALE - type: string
- Parameter STARTUP_SYNC bound to: FALSE - type: string
- INFO: [Synth 8-6155] done synthesizing module 'BUFGCTRL' (17#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:1144]
- INFO: [Synth 8-6157] synthesizing module 'MMCME2_ADV' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:39998]
- Parameter BANDWIDTH bound to: OPTIMIZED - type: string
- Parameter CLKFBOUT_MULT_F bound to: 10.000000 - type: double
- Parameter CLKFBOUT_PHASE bound to: 0.000000 - type: double
- Parameter CLKFBOUT_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKIN1_PERIOD bound to: 10.000000 - type: double
- Parameter CLKIN2_PERIOD bound to: 0.000000 - type: double
- Parameter CLKOUT0_DIVIDE_F bound to: 8.000000 - type: double
- Parameter CLKOUT0_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT0_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT0_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKOUT1_DIVIDE bound to: 4 - type: integer
- Parameter CLKOUT1_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT1_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT1_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKOUT2_DIVIDE bound to: 4 - type: integer
- Parameter CLKOUT2_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT2_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT2_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKOUT3_DIVIDE bound to: 8 - type: integer
- Parameter CLKOUT3_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT3_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT3_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKOUT4_CASCADE bound to: FALSE - type: string
- Parameter CLKOUT4_DIVIDE bound to: 20 - type: integer
- Parameter CLKOUT4_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT4_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT4_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKOUT5_DIVIDE bound to: 1 - type: integer
- Parameter CLKOUT5_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT5_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT5_USE_FINE_PS bound to: FALSE - type: string
- Parameter CLKOUT6_DIVIDE bound to: 1 - type: integer
- Parameter CLKOUT6_DUTY_CYCLE bound to: 0.500000 - type: double
- Parameter CLKOUT6_PHASE bound to: 0.000000 - type: double
- Parameter CLKOUT6_USE_FINE_PS bound to: FALSE - type: string
- Parameter COMPENSATION bound to: ZHOLD - type: string
- Parameter DIVCLK_DIVIDE bound to: 1 - type: integer
- Parameter IS_CLKINSEL_INVERTED bound to: 1'b0
- Parameter IS_PSEN_INVERTED bound to: 1'b0
- Parameter IS_PSINCDEC_INVERTED bound to: 1'b0
- Parameter IS_PWRDWN_INVERTED bound to: 1'b0
- Parameter IS_RST_INVERTED bound to: 1'b0
- Parameter REF_JITTER1 bound to: 0.010000 - type: double
- Parameter REF_JITTER2 bound to: 0.010000 - type: double
- Parameter SS_EN bound to: FALSE - type: string
- Parameter SS_MODE bound to: CENTER_HIGH - type: string
- Parameter SS_MOD_PERIOD bound to: 10000 - type: integer
- Parameter STARTUP_WAIT bound to: FALSE - type: string
- INFO: [Synth 8-6155] done synthesizing module 'MMCME2_ADV' (18#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:39998]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_pipe_clock' (19#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_pipe_clock.v:67]
- INFO: [Synth 8-6157] synthesizing module 'pcie_s7' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/.Xil/Vivado-11032-signac-i1/realtime/pcie_s7_stub.v:6]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_s7' (20#1) [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/.Xil/Vivado-11032-signac-i1/realtime/pcie_s7_stub.v:6]
- INFO: [Synth 8-6155] done synthesizing module 'pcie_support' (21#1) [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7_support.v:61]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_dcommand2' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20882]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_dstatus' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20884]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_interrupt_do' does not match port width (8) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20888]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_interrupt_mmenable' does not match port width (3) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20889]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_lcommand' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20894]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_lstatus' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20895]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_mgmt_do' does not match port width (32) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20896]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_msg_data' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20898]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_pcie_link_state' does not match port width (3) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20915]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_pmcsr_powerstate' does not match port width (2) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20918]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_status' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20925]
- WARNING: [Synth 8-689] width (1) of port connection 'cfg_vc_tcvc_map' does not match port width (7) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20927]
- WARNING: [Synth 8-689] width (1) of port connection 'fc_cpld' does not match port width (12) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20928]
- WARNING: [Synth 8-689] width (1) of port connection 'fc_cplh' does not match port width (8) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20929]
- WARNING: [Synth 8-689] width (1) of port connection 'fc_npd' does not match port width (12) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20930]
- WARNING: [Synth 8-689] width (1) of port connection 'fc_nph' does not match port width (8) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20931]
- WARNING: [Synth 8-689] width (1) of port connection 'fc_pd' does not match port width (12) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20932]
- WARNING: [Synth 8-689] width (1) of port connection 'fc_ph' does not match port width (8) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20933]
- WARNING: [Synth 8-689] width (32) of port connection 'm_axis_rx_tuser' does not match port width (22) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20937]
- WARNING: [Synth 8-689] width (1) of port connection 'pcie_drp_do' does not match port width (16) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20941]
- WARNING: [Synth 8-689] width (1) of port connection 'pipe_rxoutclk_out' does not match port width (4) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20947]
- WARNING: [Synth 8-689] width (1) of port connection 'pl_initial_link_width' does not match port width (3) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20952]
- WARNING: [Synth 8-689] width (1) of port connection 'pl_lane_reversal_mode' does not match port width (2) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20953]
- WARNING: [Synth 8-689] width (1) of port connection 'pl_rx_pm_state' does not match port width (2) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20960]
- WARNING: [Synth 8-689] width (1) of port connection 'pl_tx_pm_state' does not match port width (3) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20963]
- WARNING: [Synth 8-689] width (1) of port connection 'tx_buf_av' does not match port width (6) of module 'pcie_support' [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:20965]
- INFO: [Synth 8-6157] synthesizing module 'IBUFDS' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:32998]
- Parameter CAPACITANCE bound to: DONT_CARE - type: string
- Parameter DIFF_TERM bound to: FALSE - type: string
- Parameter DQS_BIAS bound to: FALSE - type: string
- Parameter IBUF_DELAY_VALUE bound to: 0 - type: string
- Parameter IBUF_LOW_PWR bound to: TRUE - type: string
- Parameter IFD_DELAY_VALUE bound to: AUTO - type: string
- Parameter IOSTANDARD bound to: DEFAULT - type: string
- INFO: [Synth 8-6155] done synthesizing module 'IBUFDS' (22#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:32998]
- INFO: [Synth 8-6157] synthesizing module 'FDPE' [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:13664]
- Parameter INIT bound to: 1'b1
- Parameter IS_C_INVERTED bound to: 1'b0
- Parameter IS_D_INVERTED bound to: 1'b0
- Parameter IS_PRE_INVERTED bound to: 1'b0
- INFO: [Synth 8-6155] done synthesizing module 'FDPE' (23#1) [/tools/Xilinx/Vivado/2020.2/scripts/rt/data/unisim_comp.v:13664]
- INFO: [Synth 8-6155] done synthesizing module 'sqrl_acorn' (24#1) [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- ---------------------------------------------------------------------------------
- Finished RTL Elaboration : Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 2887.766 ; gain = 98.746 ; free physical = 30534 ; free virtual = 60138
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Handling Custom Attributes
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Handling Custom Attributes : Time (s): cpu = 00:00:08 ; elapsed = 00:00:09 . Memory (MB): peak = 2896.672 ; gain = 107.652 ; free physical = 30570 ; free virtual = 60173
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:08 ; elapsed = 00:00:09 . Memory (MB): peak = 2896.672 ; gain = 107.652 ; free physical = 30570 ; free virtual = 60173
- ---------------------------------------------------------------------------------
- Netlist sorting complete. Time (s): cpu = 00:00:00.15 ; elapsed = 00:00:00.15 . Memory (MB): peak = 2896.672 ; gain = 0.000 ; free physical = 30551 ; free virtual = 60154
- WARNING: [Netlist 29-345] The value of SIM_DEVICE on instance 'pcie_support/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1' of type 'BUFGCTRL' is 'ULTRASCALE'; it is being changed to match the current FPGA architecture, '7SERIES'. For functional simulation to match hardware behavior, the value of SIM_DEVICE should be changed in the source netlist.
- INFO: [Netlist 29-17] Analyzing 63 Unisim elements for replacement
- INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
- INFO: [Project 1-570] Preparing netlist for logic optimization
- Processing XDC Constraints
- Initializing timing engine
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7/pcie_s7_in_context.xdc] for cell 'pcie_support/pcie_i'
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7/pcie_s7_in_context.xdc] for cell 'pcie_support/pcie_i'
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc]
- INFO: [Timing 38-2] Deriving generated clocks [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:385]
- WARNING: [Vivado 12-3521] Clock specified in more than one group: crg_clkout0 [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:385]
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc]
- INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/sqrl_acorn_propImpl.xdc].
- Resolution: To avoid this warning, move constraints listed in [.Xil/sqrl_acorn_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis.
- Completed Processing XDC Constraints
- Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3028.438 ; gain = 0.000 ; free physical = 30454 ; free virtual = 60058
- INFO: [Project 1-111] Unisim Transformation Summary:
- A total of 27 instances were transformed.
- FD => FDRE: 8 instances
- IOBUF => IOBUF (IBUF, OBUFT): 16 instances
- IOBUFDS => IOBUFDS (IBUFDS, INV, OBUFTDS(x2)): 2 instances
- OBUFDS => OBUFDS_DUAL_BUF (INV, OBUFDS(x2)): 1 instance
- Constraint Validation Runtime : Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3028.438 ; gain = 0.000 ; free physical = 30454 ; free virtual = 60058
- ---------------------------------------------------------------------------------
- Finished Constraint Validation : Time (s): cpu = 00:00:15 ; elapsed = 00:00:15 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30567 ; free virtual = 60171
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Loading Part and Timing Information
- ---------------------------------------------------------------------------------
- Loading part: xc7a200tfbg484-2
- ---------------------------------------------------------------------------------
- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:15 ; elapsed = 00:00:15 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30567 ; free virtual = 60171
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Applying 'set_property' XDC Constraints
- ---------------------------------------------------------------------------------
- Applied set_property KEEP_HIERARCHY = SOFT for pcie_support/pcie_i. (constraint file auto generated constraint).
- ---------------------------------------------------------------------------------
- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:15 ; elapsed = 00:00:15 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30567 ; free virtual = 60171
- ---------------------------------------------------------------------------------
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_refresher_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_litepcietlpdepacketizer_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_fsm0_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_fsm1_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_litepciedmawriter_bufferizeendpoints_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_litepciedmareader_bufferizeendpoints_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'subfragments_s7spiflash_state_reg' in module 'sqrl_acorn'
- INFO: [Synth 8-802] inferred FSM for state register 'basesoc_state_reg' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 001 | 00
- *
- iSTATE0 | 010 | 01
- iSTATE1 | 100 | 10
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_litepciedmareader_bufferizeendpoints_state_reg' using encoding 'one-hot' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE1 | 00 | 00
- *
- iSTATE | 01 | 01
- iSTATE0 | 10 | 10
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_fsm1_state_reg' using encoding 'sequential' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 001 | 00
- *
- iSTATE0 | 010 | 01
- iSTATE1 | 100 | 10
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_litepciedmawriter_bufferizeendpoints_state_reg' using encoding 'one-hot' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 0 | 00
- *
- iSTATE1 | 1 | 10
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_fsm0_state_reg' using encoding 'sequential' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE1 | 00 | 00
- *
- iSTATE | 01 | 01
- iSTATE0 | 10 | 10
- iSTATE2 | 11 | 11
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_refresher_state_reg' using encoding 'sequential' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 00 | 00
- *
- iSTATE0 | 01 | 01
- iSTATE1 | 10 | 10
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_litepcietlpdepacketizer_state_reg' using encoding 'sequential' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE1 | 00 | 00
- *
- iSTATE | 01 | 01
- iSTATE0 | 10 | 10
- iSTATE2 | 11 | 11
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'subfragments_s7spiflash_state_reg' using encoding 'sequential' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------------------------
- State | New Encoding | Previous Encoding
- ---------------------------------------------------------------------------------------------------
- iSTATE | 001 | 00
- *
- iSTATE0 | 010 | 01
- iSTATE1 | 100 | 10
- ---------------------------------------------------------------------------------------------------
- INFO: [Synth 8-3354] encoded FSM with state register 'basesoc_state_reg' using encoding 'one-hot' in module 'sqrl_acorn'
- ---------------------------------------------------------------------------------
- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:22 ; elapsed = 00:00:23 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30559 ; free virtual = 60165
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start RTL Component Statistics
- ---------------------------------------------------------------------------------
- Detailed RTL Component Info :
- +---Adders :
- 2 Input 64 Bit Adders := 1
- 3 Input 52 Bit Adders := 1
- 2 Input 33 Bit Adders := 1
- 3 Input 33 Bit Adders := 1
- 3 Input 32 Bit Adders := 3
- 2 Input 32 Bit Adders := 11
- 2 Input 30 Bit Adders := 1
- 3 Input 24 Bit Adders := 2
- 2 Input 20 Bit Adders := 1
- 2 Input 13 Bit Adders := 1
- 4 Input 11 Bit Adders := 1
- 2 Input 11 Bit Adders := 1
- 2 Input 10 Bit Adders := 4
- 2 Input 9 Bit Adders := 2
- 2 Input 8 Bit Adders := 21
- 2 Input 7 Bit Adders := 32
- 2 Input 6 Bit Adders := 5
- 2 Input 5 Bit Adders := 5
- 2 Input 4 Bit Adders := 24
- 2 Input 3 Bit Adders := 92
- 5 Input 3 Bit Adders := 1
- 2 Input 1 Bit Adders := 4
- +---XORs :
- 2 Input 32 Bit XORs := 1
- 2 Input 3 Bit XORs := 6
- 2 Input 1 Bit XORs := 3
- +---Registers :
- 230 Bit Registers := 8
- 130 Bit Registers := 2
- 129 Bit Registers := 1
- 128 Bit Registers := 8
- 65 Bit Registers := 1
- 64 Bit Registers := 1
- 58 Bit Registers := 2
- 52 Bit Registers := 1
- 40 Bit Registers := 4
- 34 Bit Registers := 1
- 33 Bit Registers := 1
- 32 Bit Registers := 80
- 30 Bit Registers := 4
- 24 Bit Registers := 4
- 23 Bit Registers := 8
- 22 Bit Registers := 2
- 19 Bit Registers := 1
- 17 Bit Registers := 1
- 16 Bit Registers := 70
- 14 Bit Registers := 1
- 13 Bit Registers := 1
- 11 Bit Registers := 3
- 10 Bit Registers := 5
- 9 Bit Registers := 19
- 8 Bit Registers := 33
- 7 Bit Registers := 23
- 6 Bit Registers := 9
- 5 Bit Registers := 9
- 4 Bit Registers := 45
- 3 Bit Registers := 101
- 2 Bit Registers := 29
- 1 Bit Registers := 342
- +---RAMs :
- 130K Bit (1024 X 130 bit) RAMs := 1
- 64K Bit (2048 X 32 bit) RAMs := 1
- 32K Bit (1024 X 32 bit) RAMs := 1
- 28K Bit (128 X 230 bit) RAMs := 8
- 16K Bit (256 X 65 bit) RAMs := 2
- 16K Bit (128 X 129 bit) RAMs := 1
- 12K Bit (512 X 24 bit) RAMs := 1
- 8K Bit (1024 X 8 bit) RAMs := 4
- 8K Bit (64 X 130 bit) RAMs := 1
- 4K Bit (512 X 8 bit) RAMs := 16
- 2K Bit (128 X 22 bit) RAMs := 2
- 1024 Bit (32 X 32 bit) RAMs := 1
- 584 Bit (4 X 146 bit) RAMs := 2
- 192 Bit (8 X 24 bit) RAMs := 8
- 168 Bit (8 X 21 bit) RAMs := 1
- 160 Bit (16 X 10 bit) RAMs := 3
- 40 Bit (8 X 5 bit) RAMs := 1
- 32 Bit (4 X 8 bit) RAMs := 1
- +---ROMs :
- ROMs := 1
- +---Muxes :
- 2 Input 128 Bit Muxes := 21
- 8 Input 128 Bit Muxes := 8
- 3 Input 128 Bit Muxes := 2
- 2 Input 96 Bit Muxes := 1
- 2 Input 40 Bit Muxes := 1
- 2 Input 33 Bit Muxes := 3
- 2 Input 32 Bit Muxes := 112
- 3 Input 32 Bit Muxes := 12
- 4 Input 32 Bit Muxes := 7
- 13 Input 32 Bit Muxes := 1
- 2 Input 30 Bit Muxes := 2
- 2 Input 25 Bit Muxes := 1
- 2 Input 24 Bit Muxes := 4
- 3 Input 24 Bit Muxes := 2
- 2 Input 16 Bit Muxes := 38
- 7 Input 16 Bit Muxes := 2
- 8 Input 16 Bit Muxes := 16
- 4 Input 16 Bit Muxes := 3
- 3 Input 16 Bit Muxes := 4
- 2 Input 14 Bit Muxes := 1
- 3 Input 14 Bit Muxes := 1
- 2 Input 11 Bit Muxes := 2
- 3 Input 11 Bit Muxes := 2
- 2 Input 10 Bit Muxes := 10
- 8 Input 10 Bit Muxes := 8
- 4 Input 8 Bit Muxes := 1
- 2 Input 8 Bit Muxes := 9
- 3 Input 8 Bit Muxes := 1
- 2 Input 7 Bit Muxes := 13
- 8 Input 7 Bit Muxes := 8
- 2 Input 6 Bit Muxes := 4
- 4 Input 6 Bit Muxes := 1
- 2 Input 5 Bit Muxes := 8
- 4 Input 4 Bit Muxes := 3
- 2 Input 4 Bit Muxes := 25
- 5 Input 4 Bit Muxes := 1
- 6 Input 4 Bit Muxes := 1
- 3 Input 4 Bit Muxes := 1
- 9 Input 4 Bit Muxes := 8
- 2 Input 3 Bit Muxes := 59
- 3 Input 3 Bit Muxes := 9
- 8 Input 3 Bit Muxes := 4
- 6 Input 3 Bit Muxes := 2
- 7 Input 3 Bit Muxes := 12
- 4 Input 3 Bit Muxes := 1
- 2 Input 2 Bit Muxes := 61
- 8 Input 2 Bit Muxes := 2
- 3 Input 2 Bit Muxes := 14
- 4 Input 2 Bit Muxes := 3
- 6 Input 2 Bit Muxes := 2
- 5 Input 2 Bit Muxes := 1
- 13 Input 2 Bit Muxes := 4
- 2 Input 1 Bit Muxes := 462
- 3 Input 1 Bit Muxes := 49
- 4 Input 1 Bit Muxes := 34
- 7 Input 1 Bit Muxes := 18
- 8 Input 1 Bit Muxes := 49
- 11 Input 1 Bit Muxes := 5
- 9 Input 1 Bit Muxes := 80
- 13 Input 1 Bit Muxes := 2
- ---------------------------------------------------------------------------------
- Finished RTL Component Statistics
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Part Resource Summary
- ---------------------------------------------------------------------------------
- Part Resources:
- DSPs: 740 (col length:100)
- BRAMs: 730 (col length: RAMB18 100 RAMB36 50)
- ---------------------------------------------------------------------------------
- Finished Part Resource Summary
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Cross Boundary and Area Optimization
- ---------------------------------------------------------------------------------
- DSP Report: Generating DSP memory_to_writeBack_MUL_HH_reg, operation Mode is: (A*B)'.
- DSP Report: register memory_to_writeBack_MUL_HH_reg is absorbed into DSP memory_to_writeBack_MUL_HH_reg.
- DSP Report: register execute_to_memory_MUL_HH_reg is absorbed into DSP memory_to_writeBack_MUL_HH_reg.
- DSP Report: operator execute_MUL_HH is absorbed into DSP memory_to_writeBack_MUL_HH_reg.
- DSP Report: Generating DSP execute_to_memory_MUL_LH_reg, operation Mode is: (A*B)'.
- DSP Report: register execute_to_memory_MUL_LH_reg is absorbed into DSP execute_to_memory_MUL_LH_reg.
- DSP Report: operator execute_MUL_LH is absorbed into DSP execute_to_memory_MUL_LH_reg.
- DSP Report: Generating DSP execute_to_memory_MUL_HL_reg, operation Mode is: (A*B)'.
- DSP Report: register execute_to_memory_MUL_HL_reg is absorbed into DSP execute_to_memory_MUL_HL_reg.
- DSP Report: operator execute_MUL_HL is absorbed into DSP execute_to_memory_MUL_HL_reg.
- DSP Report: Generating DSP execute_to_memory_MUL_LL_reg, operation Mode is: (A*B)'.
- DSP Report: register execute_to_memory_MUL_LL_reg is absorbed into DSP execute_to_memory_MUL_LL_reg.
- DSP Report: operator execute_MUL_LL is absorbed into DSP execute_to_memory_MUL_LL_reg.
- INFO: [Synth 8-3971] The signal "VexRiscv/RegFilePlugin_regFile_reg" was recognized as a true dual port RAM template.
- INFO: [Synth 8-5784] Optimized 49 bits of RAM "storage_22_reg" due to constant propagation. Old ram width 230 bits, new ram width 181 bits.
- INFO: [Synth 8-5784] Optimized 48 bits of RAM "storage_23_reg" due to constant propagation. Old ram width 230 bits, new ram width 182 bits.
- INFO: [Synth 8-5784] Optimized 48 bits of RAM "storage_24_reg" due to constant propagation. Old ram width 230 bits, new ram width 182 bits.
- INFO: [Synth 8-5784] Optimized 47 bits of RAM "storage_25_reg" due to constant propagation. Old ram width 230 bits, new ram width 183 bits.
- INFO: [Synth 8-5784] Optimized 48 bits of RAM "storage_26_reg" due to constant propagation. Old ram width 230 bits, new ram width 182 bits.
- INFO: [Synth 8-5784] Optimized 47 bits of RAM "storage_27_reg" due to constant propagation. Old ram width 230 bits, new ram width 183 bits.
- INFO: [Synth 8-5784] Optimized 47 bits of RAM "storage_28_reg" due to constant propagation. Old ram width 230 bits, new ram width 183 bits.
- INFO: [Synth 8-5784] Optimized 46 bits of RAM "storage_29_reg" due to constant propagation. Old ram width 230 bits, new ram width 184 bits.
- INFO: [Synth 8-5784] Optimized 1 bits of RAM "storage_17_reg" due to constant propagation. Old ram width 130 bits, new ram width 129 bits.
- RAM Pipeline Warning: Read Address Register Found For RAM tag_mem_reg. We will not be able to pipeline it. This may degrade performance.
- INFO: [Synth 8-5784] Optimized 4 bits of RAM "tag_mem_reg" due to constant propagation. Old ram width 24 bits, new ram width 20 bits.
- RAM Pipeline Warning: Read Address Register Found For RAM tag_mem_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM mem_1_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM mem_1_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain0_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain0_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain1_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain1_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain2_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain2_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain3_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain3_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain4_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain4_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain5_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain5_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain6_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain6_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain7_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain7_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain8_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain8_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain9_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain9_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain10_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain10_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain11_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain11_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain12_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain12_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain13_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain13_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain14_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain14_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain15_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain15_reg. We will not be able to pipeline it. This may degrade performance.
- warning: Removed RAM storage_19_reg due to inactive write enable
- RAM Pipeline Warning: Read Address Register Found For RAM tag_mem_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM mem_1_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain0_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain1_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain2_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain3_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain4_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain5_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain6_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain7_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain8_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain9_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain10_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain11_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain12_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain13_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain14_reg. We will not be able to pipeline it. This may degrade performance.
- RAM Pipeline Warning: Read Address Register Found For RAM data_mem_grain15_reg. We will not be able to pipeline it. This may degrade performance.
- ---------------------------------------------------------------------------------
- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:58 ; elapsed = 00:01:00 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30513 ; free virtual = 60140
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- ROM: Preliminary Mapping Report
- +------------+------------+---------------+----------------+
- |Module Name | RTL Object | Depth x Width | Implemented As |
- +------------+------------+---------------+----------------+
- |sqrl_acorn | p_0_out | 64x8 | LUT |
- |sqrl_acorn | memdat_reg | 8192x32 | Block RAM |
- |sqrl_acorn | p_0_out | 64x8 | LUT |
- |sqrl_acorn | memdat_reg | 8192x32 | Block RAM |
- +------------+------------+---------------+----------------+
- Block RAM: Preliminary Mapping Report (see note below)
- +--------------------------------+-------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
- |Module Name | RTL Object | PORT A (Depth x Width) | W | R | PORT B (Depth x Width) | W | R | Ports driving FF | RAMB18 | RAMB36 |
- +--------------------------------+-------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
- |VexRiscv/IBusCachedPlugin_cache | banks_0_reg | 1 K x 32(READ_FIRST) | W | | 1 K x 32(WRITE_FIRST) | | R | Port A and B | 0 | 1 |
- |VexRiscv/IBusCachedPlugin_cache | ways_0_tags_reg | 128 x 22(READ_FIRST) | W | | 128 x 22(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_tags_reg | 128 x 22(READ_FIRST) | W | | 128 x 22(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol0_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol1_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol2_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol3_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |sqrl_acorn | storage_22_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_23_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_24_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_25_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_26_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_27_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_28_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_29_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_17_reg | 1 K x 130(READ_FIRST) | W | | 1 K x 130(WRITE_FIRST) | | R | Port A and B | 0 | 4 |
- |sqrl_acorn | storage_15_reg | 128 x 129(READ_FIRST) | W | | 128 x 129(WRITE_FIRST) | | R | Port A and B | 0 | 2 |
- |sqrl_acorn | tag_mem_reg | 512 x 24(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | mem_1_reg | 2 K x 32(WRITE_FIRST) | W | R | | | | Port A | 0 | 2 |
- |sqrl_acorn | data_mem_grain0_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain1_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain2_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain3_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain4_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain5_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain6_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain7_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain8_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain9_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain10_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain11_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain12_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain13_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain14_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain15_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- +--------------------------------+-------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
- Note: The table above is a preliminary report that shows the Block RAMs at the current stage of the synthesis flow. Some Block RAMs may be reimplemented as non Block RAM primitives later in the synthesis flow. Multiple instantiated Block RAMs are reported only once.
- Distributed RAM: Preliminary Mapping Report (see note below)
- +------------+----------------+-----------+----------------------+---------------------------+
- |Module Name | RTL Object | Inference | Size (Depth x Width) | Primitives |
- +------------+----------------+-----------+----------------------+---------------------------+
- |sqrl_acorn | storage_12_reg | Implied | 4 x 146 | RAM32M x 25 |
- |sqrl_acorn | storage_16_reg | Implied | 256 x 65 | RAM64X1D x 8 RAM64M x 84 |
- |sqrl_acorn | storage_20_reg | Implied | 8 x 3 | RAM32M x 1 |
- |sqrl_acorn | storage_21_reg | Implied | 8 x 21 | RAM32M x 4 |
- |sqrl_acorn | storage_14_reg | Implied | 256 x 65 | RAM64X1D x 8 RAM64M x 84 |
- |sqrl_acorn | storage_5_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_3_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_4_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_9_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_8_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_7_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_6_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_10_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_1_reg | Implied | 16 x 10 | RAM32M x 2 |
- |sqrl_acorn | storage_reg | Implied | 16 x 8 | RAM32M x 2 |
- |sqrl_acorn | storage_2_reg | Implied | 16 x 10 | RAM32M x 2 |
- |sqrl_acorn | storage_11_reg | Implied | 4 x 146 | RAM32M x 25 |
- +------------+----------------+-----------+----------------------+---------------------------+
- Note: The table above is a preliminary report that shows the Distributed RAMs at the current stage of the synthesis flow. Some Distributed RAMs may be reimplemented as non Distributed RAM primitives later in the synthesis flow. Multiple instantiated RAMs are reported only once.
- DSP: Preliminary Mapping Report (see note below)
- +------------+-------------+--------+--------+--------+--------+--------+------+------+------+------+-------+------+------+
- |Module Name | DSP Mapping | A Size | B Size | C Size | D Size | P Size | AREG | BREG | CREG | DREG | ADREG | MREG | PREG |
- +------------+-------------+--------+--------+--------+--------+--------+------+------+------+------+-------+------+------+
- |VexRiscv | (A*B)' | 17 | 17 | - | - | 34 | 0 | 0 | - | - | - | 1 | 1 |
- |VexRiscv | (A*B)' | 17 | 17 | - | - | 34 | 0 | 0 | - | - | - | 1 | 0 |
- |VexRiscv | (A*B)' | 17 | 17 | - | - | 34 | 0 | 0 | - | - | - | 1 | 0 |
- |VexRiscv | (A*B)' | 16 | 16 | - | - | 32 | 0 | 0 | - | - | - | 1 | 0 |
- +------------+-------------+--------+--------+--------+--------+--------+------+------+------+------+-------+------+------+
- Note: The table above is a preliminary report that shows the DSPs inferred at the current stage of the synthesis flow. Some DSP may be reimplemented as non DSP primitives later in the synthesis flow. Multiple instantiated DSPs are reported only once.
- ---------------------------------------------------------------------------------
- Finished ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Applying XDC Timing Constraints
- ---------------------------------------------------------------------------------
- crg_clkout0 in more then one group at line 385 of file /home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc
- ---------------------------------------------------------------------------------
- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:01 ; elapsed = 00:01:03 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30449 ; free virtual = 60075
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Timing Optimization
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Timing Optimization : Time (s): cpu = 00:01:06 ; elapsed = 00:01:08 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30424 ; free virtual = 60050
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- Block RAM: Final Mapping Report
- +--------------------------------+-------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
- |Module Name | RTL Object | PORT A (Depth x Width) | W | R | PORT B (Depth x Width) | W | R | Ports driving FF | RAMB18 | RAMB36 |
- +--------------------------------+-------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
- |VexRiscv/IBusCachedPlugin_cache | banks_0_reg | 1 K x 32(READ_FIRST) | W | | 1 K x 32(WRITE_FIRST) | | R | Port A and B | 0 | 1 |
- |VexRiscv/IBusCachedPlugin_cache | ways_0_tags_reg | 128 x 22(READ_FIRST) | W | | 128 x 22(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_tags_reg | 128 x 22(READ_FIRST) | W | | 128 x 22(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol0_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol1_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol2_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |VexRiscv/dataCache_1 | ways_0_data_symbol3_reg | 1 K x 8(READ_FIRST) | W | | 1 K x 8(WRITE_FIRST) | | R | Port A and B | 1 | 0 |
- |sqrl_acorn | storage_22_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_23_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_24_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_25_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_26_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_27_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_28_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_29_reg | 128 x 230(READ_FIRST) | W | | 128 x 230(WRITE_FIRST) | | R | Port A and B | 0 | 3 |
- |sqrl_acorn | storage_17_reg | 1 K x 130(READ_FIRST) | W | | 1 K x 130(WRITE_FIRST) | | R | Port A and B | 0 | 4 |
- |sqrl_acorn | storage_15_reg | 128 x 129(READ_FIRST) | W | | 128 x 129(WRITE_FIRST) | | R | Port A and B | 0 | 2 |
- |sqrl_acorn | tag_mem_reg | 512 x 24(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | mem_1_reg | 2 K x 32(WRITE_FIRST) | W | R | | | | Port A | 0 | 2 |
- |sqrl_acorn | data_mem_grain0_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain1_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain2_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain3_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain4_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain5_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain6_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain7_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain8_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain9_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain10_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain11_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain12_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain13_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain14_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- |sqrl_acorn | data_mem_grain15_reg | 512 x 8(WRITE_FIRST) | W | R | | | | Port A | 1 | 0 |
- +--------------------------------+-------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
- Distributed RAM: Final Mapping Report
- +------------+----------------+-----------+----------------------+---------------------------+
- |Module Name | RTL Object | Inference | Size (Depth x Width) | Primitives |
- +------------+----------------+-----------+----------------------+---------------------------+
- |sqrl_acorn | storage_12_reg | Implied | 4 x 146 | RAM32M x 25 |
- |sqrl_acorn | storage_16_reg | Implied | 256 x 65 | RAM64X1D x 8 RAM64M x 84 |
- |sqrl_acorn | storage_20_reg | Implied | 8 x 3 | RAM32M x 1 |
- |sqrl_acorn | storage_21_reg | Implied | 8 x 21 | RAM32M x 4 |
- |sqrl_acorn | storage_14_reg | Implied | 256 x 65 | RAM64X1D x 8 RAM64M x 84 |
- |sqrl_acorn | storage_5_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_3_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_4_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_9_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_8_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_7_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_6_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_10_reg | Implied | 8 x 24 | RAM32M x 4 |
- |sqrl_acorn | storage_1_reg | Implied | 16 x 10 | RAM32M x 2 |
- |sqrl_acorn | storage_reg | Implied | 16 x 8 | RAM32M x 2 |
- |sqrl_acorn | storage_2_reg | Implied | 16 x 10 | RAM32M x 2 |
- |sqrl_acorn | storage_11_reg | Implied | 4 x 146 | RAM32M x 25 |
- +------------+----------------+-----------+----------------------+---------------------------+
- ---------------------------------------------------------------------------------
- Finished ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Technology Mapping
- ---------------------------------------------------------------------------------
- INFO: [Synth 8-7052] The timing for the instance VexRiscv/IBusCachedPlugin_cache/banks_0_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance VexRiscv/IBusCachedPlugin_cache/ways_0_tags_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance VexRiscv/dataCache_1/ways_0_tags_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance VexRiscv/RegFilePlugin_regFile_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance VexRiscv/RegFilePlugin_regFile_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_22_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_22_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_22_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_23_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_23_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_23_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_24_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_24_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_24_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_25_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_25_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_25_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_26_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_26_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_26_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_27_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_27_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_27_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_28_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_28_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_28_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_29_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_29_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_29_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_17_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_17_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_17_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_17_reg_3 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_15_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance storage_15_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance tag_mem_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance tag_mem_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance mem_1_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance mem_1_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain0_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain1_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain2_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain3_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain4_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain5_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain6_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain7_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain8_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain9_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain10_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain11_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain12_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain13_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain14_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance data_mem_grain15_reg (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_3 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_4 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_5 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_6 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- INFO: [Synth 8-7052] The timing for the instance memdat_reg_7 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
- ---------------------------------------------------------------------------------
- Finished Technology Mapping : Time (s): cpu = 00:01:12 ; elapsed = 00:01:15 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30414 ; free virtual = 60041
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start IO Insertion
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Flattening Before IO Insertion
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Flattening Before IO Insertion
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Final Netlist Cleanup
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Final Netlist Cleanup
- ---------------------------------------------------------------------------------
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12375]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:12686]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:5726]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:14861]
- WARNING: [Synth 8-5396] Clock pin CLK has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:14860]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:4]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16168]
- WARNING: [Synth 8-5396] Clock pin CLK has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16167]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16168]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16167]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16166]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16165]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16164]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16163]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16162]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:16161]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv.v:4884]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- WARNING: [Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.v:8723]
- INFO: [Common 17-14] Message 'Synth 8-5396' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
- ---------------------------------------------------------------------------------
- Finished IO Insertion : Time (s): cpu = 00:01:15 ; elapsed = 00:01:18 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30413 ; free virtual = 60039
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Renaming Generated Instances
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Renaming Generated Instances : Time (s): cpu = 00:01:15 ; elapsed = 00:01:18 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30413 ; free virtual = 60039
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Rebuilding User Hierarchy
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:16 ; elapsed = 00:01:19 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30413 ; free virtual = 60039
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Renaming Generated Ports
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Renaming Generated Ports : Time (s): cpu = 00:01:16 ; elapsed = 00:01:19 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30413 ; free virtual = 60039
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Handling Custom Attributes
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Handling Custom Attributes : Time (s): cpu = 00:01:17 ; elapsed = 00:01:19 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30412 ; free virtual = 60038
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Renaming Generated Nets
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Finished Renaming Generated Nets : Time (s): cpu = 00:01:17 ; elapsed = 00:01:19 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30412 ; free virtual = 60038
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- Static Shift Register Report:
- +------------+------------------------------------------+--------+-------+--------------+--------------------+-------------------+--------+---------+
- |Module Name | RTL Name | Length | Width | Reset Signal | Pull out first Reg | Pull out last Reg | SRL16E | SRLC32E |
- +------------+------------------------------------------+--------+-------+--------------+--------------------+-------------------+--------+---------+
- |sqrl_acorn | subfragments_new_master_rdata_valid8_reg | 9 | 1 | YES | NO | YES | 1 | 0 |
- |sqrl_acorn | a7ddrphy_rddata_en_tappeddelayline7_reg | 8 | 1 | YES | NO | YES | 1 | 0 |
- +------------+------------------------------------------+--------+-------+--------------+--------------------+-------------------+--------+---------+
- ---------------------------------------------------------------------------------
- Finished ROM, RAM, DSP, Shift Register and Retiming Reporting
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- Start Writing Synthesis Report
- ---------------------------------------------------------------------------------
- Report BlackBoxes:
- +------+--------------+----------+
- | |BlackBox name |Instances |
- +------+--------------+----------+
- |1 |pcie_s7 | 1|
- +------+--------------+----------+
- Report Cell Usage:
- +------+------------+------+
- | |Cell |Count |
- +------+------------+------+
- |1 |pcie_s7 | 1|
- |2 |BUFG | 9|
- |3 |BUFGCTRL | 1|
- |4 |CARRY4 | 288|
- |5 |DSP48E1 | 4|
- |7 |IBUFDS_GTE2 | 1|
- |8 |ICAPE2 | 1|
- |9 |IDELAYCTRL | 1|
- |10 |IDELAYE2 | 16|
- |11 |ISERDESE2 | 16|
- |12 |LUT1 | 326|
- |13 |LUT2 | 1366|
- |14 |LUT3 | 2581|
- |15 |LUT4 | 1035|
- |16 |LUT5 | 1423|
- |17 |LUT6 | 2767|
- |18 |MMCME2_ADV | 1|
- |19 |MUXF7 | 175|
- |20 |MUXF8 | 2|
- |21 |OSERDESE2 | 46|
- |22 |PLLE2_ADV | 1|
- |23 |RAM32M | 91|
- |24 |RAM64M | 156|
- |25 |RAM64X1D | 8|
- |26 |RAMB18E1 | 25|
- |30 |RAMB36E1 | 41|
- |41 |SRL16E | 2|
- |42 |STARTUPE2 | 1|
- |43 |FD | 8|
- |44 |FDPE | 4|
- |45 |FDRE | 6000|
- |46 |FDSE | 233|
- |47 |IBUF | 12|
- |48 |IBUFDS | 1|
- |49 |IOBUF | 16|
- |50 |IOBUFDS | 2|
- |51 |OBUF | 41|
- |52 |OBUFDS | 1|
- +------+------------+------+
- ---------------------------------------------------------------------------------
- Finished Writing Synthesis Report : Time (s): cpu = 00:01:17 ; elapsed = 00:01:19 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30412 ; free virtual = 60038
- ---------------------------------------------------------------------------------
- Synthesis finished with 0 errors, 0 critical warnings and 6137 warnings.
- Synthesis Optimization Runtime : Time (s): cpu = 00:01:13 ; elapsed = 00:01:16 . Memory (MB): peak = 3028.438 ; gain = 107.652 ; free physical = 30463 ; free virtual = 60089
- Synthesis Optimization Complete : Time (s): cpu = 00:01:17 ; elapsed = 00:01:19 . Memory (MB): peak = 3028.438 ; gain = 239.418 ; free physical = 30463 ; free virtual = 60089
- INFO: [Project 1-571] Translating synthesized netlist
- INFO: [Project 1-454] Reading design checkpoint '/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7.dcp' for cell 'pcie_support/pcie_i'
- Netlist sorting complete. Time (s): cpu = 00:00:00.16 ; elapsed = 00:00:00.16 . Memory (MB): peak = 3028.438 ; gain = 0.000 ; free physical = 30543 ; free virtual = 60170
- WARNING: [Netlist 29-345] The value of SIM_DEVICE on instance 'pcie_support/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1' of type 'BUFGCTRL' is 'ULTRASCALE'; it is being changed to match the current FPGA architecture, '7SERIES'. For functional simulation to match hardware behavior, the value of SIM_DEVICE should be changed in the source netlist.
- INFO: [Netlist 29-17] Analyzing 891 Unisim elements for replacement
- INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
- INFO: [Project 1-479] Netlist was created with Vivado 2020.2
- INFO: [Project 1-570] Preparing netlist for logic optimization
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc]
- INFO: [Timing 38-35] Done setting XDC timing constraints. [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:385]
- INFO: [Timing 38-2] Deriving generated clocks [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:385]
- WARNING: [Vivado 12-3521] Clock specified in more than one group: crg_clkout0 [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:385]
- WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -include_generated_clocks -of [get_nets pcie_clk]'. [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:387]
- Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
- INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:387]
- CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group [get_clocks -include_generated_clocks -of [get_nets pcie_clk]]'. [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:387]
- Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
- CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group '. [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:387]
- Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
- CRITICAL WARNING: [Vivado 12-5201] set_clock_groups: cannot set the clock group when only one non-empty group remains. [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc:387]
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/build/sqrl_acorn/gateware/sqrl_acorn.xdc]
- Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc] for cell 'pcie_support/pcie_i/inst'
- CRITICAL WARNING: [Vivado 12-2285] Cannot set LOC property of instance 'pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i'... pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i Instance pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i can not be placed in GTPE2_CHANNEL of site GTPE2_CHANNEL_X0Y7 because the bel is occupied by pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[3].gt_wrapper_i/gtp_channel.gtpe2_channel_i. This could be caused by bel constraint conflict [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc:94]
- Resolution: When using BEL constraints, ensure the BEL constraints are defined before the LOC constraints to avoid conflicts at a given site.
- CRITICAL WARNING: [Vivado 12-2285] Cannot set LOC property of instance 'pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i'... pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i Instance pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i can not be placed in GTPE2_CHANNEL of site GTPE2_CHANNEL_X0Y6 because the bel is occupied by pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i. This could be caused by bel constraint conflict [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc:96]
- Resolution: When using BEL constraints, ensure the BEL constraints are defined before the LOC constraints to avoid conflicts at a given site.
- CRITICAL WARNING: [Vivado 12-2285] Cannot set LOC property of instance 'pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[3].gt_wrapper_i/gtp_channel.gtpe2_channel_i'... pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[3].gt_wrapper_i/gtp_channel.gtpe2_channel_i Instance pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[3].gt_wrapper_i/gtp_channel.gtpe2_channel_i can not be placed in GTPE2_CHANNEL of site GTPE2_CHANNEL_X0Y4 because the bel is occupied by pcie_support/pcie_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i. This could be caused by bel constraint conflict [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc:100]
- Resolution: When using BEL constraints, ensure the BEL constraints are defined before the LOC constraints to avoid conflicts at a given site.
- Finished Parsing XDC File [/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/source/pcie-PCIE_X0Y0.xdc] for cell 'pcie_support/pcie_i/inst'
- INFO: [Project 1-538] Using original IP XDC constraints instead of the XDC constraints in dcp '/home/tpwatson/nitefury_nonsense/litex/litepcie/litepcie/phy/xilinx_s7_gen2_x4/pcie_s7.dcp'
- INFO: [Project 1-1715] 1 XPM XDC files have been applied to the design.
- INFO: [Opt 31-138] Pushed 3 inverter(s) to 34 load pin(s).
- Netlist sorting complete. Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3109.254 ; gain = 0.000 ; free physical = 30489 ; free virtual = 60115
- INFO: [Project 1-111] Unisim Transformation Summary:
- A total of 282 instances were transformed.
- FD => FDRE: 8 instances
- IOBUF => IOBUF (IBUF, OBUFT): 16 instances
- IOBUFDS => IOBUFDS (IBUFDS, INV, OBUFTDS(x2)): 2 instances
- OBUFDS => OBUFDS_DUAL_BUF (INV, OBUFDS(x2)): 1 instance
- RAM32M => RAM32M (RAMD32(x6), RAMS32(x2)): 91 instances
- RAM64M => RAM64M (RAMD64E(x4)): 156 instances
- RAM64X1D => RAM64X1D (RAMD64E(x2)): 8 instances
- INFO: [Common 17-83] Releasing license: Synthesis
- 181 Infos, 319 Warnings, 6 Critical Warnings and 0 Errors encountered.
- synth_design completed successfully
- synth_design: Time (s): cpu = 00:01:29 ; elapsed = 00:01:26 . Memory (MB): peak = 3109.254 ; gain = 320.234 ; free physical = 30658 ; free virtual = 60285
- # report_timing_summary -file sqrl_acorn_timing_synth.rpt
- INFO: [Timing 38-35] Done setting XDC timing constraints.
- INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -2, Delay Type: min_max.
- INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 8 CPUs
- # report_utilization -hierarchical -file sqrl_acorn_utilization_hierarchical_synth.rpt
- # report_utilization -file sqrl_acorn_utilization_synth.rpt
- # opt_design -directive default
- Command: opt_design -directive default
- INFO: [Vivado_Tcl 4-136] Directive used for opt_design is: default
- Attempting to get a license for feature 'Implementation' and/or device 'xc7a200t'
- INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a200t'
- Running DRC as a precondition to command opt_design
- Starting DRC Task
- INFO: [DRC 23-27] Running DRC with 8 threads
- INFO: [Project 1-461] DRC finished with 0 Errors
- INFO: [Project 1-462] Please refer to the DRC report (report_drc) for more information.
- Time (s): cpu = 00:00:02 ; elapsed = 00:00:00.92 . Memory (MB): peak = 3180.312 ; gain = 64.031 ; free physical = 30588 ; free virtual = 60215
- Starting Cache Timing Information Task
- Ending Cache Timing Information Task | Checksum: 1bf84d2ab
- Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30589 ; free virtual = 60215
- Starting Logic Optimization Task
- Phase 1 Retarget
- INFO: [Opt 31-138] Pushed 4 inverter(s) to 21 load pin(s).
- INFO: [Opt 31-49] Retargeted 0 cell(s).
- Phase 1 Retarget | Checksum: e80ea8f3
- Time (s): cpu = 00:00:02 ; elapsed = 00:00:00.78 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60156
- INFO: [Opt 31-389] Phase Retarget created 10 cells and removed 106 cells
- INFO: [Opt 31-1021] In phase Retarget, 8 netlist objects are constrained preventing optimization. Please run opt_design with -debug_log to get more detail.
- Phase 2 Constant propagation
- INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
- Phase 2 Constant propagation | Checksum: 18e01a1e0
- Time (s): cpu = 00:00:02 ; elapsed = 00:00:00.96 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60156
- INFO: [Opt 31-389] Phase Constant propagation created 53 cells and removed 90 cells
- Phase 3 Sweep
- Phase 3 Sweep | Checksum: 18a5999d1
- Time (s): cpu = 00:00:03 ; elapsed = 00:00:02 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60155
- INFO: [Opt 31-389] Phase Sweep created 0 cells and removed 1628 cells
- INFO: [Opt 31-1021] In phase Sweep, 309 netlist objects are constrained preventing optimization. Please run opt_design with -debug_log to get more detail.
- Phase 4 BUFG optimization
- Phase 4 BUFG optimization | Checksum: 19ab9ebec
- Time (s): cpu = 00:00:03 ; elapsed = 00:00:02 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60155
- INFO: [Opt 31-662] Phase BUFG optimization created 0 cells of which 0 are BUFGs and removed 0 cells.
- INFO: [Opt 31-1021] In phase BUFG optimization, 3 netlist objects are constrained preventing optimization. Please run opt_design with -debug_log to get more detail.
- Phase 5 Shift Register Optimization
- INFO: [Opt 31-1064] SRL Remap converted 0 SRLs to 0 registers and converted 0 registers of register chains to 0 SRLs
- Phase 5 Shift Register Optimization | Checksum: 19ab9ebec
- Time (s): cpu = 00:00:03 ; elapsed = 00:00:02 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60155
- INFO: [Opt 31-389] Phase Shift Register Optimization created 0 cells and removed 0 cells
- Phase 6 Post Processing Netlist
- Phase 6 Post Processing Netlist | Checksum: 18a5999d1
- Time (s): cpu = 00:00:03 ; elapsed = 00:00:02 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60155
- INFO: [Opt 31-389] Phase Post Processing Netlist created 0 cells and removed 0 cells
- INFO: [Opt 31-1021] In phase Post Processing Netlist, 3 netlist objects are constrained preventing optimization. Please run opt_design with -debug_log to get more detail.
- Opt_design Change Summary
- =========================
- -------------------------------------------------------------------------------------------------------------------------
- | Phase | #Cells created | #Cells Removed | #Constrained objects preventing optimizations |
- -------------------------------------------------------------------------------------------------------------------------
- | Retarget | 10 | 106 | 8 |
- | Constant propagation | 53 | 90 | 0 |
- | Sweep | 0 | 1628 | 309 |
- | BUFG optimization | 0 | 0 | 3 |
- | Shift Register Optimization | 0 | 0 | 0 |
- | Post Processing Netlist | 0 | 0 | 3 |
- -------------------------------------------------------------------------------------------------------------------------
- Starting Connectivity Check Task
- Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60155
- Ending Logic Optimization Task | Checksum: 1ea0aa2ea
- Time (s): cpu = 00:00:03 ; elapsed = 00:00:02 . Memory (MB): peak = 3180.312 ; gain = 0.000 ; free physical = 30529 ; free virtual = 60155
- Starting Power Optimization Task
- INFO: [Pwropt 34-132] Skipping clock gating for clocks with a period < 2.00 ns.
- INFO: [Power 33-23] Power model is not available for STARTUPE2
- INFO: [Timing 38-35] Done setting XDC timing constraints.
- Running Vector-less Activity Propagation...
- Finished Running Vector-less Activity Propagation
- INFO: [Pwropt 34-9] Applying IDT optimizations ...
- INFO: [Pwropt 34-10] Applying ODC optimizations ...
- Starting PowerOpt Patch Enables Task
- INFO: [Pwropt 34-162] WRITE_MODE attribute of 0 BRAM(s) out of a total of 74 has been updated to save power. Run report_power_opt to get a complete listing of the BRAMs updated.
- INFO: [Pwropt 34-201] Structural ODC has moved 0 WE to EN ports
- Number of BRAM Ports augmented: 4 newly gated: 1 Total Ports: 148
- Ending PowerOpt Patch Enables Task | Checksum: 217ebc239
- Time (s): cpu = 00:00:00.23 ; elapsed = 00:00:00.23 . Memory (MB): peak = 3467.227 ; gain = 0.000 ; free physical = 30638 ; free virtual = 60264
- Ending Power Optimization Task | Checksum: 217ebc239
- Time (s): cpu = 00:00:10 ; elapsed = 00:00:06 . Memory (MB): peak = 3467.227 ; gain = 286.914 ; free physical = 30649 ; free virtual = 60275
- Starting Final Cleanup Task
- Ending Final Cleanup Task | Checksum: 217ebc239
- Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3467.227 ; gain = 0.000 ; free physical = 30649 ; free virtual = 60275
- Starting Netlist Obfuscation Task
- Netlist sorting complete. Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 3467.227 ; gain = 0.000 ; free physical = 30649 ; free virtual = 60275
- Ending Netlist Obfuscation Task | Checksum: 21b233e88
- Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 3467.227 ; gain = 0.000 ; free physical = 30649 ; free virtual = 60275
- INFO: [Common 17-83] Releasing license: Implementation
- 27 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
- opt_design completed successfully
- opt_design: Time (s): cpu = 00:00:17 ; elapsed = 00:00:11 . Memory (MB): peak = 3467.227 ; gain = 350.945 ; free physical = 30649 ; free virtual = 60275
- INFO: [Timing 38-35] Done setting XDC timing constraints.
- WARNING: [Vivado 12-627] No clocks matched 'main_crg_clkout0'.
- INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks.
- # set_clock_groups -group [get_clocks main_crg_clkout0] -group [get_clocks userclk2] -asynchronous
- CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group [get_clocks main_crg_clkout0]'.
- Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
- CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group '.
- Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
- ERROR: [Vivado 12-5201] set_clock_groups: cannot set the clock group when only one non-empty group remains.
- INFO: [Common 17-206] Exiting Vivado at Tue Aug 24 15:50:31 2021...
- Traceback (most recent call last):
- File "/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/./sqrl_acorn.py", line 209, in <module>
- main()
- File "/home/tpwatson/nitefury_nonsense/litex/litex-boards/litex_boards/targets/./sqrl_acorn.py", line 195, in main
- builder.build(run=args.build)
- File "/home/tpwatson/nitefury_nonsense/litex/litex/litex/soc/integration/builder.py", line 310, in build
- vns = self.soc.build(build_dir=self.gateware_dir, **kwargs)
- File "/home/tpwatson/nitefury_nonsense/litex/litex/litex/soc/integration/soc.py", line 1127, in build
- return self.platform.build(self, *args, **kwargs)
- File "/home/tpwatson/nitefury_nonsense/litex/litex/litex/build/xilinx/platform.py", line 55, in build
- return self.toolchain.build(self, *args, **kwargs)
- File "/home/tpwatson/nitefury_nonsense/litex/litex/litex/build/xilinx/vivado.py", line 355, in build
- _run_script(script)
- File "/home/tpwatson/nitefury_nonsense/litex/litex/litex/build/xilinx/vivado.py", line 101, in _run_script
- raise OSError("Error occured during Vivado's script execution.")
- OSError: Error occured during Vivado's script execution.
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