API tools faq
paste
Advertisement
Guest User

bcm2711-rpi-cm4-devicetree.source

a guest
Jul 17th, 2024
52
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 66.50 KB | None | 0 0
raw download clone embed print report
  1. /dts-v1/;
  2.  
  3. /memreserve/ 0x0000000000000000 0x0000000000001000;
  4. / {
  5. compatible = "raspberrypi,4-compute-module\0brcm,bcm2711";
  6. model = "Raspberry Pi Compute Module 4";
  7. #address-cells = <0x02>;
  8. #size-cells = <0x01>;
  9. interrupt-parent = <0x01>;
  10.  
  11. aliases {
  12. serial0 = "/soc/serial@7e215040";
  13. serial1 = "/soc/serial@7e201000";
  14. emmc2bus = "/emmc2bus";
  15. ethernet0 = "/scb/ethernet@7d580000";
  16. pcie0 = "/scb/pcie@7d500000";
  17. blconfig = "/reserved-memory/nvram@0";
  18. blpubkey = "/reserved-memory/nvram@1";
  19. bluetooth = "/soc/serial@7e201000/bluetooth";
  20. aux = "/soc/aux@7e215000";
  21. sound = "/soc/sound";
  22. soc = "/soc";
  23. dma = "/soc/dma-controller@7e007000";
  24. watchdog = "/soc/watchdog@7e100000";
  25. random = "/soc/rng@7e104000";
  26. mailbox = "/soc/mailbox@7e00b880";
  27. gpio = "/soc/gpio@7e200000";
  28. uart0 = "/soc/serial@7e201000";
  29. uart1 = "/soc/serial@7e215040";
  30. sdhost = "/soc/mmc@7e202000";
  31. mmc = "/soc/mmc@7e300000";
  32. mmc1 = "/soc/mmcnr@7e300000";
  33. mmc0 = "/emmc2bus/mmc@7e340000";
  34. i2s = "/soc/i2s@7e203000";
  35. i2c0 = "/soc/i2c0mux/i2c@0";
  36. i2c1 = "/soc/i2c@7e804000";
  37. i2c10 = "/soc/i2c0mux/i2c@1";
  38. i2c = "/soc/i2c@7e804000";
  39. spi0 = "/soc/spi@7e204000";
  40. spi1 = "/soc/spi@7e215080";
  41. spi2 = "/soc/spi@7e2150c0";
  42. usb = "/soc/usb@7e980000";
  43. leds = "/leds";
  44. fb = "/soc/fb";
  45. thermal = "/soc/avs-monitor@7d5d2000/thermal";
  46. axiperf = "/soc/axiperf";
  47. uart2 = "/soc/serial@7e201400";
  48. uart3 = "/soc/serial@7e201600";
  49. uart4 = "/soc/serial@7e201800";
  50. uart5 = "/soc/serial@7e201a00";
  51. serial2 = "/soc/serial@7e201400";
  52. serial3 = "/soc/serial@7e201600";
  53. serial4 = "/soc/serial@7e201800";
  54. serial5 = "/soc/serial@7e201a00";
  55. mmc2 = "/soc/mmc@7e202000";
  56. i2c3 = "/soc/i2c@7e205600";
  57. i2c4 = "/soc/i2c@7e205800";
  58. i2c5 = "/soc/i2c@7e205a00";
  59. i2c6 = "/soc/i2c@7e205c00";
  60. i2c20 = "/soc/i2c@7ef04500";
  61. i2c21 = "/soc/i2c@7ef09500";
  62. spi3 = "/soc/spi@7e204600";
  63. spi4 = "/soc/spi@7e204800";
  64. spi5 = "/soc/spi@7e204a00";
  65. spi6 = "/soc/spi@7e204c00";
  66. phandle = <0x4e>;
  67. };
  68.  
  69. chosen {
  70. stdout-path = "serial0:115200n8";
  71. bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0";
  72. phandle = <0x51>;
  73. };
  74.  
  75. reserved-memory {
  76. #address-cells = <0x02>;
  77. #size-cells = <0x01>;
  78. ranges;
  79. phandle = <0x5c>;
  80.  
  81. linux,cma {
  82. compatible = "shared-dma-pool";
  83. size = <0x4000000>;
  84. reusable;
  85. linux,cma-default;
  86. alloc-ranges = <0x00 0x00 0x30000000>;
  87. phandle = <0x5d>;
  88. };
  89.  
  90. nvram@0 {
  91. compatible = "raspberrypi,bootloader-config\0nvmem-rmem";
  92. #address-cells = <0x01>;
  93. #size-cells = <0x01>;
  94. reg = <0x00 0x00 0x00>;
  95. no-map;
  96. status = "disabled";
  97. phandle = <0x5e>;
  98. };
  99.  
  100. nvram@1 {
  101. compatible = "raspberrypi,bootloader-public-key\0nvmem-rmem";
  102. #address-cells = <0x01>;
  103. #size-cells = <0x01>;
  104. reg = <0x00 0x00 0x00>;
  105. no-map;
  106. status = "disabled";
  107. phandle = <0x5f>;
  108. };
  109. };
  110.  
  111. thermal-zones {
  112.  
  113. cpu-thermal {
  114. polling-delay-passive = <0x00>;
  115. polling-delay = <0x3e8>;
  116. coefficients = <0xfffffe19 0x641b8>;
  117. thermal-sensors = <0x02>;
  118. phandle = <0x60>;
  119.  
  120. trips {
  121. phandle = <0x61>;
  122.  
  123. cpu-crit {
  124. temperature = <0x1adb0>;
  125. hysteresis = <0x00>;
  126. type = "critical";
  127. };
  128. };
  129.  
  130. cooling-maps {
  131. phandle = <0x62>;
  132. };
  133. };
  134. };
  135.  
  136. soc {
  137. compatible = "simple-bus";
  138. #address-cells = <0x01>;
  139. #size-cells = <0x01>;
  140. ranges = <0x7e000000 0x00 0xfe000000 0x1800000 0x7c000000 0x00 0xfc000000 0x2000000 0x40000000 0x00 0xff800000 0x800000>;
  141. dma-ranges = <0xc0000000 0x00 0x00 0x40000000 0x7c000000 0x00 0xfc000000 0x3800000>;
  142. phandle = <0x63>;
  143.  
  144. timer@7e003000 {
  145. compatible = "brcm,bcm2835-system-timer";
  146. reg = <0x7e003000 0x1000>;
  147. interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>;
  148. clock-frequency = <0xf4240>;
  149. status = "disabled";
  150. phandle = <0x64>;
  151. };
  152.  
  153. txp@7e004000 {
  154. compatible = "brcm,bcm2835-txp";
  155. reg = <0x7e004000 0x20>;
  156. interrupts = <0x00 0x4b 0x04>;
  157. status = "disabled";
  158. phandle = <0x65>;
  159. };
  160.  
  161. cprman@7e101000 {
  162. compatible = "brcm,bcm2711-cprman";
  163. #clock-cells = <0x01>;
  164. reg = <0x7e101000 0x2000>;
  165. clocks = <0x03 0x04 0x00 0x04 0x01 0x04 0x02 0x05 0x00 0x05 0x01 0x05 0x02>;
  166. firmware = <0x06>;
  167. phandle = <0x08>;
  168. };
  169.  
  170. mailbox@7e00b880 {
  171. compatible = "brcm,bcm2835-mbox";
  172. reg = <0x7e00b880 0x40>;
  173. interrupts = <0x00 0x21 0x04>;
  174. #mbox-cells = <0x00>;
  175. phandle = <0x35>;
  176. };
  177.  
  178. gpio@7e200000 {
  179. compatible = "brcm,bcm2711-gpio";
  180. reg = <0x7e200000 0xb4>;
  181. interrupts = <0x00 0x71 0x04 0x00 0x72 0x04>;
  182. gpio-controller;
  183. #gpio-cells = <0x02>;
  184. interrupt-controller;
  185. #interrupt-cells = <0x02>;
  186. gpio-ranges = <0x07 0x00 0x00 0x3a>;
  187. gpio-line-names = "ID_SDA\0ID_SCL\0GPIO2\0GPIO3\0GPIO4\0GPIO5\0GPIO6\0GPIO7\0GPIO8\0GPIO9\0GPIO10\0GPIO11\0GPIO12\0GPIO13\0GPIO14\0GPIO15\0GPIO16\0GPIO17\0GPIO18\0GPIO19\0GPIO20\0GPIO21\0GPIO22\0GPIO23\0GPIO24\0GPIO25\0GPIO26\0GPIO27\0RGMII_MDIO\0RGMIO_MDC\0CTS0\0RTS0\0TXD0\0RXD0\0SD1_CLK\0SD1_CMD\0SD1_DATA0\0SD1_DATA1\0SD1_DATA2\0SD1_DATA3\0PWM0_MISO\0PWM1_MOSI\0STATUS_LED_G_CLK\0SPIFLASH_CE_N\0SDA0\0SCL0\0RGMII_RXCLK\0RGMII_RXCTL\0RGMII_RXD0\0RGMII_RXD1\0RGMII_RXD2\0RGMII_RXD3\0RGMII_TXCLK\0RGMII_TXCTL\0RGMII_TXD0\0RGMII_TXD1\0RGMII_TXD2\0RGMII_TXD3";
  188. phandle = <0x07>;
  189.  
  190. dpi-gpio0 {
  191. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
  192. brcm,function = <0x06>;
  193. phandle = <0x66>;
  194. };
  195.  
  196. emmc-gpio22 {
  197. brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>;
  198. brcm,function = <0x07>;
  199. phandle = <0x67>;
  200. };
  201.  
  202. emmc-gpio34 {
  203. brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>;
  204. brcm,function = <0x07>;
  205. brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>;
  206. phandle = <0x68>;
  207. };
  208.  
  209. emmc-gpio48 {
  210. brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>;
  211. brcm,function = <0x07>;
  212. phandle = <0x13>;
  213. };
  214.  
  215. gpclk0-gpio4 {
  216. brcm,pins = <0x04>;
  217. brcm,function = <0x04>;
  218. phandle = <0x69>;
  219. };
  220.  
  221. gpclk1-gpio5 {
  222. brcm,pins = <0x05>;
  223. brcm,function = <0x04>;
  224. phandle = <0x6a>;
  225. };
  226.  
  227. gpclk1-gpio42 {
  228. brcm,pins = <0x2a>;
  229. brcm,function = <0x04>;
  230. phandle = <0x6b>;
  231. };
  232.  
  233. gpclk1-gpio44 {
  234. brcm,pins = <0x2c>;
  235. brcm,function = <0x04>;
  236. phandle = <0x6c>;
  237. };
  238.  
  239. gpclk2-gpio6 {
  240. brcm,pins = <0x06>;
  241. brcm,function = <0x04>;
  242. phandle = <0x6d>;
  243. };
  244.  
  245. gpclk2-gpio43 {
  246. brcm,pins = <0x2b>;
  247. brcm,function = <0x04>;
  248. brcm,pull = <0x00>;
  249. phandle = <0x6e>;
  250. };
  251.  
  252. i2c0if-gpio0 {
  253. brcm,pins = <0x00 0x01>;
  254. brcm,function = <0x04>;
  255. phandle = <0x33>;
  256. };
  257.  
  258. i2c0if-gpio28 {
  259. brcm,pins = <0x1c 0x1d>;
  260. brcm,function = <0x04>;
  261. phandle = <0x6f>;
  262. };
  263.  
  264. i2c0if-gpio44 {
  265. brcm,pins = <0x2c 0x2d>;
  266. brcm,function = <0x05>;
  267. phandle = <0x34>;
  268. };
  269.  
  270. i2c1-gpio2 {
  271. brcm,pins = <0x02 0x03>;
  272. brcm,function = <0x04>;
  273. phandle = <0x70>;
  274. };
  275.  
  276. i2c1-gpio44 {
  277. brcm,pins = <0x2c 0x2d>;
  278. brcm,function = <0x06>;
  279. phandle = <0x71>;
  280. };
  281.  
  282. jtag-gpio22 {
  283. brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>;
  284. brcm,function = <0x03>;
  285. phandle = <0x72>;
  286. };
  287.  
  288. pcm-gpio18 {
  289. brcm,pins = <0x12 0x13 0x14 0x15>;
  290. brcm,function = <0x04>;
  291. phandle = <0x73>;
  292. };
  293.  
  294. pcm-gpio28 {
  295. brcm,pins = <0x1c 0x1d 0x1e 0x1f>;
  296. brcm,function = <0x06>;
  297. phandle = <0x74>;
  298. };
  299.  
  300. sdhost-gpio48 {
  301. brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>;
  302. brcm,function = <0x04>;
  303. phandle = <0x75>;
  304. };
  305.  
  306. spi0-gpio7 {
  307. brcm,pins = <0x07 0x08 0x09 0x0a 0x0b>;
  308. brcm,function = <0x04>;
  309. phandle = <0x76>;
  310. };
  311.  
  312. spi0-gpio35 {
  313. brcm,pins = <0x23 0x24 0x25 0x26 0x27>;
  314. brcm,function = <0x04>;
  315. phandle = <0x77>;
  316. };
  317.  
  318. spi1-gpio16 {
  319. brcm,pins = <0x10 0x11 0x12 0x13 0x14 0x15>;
  320. brcm,function = <0x03>;
  321. phandle = <0x78>;
  322. };
  323.  
  324. spi2-gpio40 {
  325. brcm,pins = <0x28 0x29 0x2a 0x2b 0x2c 0x2d>;
  326. brcm,function = <0x03>;
  327. phandle = <0x79>;
  328. };
  329.  
  330. uart0-gpio14 {
  331. brcm,pins = <0x0e 0x0f>;
  332. brcm,function = <0x04>;
  333. phandle = <0x7a>;
  334. };
  335.  
  336. uart0-ctsrts-gpio16 {
  337. brcm,pins = <0x10 0x11>;
  338. brcm,function = <0x07>;
  339. phandle = <0x7b>;
  340. };
  341.  
  342. uart0-ctsrts-gpio30 {
  343. brcm,pins = <0x1e 0x1f>;
  344. brcm,function = <0x07>;
  345. brcm,pull = <0x02 0x00>;
  346. phandle = <0x7c>;
  347. };
  348.  
  349. uart0-gpio32 {
  350. brcm,pins = <0x20 0x21>;
  351. brcm,function = <0x07>;
  352. brcm,pull = <0x00 0x02>;
  353. phandle = <0x7d>;
  354. };
  355.  
  356. uart0-gpio36 {
  357. brcm,pins = <0x24 0x25>;
  358. brcm,function = <0x06>;
  359. phandle = <0x7e>;
  360. };
  361.  
  362. uart0-ctsrts-gpio38 {
  363. brcm,pins = <0x26 0x27>;
  364. brcm,function = <0x06>;
  365. phandle = <0x7f>;
  366. };
  367.  
  368. uart1-gpio14 {
  369. brcm,pins = <0x0e 0x0f>;
  370. brcm,function = <0x02>;
  371. phandle = <0x80>;
  372. };
  373.  
  374. uart1-ctsrts-gpio16 {
  375. brcm,pins = <0x10 0x11>;
  376. brcm,function = <0x02>;
  377. phandle = <0x81>;
  378. };
  379.  
  380. uart1-gpio32 {
  381. brcm,pins = <0x20 0x21>;
  382. brcm,function = <0x02>;
  383. phandle = <0x82>;
  384. };
  385.  
  386. uart1-ctsrts-gpio30 {
  387. brcm,pins = <0x1e 0x1f>;
  388. brcm,function = <0x02>;
  389. phandle = <0x83>;
  390. };
  391.  
  392. uart1-gpio40 {
  393. brcm,pins = <0x28 0x29>;
  394. brcm,function = <0x02>;
  395. phandle = <0x84>;
  396. };
  397.  
  398. uart1-ctsrts-gpio42 {
  399. brcm,pins = <0x2a 0x2b>;
  400. brcm,function = <0x02>;
  401. phandle = <0x85>;
  402. };
  403.  
  404. gpclk0-gpio49 {
  405. phandle = <0x86>;
  406.  
  407. pin-gpclk {
  408. pins = "gpio49";
  409. function = "alt1";
  410. bias-disable;
  411. };
  412. };
  413.  
  414. gpclk1-gpio50 {
  415. phandle = <0x87>;
  416.  
  417. pin-gpclk {
  418. pins = "gpio50";
  419. function = "alt1";
  420. bias-disable;
  421. };
  422. };
  423.  
  424. gpclk2-gpio51 {
  425. phandle = <0x88>;
  426.  
  427. pin-gpclk {
  428. pins = "gpio51";
  429. function = "alt1";
  430. bias-disable;
  431. };
  432. };
  433.  
  434. i2c0if-gpio46 {
  435. phandle = <0x89>;
  436.  
  437. pin-sda {
  438. function = "alt0";
  439. pins = "gpio46";
  440. bias-pull-up;
  441. };
  442.  
  443. pin-scl {
  444. function = "alt0";
  445. pins = "gpio47";
  446. bias-disable;
  447. };
  448. };
  449.  
  450. i2c1-gpio46 {
  451. phandle = <0x8a>;
  452.  
  453. pin-sda {
  454. function = "alt1";
  455. pins = "gpio46";
  456. bias-pull-up;
  457. };
  458.  
  459. pin-scl {
  460. function = "alt1";
  461. pins = "gpio47";
  462. bias-disable;
  463. };
  464. };
  465.  
  466. i2c3-gpio2 {
  467. phandle = <0x8b>;
  468.  
  469. pin-sda {
  470. function = "alt5";
  471. pins = "gpio2";
  472. bias-pull-up;
  473. };
  474.  
  475. pin-scl {
  476. function = "alt5";
  477. pins = "gpio3";
  478. bias-disable;
  479. };
  480. };
  481.  
  482. i2c3-gpio4 {
  483. phandle = <0x8c>;
  484.  
  485. pin-sda {
  486. function = "alt5";
  487. pins = "gpio4";
  488. bias-pull-up;
  489. };
  490.  
  491. pin-scl {
  492. function = "alt5";
  493. pins = "gpio5";
  494. bias-disable;
  495. };
  496. };
  497.  
  498. i2c4-gpio6 {
  499. phandle = <0x8d>;
  500.  
  501. pin-sda {
  502. function = "alt5";
  503. pins = "gpio6";
  504. bias-pull-up;
  505. };
  506.  
  507. pin-scl {
  508. function = "alt5";
  509. pins = "gpio7";
  510. bias-disable;
  511. };
  512. };
  513.  
  514. i2c4-gpio8 {
  515. phandle = <0x8e>;
  516.  
  517. pin-sda {
  518. function = "alt5";
  519. pins = "gpio8";
  520. bias-pull-up;
  521. };
  522.  
  523. pin-scl {
  524. function = "alt5";
  525. pins = "gpio9";
  526. bias-disable;
  527. };
  528. };
  529.  
  530. i2c5-gpio10 {
  531. phandle = <0x8f>;
  532.  
  533. pin-sda {
  534. function = "alt5";
  535. pins = "gpio10";
  536. bias-pull-up;
  537. };
  538.  
  539. pin-scl {
  540. function = "alt5";
  541. pins = "gpio11";
  542. bias-disable;
  543. };
  544. };
  545.  
  546. i2c5-gpio12 {
  547. phandle = <0x90>;
  548.  
  549. pin-sda {
  550. function = "alt5";
  551. pins = "gpio12";
  552. bias-pull-up;
  553. };
  554.  
  555. pin-scl {
  556. function = "alt5";
  557. pins = "gpio13";
  558. bias-disable;
  559. };
  560. };
  561.  
  562. i2c6-gpio0 {
  563. phandle = <0x91>;
  564.  
  565. pin-sda {
  566. function = "alt5";
  567. pins = "gpio0";
  568. bias-pull-up;
  569. };
  570.  
  571. pin-scl {
  572. function = "alt5";
  573. pins = "gpio1";
  574. bias-disable;
  575. };
  576. };
  577.  
  578. i2c6-gpio22 {
  579. phandle = <0x92>;
  580.  
  581. pin-sda {
  582. function = "alt5";
  583. pins = "gpio22";
  584. bias-pull-up;
  585. };
  586.  
  587. pin-scl {
  588. function = "alt5";
  589. pins = "gpio23";
  590. bias-disable;
  591. };
  592. };
  593.  
  594. i2c-slave-gpio8 {
  595. phandle = <0x93>;
  596.  
  597. pins-i2c-slave {
  598. pins = "gpio8\0gpio9\0gpio10\0gpio11";
  599. function = "alt3";
  600. };
  601. };
  602.  
  603. jtag-gpio48 {
  604. phandle = <0x94>;
  605.  
  606. pins-jtag {
  607. pins = "gpio48\0gpio49\0gpio50\0gpio51\0gpio52\0gpio53";
  608. function = "alt4";
  609. };
  610. };
  611.  
  612. mii-gpio28 {
  613. phandle = <0x95>;
  614.  
  615. pins-mii {
  616. pins = "gpio28\0gpio29\0gpio30\0gpio31";
  617. function = "alt4";
  618. };
  619. };
  620.  
  621. mii-gpio36 {
  622. phandle = <0x96>;
  623.  
  624. pins-mii {
  625. pins = "gpio36\0gpio37\0gpio38\0gpio39";
  626. function = "alt5";
  627. };
  628. };
  629.  
  630. pcm-gpio50 {
  631. phandle = <0x97>;
  632.  
  633. pins-pcm {
  634. pins = "gpio50\0gpio51\0gpio52\0gpio53";
  635. function = "alt2";
  636. };
  637. };
  638.  
  639. pwm0-0-gpio12 {
  640. phandle = <0x98>;
  641.  
  642. pin-pwm {
  643. pins = "gpio12";
  644. function = "alt0";
  645. bias-disable;
  646. };
  647. };
  648.  
  649. pwm0-0-gpio18 {
  650. phandle = <0x99>;
  651.  
  652. pin-pwm {
  653. pins = "gpio18";
  654. function = "alt5";
  655. bias-disable;
  656. };
  657. };
  658.  
  659. pwm1-0-gpio40 {
  660. phandle = <0x28>;
  661.  
  662. pin-pwm {
  663. pins = "gpio40";
  664. function = "alt0";
  665. bias-disable;
  666. };
  667. };
  668.  
  669. pwm0-1-gpio13 {
  670. phandle = <0x9a>;
  671.  
  672. pin-pwm {
  673. pins = "gpio13";
  674. function = "alt0";
  675. bias-disable;
  676. };
  677. };
  678.  
  679. pwm0-1-gpio19 {
  680. phandle = <0x9b>;
  681.  
  682. pin-pwm {
  683. pins = "gpio19";
  684. function = "alt5";
  685. bias-disable;
  686. };
  687. };
  688.  
  689. pwm1-1-gpio41 {
  690. phandle = <0x29>;
  691.  
  692. pin-pwm {
  693. pins = "gpio41";
  694. function = "alt0";
  695. bias-disable;
  696. };
  697. };
  698.  
  699. pwm0-1-gpio45 {
  700. phandle = <0x9c>;
  701.  
  702. pin-pwm {
  703. pins = "gpio45";
  704. function = "alt0";
  705. bias-disable;
  706. };
  707. };
  708.  
  709. pwm0-0-gpio52 {
  710. phandle = <0x9d>;
  711.  
  712. pin-pwm {
  713. pins = "gpio52";
  714. function = "alt1";
  715. bias-disable;
  716. };
  717. };
  718.  
  719. pwm0-1-gpio53 {
  720. phandle = <0x9e>;
  721.  
  722. pin-pwm {
  723. pins = "gpio53";
  724. function = "alt1";
  725. bias-disable;
  726. };
  727. };
  728.  
  729. rgmii-gpio35 {
  730. phandle = <0x9f>;
  731.  
  732. pin-start-stop {
  733. pins = "gpio35";
  734. function = "alt4";
  735. };
  736.  
  737. pin-rx-ok {
  738. pins = "gpio36";
  739. function = "alt4";
  740. };
  741. };
  742.  
  743. rgmii-irq-gpio34 {
  744. phandle = <0xa0>;
  745.  
  746. pin-irq {
  747. pins = "gpio34";
  748. function = "alt5";
  749. };
  750. };
  751.  
  752. rgmii-irq-gpio39 {
  753. phandle = <0xa1>;
  754.  
  755. pin-irq {
  756. pins = "gpio39";
  757. function = "alt4";
  758. };
  759. };
  760.  
  761. rgmii-mdio-gpio28 {
  762. phandle = <0xa2>;
  763.  
  764. pins-mdio {
  765. pins = "gpio28\0gpio29";
  766. function = "alt5";
  767. };
  768. };
  769.  
  770. rgmii-mdio-gpio37 {
  771. phandle = <0xa3>;
  772.  
  773. pins-mdio {
  774. pins = "gpio37\0gpio38";
  775. function = "alt4";
  776. };
  777. };
  778.  
  779. spi0-gpio46 {
  780. phandle = <0xa4>;
  781.  
  782. pins-spi {
  783. pins = "gpio46\0gpio47\0gpio48\0gpio49";
  784. function = "alt2";
  785. };
  786. };
  787.  
  788. spi2-gpio46 {
  789. phandle = <0xa5>;
  790.  
  791. pins-spi {
  792. pins = "gpio46\0gpio47\0gpio48\0gpio49\0gpio50";
  793. function = "alt5";
  794. };
  795. };
  796.  
  797. spi3-gpio0 {
  798. phandle = <0xa6>;
  799.  
  800. pins-spi {
  801. pins = "gpio0\0gpio1\0gpio2\0gpio3";
  802. function = "alt3";
  803. };
  804. };
  805.  
  806. spi4-gpio4 {
  807. phandle = <0xa7>;
  808.  
  809. pins-spi {
  810. pins = "gpio4\0gpio5\0gpio6\0gpio7";
  811. function = "alt3";
  812. };
  813. };
  814.  
  815. spi5-gpio12 {
  816. phandle = <0xa8>;
  817.  
  818. pins-spi {
  819. pins = "gpio12\0gpio13\0gpio14\0gpio15";
  820. function = "alt3";
  821. };
  822. };
  823.  
  824. spi6-gpio18 {
  825. phandle = <0xa9>;
  826.  
  827. pins-spi {
  828. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  829. function = "alt3";
  830. };
  831. };
  832.  
  833. uart2-gpio0 {
  834. phandle = <0xaa>;
  835.  
  836. pin-tx {
  837. pins = "gpio0";
  838. function = "alt4";
  839. bias-disable;
  840. };
  841.  
  842. pin-rx {
  843. pins = "gpio1";
  844. function = "alt4";
  845. bias-pull-up;
  846. };
  847. };
  848.  
  849. uart2-ctsrts-gpio2 {
  850. phandle = <0xab>;
  851.  
  852. pin-cts {
  853. pins = "gpio2";
  854. function = "alt4";
  855. bias-pull-up;
  856. };
  857.  
  858. pin-rts {
  859. pins = "gpio3";
  860. function = "alt4";
  861. bias-disable;
  862. };
  863. };
  864.  
  865. uart3-gpio4 {
  866. phandle = <0xac>;
  867.  
  868. pin-tx {
  869. pins = "gpio4";
  870. function = "alt4";
  871. bias-disable;
  872. };
  873.  
  874. pin-rx {
  875. pins = "gpio5";
  876. function = "alt4";
  877. bias-pull-up;
  878. };
  879. };
  880.  
  881. uart3-ctsrts-gpio6 {
  882. phandle = <0xad>;
  883.  
  884. pin-cts {
  885. pins = "gpio6";
  886. function = "alt4";
  887. bias-pull-up;
  888. };
  889.  
  890. pin-rts {
  891. pins = "gpio7";
  892. function = "alt4";
  893. bias-disable;
  894. };
  895. };
  896.  
  897. uart4-gpio8 {
  898. phandle = <0xae>;
  899.  
  900. pin-tx {
  901. pins = "gpio8";
  902. function = "alt4";
  903. bias-disable;
  904. };
  905.  
  906. pin-rx {
  907. pins = "gpio9";
  908. function = "alt4";
  909. bias-pull-up;
  910. };
  911. };
  912.  
  913. uart4-ctsrts-gpio10 {
  914. phandle = <0xaf>;
  915.  
  916. pin-cts {
  917. pins = "gpio10";
  918. function = "alt4";
  919. bias-pull-up;
  920. };
  921.  
  922. pin-rts {
  923. pins = "gpio11";
  924. function = "alt4";
  925. bias-disable;
  926. };
  927. };
  928.  
  929. uart5-gpio12 {
  930. phandle = <0xb0>;
  931.  
  932. pin-tx {
  933. pins = "gpio12";
  934. function = "alt4";
  935. bias-disable;
  936. };
  937.  
  938. pin-rx {
  939. pins = "gpio13";
  940. function = "alt4";
  941. bias-pull-up;
  942. };
  943. };
  944.  
  945. uart5-ctsrts-gpio14 {
  946. phandle = <0xb1>;
  947.  
  948. pin-cts {
  949. pins = "gpio14";
  950. function = "alt4";
  951. bias-pull-up;
  952. };
  953.  
  954. pin-rts {
  955. pins = "gpio15";
  956. function = "alt4";
  957. bias-disable;
  958. };
  959. };
  960.  
  961. dpi_18bit_cpadhi_gpio0 {
  962. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
  963. brcm,function = <0x06>;
  964. brcm,pull = <0x00>;
  965. phandle = <0xb2>;
  966. };
  967.  
  968. dpi_18bit_cpadhi_gpio2 {
  969. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
  970. brcm,function = <0x06>;
  971. phandle = <0xb3>;
  972. };
  973.  
  974. dpi_18bit_gpio0 {
  975. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>;
  976. brcm,function = <0x06>;
  977. phandle = <0xb4>;
  978. };
  979.  
  980. dpi_18bit_gpio2 {
  981. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>;
  982. brcm,function = <0x06>;
  983. phandle = <0xb5>;
  984. };
  985.  
  986. dpi_16bit_gpio0 {
  987. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
  988. brcm,function = <0x06>;
  989. phandle = <0xb6>;
  990. };
  991.  
  992. dpi_16bit_gpio2 {
  993. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
  994. brcm,function = <0x06>;
  995. phandle = <0xb7>;
  996. };
  997.  
  998. dpi_16bit_cpadhi_gpio0 {
  999. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18>;
  1000. brcm,function = <0x06>;
  1001. phandle = <0xb8>;
  1002. };
  1003.  
  1004. dpi_16bit_cpadhi_gpio2 {
  1005. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18>;
  1006. brcm,function = <0x06>;
  1007. phandle = <0xb9>;
  1008. };
  1009.  
  1010. gpioout {
  1011. brcm,pins = <0x06>;
  1012. brcm,function = <0x01>;
  1013. phandle = <0xba>;
  1014. };
  1015.  
  1016. alt0 {
  1017. brcm,pins = <0x04 0x05 0x07 0x08 0x09 0x0a 0x0b>;
  1018. brcm,function = <0x04>;
  1019. phandle = <0xbb>;
  1020. };
  1021.  
  1022. spi0_pins {
  1023. brcm,pins = <0x09 0x0a 0x0b>;
  1024. brcm,function = <0x04>;
  1025. phandle = <0x0e>;
  1026. };
  1027.  
  1028. spi0_cs_pins {
  1029. brcm,pins = <0x08 0x07>;
  1030. brcm,function = <0x01>;
  1031. phandle = <0x0f>;
  1032. };
  1033.  
  1034. spi3_pins {
  1035. brcm,pins = <0x01 0x02 0x03>;
  1036. brcm,function = <0x07>;
  1037. phandle = <0x1c>;
  1038. };
  1039.  
  1040. spi3_cs_pins {
  1041. brcm,pins = <0x00 0x18>;
  1042. brcm,function = <0x01>;
  1043. phandle = <0x1d>;
  1044. };
  1045.  
  1046. spi4_pins {
  1047. brcm,pins = <0x05 0x06 0x07>;
  1048. brcm,function = <0x07>;
  1049. phandle = <0x1e>;
  1050. };
  1051.  
  1052. spi4_cs_pins {
  1053. brcm,pins = <0x04 0x19>;
  1054. brcm,function = <0x01>;
  1055. phandle = <0x1f>;
  1056. };
  1057.  
  1058. spi5_pins {
  1059. brcm,pins = <0x0d 0x0e 0x0f>;
  1060. brcm,function = <0x07>;
  1061. phandle = <0x20>;
  1062. };
  1063.  
  1064. spi5_cs_pins {
  1065. brcm,pins = <0x0c 0x1a>;
  1066. brcm,function = <0x01>;
  1067. phandle = <0x21>;
  1068. };
  1069.  
  1070. spi6_pins {
  1071. brcm,pins = <0x13 0x14 0x15>;
  1072. brcm,function = <0x07>;
  1073. phandle = <0x22>;
  1074. };
  1075.  
  1076. spi6_cs_pins {
  1077. brcm,pins = <0x12 0x1b>;
  1078. brcm,function = <0x01>;
  1079. phandle = <0x23>;
  1080. };
  1081.  
  1082. i2c0 {
  1083. brcm,pins = <0x00 0x01>;
  1084. brcm,function = <0x04>;
  1085. brcm,pull = <0x02>;
  1086. phandle = <0xbc>;
  1087. };
  1088.  
  1089. i2c1 {
  1090. brcm,pins = <0x02 0x03>;
  1091. brcm,function = <0x04>;
  1092. brcm,pull = <0x02>;
  1093. phandle = <0x15>;
  1094. };
  1095.  
  1096. i2c3 {
  1097. brcm,pins = <0x04 0x05>;
  1098. brcm,function = <0x02>;
  1099. brcm,pull = <0x02>;
  1100. phandle = <0x24>;
  1101. };
  1102.  
  1103. i2c4 {
  1104. brcm,pins = <0x08 0x09>;
  1105. brcm,function = <0x02>;
  1106. brcm,pull = <0x02>;
  1107. phandle = <0x25>;
  1108. };
  1109.  
  1110. i2c5 {
  1111. brcm,pins = <0x0c 0x0d>;
  1112. brcm,function = <0x02>;
  1113. brcm,pull = <0x02>;
  1114. phandle = <0x26>;
  1115. };
  1116.  
  1117. i2c6 {
  1118. brcm,pins = <0x16 0x17>;
  1119. brcm,function = <0x02>;
  1120. brcm,pull = <0x02>;
  1121. phandle = <0x27>;
  1122. };
  1123.  
  1124. i2s {
  1125. brcm,pins = <0x12 0x13 0x14 0x15>;
  1126. brcm,function = <0x04>;
  1127. phandle = <0x0d>;
  1128. };
  1129.  
  1130. sdio_pins {
  1131. brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>;
  1132. brcm,function = <0x07>;
  1133. brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>;
  1134. phandle = <0x31>;
  1135. };
  1136.  
  1137. uart2_pins {
  1138. brcm,pins = <0x00 0x01>;
  1139. brcm,function = <0x03>;
  1140. brcm,pull = <0x00 0x02>;
  1141. phandle = <0x18>;
  1142. };
  1143.  
  1144. uart3_pins {
  1145. brcm,pins = <0x04 0x05>;
  1146. brcm,function = <0x03>;
  1147. brcm,pull = <0x00 0x02>;
  1148. phandle = <0x19>;
  1149. };
  1150.  
  1151. uart4_pins {
  1152. brcm,pins = <0x08 0x09>;
  1153. brcm,function = <0x03>;
  1154. brcm,pull = <0x00 0x02>;
  1155. phandle = <0x1a>;
  1156. };
  1157.  
  1158. uart5_pins {
  1159. brcm,pins = <0x0c 0x0d>;
  1160. brcm,function = <0x03>;
  1161. brcm,pull = <0x00 0x02>;
  1162. phandle = <0x1b>;
  1163. };
  1164.  
  1165. bt_pins {
  1166. brcm,pins = "-";
  1167. brcm,function = <0x00>;
  1168. brcm,pull = <0x02>;
  1169. phandle = <0x0a>;
  1170. };
  1171.  
  1172. uart0_pins {
  1173. brcm,pins = <0x20 0x21>;
  1174. brcm,function = <0x07>;
  1175. brcm,pull = <0x00 0x02>;
  1176. phandle = <0x09>;
  1177. };
  1178.  
  1179. uart1_pins {
  1180. brcm,pins;
  1181. brcm,function;
  1182. brcm,pull;
  1183. phandle = <0x12>;
  1184. };
  1185.  
  1186. uart1_bt_pins {
  1187. brcm,pins = <0x20 0x21 0x1e 0x1f>;
  1188. brcm,function = <0x02>;
  1189. brcm,pull = <0x00 0x02 0x02 0x00>;
  1190. phandle = <0xbd>;
  1191. };
  1192.  
  1193. audio_pins {
  1194. brcm,pins;
  1195. brcm,function;
  1196. phandle = <0x36>;
  1197. };
  1198. };
  1199.  
  1200. serial@7e201000 {
  1201. compatible = "arm,pl011\0arm,primecell";
  1202. reg = <0x7e201000 0x200>;
  1203. interrupts = <0x00 0x79 0x04>;
  1204. clocks = <0x08 0x13 0x08 0x14>;
  1205. clock-names = "uartclk\0apb_pclk";
  1206. arm,primecell-periphid = <0x241011>;
  1207. status = "okay";
  1208. cts-event-workaround;
  1209. pinctrl-names = "default";
  1210. pinctrl-0 = <0x09 0x0a>;
  1211. uart-has-rtscts;
  1212. skip-init;
  1213. phandle = <0x42>;
  1214.  
  1215. bluetooth {
  1216. compatible = "brcm,bcm43438-bt";
  1217. max-speed = <0x2dc6c0>;
  1218. shutdown-gpios = <0x0b 0x00 0x00>;
  1219. local-bd-address = [00 00 00 00 00 00];
  1220. fallback-bd-address;
  1221. status = "okay";
  1222. phandle = <0x40>;
  1223. };
  1224. };
  1225.  
  1226. mmc@7e202000 {
  1227. compatible = "brcm,bcm2835-sdhost";
  1228. reg = <0x7e202000 0x100>;
  1229. interrupts = <0x00 0x78 0x04>;
  1230. clocks = <0x08 0x14>;
  1231. status = "disabled";
  1232. dmas = <0x0c 0x2000000d>;
  1233. dma-names = "rx-tx";
  1234. bus-width = <0x04>;
  1235. brcm,overclock-50 = <0x00>;
  1236. brcm,pio-limit = <0x01>;
  1237. firmware = <0x06>;
  1238. phandle = <0x4a>;
  1239. };
  1240.  
  1241. i2s@7e203000 {
  1242. compatible = "brcm,bcm2835-i2s";
  1243. reg = <0x7e203000 0x24>;
  1244. clocks = <0x08 0x1f>;
  1245. status = "disabled";
  1246. #sound-dai-cells = <0x00>;
  1247. dmas = <0x0c 0x02 0x0c 0x03>;
  1248. dma-names = "tx\0rx";
  1249. pinctrl-names = "default";
  1250. pinctrl-0 = <0x0d>;
  1251. phandle = <0x44>;
  1252. };
  1253.  
  1254. spi@7e204000 {
  1255. compatible = "brcm,bcm2835-spi";
  1256. reg = <0x7e204000 0x200>;
  1257. interrupts = <0x00 0x76 0x04>;
  1258. clocks = <0x08 0x14>;
  1259. #address-cells = <0x01>;
  1260. #size-cells = <0x00>;
  1261. status = "disabled";
  1262. dmas = <0x0c 0x06 0x0c 0x07>;
  1263. dma-names = "tx\0rx";
  1264. pinctrl-names = "default";
  1265. pinctrl-0 = <0x0e 0x0f>;
  1266. cs-gpios = <0x07 0x08 0x01 0x07 0x07 0x01>;
  1267. phandle = <0x45>;
  1268.  
  1269. spidev@0 {
  1270. compatible = "spidev";
  1271. reg = <0x00>;
  1272. #address-cells = <0x01>;
  1273. #size-cells = <0x00>;
  1274. spi-max-frequency = <0x7735940>;
  1275. phandle = <0xbe>;
  1276. };
  1277.  
  1278. spidev@1 {
  1279. compatible = "spidev";
  1280. reg = <0x01>;
  1281. #address-cells = <0x01>;
  1282. #size-cells = <0x00>;
  1283. spi-max-frequency = <0x7735940>;
  1284. phandle = <0xbf>;
  1285. };
  1286. };
  1287.  
  1288. i2c@7e205000 {
  1289. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1290. reg = <0x7e205000 0x200>;
  1291. interrupts = <0x00 0x75 0x04>;
  1292. clocks = <0x08 0x14>;
  1293. #address-cells = <0x01>;
  1294. #size-cells = <0x00>;
  1295. status = "disabled";
  1296. clock-frequency = <0x186a0>;
  1297. phandle = <0x32>;
  1298. };
  1299.  
  1300. dpi@7e208000 {
  1301. compatible = "brcm,bcm2835-dpi";
  1302. reg = <0x7e208000 0x8c>;
  1303. clocks = <0x08 0x14 0x08 0x2c>;
  1304. clock-names = "core\0pixel";
  1305. status = "disabled";
  1306. phandle = <0xc0>;
  1307. };
  1308.  
  1309. dsi@7e209000 {
  1310. compatible = "brcm,bcm2835-dsi0";
  1311. reg = <0x7e209000 0x78>;
  1312. interrupts = <0x00 0x64 0x04>;
  1313. #address-cells = <0x01>;
  1314. #size-cells = <0x00>;
  1315. #clock-cells = <0x01>;
  1316. clocks = <0x08 0x22 0x08 0x2f 0x08 0x31>;
  1317. clock-names = "phy\0escape\0pixel";
  1318. clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr";
  1319. status = "disabled";
  1320. power-domains = <0x10 0x11>;
  1321. phandle = <0x04>;
  1322. };
  1323.  
  1324. aux@7e215000 {
  1325. compatible = "brcm,bcm2835-aux";
  1326. #clock-cells = <0x01>;
  1327. reg = <0x7e215000 0x08>;
  1328. clocks = <0x08 0x14>;
  1329. phandle = <0x11>;
  1330. };
  1331.  
  1332. serial@7e215040 {
  1333. compatible = "brcm,bcm2835-aux-uart";
  1334. reg = <0x7e215040 0x40>;
  1335. interrupts = <0x00 0x5d 0x04>;
  1336. clocks = <0x11 0x00>;
  1337. status = "okay";
  1338. pinctrl-names = "default";
  1339. pinctrl-0 = <0x12>;
  1340. skip-init;
  1341. phandle = <0x43>;
  1342.  
  1343. bluetooth {
  1344. compatible = "brcm,bcm43438-bt";
  1345. max-speed = <0x38400>;
  1346. shutdown-gpios = <0x0b 0x00 0x00>;
  1347. local-bd-address = [00 00 00 00 00 00];
  1348. fallback-bd-address;
  1349. status = "disabled";
  1350. phandle = <0x41>;
  1351. };
  1352. };
  1353.  
  1354. spi@7e215080 {
  1355. compatible = "brcm,bcm2835-aux-spi";
  1356. reg = <0x7e215080 0x40>;
  1357. interrupts = <0x00 0x5d 0x04>;
  1358. clocks = <0x11 0x01>;
  1359. #address-cells = <0x01>;
  1360. #size-cells = <0x00>;
  1361. status = "disabled";
  1362. phandle = <0xc1>;
  1363. };
  1364.  
  1365. spi@7e2150c0 {
  1366. compatible = "brcm,bcm2835-aux-spi";
  1367. reg = <0x7e2150c0 0x40>;
  1368. interrupts = <0x00 0x5d 0x04>;
  1369. clocks = <0x11 0x02>;
  1370. #address-cells = <0x01>;
  1371. #size-cells = <0x00>;
  1372. status = "disabled";
  1373. phandle = <0xc2>;
  1374. };
  1375.  
  1376. pwm@7e20c000 {
  1377. compatible = "brcm,bcm2835-pwm";
  1378. reg = <0x7e20c000 0x28>;
  1379. clocks = <0x08 0x1e>;
  1380. assigned-clocks = <0x08 0x1e>;
  1381. assigned-clock-rates = <0x2faf080>;
  1382. #pwm-cells = <0x03>;
  1383. status = "disabled";
  1384. phandle = <0xc3>;
  1385. };
  1386.  
  1387. mmc@7e300000 {
  1388. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  1389. reg = <0x7e300000 0x100>;
  1390. interrupts = <0x00 0x7e 0x04>;
  1391. clocks = <0x08 0x1c>;
  1392. status = "disabled";
  1393. pinctrl-names = "default";
  1394. pinctrl-0 = <0x13>;
  1395. bus-width = <0x04>;
  1396. dmas = <0x0c 0x0b>;
  1397. dma-names = "rx-tx";
  1398. brcm,overclock-50 = <0x00>;
  1399. phandle = <0x4b>;
  1400. };
  1401.  
  1402. hvs@7e400000 {
  1403. compatible = "brcm,bcm2711-hvs";
  1404. reg = <0x7e400000 0x8000>;
  1405. interrupts = <0x00 0x61 0x04>;
  1406. status = "disabled";
  1407. clocks = <0x14 0x04>;
  1408. phandle = <0xc4>;
  1409. };
  1410.  
  1411. dsi@7e700000 {
  1412. compatible = "brcm,bcm2711-dsi1";
  1413. reg = <0x7e700000 0x8c>;
  1414. interrupts = <0x00 0x6c 0x04>;
  1415. #address-cells = <0x01>;
  1416. #size-cells = <0x00>;
  1417. #clock-cells = <0x01>;
  1418. clocks = <0x08 0x23 0x08 0x30 0x08 0x32>;
  1419. clock-names = "phy\0escape\0pixel";
  1420. clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr";
  1421. status = "disabled";
  1422. power-domains = <0x10 0x12>;
  1423. phandle = <0x05>;
  1424. };
  1425.  
  1426. i2c@7e804000 {
  1427. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1428. reg = <0x7e804000 0x1000>;
  1429. interrupts = <0x00 0x75 0x04>;
  1430. clocks = <0x08 0x14>;
  1431. #address-cells = <0x01>;
  1432. #size-cells = <0x00>;
  1433. status = "disabled";
  1434. pinctrl-names = "default";
  1435. pinctrl-0 = <0x15>;
  1436. clock-frequency = <0x186a0>;
  1437. phandle = <0x47>;
  1438. };
  1439.  
  1440. usb@7e980000 {
  1441. compatible = "brcm,bcm2708-usb";
  1442. reg = <0x7e980000 0x10000 0x7e00b200 0x200>;
  1443. interrupts = <0x00 0x49 0x04 0x00 0x28 0x04>;
  1444. #address-cells = <0x01>;
  1445. #size-cells = <0x00>;
  1446. clocks = <0x16>;
  1447. clock-names = "otg";
  1448. phys = <0x17>;
  1449. phy-names = "usb2-phy";
  1450. interrupt-names = "usb\0soft";
  1451. power-domains = <0x10 0x06>;
  1452. status = "disabled";
  1453. phandle = <0xc5>;
  1454. };
  1455.  
  1456. interrupt-controller@40000000 {
  1457. compatible = "brcm,bcm2836-l1-intc";
  1458. reg = <0x40000000 0x100>;
  1459. phandle = <0xc6>;
  1460. };
  1461.  
  1462. interrupt-controller@40041000 {
  1463. interrupt-controller;
  1464. #interrupt-cells = <0x03>;
  1465. compatible = "arm,gic-400";
  1466. reg = <0x40041000 0x1000 0x40042000 0x2000 0x40044000 0x2000 0x40046000 0x2000>;
  1467. interrupts = <0x01 0x09 0xf04>;
  1468. phandle = <0x01>;
  1469. };
  1470.  
  1471. avs-monitor@7d5d2000 {
  1472. compatible = "brcm,bcm2711-avs-monitor\0syscon\0simple-mfd";
  1473. reg = <0x7d5d2000 0xf00>;
  1474. phandle = <0xc7>;
  1475.  
  1476. thermal {
  1477. compatible = "brcm,bcm2711-thermal";
  1478. #thermal-sensor-cells = <0x00>;
  1479. phandle = <0x02>;
  1480. };
  1481. };
  1482.  
  1483. dma-controller@7e007000 {
  1484. compatible = "brcm,bcm2835-dma";
  1485. reg = <0x7e007000 0xb00>;
  1486. interrupts = <0x00 0x50 0x04 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 0x00 0x55 0x04 0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x57 0x04 0x00 0x58 0x04 0x00 0x58 0x04>;
  1487. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7\0dma8\0dma9\0dma10";
  1488. #dma-cells = <0x01>;
  1489. brcm,dma-channel-mask = <0x7f5>;
  1490. phandle = <0x0c>;
  1491. };
  1492.  
  1493. watchdog@7e100000 {
  1494. compatible = "brcm,bcm2711-pm\0brcm,bcm2835-pm-wdt";
  1495. #power-domain-cells = <0x01>;
  1496. #reset-cells = <0x01>;
  1497. reg = <0x7e100000 0x114 0x7e00a000 0x24 0x7ec11000 0x20>;
  1498. reg-names = "pm\0asb\0rpivid_asb";
  1499. clocks = <0x08 0x15 0x08 0x1d 0x08 0x17 0x08 0x16>;
  1500. clock-names = "v3d\0peri_image\0h264\0isp";
  1501. system-power-controller;
  1502. phandle = <0x48>;
  1503. };
  1504.  
  1505. rng@7e104000 {
  1506. compatible = "brcm,bcm2711-rng200";
  1507. reg = <0x7e104000 0x28>;
  1508. status = "okay";
  1509. phandle = <0x49>;
  1510. };
  1511.  
  1512. serial@7e201400 {
  1513. compatible = "arm,pl011\0arm,primecell";
  1514. reg = <0x7e201400 0x200>;
  1515. interrupts = <0x00 0x79 0x04>;
  1516. clocks = <0x08 0x13 0x08 0x14>;
  1517. clock-names = "uartclk\0apb_pclk";
  1518. arm,primecell-periphid = <0x241011>;
  1519. status = "disabled";
  1520. pinctrl-0 = <0x18>;
  1521. pinctrl-names = "default";
  1522. phandle = <0xc8>;
  1523. };
  1524.  
  1525. serial@7e201600 {
  1526. compatible = "arm,pl011\0arm,primecell";
  1527. reg = <0x7e201600 0x200>;
  1528. interrupts = <0x00 0x79 0x04>;
  1529. clocks = <0x08 0x13 0x08 0x14>;
  1530. clock-names = "uartclk\0apb_pclk";
  1531. arm,primecell-periphid = <0x241011>;
  1532. status = "disabled";
  1533. pinctrl-0 = <0x19>;
  1534. pinctrl-names = "default";
  1535. phandle = <0xc9>;
  1536. };
  1537.  
  1538. serial@7e201800 {
  1539. compatible = "arm,pl011\0arm,primecell";
  1540. reg = <0x7e201800 0x200>;
  1541. interrupts = <0x00 0x79 0x04>;
  1542. clocks = <0x08 0x13 0x08 0x14>;
  1543. clock-names = "uartclk\0apb_pclk";
  1544. arm,primecell-periphid = <0x241011>;
  1545. status = "disabled";
  1546. pinctrl-0 = <0x1a>;
  1547. pinctrl-names = "default";
  1548. phandle = <0xca>;
  1549. };
  1550.  
  1551. serial@7e201a00 {
  1552. compatible = "arm,pl011\0arm,primecell";
  1553. reg = <0x7e201a00 0x200>;
  1554. interrupts = <0x00 0x79 0x04>;
  1555. clocks = <0x08 0x13 0x08 0x14>;
  1556. clock-names = "uartclk\0apb_pclk";
  1557. arm,primecell-periphid = <0x241011>;
  1558. status = "disabled";
  1559. pinctrl-0 = <0x1b>;
  1560. pinctrl-names = "default";
  1561. phandle = <0xcb>;
  1562. };
  1563.  
  1564. spi@7e204600 {
  1565. compatible = "brcm,bcm2835-spi";
  1566. reg = <0x7e204600 0x200>;
  1567. interrupts = <0x00 0x76 0x04>;
  1568. clocks = <0x08 0x14>;
  1569. #address-cells = <0x01>;
  1570. #size-cells = <0x00>;
  1571. status = "disabled";
  1572. pinctrl-0 = <0x1c 0x1d>;
  1573. pinctrl-names = "default";
  1574. phandle = <0xcc>;
  1575. };
  1576.  
  1577. spi@7e204800 {
  1578. compatible = "brcm,bcm2835-spi";
  1579. reg = <0x7e204800 0x200>;
  1580. interrupts = <0x00 0x76 0x04>;
  1581. clocks = <0x08 0x14>;
  1582. #address-cells = <0x01>;
  1583. #size-cells = <0x00>;
  1584. status = "disabled";
  1585. pinctrl-0 = <0x1e 0x1f>;
  1586. pinctrl-names = "default";
  1587. phandle = <0xcd>;
  1588. };
  1589.  
  1590. spi@7e204a00 {
  1591. compatible = "brcm,bcm2835-spi";
  1592. reg = <0x7e204a00 0x200>;
  1593. interrupts = <0x00 0x76 0x04>;
  1594. clocks = <0x08 0x14>;
  1595. #address-cells = <0x01>;
  1596. #size-cells = <0x00>;
  1597. status = "disabled";
  1598. pinctrl-0 = <0x20 0x21>;
  1599. pinctrl-names = "default";
  1600. phandle = <0xce>;
  1601. };
  1602.  
  1603. spi@7e204c00 {
  1604. compatible = "brcm,bcm2835-spi";
  1605. reg = <0x7e204c00 0x200>;
  1606. interrupts = <0x00 0x76 0x04>;
  1607. clocks = <0x08 0x14>;
  1608. #address-cells = <0x01>;
  1609. #size-cells = <0x00>;
  1610. status = "disabled";
  1611. pinctrl-0 = <0x22 0x23>;
  1612. pinctrl-names = "default";
  1613. phandle = <0xcf>;
  1614. };
  1615.  
  1616. i2c@7e205600 {
  1617. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1618. reg = <0x7e205600 0x200>;
  1619. interrupts = <0x00 0x75 0x04>;
  1620. clocks = <0x08 0x14>;
  1621. #address-cells = <0x01>;
  1622. #size-cells = <0x00>;
  1623. status = "disabled";
  1624. pinctrl-0 = <0x24>;
  1625. pinctrl-names = "default";
  1626. phandle = <0xd0>;
  1627. };
  1628.  
  1629. i2c@7e205800 {
  1630. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1631. reg = <0x7e205800 0x200>;
  1632. interrupts = <0x00 0x75 0x04>;
  1633. clocks = <0x08 0x14>;
  1634. #address-cells = <0x01>;
  1635. #size-cells = <0x00>;
  1636. status = "disabled";
  1637. pinctrl-0 = <0x25>;
  1638. pinctrl-names = "default";
  1639. phandle = <0xd1>;
  1640. };
  1641.  
  1642. i2c@7e205a00 {
  1643. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1644. reg = <0x7e205a00 0x200>;
  1645. interrupts = <0x00 0x75 0x04>;
  1646. clocks = <0x08 0x14>;
  1647. #address-cells = <0x01>;
  1648. #size-cells = <0x00>;
  1649. status = "disabled";
  1650. pinctrl-0 = <0x26>;
  1651. pinctrl-names = "default";
  1652. phandle = <0xd2>;
  1653. };
  1654.  
  1655. i2c@7e205c00 {
  1656. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1657. reg = <0x7e205c00 0x200>;
  1658. interrupts = <0x00 0x75 0x04>;
  1659. clocks = <0x08 0x14>;
  1660. #address-cells = <0x01>;
  1661. #size-cells = <0x00>;
  1662. status = "disabled";
  1663. pinctrl-0 = <0x27>;
  1664. pinctrl-names = "default";
  1665. phandle = <0xd3>;
  1666. };
  1667.  
  1668. pixelvalve@7e206000 {
  1669. compatible = "brcm,bcm2711-pixelvalve0";
  1670. reg = <0x7e206000 0x100>;
  1671. interrupts = <0x00 0x6d 0x04>;
  1672. status = "disabled";
  1673. phandle = <0xd4>;
  1674. };
  1675.  
  1676. pixelvalve@7e207000 {
  1677. compatible = "brcm,bcm2711-pixelvalve1";
  1678. reg = <0x7e207000 0x100>;
  1679. interrupts = <0x00 0x6e 0x04>;
  1680. status = "disabled";
  1681. phandle = <0xd5>;
  1682. };
  1683.  
  1684. pixelvalve@7e20a000 {
  1685. compatible = "brcm,bcm2711-pixelvalve2";
  1686. reg = <0x7e20a000 0x100>;
  1687. interrupts = <0x00 0x65 0x04>;
  1688. status = "disabled";
  1689. phandle = <0xd6>;
  1690. };
  1691.  
  1692. pwm@7e20c800 {
  1693. compatible = "brcm,bcm2835-pwm";
  1694. reg = <0x7e20c800 0x28>;
  1695. clocks = <0x08 0x1e>;
  1696. assigned-clocks = <0x08 0x1e>;
  1697. assigned-clock-rates = <0x2faf080>;
  1698. #pwm-cells = <0x03>;
  1699. status = "disabled";
  1700. pinctrl-names = "default";
  1701. pinctrl-0 = <0x28 0x29>;
  1702. phandle = <0xd7>;
  1703. };
  1704.  
  1705. pixelvalve@7e216000 {
  1706. compatible = "brcm,bcm2711-pixelvalve4";
  1707. reg = <0x7e216000 0x100>;
  1708. interrupts = <0x00 0x6e 0x04>;
  1709. status = "disabled";
  1710. phandle = <0xd8>;
  1711. };
  1712.  
  1713. pixelvalve@7ec12000 {
  1714. compatible = "brcm,bcm2711-pixelvalve3";
  1715. reg = <0x7ec12000 0x100>;
  1716. interrupts = <0x00 0x6a 0x04>;
  1717. status = "disabled";
  1718. phandle = <0xd9>;
  1719. };
  1720.  
  1721. vec@7ec13000 {
  1722. compatible = "brcm,bcm2711-vec";
  1723. reg = <0x7ec13000 0x1000>;
  1724. clocks = <0x14 0x0f>;
  1725. interrupts = <0x00 0x7b 0x04>;
  1726. status = "disabled";
  1727. power-domains = <0x10 0x07>;
  1728. phandle = <0xda>;
  1729. };
  1730.  
  1731. clock@7ef00000 {
  1732. compatible = "brcm,brcm2711-dvp";
  1733. reg = <0x7ef00000 0x10>;
  1734. clocks = <0x2a>;
  1735. #clock-cells = <0x01>;
  1736. #reset-cells = <0x01>;
  1737. status = "disabled";
  1738. phandle = <0x2b>;
  1739. };
  1740.  
  1741. interrupt-controller@7ef00100 {
  1742. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  1743. reg = <0x7ef00100 0x30>;
  1744. interrupts = <0x00 0x60 0x01>;
  1745. interrupt-controller;
  1746. #interrupt-cells = <0x01>;
  1747. status = "disabled";
  1748. phandle = <0x2c>;
  1749. };
  1750.  
  1751. hdmi@7ef00700 {
  1752. compatible = "brcm,bcm2711-hdmi0";
  1753. reg = <0x7ef00700 0x300 0x7ef00300 0x200 0x7ef00f00 0x80 0x7ef00f80 0x80 0x7ef01b00 0x200 0x7ef01f00 0x400 0x7ef00200 0x80 0x7ef04300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>;
  1754. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2";
  1755. clock-names = "hdmi\0bvb\0audio\0cec";
  1756. resets = <0x2b 0x00>;
  1757. interrupt-parent = <0x2c>;
  1758. interrupts = <0x00 0x01 0x02 0x03 0x04 0x05>;
  1759. interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed";
  1760. ddc = <0x2d>;
  1761. dmas = <0x2e 0x41fa000a>;
  1762. dma-names = "audio-rx";
  1763. status = "disabled";
  1764. clocks = <0x14 0x0d 0x14 0x0e 0x2b 0x00 0x2f>;
  1765. wifi-2.4ghz-coexistence;
  1766. phandle = <0x52>;
  1767. };
  1768.  
  1769. i2c@7ef04500 {
  1770. compatible = "brcm,bcm2711-hdmi-i2c";
  1771. reg = <0x7ef04500 0x100 0x7ef00b00 0x300>;
  1772. reg-names = "bsc\0auto-i2c";
  1773. clock-frequency = <0x17cdc>;
  1774. status = "disabled";
  1775. phandle = <0x2d>;
  1776. };
  1777.  
  1778. hdmi@7ef05700 {
  1779. compatible = "brcm,bcm2711-hdmi1";
  1780. reg = <0x7ef05700 0x300 0x7ef05300 0x200 0x7ef05f00 0x80 0x7ef05f80 0x80 0x7ef06b00 0x200 0x7ef06f00 0x400 0x7ef00280 0x80 0x7ef09300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>;
  1781. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2";
  1782. ddc = <0x30>;
  1783. clock-names = "hdmi\0bvb\0audio\0cec";
  1784. resets = <0x2b 0x01>;
  1785. interrupt-parent = <0x2c>;
  1786. interrupts = <0x08 0x07 0x06 0x09 0x0a 0x0b>;
  1787. interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed";
  1788. dmas = <0x2e 0x41fa0011>;
  1789. dma-names = "audio-rx";
  1790. status = "disabled";
  1791. clocks = <0x14 0x0d 0x14 0x0e 0x2b 0x01 0x2f>;
  1792. wifi-2.4ghz-coexistence;
  1793. phandle = <0x53>;
  1794. };
  1795.  
  1796. i2c@7ef09500 {
  1797. compatible = "brcm,bcm2711-hdmi-i2c";
  1798. reg = <0x7ef09500 0x100 0x7ef05b00 0x300>;
  1799. reg-names = "bsc\0auto-i2c";
  1800. clock-frequency = <0x17cdc>;
  1801. status = "disabled";
  1802. phandle = <0x30>;
  1803. };
  1804.  
  1805. mmcnr@7e300000 {
  1806. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  1807. reg = <0x7e300000 0x100>;
  1808. interrupts = <0x00 0x7e 0x04>;
  1809. clocks = <0x08 0x1c>;
  1810. dmas = <0x0c 0x0b>;
  1811. dma-names = "rx-tx";
  1812. brcm,overclock-50 = <0x00>;
  1813. non-removable;
  1814. status = "okay";
  1815. pinctrl-names = "default";
  1816. pinctrl-0 = <0x31>;
  1817. bus-width = <0x04>;
  1818. phandle = <0x4c>;
  1819. };
  1820.  
  1821. firmwarekms@7e600000 {
  1822. compatible = "raspberrypi,rpi-firmware-kms-2711";
  1823. reg = <0x7e600000 0x100>;
  1824. interrupts = <0x00 0x70 0x04>;
  1825. brcm,firmware = <0x06>;
  1826. status = "disabled";
  1827. phandle = <0xdb>;
  1828. };
  1829.  
  1830. smi@7e600000 {
  1831. compatible = "brcm,bcm2835-smi";
  1832. reg = <0x7e600000 0x100>;
  1833. interrupts = <0x00 0x70 0x04>;
  1834. clocks = <0x08 0x2a>;
  1835. assigned-clocks = <0x08 0x2a>;
  1836. assigned-clock-rates = <0x7735940>;
  1837. dmas = <0x0c 0x04>;
  1838. dma-names = "rx-tx";
  1839. status = "disabled";
  1840. phandle = <0xdc>;
  1841. };
  1842.  
  1843. csi@7e800000 {
  1844. compatible = "brcm,bcm2835-unicam";
  1845. reg = <0x7e800000 0x800 0x7e802000 0x04>;
  1846. interrupts = <0x00 0x66 0x04>;
  1847. clocks = <0x08 0x2d 0x14 0x04>;
  1848. clock-names = "lp\0vpu";
  1849. power-domains = <0x10 0x0c>;
  1850. #address-cells = <0x01>;
  1851. #size-cells = <0x00>;
  1852. #clock-cells = <0x01>;
  1853. status = "disabled";
  1854. brcm,num-data-lanes = <0x02>;
  1855. phandle = <0x50>;
  1856. };
  1857.  
  1858. csi@7e801000 {
  1859. compatible = "brcm,bcm2835-unicam";
  1860. reg = <0x7e801000 0x800 0x7e802004 0x04>;
  1861. interrupts = <0x00 0x67 0x04>;
  1862. clocks = <0x08 0x2e 0x14 0x04>;
  1863. clock-names = "lp\0vpu";
  1864. power-domains = <0x10 0x0d>;
  1865. #address-cells = <0x01>;
  1866. #size-cells = <0x00>;
  1867. #clock-cells = <0x01>;
  1868. status = "disabled";
  1869. brcm,num-data-lanes = <0x04>;
  1870. phandle = <0x4f>;
  1871. };
  1872.  
  1873. axiperf {
  1874. compatible = "brcm,bcm2711-axiperf";
  1875. reg = <0x7e009800 0x100 0x7ee08000 0x100>;
  1876. firmware = <0x06>;
  1877. status = "disabled";
  1878. phandle = <0x4d>;
  1879. };
  1880.  
  1881. i2c0mux {
  1882. compatible = "i2c-mux-pinctrl";
  1883. #address-cells = <0x01>;
  1884. #size-cells = <0x00>;
  1885. i2c-parent = <0x32>;
  1886. status = "disabled";
  1887. pinctrl-names = "i2c0\0i2c_csi_dsi";
  1888. pinctrl-0 = <0x33>;
  1889. pinctrl-1 = <0x34>;
  1890. phandle = <0x46>;
  1891.  
  1892. i2c@0 {
  1893. reg = <0x00>;
  1894. #address-cells = <0x01>;
  1895. #size-cells = <0x00>;
  1896. phandle = <0xdd>;
  1897. };
  1898.  
  1899. i2c@1 {
  1900. reg = <0x01>;
  1901. #address-cells = <0x01>;
  1902. #size-cells = <0x00>;
  1903. phandle = <0xde>;
  1904. };
  1905. };
  1906.  
  1907. firmware {
  1908. compatible = "raspberrypi,bcm2835-firmware\0simple-mfd";
  1909. #address-cells = <0x01>;
  1910. #size-cells = <0x01>;
  1911. mboxes = <0x35>;
  1912. dma-ranges;
  1913. phandle = <0x06>;
  1914.  
  1915. clocks {
  1916. compatible = "raspberrypi,firmware-clocks";
  1917. #clock-cells = <0x01>;
  1918. phandle = <0x14>;
  1919. };
  1920.  
  1921. gpio {
  1922. compatible = "raspberrypi,firmware-gpio";
  1923. gpio-controller;
  1924. #gpio-cells = <0x02>;
  1925. status = "okay";
  1926. gpio-line-names = "BT_ON\0WL_ON\0PWR_LED_OFF\0ANT1\0VDD_SD_IO_SEL\0CAM_GPIO\0SD_PWR_ON\0ANT2";
  1927. phandle = <0x0b>;
  1928.  
  1929. ant1 {
  1930. gpio-hog;
  1931. gpios = <0x03 0x00>;
  1932. output-high;
  1933. phandle = <0x59>;
  1934. };
  1935.  
  1936. ant2 {
  1937. gpio-hog;
  1938. gpios = <0x07 0x00>;
  1939. output-low;
  1940. phandle = <0x5a>;
  1941. };
  1942. };
  1943.  
  1944. reset {
  1945. compatible = "raspberrypi,firmware-reset";
  1946. #reset-cells = <0x01>;
  1947. phandle = <0xdf>;
  1948. };
  1949.  
  1950. vcio {
  1951. compatible = "raspberrypi,vcio";
  1952. phandle = <0xe0>;
  1953. };
  1954. };
  1955.  
  1956. power {
  1957. compatible = "raspberrypi,bcm2835-power";
  1958. firmware = <0x06>;
  1959. #power-domain-cells = <0x01>;
  1960. phandle = <0x10>;
  1961. };
  1962.  
  1963. mailbox@7e00b840 {
  1964. compatible = "brcm,bcm2711-vchiq";
  1965. reg = <0x7e00b840 0x3c>;
  1966. interrupts = <0x00 0x22 0x04>;
  1967. pinctrl-names = "default";
  1968. pinctrl-0 = <0x36>;
  1969. phandle = <0xe1>;
  1970. };
  1971.  
  1972. gpiomem {
  1973. compatible = "brcm,bcm2835-gpiomem";
  1974. reg = <0x7e200000 0x1000>;
  1975. };
  1976.  
  1977. fb {
  1978. compatible = "brcm,bcm2708-fb";
  1979. firmware = <0x06>;
  1980. status = "okay";
  1981. phandle = <0xe2>;
  1982. };
  1983.  
  1984. sound {
  1985. status = "disabled";
  1986. phandle = <0xe3>;
  1987. };
  1988.  
  1989. nvmem {
  1990. compatible = "simple-bus";
  1991. #address-cells = <0x01>;
  1992. #size-cells = <0x01>;
  1993.  
  1994. nvmem_otp {
  1995. compatible = "raspberrypi,rpi-otp";
  1996. firmware = <0x06>;
  1997. reg = <0x00 0xa6>;
  1998. status = "okay";
  1999. phandle = <0xe4>;
  2000. };
  2001.  
  2002. nvmem_cust {
  2003. compatible = "raspberrypi,rpi-otp";
  2004. firmware = <0x06>;
  2005. reg = <0x01 0x08>;
  2006. status = "okay";
  2007. phandle = <0x54>;
  2008. };
  2009.  
  2010. nvmem_priv {
  2011. compatible = "raspberrypi,rpi-otp";
  2012. firmware = <0x06>;
  2013. reg = <0x03 0x08>;
  2014. status = "okay";
  2015. phandle = <0x55>;
  2016. };
  2017. };
  2018. };
  2019.  
  2020. clocks {
  2021.  
  2022. clk-osc {
  2023. compatible = "fixed-clock";
  2024. #clock-cells = <0x00>;
  2025. clock-output-names = "osc";
  2026. clock-frequency = <0x337f980>;
  2027. phandle = <0x03>;
  2028. };
  2029.  
  2030. clk-usb {
  2031. compatible = "fixed-clock";
  2032. #clock-cells = <0x00>;
  2033. clock-output-names = "otg";
  2034. clock-frequency = <0x1c9c3800>;
  2035. phandle = <0x16>;
  2036. };
  2037. };
  2038.  
  2039. phy {
  2040. compatible = "usb-nop-xceiv";
  2041. #phy-cells = <0x00>;
  2042. phandle = <0x17>;
  2043. };
  2044.  
  2045. gpu {
  2046. compatible = "brcm,bcm2711-vc5";
  2047. status = "disabled";
  2048. raspberrypi,firmware = <0x06>;
  2049. phandle = <0xe5>;
  2050. };
  2051.  
  2052. clk-27M {
  2053. #clock-cells = <0x00>;
  2054. compatible = "fixed-clock";
  2055. clock-frequency = <0x19bfcc0>;
  2056. clock-output-names = "27MHz-clock";
  2057. phandle = <0x2f>;
  2058. };
  2059.  
  2060. clk-108M {
  2061. #clock-cells = <0x00>;
  2062. compatible = "fixed-clock";
  2063. clock-frequency = <0x66ff300>;
  2064. clock-output-names = "108MHz-clock";
  2065. phandle = <0x2a>;
  2066. };
  2067.  
  2068. emmc2bus {
  2069. compatible = "simple-bus";
  2070. #address-cells = <0x02>;
  2071. #size-cells = <0x01>;
  2072. ranges = <0x00 0x7e000000 0x00 0xfe000000 0x1800000>;
  2073. dma-ranges = <0x00 0xc0000000 0x00 0x00 0x40000000>;
  2074. phandle = <0xe6>;
  2075.  
  2076. mmc@7e340000 {
  2077. compatible = "brcm,bcm2711-emmc2";
  2078. reg = <0x00 0x7e340000 0x100>;
  2079. interrupts = <0x00 0x7e 0x04>;
  2080. clocks = <0x08 0x33>;
  2081. status = "okay";
  2082. bus-width = <0x08>;
  2083. vqmmc-supply = <0x37>;
  2084. vmmc-supply = <0x38>;
  2085. broken-cd;
  2086. mmc-ddr-3_3v;
  2087. phandle = <0x56>;
  2088. };
  2089. };
  2090.  
  2091. arm-pmu {
  2092. compatible = "arm,cortex-a72-pmu\0arm,armv8-pmuv3\0arm,cortex-a7-pmu";
  2093. interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>;
  2094. interrupt-affinity = <0x39 0x3a 0x3b 0x3c>;
  2095. };
  2096.  
  2097. timer {
  2098. compatible = "arm,armv8-timer";
  2099. interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
  2100. arm,cpu-registers-not-fw-configured;
  2101. };
  2102.  
  2103. cpus {
  2104. #address-cells = <0x01>;
  2105. #size-cells = <0x00>;
  2106. enable-method = "brcm,bcm2836-smp";
  2107. phandle = <0xe7>;
  2108.  
  2109. cpu@0 {
  2110. device_type = "cpu";
  2111. compatible = "arm,cortex-a72";
  2112. reg = <0x00>;
  2113. enable-method = "spin-table";
  2114. cpu-release-addr = <0x00 0xd8>;
  2115. d-cache-size = <0x8000>;
  2116. d-cache-line-size = <0x40>;
  2117. d-cache-sets = <0x100>;
  2118. i-cache-size = <0xc000>;
  2119. i-cache-line-size = <0x40>;
  2120. i-cache-sets = <0x100>;
  2121. next-level-cache = <0x3d>;
  2122. phandle = <0x39>;
  2123. };
  2124.  
  2125. cpu@1 {
  2126. device_type = "cpu";
  2127. compatible = "arm,cortex-a72";
  2128. reg = <0x01>;
  2129. enable-method = "spin-table";
  2130. cpu-release-addr = <0x00 0xe0>;
  2131. d-cache-size = <0x8000>;
  2132. d-cache-line-size = <0x40>;
  2133. d-cache-sets = <0x100>;
  2134. i-cache-size = <0xc000>;
  2135. i-cache-line-size = <0x40>;
  2136. i-cache-sets = <0x100>;
  2137. next-level-cache = <0x3d>;
  2138. phandle = <0x3a>;
  2139. };
  2140.  
  2141. cpu@2 {
  2142. device_type = "cpu";
  2143. compatible = "arm,cortex-a72";
  2144. reg = <0x02>;
  2145. enable-method = "spin-table";
  2146. cpu-release-addr = <0x00 0xe8>;
  2147. d-cache-size = <0x8000>;
  2148. d-cache-line-size = <0x40>;
  2149. d-cache-sets = <0x100>;
  2150. i-cache-size = <0xc000>;
  2151. i-cache-line-size = <0x40>;
  2152. i-cache-sets = <0x100>;
  2153. next-level-cache = <0x3d>;
  2154. phandle = <0x3b>;
  2155. };
  2156.  
  2157. cpu@3 {
  2158. device_type = "cpu";
  2159. compatible = "arm,cortex-a72";
  2160. reg = <0x03>;
  2161. enable-method = "spin-table";
  2162. cpu-release-addr = <0x00 0xf0>;
  2163. d-cache-size = <0x8000>;
  2164. d-cache-line-size = <0x40>;
  2165. d-cache-sets = <0x100>;
  2166. i-cache-size = <0xc000>;
  2167. i-cache-line-size = <0x40>;
  2168. i-cache-sets = <0x100>;
  2169. next-level-cache = <0x3d>;
  2170. phandle = <0x3c>;
  2171. };
  2172.  
  2173. l2-cache0 {
  2174. compatible = "cache";
  2175. cache-unified;
  2176. cache-size = <0x100000>;
  2177. cache-line-size = <0x40>;
  2178. cache-sets = <0x400>;
  2179. cache-level = <0x02>;
  2180. phandle = <0x3d>;
  2181. };
  2182. };
  2183.  
  2184. scb {
  2185. compatible = "simple-bus";
  2186. #address-cells = <0x02>;
  2187. #size-cells = <0x02>;
  2188. ranges = <0x00 0x7c000000 0x00 0xfc000000 0x00 0x3800000 0x00 0x40000000 0x00 0xff800000 0x00 0x800000 0x06 0x00 0x06 0x00 0x00 0x40000000 0x00 0x00 0x00 0x00 0x00 0xfc000000>;
  2189. dma-ranges = <0x04 0x7c000000 0x00 0xfc000000 0x00 0x3800000 0x00 0x00 0x00 0x00 0x04 0x00>;
  2190. phandle = <0xe8>;
  2191.  
  2192. pcie@7d500000 {
  2193. compatible = "brcm,bcm2711-pcie";
  2194. reg = <0x00 0x7d500000 0x00 0x9310>;
  2195. device_type = "pci";
  2196. #address-cells = <0x03>;
  2197. #interrupt-cells = <0x01>;
  2198. #size-cells = <0x02>;
  2199. interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>;
  2200. interrupt-names = "pcie\0msi";
  2201. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  2202. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8f 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x90 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x91 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x92 0x04>;
  2203. msi-controller;
  2204. msi-parent = <0x3e>;
  2205. ranges = <0x2000000 0x00 0xc0000000 0x06 0x00 0x00 0x40000000>;
  2206. dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x00 0xc0000000>;
  2207. brcm,enable-ssc;
  2208. brcm,enable-l1ss;
  2209. phandle = <0x3e>;
  2210.  
  2211. pci@0,0 {
  2212. device_type = "pci";
  2213. #address-cells = <0x03>;
  2214. #size-cells = <0x02>;
  2215. ranges;
  2216. reg = <0x00 0x00 0x00 0x00 0x00>;
  2217. };
  2218. };
  2219.  
  2220. ethernet@7d580000 {
  2221. compatible = "brcm,bcm2711-genet-v5";
  2222. reg = <0x00 0x7d580000 0x00 0x10000>;
  2223. #address-cells = <0x01>;
  2224. #size-cells = <0x01>;
  2225. interrupts = <0x00 0x9d 0x04 0x00 0x9e 0x04>;
  2226. status = "okay";
  2227. phy-handle = <0x3f>;
  2228. phy-mode = "rgmii-rxid";
  2229. phandle = <0xe9>;
  2230.  
  2231. mdio@e14 {
  2232. compatible = "brcm,genet-mdio-v5";
  2233. reg = <0xe14 0x08>;
  2234. reg-names = "mdio";
  2235. #address-cells = <0x01>;
  2236. #size-cells = <0x00>;
  2237. phandle = <0xea>;
  2238.  
  2239. ethernet-phy@0 {
  2240. reg = <0x00>;
  2241. led-modes = <0x00 0x08>;
  2242. phandle = <0x3f>;
  2243. };
  2244. };
  2245. };
  2246.  
  2247. dma@7e007b00 {
  2248. compatible = "brcm,bcm2711-dma";
  2249. reg = <0x00 0x7e007b00 0x00 0x400>;
  2250. interrupts = <0x00 0x59 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04 0x00 0x5c 0x04>;
  2251. interrupt-names = "dma11\0dma12\0dma13\0dma14";
  2252. #dma-cells = <0x01>;
  2253. brcm,dma-channel-mask = <0x7000>;
  2254. phandle = <0x2e>;
  2255. };
  2256.  
  2257. xhci@7e9c0000 {
  2258. compatible = "generic-xhci";
  2259. status = "disabled";
  2260. reg = <0x00 0x7e9c0000 0x00 0x100000>;
  2261. interrupts = <0x00 0xb0 0x04>;
  2262. power-domains = <0x10 0x06>;
  2263. phandle = <0xeb>;
  2264. };
  2265.  
  2266. codec@7eb10000 {
  2267. compatible = "raspberrypi,rpivid-vid-decoder";
  2268. reg = <0x00 0x7eb10000 0x00 0x1000 0x00 0x7eb00000 0x00 0x10000>;
  2269. reg-names = "intc\0hevc";
  2270. interrupts = <0x00 0x62 0x04>;
  2271. clocks = <0x14 0x0b>;
  2272. clock-names = "hevc";
  2273. };
  2274. };
  2275.  
  2276. cam1_regulator {
  2277. compatible = "regulator-fixed";
  2278. regulator-name = "cam1-reg";
  2279. enable-active-high;
  2280. status = "okay";
  2281. gpio = <0x0b 0x05 0x00>;
  2282. phandle = <0x5b>;
  2283. };
  2284.  
  2285. cam1_clk {
  2286. compatible = "fixed-clock";
  2287. #clock-cells = <0x00>;
  2288. status = "disabled";
  2289. phandle = <0xec>;
  2290. };
  2291.  
  2292. cam0_regulator {
  2293. compatible = "regulator-fixed";
  2294. regulator-name = "cam0-reg";
  2295. enable-active-high;
  2296. status = "disabled";
  2297. phandle = <0xed>;
  2298. };
  2299.  
  2300. cam0_clk {
  2301. compatible = "fixed-clock";
  2302. #clock-cells = <0x00>;
  2303. status = "disabled";
  2304. phandle = <0xee>;
  2305. };
  2306.  
  2307. cam_dummy_reg {
  2308. compatible = "regulator-fixed";
  2309. regulator-name = "cam-dummy-reg";
  2310. status = "okay";
  2311. phandle = <0xef>;
  2312. };
  2313.  
  2314. __overrides__ {
  2315. cam0-pwdn-ctrl;
  2316. cam0-pwdn;
  2317. cam0-led-ctrl;
  2318. cam0-led;
  2319. bdaddr = "\0\0\0@local-bd-address[\0\0\0\0@fallback-bd-address?=0\0\0\0\0Alocal-bd-address[\0\0\0\0Afallback-bd-address?=0";
  2320. krnbt = "\0\0\0@status";
  2321. krnbt_baudrate = "\0\0\0@max-speed:0\0\0\0\0Amax-speed:0";
  2322. cache_line_size;
  2323. uart0 = "\0\0\0Bstatus";
  2324. uart1 = "\0\0\0Cstatus";
  2325. i2s = "\0\0\0Dstatus";
  2326. spi = "\0\0\0Estatus";
  2327. i2c0 = "\0\0\02status\0\0\0\0Fstatus";
  2328. i2c1 = "\0\0\0Gstatus";
  2329. i2c = "\0\0\0Gstatus";
  2330. i2c_arm = "\0\0\0Gstatus";
  2331. i2c_vc = "\0\0\02status\0\0\0\0Fstatus";
  2332. i2c0_baudrate = "\0\0\02clock-frequency:0";
  2333. i2c1_baudrate = "\0\0\0Gclock-frequency:0";
  2334. i2c_baudrate = "\0\0\0Gclock-frequency:0";
  2335. i2c_arm_baudrate = "\0\0\0Gclock-frequency:0";
  2336. i2c_vc_baudrate = "\0\0\02clock-frequency:0";
  2337. watchdog = "\0\0\0Hstatus";
  2338. random = "\0\0\0Istatus";
  2339. sd_overclock = "\0\0\0Jbrcm,overclock-50:0";
  2340. sd_force_pio = "\0\0\0Jbrcm,force-pio?";
  2341. sd_pio_limit = "\0\0\0Jbrcm,pio-limit:0";
  2342. sd_debug = "\0\0\0Jbrcm,debug";
  2343. sdio_overclock = "\0\0\0Kbrcm,overclock-50:0\0\0\0\0Lbrcm,overclock-50:0";
  2344. axiperf = "\0\0\0Mstatus";
  2345. drm_fb0_vc4 = "\0\0\0Ndrm-fb0=\0/gpu";
  2346. drm_fb1_vc4 = "\0\0\0Ndrm-fb1=\0/gpu";
  2347. drm_fb2_vc4 = "\0\0\0Ndrm-fb2=\0/gpu";
  2348. cam1_sync = "\0\0\0Osync-gpios:0=\0\0\0\0\a\0\0\0Osync-gpios:4\0\0\0\0Osync-gpios:8=\0\0\0\0";
  2349. cam1_sync_inverted = [00 00 00 4f 73 79 6e 63 2d 67 70 69 6f 73 3a 30 3d 00 00 00 00 07 00 00 00 4f 73 79 6e 63 2d 67 70 69 6f 73 3a 34 00 00 00 00 4f 73 79 6e 63 2d 67 70 69 6f 73 3a 38 3d 00 00 00 00 01];
  2350. cam0_sync = "\0\0\0Psync-gpios:0=\0\0\0\0\a\0\0\0Psync-gpios:4\0\0\0\0Psync-gpios:8=\0\0\0\0";
  2351. cam0_sync_inverted = [00 00 00 50 73 79 6e 63 2d 67 70 69 6f 73 3a 30 3d 00 00 00 00 07 00 00 00 50 73 79 6e 63 2d 67 70 69 6f 73 3a 34 00 00 00 00 50 73 79 6e 63 2d 67 70 69 6f 73 3a 38 3d 00 00 00 00 01];
  2352. strict_gpiod = "\0\0\0Qbootargs=pinctrl_bcm2835.persist_gpio_outputs=n";
  2353. arm_freq;
  2354. eee = "\0\0\0Qbootargs{on='',off='genet.eee=N'}";
  2355. hdmi = "\0\0\0Rstatus\0\0\0\0Sstatus";
  2356. nvmem_cust_rw = "\0\0\0Trw?";
  2357. nvmem_priv_rw = "\0\0\0Urw?";
  2358. pcie = "\0\0\0>status";
  2359. sd = "\0\0\0Vstatus";
  2360. sd_poll_once = "\0\0\0Vnon-removable?";
  2361. spi_dma4 = <0x45 0x646d6173 0x3a303d00 0x2e 0x45 0x646d6173 0x3a383d00 0x2e>;
  2362. i2s_dma4 = <0x44 0x646d6173 0x3a303d00 0x2e 0x44 0x646d6173 0x3a383d00 0x2e>;
  2363. audio = "\0\0\0Qbootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
  2364. act_led_gpio = "\0\0\0Wgpios:4";
  2365. act_led_activelow = "\0\0\0Wgpios:8";
  2366. act_led_trigger = "\0\0\0Wlinux,default-trigger";
  2367. pwr_led_gpio = "\0\0\0Xgpios:4";
  2368. pwr_led_activelow = "\0\0\0Xgpios:8";
  2369. pwr_led_trigger = "\0\0\0Xlinux,default-trigger";
  2370. eth_led0 = "\0\0\0?led-modes:0";
  2371. eth_led1 = "\0\0\0?led-modes:4";
  2372. ant1 = "\0\0\0Youtput-high?=on\0\0\0\0Youtput-low?=off\0\0\0\0Zoutput-high?=off\0\0\0\0Zoutput-low?=on";
  2373. ant2 = "\0\0\0Youtput-high?=off\0\0\0\0Youtput-low?=on\0\0\0\0Zoutput-high?=on\0\0\0\0Zoutput-low?=off";
  2374. noant = "\0\0\0Youtput-high?=off\0\0\0\0Youtput-low?=on\0\0\0\0Zoutput-high?=off\0\0\0\0Zoutput-low?=on";
  2375. cam0_reg = "\0\0\0[status";
  2376. cam0_reg_gpio = [00 00 00 5b 67 70 69 6f 3a 34 00 00 00 00 5b 67 70 69 6f 3a 30 3d 00 00 00 00 07];
  2377. cam1_reg = "\0\0\0[status";
  2378. cam1_reg_gpio = [00 00 00 5b 67 70 69 6f 3a 34 00 00 00 00 5b 67 70 69 6f 3a 30 3d 00 00 00 00 07];
  2379. pcie_tperst_clk_ms = "\0\0\0>brcm,tperst-clk-ms:0";
  2380. };
  2381.  
  2382. memory@0 {
  2383. device_type = "memory";
  2384. reg = <0x00 0x00 0x00>;
  2385. };
  2386.  
  2387. leds {
  2388. compatible = "gpio-leds";
  2389. phandle = <0xf0>;
  2390.  
  2391. led-act {
  2392. label = "ACT";
  2393. default-state = "off";
  2394. linux,default-trigger = "mmc0";
  2395. gpios = <0x07 0x2a 0x00>;
  2396. phandle = <0x57>;
  2397. };
  2398.  
  2399. led-pwr {
  2400. label = "PWR";
  2401. gpios = <0x0b 0x02 0x01>;
  2402. default-state = "off";
  2403. linux,default-trigger = "default-on";
  2404. phandle = <0x58>;
  2405. };
  2406. };
  2407.  
  2408. sd_io_1v8_reg {
  2409. compatible = "regulator-gpio";
  2410. regulator-name = "vdd-sd-io";
  2411. regulator-min-microvolt = <0x1b7740>;
  2412. regulator-max-microvolt = <0x325aa0>;
  2413. regulator-boot-on;
  2414. regulator-always-on;
  2415. regulator-settling-time-us = <0x1388>;
  2416. gpios = <0x0b 0x04 0x00>;
  2417. states = <0x1b7740 0x01 0x325aa0 0x00>;
  2418. status = "okay";
  2419. phandle = <0x37>;
  2420. };
  2421.  
  2422. sd_vcc_reg {
  2423. compatible = "regulator-fixed";
  2424. regulator-name = "vcc-sd";
  2425. regulator-min-microvolt = <0x325aa0>;
  2426. regulator-max-microvolt = <0x325aa0>;
  2427. regulator-boot-on;
  2428. enable-active-high;
  2429. gpio = <0x0b 0x06 0x00>;
  2430. phandle = <0x38>;
  2431. };
  2432.  
  2433. fixedregulator_3v3 {
  2434. compatible = "regulator-fixed";
  2435. regulator-always-on;
  2436. regulator-max-microvolt = <0x325aa0>;
  2437. regulator-min-microvolt = <0x325aa0>;
  2438. regulator-name = "3v3";
  2439. phandle = <0xf1>;
  2440. };
  2441.  
  2442. fixedregulator_5v0 {
  2443. compatible = "regulator-fixed";
  2444. regulator-always-on;
  2445. regulator-max-microvolt = <0x4c4b40>;
  2446. regulator-min-microvolt = <0x4c4b40>;
  2447. regulator-name = "5v0";
  2448. phandle = <0xf2>;
  2449. };
  2450.  
  2451. zone_dma {
  2452. #address-cells = <0x01>;
  2453. #size-cells = <0x01>;
  2454. dma-ranges = <0x00 0x00 0x00 0x40000000>;
  2455. };
  2456.  
  2457. v3dbus {
  2458. compatible = "simple-bus";
  2459. #address-cells = <0x01>;
  2460. #size-cells = <0x02>;
  2461. ranges = <0x7c500000 0x00 0xfc500000 0x00 0x3300000 0x40000000 0x00 0xff800000 0x00 0x800000>;
  2462. dma-ranges = <0x00 0x00 0x00 0x04 0x00>;
  2463. phandle = <0xf3>;
  2464.  
  2465. v3d@7ec04000 {
  2466. compatible = "brcm,2711-v3d";
  2467. reg = <0x7ec00000 0x00 0x4000 0x7ec04000 0x00 0x4000>;
  2468. reg-names = "hub\0core0";
  2469. power-domains = <0x48 0x01>;
  2470. resets = <0x48 0x00>;
  2471. clocks = <0x14 0x05>;
  2472. clocks-names = "v3d";
  2473. interrupts = <0x00 0x4a 0x04>;
  2474. status = "disabled";
  2475. phandle = <0xf4>;
  2476. };
  2477. };
  2478.  
  2479. __symbols__ {
  2480. aliases = "/aliases";
  2481. chosen = "/chosen";
  2482. rmem = "/reserved-memory";
  2483. cma = "/reserved-memory/linux,cma";
  2484. blconfig = "/reserved-memory/nvram@0";
  2485. blpubkey = "/reserved-memory/nvram@1";
  2486. cpu_thermal = "/thermal-zones/cpu-thermal";
  2487. thermal_trips = "/thermal-zones/cpu-thermal/trips";
  2488. cooling_maps = "/thermal-zones/cpu-thermal/cooling-maps";
  2489. soc = "/soc";
  2490. system_timer = "/soc/timer@7e003000";
  2491. txp = "/soc/txp@7e004000";
  2492. clocks = "/soc/cprman@7e101000";
  2493. mailbox = "/soc/mailbox@7e00b880";
  2494. gpio = "/soc/gpio@7e200000";
  2495. dpi_gpio0 = "/soc/gpio@7e200000/dpi-gpio0";
  2496. emmc_gpio22 = "/soc/gpio@7e200000/emmc-gpio22";
  2497. emmc_gpio34 = "/soc/gpio@7e200000/emmc-gpio34";
  2498. emmc_gpio48 = "/soc/gpio@7e200000/emmc-gpio48";
  2499. gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0-gpio4";
  2500. gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1-gpio5";
  2501. gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1-gpio42";
  2502. gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1-gpio44";
  2503. gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2-gpio6";
  2504. gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2-gpio43";
  2505. i2c0_gpio0 = "/soc/gpio@7e200000/i2c0if-gpio0";
  2506. i2c0_gpio28 = "/soc/gpio@7e200000/i2c0if-gpio28";
  2507. i2c0_gpio44 = "/soc/gpio@7e200000/i2c0if-gpio44";
  2508. i2c1_gpio2 = "/soc/gpio@7e200000/i2c1-gpio2";
  2509. i2c1_gpio44 = "/soc/gpio@7e200000/i2c1-gpio44";
  2510. jtag_gpio22 = "/soc/gpio@7e200000/jtag-gpio22";
  2511. pcm_gpio18 = "/soc/gpio@7e200000/pcm-gpio18";
  2512. pcm_gpio28 = "/soc/gpio@7e200000/pcm-gpio28";
  2513. sdhost_gpio48 = "/soc/gpio@7e200000/sdhost-gpio48";
  2514. spi0_gpio7 = "/soc/gpio@7e200000/spi0-gpio7";
  2515. spi0_gpio35 = "/soc/gpio@7e200000/spi0-gpio35";
  2516. spi1_gpio16 = "/soc/gpio@7e200000/spi1-gpio16";
  2517. spi2_gpio40 = "/soc/gpio@7e200000/spi2-gpio40";
  2518. uart0_gpio14 = "/soc/gpio@7e200000/uart0-gpio14";
  2519. uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0-ctsrts-gpio16";
  2520. uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0-ctsrts-gpio30";
  2521. uart0_gpio32 = "/soc/gpio@7e200000/uart0-gpio32";
  2522. uart0_gpio36 = "/soc/gpio@7e200000/uart0-gpio36";
  2523. uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0-ctsrts-gpio38";
  2524. uart1_gpio14 = "/soc/gpio@7e200000/uart1-gpio14";
  2525. uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1-ctsrts-gpio16";
  2526. uart1_gpio32 = "/soc/gpio@7e200000/uart1-gpio32";
  2527. uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1-ctsrts-gpio30";
  2528. uart1_gpio40 = "/soc/gpio@7e200000/uart1-gpio40";
  2529. uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1-ctsrts-gpio42";
  2530. gpclk0_gpio49 = "/soc/gpio@7e200000/gpclk0-gpio49";
  2531. gpclk1_gpio50 = "/soc/gpio@7e200000/gpclk1-gpio50";
  2532. gpclk2_gpio51 = "/soc/gpio@7e200000/gpclk2-gpio51";
  2533. i2c0_gpio46 = "/soc/gpio@7e200000/i2c0if-gpio46";
  2534. i2c1_gpio46 = "/soc/gpio@7e200000/i2c1-gpio46";
  2535. i2c3_gpio2 = "/soc/gpio@7e200000/i2c3-gpio2";
  2536. i2c3_gpio4 = "/soc/gpio@7e200000/i2c3-gpio4";
  2537. i2c4_gpio6 = "/soc/gpio@7e200000/i2c4-gpio6";
  2538. i2c4_gpio8 = "/soc/gpio@7e200000/i2c4-gpio8";
  2539. i2c5_gpio10 = "/soc/gpio@7e200000/i2c5-gpio10";
  2540. i2c5_gpio12 = "/soc/gpio@7e200000/i2c5-gpio12";
  2541. i2c6_gpio0 = "/soc/gpio@7e200000/i2c6-gpio0";
  2542. i2c6_gpio22 = "/soc/gpio@7e200000/i2c6-gpio22";
  2543. i2c_slave_gpio8 = "/soc/gpio@7e200000/i2c-slave-gpio8";
  2544. jtag_gpio48 = "/soc/gpio@7e200000/jtag-gpio48";
  2545. mii_gpio28 = "/soc/gpio@7e200000/mii-gpio28";
  2546. mii_gpio36 = "/soc/gpio@7e200000/mii-gpio36";
  2547. pcm_gpio50 = "/soc/gpio@7e200000/pcm-gpio50";
  2548. pwm0_0_gpio12 = "/soc/gpio@7e200000/pwm0-0-gpio12";
  2549. pwm0_0_gpio18 = "/soc/gpio@7e200000/pwm0-0-gpio18";
  2550. pwm1_0_gpio40 = "/soc/gpio@7e200000/pwm1-0-gpio40";
  2551. pwm0_1_gpio13 = "/soc/gpio@7e200000/pwm0-1-gpio13";
  2552. pwm0_1_gpio19 = "/soc/gpio@7e200000/pwm0-1-gpio19";
  2553. pwm1_1_gpio41 = "/soc/gpio@7e200000/pwm1-1-gpio41";
  2554. pwm0_1_gpio45 = "/soc/gpio@7e200000/pwm0-1-gpio45";
  2555. pwm0_0_gpio52 = "/soc/gpio@7e200000/pwm0-0-gpio52";
  2556. pwm0_1_gpio53 = "/soc/gpio@7e200000/pwm0-1-gpio53";
  2557. rgmii_gpio35 = "/soc/gpio@7e200000/rgmii-gpio35";
  2558. rgmii_irq_gpio34 = "/soc/gpio@7e200000/rgmii-irq-gpio34";
  2559. rgmii_irq_gpio39 = "/soc/gpio@7e200000/rgmii-irq-gpio39";
  2560. rgmii_mdio_gpio28 = "/soc/gpio@7e200000/rgmii-mdio-gpio28";
  2561. rgmii_mdio_gpio37 = "/soc/gpio@7e200000/rgmii-mdio-gpio37";
  2562. spi0_gpio46 = "/soc/gpio@7e200000/spi0-gpio46";
  2563. spi2_gpio46 = "/soc/gpio@7e200000/spi2-gpio46";
  2564. spi3_gpio0 = "/soc/gpio@7e200000/spi3-gpio0";
  2565. spi4_gpio4 = "/soc/gpio@7e200000/spi4-gpio4";
  2566. spi5_gpio12 = "/soc/gpio@7e200000/spi5-gpio12";
  2567. spi6_gpio18 = "/soc/gpio@7e200000/spi6-gpio18";
  2568. uart2_gpio0 = "/soc/gpio@7e200000/uart2-gpio0";
  2569. uart2_ctsrts_gpio2 = "/soc/gpio@7e200000/uart2-ctsrts-gpio2";
  2570. uart3_gpio4 = "/soc/gpio@7e200000/uart3-gpio4";
  2571. uart3_ctsrts_gpio6 = "/soc/gpio@7e200000/uart3-ctsrts-gpio6";
  2572. uart4_gpio8 = "/soc/gpio@7e200000/uart4-gpio8";
  2573. uart4_ctsrts_gpio10 = "/soc/gpio@7e200000/uart4-ctsrts-gpio10";
  2574. uart5_gpio12 = "/soc/gpio@7e200000/uart5-gpio12";
  2575. uart5_ctsrts_gpio14 = "/soc/gpio@7e200000/uart5-ctsrts-gpio14";
  2576. dpi_18bit_cpadhi_gpio0 = "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio0";
  2577. dpi_18bit_cpadhi_gpio2 = "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio2";
  2578. dpi_18bit_gpio0 = "/soc/gpio@7e200000/dpi_18bit_gpio0";
  2579. dpi_18bit_gpio2 = "/soc/gpio@7e200000/dpi_18bit_gpio2";
  2580. dpi_16bit_gpio0 = "/soc/gpio@7e200000/dpi_16bit_gpio0";
  2581. dpi_16bit_gpio2 = "/soc/gpio@7e200000/dpi_16bit_gpio2";
  2582. dpi_16bit_cpadhi_gpio0 = "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio0";
  2583. dpi_16bit_cpadhi_gpio2 = "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio2";
  2584. gpioout = "/soc/gpio@7e200000/gpioout";
  2585. alt0 = "/soc/gpio@7e200000/alt0";
  2586. spi0_pins = "/soc/gpio@7e200000/spi0_pins";
  2587. spi0_cs_pins = "/soc/gpio@7e200000/spi0_cs_pins";
  2588. spi3_pins = "/soc/gpio@7e200000/spi3_pins";
  2589. spi3_cs_pins = "/soc/gpio@7e200000/spi3_cs_pins";
  2590. spi4_pins = "/soc/gpio@7e200000/spi4_pins";
  2591. spi4_cs_pins = "/soc/gpio@7e200000/spi4_cs_pins";
  2592. spi5_pins = "/soc/gpio@7e200000/spi5_pins";
  2593. spi5_cs_pins = "/soc/gpio@7e200000/spi5_cs_pins";
  2594. spi6_pins = "/soc/gpio@7e200000/spi6_pins";
  2595. spi6_cs_pins = "/soc/gpio@7e200000/spi6_cs_pins";
  2596. i2c0_pins = "/soc/gpio@7e200000/i2c0";
  2597. i2c1_pins = "/soc/gpio@7e200000/i2c1";
  2598. i2c3_pins = "/soc/gpio@7e200000/i2c3";
  2599. i2c4_pins = "/soc/gpio@7e200000/i2c4";
  2600. i2c5_pins = "/soc/gpio@7e200000/i2c5";
  2601. i2c6_pins = "/soc/gpio@7e200000/i2c6";
  2602. i2s_pins = "/soc/gpio@7e200000/i2s";
  2603. sdio_pins = "/soc/gpio@7e200000/sdio_pins";
  2604. uart2_pins = "/soc/gpio@7e200000/uart2_pins";
  2605. uart3_pins = "/soc/gpio@7e200000/uart3_pins";
  2606. uart4_pins = "/soc/gpio@7e200000/uart4_pins";
  2607. uart5_pins = "/soc/gpio@7e200000/uart5_pins";
  2608. bt_pins = "/soc/gpio@7e200000/bt_pins";
  2609. uart0_pins = "/soc/gpio@7e200000/uart0_pins";
  2610. uart1_pins = "/soc/gpio@7e200000/uart1_pins";
  2611. uart1_bt_pins = "/soc/gpio@7e200000/uart1_bt_pins";
  2612. audio_pins = "/soc/gpio@7e200000/audio_pins";
  2613. uart0 = "/soc/serial@7e201000";
  2614. bt = "/soc/serial@7e201000/bluetooth";
  2615. sdhost = "/soc/mmc@7e202000";
  2616. i2s_clk_consumer = "/soc/i2s@7e203000";
  2617. i2s_clk_producer = "/soc/i2s@7e203000";
  2618. i2s = "/soc/i2s@7e203000";
  2619. spi0 = "/soc/spi@7e204000";
  2620. spi = "/soc/spi@7e204000";
  2621. spidev0 = "/soc/spi@7e204000/spidev@0";
  2622. spidev1 = "/soc/spi@7e204000/spidev@1";
  2623. i2c0if = "/soc/i2c@7e205000";
  2624. dpi = "/soc/dpi@7e208000";
  2625. dsi0 = "/soc/dsi@7e209000";
  2626. aux = "/soc/aux@7e215000";
  2627. uart1 = "/soc/serial@7e215040";
  2628. minibt = "/soc/serial@7e215040/bluetooth";
  2629. spi1 = "/soc/spi@7e215080";
  2630. spi2 = "/soc/spi@7e2150c0";
  2631. pwm = "/soc/pwm@7e20c000";
  2632. mmc = "/soc/mmc@7e300000";
  2633. sdhci = "/soc/mmc@7e300000";
  2634. hvs = "/soc/hvs@7e400000";
  2635. dsi1 = "/soc/dsi@7e700000";
  2636. i2c_arm = "/soc/i2c@7e804000";
  2637. i2c1 = "/soc/i2c@7e804000";
  2638. usb = "/soc/usb@7e980000";
  2639. local_intc = "/soc/interrupt-controller@40000000";
  2640. gicv2 = "/soc/interrupt-controller@40041000";
  2641. avs_monitor = "/soc/avs-monitor@7d5d2000";
  2642. thermal = "/soc/avs-monitor@7d5d2000/thermal";
  2643. dma = "/soc/dma-controller@7e007000";
  2644. watchdog = "/soc/watchdog@7e100000";
  2645. pm = "/soc/watchdog@7e100000";
  2646. random = "/soc/rng@7e104000";
  2647. uart2 = "/soc/serial@7e201400";
  2648. uart3 = "/soc/serial@7e201600";
  2649. uart4 = "/soc/serial@7e201800";
  2650. uart5 = "/soc/serial@7e201a00";
  2651. spi3 = "/soc/spi@7e204600";
  2652. spi4 = "/soc/spi@7e204800";
  2653. spi5 = "/soc/spi@7e204a00";
  2654. spi6 = "/soc/spi@7e204c00";
  2655. i2c3 = "/soc/i2c@7e205600";
  2656. i2c4 = "/soc/i2c@7e205800";
  2657. i2c5 = "/soc/i2c@7e205a00";
  2658. i2c6 = "/soc/i2c@7e205c00";
  2659. pixelvalve0 = "/soc/pixelvalve@7e206000";
  2660. pixelvalve1 = "/soc/pixelvalve@7e207000";
  2661. pixelvalve2 = "/soc/pixelvalve@7e20a000";
  2662. pwm1 = "/soc/pwm@7e20c800";
  2663. pixelvalve4 = "/soc/pixelvalve@7e216000";
  2664. pixelvalve3 = "/soc/pixelvalve@7ec12000";
  2665. vec = "/soc/vec@7ec13000";
  2666. dvp = "/soc/clock@7ef00000";
  2667. aon_intr = "/soc/interrupt-controller@7ef00100";
  2668. hdmi0 = "/soc/hdmi@7ef00700";
  2669. ddc0 = "/soc/i2c@7ef04500";
  2670. hdmi1 = "/soc/hdmi@7ef05700";
  2671. ddc1 = "/soc/i2c@7ef09500";
  2672. mmcnr = "/soc/mmcnr@7e300000";
  2673. firmwarekms = "/soc/firmwarekms@7e600000";
  2674. smi = "/soc/smi@7e600000";
  2675. csi0 = "/soc/csi@7e800000";
  2676. csi1 = "/soc/csi@7e801000";
  2677. axiperf = "/soc/axiperf";
  2678. i2c0mux = "/soc/i2c0mux";
  2679. i2c_csi_dsi0 = "/soc/i2c0mux/i2c@0";
  2680. i2c_vc = "/soc/i2c0mux/i2c@0";
  2681. i2c0 = "/soc/i2c0mux/i2c@0";
  2682. i2c_csi_dsi = "/soc/i2c0mux/i2c@1";
  2683. firmware = "/soc/firmware";
  2684. firmware_clocks = "/soc/firmware/clocks";
  2685. expgpio = "/soc/firmware/gpio";
  2686. ant1 = "/soc/firmware/gpio/ant1";
  2687. ant2 = "/soc/firmware/gpio/ant2";
  2688. reset = "/soc/firmware/reset";
  2689. vcio = "/soc/firmware/vcio";
  2690. power = "/soc/power";
  2691. vchiq = "/soc/mailbox@7e00b840";
  2692. fb = "/soc/fb";
  2693. sound = "/soc/sound";
  2694. nvmem_otp = "/soc/nvmem/nvmem_otp";
  2695. nvmem_cust = "/soc/nvmem/nvmem_cust";
  2696. nvmem_priv = "/soc/nvmem/nvmem_priv";
  2697. clk_osc = "/clocks/clk-osc";
  2698. clk_usb = "/clocks/clk-usb";
  2699. usbphy = "/phy";
  2700. vc4 = "/gpu";
  2701. clk_27MHz = "/clk-27M";
  2702. clk_108MHz = "/clk-108M";
  2703. emmc2bus = "/emmc2bus";
  2704. emmc2 = "/emmc2bus/mmc@7e340000";
  2705. cpus = "/cpus";
  2706. cpu0 = "/cpus/cpu@0";
  2707. cpu1 = "/cpus/cpu@1";
  2708. cpu2 = "/cpus/cpu@2";
  2709. cpu3 = "/cpus/cpu@3";
  2710. l2 = "/cpus/l2-cache0";
  2711. scb = "/scb";
  2712. pcie0 = "/scb/pcie@7d500000";
  2713. genet = "/scb/ethernet@7d580000";
  2714. genet_mdio = "/scb/ethernet@7d580000/mdio@e14";
  2715. phy1 = "/scb/ethernet@7d580000/mdio@e14/ethernet-phy@0";
  2716. dma40 = "/scb/dma@7e007b00";
  2717. xhci = "/scb/xhci@7e9c0000";
  2718. cam0_reg = "/cam1_regulator";
  2719. cam1_reg = "/cam1_regulator";
  2720. cam1_clk = "/cam1_clk";
  2721. cam0_regulator = "/cam0_regulator";
  2722. cam0_clk = "/cam0_clk";
  2723. cam_dummy_reg = "/cam_dummy_reg";
  2724. leds = "/leds";
  2725. led_act = "/leds/led-act";
  2726. led_pwr = "/leds/led-pwr";
  2727. sd_io_1v8_reg = "/sd_io_1v8_reg";
  2728. sd_vcc_reg = "/sd_vcc_reg";
  2729. vdd_3v3_reg = "/fixedregulator_3v3";
  2730. vdd_5v0_reg = "/fixedregulator_5v0";
  2731. v3dbus = "/v3dbus";
  2732. v3d = "/v3dbus/v3d@7ec04000";
  2733. };
  2734. };
  2735.  
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement
Public Pastes
Advertisement
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!