azonenberg@mars:~/native/programming/MaliciousProcessor$ diff mc8051_fpga.vhd /home/azonenberg/native/downloads/MP/MaliciousProcessor/8051Core/mc8051_fpga.vhd
52c52
<   addra: in std_logic_vector(9 downto 0);
---
>   addra: in std_logic_vector(11 downto 0);
296,298c296
<   -- To change, regenerate the core.
<   -- Address widths patched by A. Zonenberg 2011-OCT-17
<   -- to work around compile issues in ISE 13.2
---
>   -- To change, regenerate the core.
303c301
<           addra => instr_ram_addr (9 downto 0),
---
>           addra => instr_ram_addr,
312c310
<           addra => ramx_addr (9 downto 0),
---
>           addra => ramx_addr,