module sha256(/*AUTOARG*/
   // Outputs
   next,
   // Inputs
   clk, rst_b, start, block, last
   );

   input clk, rst_b;
   input start;
   input [511:0] block;
   input [255:0] last;
   output reg [255:0] next;

   function [31:0] K(input [5:0] i);
      case (i)
    6'd0: K = 32'h428a2f98;
    6'd1: K = 32'h71374491;
    6'd2: K = 32'hb5c0fbcf;
    6'd3: K = 32'he9b5dba5;
    6'd4: K = 32'h3956c25b;
    6'd5: K = 32'h59f111f1;
    6'd6: K = 32'h923f82a4;
    6'd7: K = 32'hab1c5ed5;
    6'd8: K = 32'hd807aa98;
    6'd9: K = 32'h12835b01;
    6'd10: K = 32'h243185be;
    6'd11: K = 32'h550c7dc3;
    6'd12: K = 32'h72be5d74;
    6'd13: K = 32'h80deb1fe;
    6'd14: K = 32'h9bdc06a7;
    6'd15: K = 32'hc19bf174;
    6'd16: K = 32'he49b69c1;
    6'd17: K = 32'hefbe4786;
    6'd18: K = 32'h0fc19dc6;
    6'd19: K = 32'h240ca1cc;
    6'd20: K = 32'h2de92c6f;
    6'd21: K = 32'h4a7484aa;
    6'd22: K = 32'h5cb0a9dc;
    6'd23: K = 32'h76f988da;
    6'd24: K = 32'h983e5152;
    6'd25: K = 32'ha831c66d;
    6'd26: K = 32'hb00327c8;
    6'd27: K = 32'hbf597fc7;
    6'd28: K = 32'hc6e00bf3;
    6'd29: K = 32'hd5a79147;
    6'd30: K = 32'h06ca6351;
    6'd31: K = 32'h14292967;
    6'd32: K = 32'h27b70a85;
    6'd33: K = 32'h2e1b2138;
    6'd34: K = 32'h4d2c6dfc;
    6'd35: K = 32'h53380d13;
    6'd36: K = 32'h650a7354;
    6'd37: K = 32'h766a0abb;
    6'd38: K = 32'h81c2c92e;
    6'd39: K = 32'h92722c85;
    6'd40: K = 32'ha2bfe8a1;
    6'd41: K = 32'ha81a664b;
    6'd42: K = 32'hc24b8b70;
    6'd43: K = 32'hc76c51a3;
    6'd44: K = 32'hd192e819;
    6'd45: K = 32'hd6990624;
    6'd46: K = 32'hf40e3585;
    6'd47: K = 32'h106aa070;
    6'd48: K = 32'h19a4c116;
    6'd49: K = 32'h1e376c08;
    6'd50: K = 32'h2748774c;
    6'd51: K = 32'h34b0bcb5;
    6'd52: K = 32'h391c0cb3;
    6'd53: K = 32'h4ed8aa4a;
    6'd54: K = 32'h5b9cca4f;
    6'd55: K = 32'h682e6ff3;
    6'd56: K = 32'h748f82ee;
    6'd57: K = 32'h78a5636f;
    6'd58: K = 32'h84c87814;
    6'd59: K = 32'h8cc70208;
    6'd60: K = 32'h90befffa;
    6'd61: K = 32'ha4506ceb;
    6'd62: K = 32'hbef9a3f7;
    6'd63: K = 32'hc67178f2;
      endcase
   endfunction

   function [31:0] Ch(input [31:0] x, input [31:0] y, input [31:0] z);
      Ch = (x & y) ^ (~x & z);
   endfunction

   function [31:0] Maj(input [31:0] x, input [31:0] y, input [31:0] z);
      Maj = (x & y) ^ (x & z) ^ (y & z);
   endfunction

   function [31:0] BigSig0(input [31:0] x);
      BigSig0 = { x[1:0], x[31:2] } ^ { x[12:0], x[31:13] } ^ { x[21:0], x[31:22] };
   endfunction

   function [31:0] BigSig1(input [31:0] x);
      BigSig1 = { x[5:0], x[31:6] } ^ { x[10:0], x[31:11] } ^ { x[24:0], x[31:25] };
   endfunction

   function [31:0] LittleSig0(input [31:0] x);
      LittleSig0 = { x[6:0], x[31:7] } ^ { x[17:0], x[31:18] } ^ (x >> 3);
   endfunction

   function [31:0] LittleSig1(input [31:0] x);
      LittleSig1 = { x[16:0], x[31:17] } ^ { x[18:0], x[31:19] } ^ (x >> 10);
   endfunction

   parameter [1:0]    STATE_INIT = 2'd0, STATE_WAIT = 2'd1, STATE_LOOP = 2'd2;

   reg [1:0]          state, next_state;
   reg [31:0]         a,b,c,d,e,f,g,h,next_a,next_b,next_c,next_d,next_e,next_f,next_g,next_h;
   reg [31:0]         T1, T2;
   reg [31:0]         W [63:0];
   reg [5:0]          t, next_t;

   // Next state
   always @* begin
      if (state == STATE_WAIT) begin
     if (start)
       next_state = STATE_INIT;
     else
       next_state = STATE_WAIT;
      end else if (state == STATE_INIT) begin
     next_state = STATE_LOOP;
      end else if (state == STATE_LOOP) begin
     if (next_t == 6'b0)
       next_state = STATE_WAIT;
     else
       next_state = STATE_LOOP;
      end
   end

   // Registering
   always @(posedge clk or negedge rst_b) begin
      if (!rst_b)
    state <= STATE_WAIT;
      else
    state <= next_state;
   end

   // Datapath
   always @(state) begin
      if (state == STATE_INIT) begin
     next_a = last[255:224];
     next_b = last[223:192];
     next_c = last[191:160];
     next_d = last[159:128];
     next_e = last[127:96];
     next_f = last[95:64];
     next_g = last[63:32];
     next_h = last[31:0];

     next_t = 6'b0;
      end else if (state == STATE_LOOP) begin
     if (t < 16)
       W[t] = block >> (32 * (15 - t));
     else
       W[t] = LittleSig1(W[t-2]) + W[t-7] + LittleSig0(W[t-15]) + W[t-16];
     T1 = h + BigSig1(e) + Ch(e, f, g) + K(t) + W[t];
     T2 = BigSig0(a) + Maj(a, b, c);

     next_h = g;
     next_g = f;
     next_f = e;
     next_e = d + T1;
     next_d = c;
     next_c = b;
     next_b = a;
     next_a = T1 + T2;

     next_t = t + 1;
      end else begin
     next_a = 32'bx;
     next_b = 32'bx;
     next_c = 32'bx;
     next_d = 32'bx;
     next_e = 32'bx;
     next_f = 32'bx;
     next_g = 32'bx;
     next_h = 32'bx;
     next_t = 6'b0;
      end

      next = { a + last[255:224],
           b + last[223:192],
           c + last[191:160],
           d + last[159:128],
           e + last[127:96],
           f + last[95:64],
           g + last[63:32],
           h + last[31:0] };
   end

   // Registering
   always @(posedge clk or negedge rst_b) begin
      if (!rst_b) begin
     /*AUTORESET*/
     // Beginning of autoreset for uninitialized flops
     a <= 32'h0;
     b <= 32'h0;
     c <= 32'h0;
     d <= 32'h0;
     e <= 32'h0;
     f <= 32'h0;
     g <= 32'h0;
     h <= 32'h0;
     t <= 6'h0;
     // End of automatics
      end else begin
     a <= next_a;
     b <= next_b;
     c <= next_c;
     d <= next_d;
     e <= next_e;
     f <= next_f;
     g <= next_g;
     h <= next_h;
     t <= next_t;
      end
   end
endmodule