Henry-Galleguillos

operaciones - Suma o Resta en cada ALU

Dec 14th, 2020
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  1. library IEEE;
  2. use IEEE.STD_LOGIC_1164.ALL;
  3.  
  4. entity operaciones is
  5. Port ( x : in std_logic;
  6. y : in std_logic;
  7. Carry_in : in std_logic;
  8. Sum : out std_logic;
  9. Carry_out : out std_logic);
  10. end operaciones;
  11.  
  12. architecture Behavioral of operaciones is
  13. begin
  14. Carry_out <= ((x and y) or (Carry_in and y) or (Carry_in and x));
  15. Sum <= ((x xor y) xor Carry_in);
  16. end Behavioral;
  17.  
  18.  
  19.  
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