module pwm_rcv (avalon_slave_address, avalon_slave_readdata, clock_sink_clk, reset_sink_reset, avalon_slave_read, pwm_in);
parameter NUM_CHANNELS = 1;
parameter MIN_VALUE = 50000;
parameter MAX_VALUE = 250000;

// PWM regs/wires/clocks
input [NUM_CHANNELS - 1:0] pwm_in;


// Avalon regs/wires/clocks
input clock_sink_clk;
input reset_sink_reset;
input avalon_slave_read;
input [2:0] avalon_slave_address;
output [31:0] avalon_slave_readdata;


// Bus clock domain
reg [31:0] c_read_word = 32'b0;
assign avalon_slave_readdata = c_read_word;
reg read_in_progress = 1'b0;

// PWM values
reg[NUM_CHANNELS - 1:0][24:0] pwm_counters;
reg[NUM_CHANNELS - 1:0][24:0] pwm_values;
reg[NUM_CHANNELS - 1:0] pwm_prev;


// Read from bus

always @(posedge clock_sink_clk)
begin
    if (avalon_slave_read && !read_in_progress)
    begin
        c_read_word[31:24] <= avalon_slave_address;
        //generate
            for (integer i = 0; i < NUM_CHANNELS; i++) begin
                if (avalon_slave_address == i)
                begin
                    c_read_word[23:0] <= pwm_values[i];
                end
            end
        //endgenerate
        if (avalon_slave_address >=NUM_CHANNELS)
        begin
            c_read_word[23:0] <= 24'hFFFFFF;
        end
        read_in_progress <= 1'b1;
    end
    else
    begin
        read_in_progress <= 1'b0;
    end
end

// Read pwm

always @(posedge clock_sink_clk)
begin
    //generate
        for (integer i = 0; i < NUM_CHANNELS; i++) begin
            if (pwm_in[i])
            begin
                if (pwm_prev[i])
                begin
                    pwm_counters[i] <= pwm_counters[i] + 24'b1;
                end
                else
                begin
                    pwm_counters[i] <= 24'b0;
                    pwm_prev[i] <= 1'b1;
                end
            end
            else
            begin
                if (pwm_prev[i])
                begin
                    pwm_prev[i] <= 1'b0;
                    if (pwm_counters[i] >= MIN_VALUE && pwm_counters[i] <= MAX_VALUE)
                    begin
                        pwm_values[i] <= pwm_counters[i];
                    end
                end
            end
        end
    //endgenerate
end


endmodule