API tools faq
paste
Advertisement
Guest User

Untitled

a guest
Jun 13th, 2017
221
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 59.98 KB | None | 0 0
raw download clone embed print report
  1. gorgo@dago:~$ dtc -I dtb -O dts imx6sx-udoo-neo-full-hdmi-m4.dtb
  2. /dts-v1/;
  3.  
  4. / {
  5. #address-cells = <0x1>;
  6. #size-cells = <0x1>;
  7. model = "UDOO Neo Full";
  8. compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
  9.  
  10. chosen {
  11. };
  12.  
  13. aliases {
  14. can0 = "/soc/aips-bus@02000000/can@02090000";
  15. can1 = "/soc/aips-bus@02000000/can@02094000";
  16. ethernet0 = "/soc/aips-bus@02100000/ethernet@02188000";
  17. ethernet1 = "/soc/aips-bus@02100000/ethernet@021b4000";
  18. gpio0 = "/soc/aips-bus@02000000/gpio@0209c000";
  19. gpio1 = "/soc/aips-bus@02000000/gpio@020a0000";
  20. gpio2 = "/soc/aips-bus@02000000/gpio@020a4000";
  21. gpio3 = "/soc/aips-bus@02000000/gpio@020a8000";
  22. gpio4 = "/soc/aips-bus@02000000/gpio@020ac000";
  23. gpio5 = "/soc/aips-bus@02000000/gpio@020b0000";
  24. gpio6 = "/soc/aips-bus@02000000/gpio@020b4000";
  25. i2c0 = "/soc/aips-bus@02100000/i2c@021a0000";
  26. i2c1 = "/soc/aips-bus@02100000/i2c@021a4000";
  27. i2c2 = "/soc/aips-bus@02100000/i2c@021a8000";
  28. i2c3 = "/soc/aips-bus@02100000/i2c@021f8000";
  29. mmc0 = "/soc/aips-bus@02100000/usdhc@02194000";
  30. mmc1 = "/soc/aips-bus@02100000/usdhc@02194000";
  31. mmc2 = "/soc/aips-bus@02100000/usdhc@02198000";
  32. mmc3 = "/soc/aips-bus@02100000/usdhc@0219c000";
  33. serial0 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000";
  34. serial1 = "/soc/aips-bus@02100000/serial@021e8000";
  35. serial2 = "/soc/aips-bus@02100000/serial@021ec000";
  36. serial3 = "/soc/aips-bus@02100000/serial@021f0000";
  37. serial4 = "/soc/aips-bus@02100000/serial@021f4000";
  38. serial5 = "/soc/aips-bus@02200000/serial@022a0000";
  39. spi0 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02008000";
  40. spi1 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c000";
  41. spi2 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000";
  42. spi3 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000";
  43. spi4 = "/soc/aips-bus@02200000/ecspi@0228c000";
  44. usbphy0 = "/soc/aips-bus@02000000/usbphy@020c9000";
  45. usbphy1 = "/soc/aips-bus@02000000/usbphy@020ca000";
  46. };
  47.  
  48. memory {
  49. device_type = "memory";
  50. reg = <0x0 0x0>;
  51. };
  52.  
  53. cpus {
  54. #address-cells = <0x1>;
  55. #size-cells = <0x0>;
  56.  
  57. cpu@0 {
  58. compatible = "arm,cortex-a9";
  59. device_type = "cpu";
  60. reg = <0x0>;
  61. next-level-cache = <0x1>;
  62. operating-points = <0xf32a0 0x1312d0 0xc15c0 0x11edd8 0x60ae0 0x11edd8 0x30570 0x11edd8>;
  63. fsl,soc-operating-points = <0xf32a0 0x1312d0 0xc15c0 0x11edd8 0x60ae0 0x11edd8 0x30570 0x11edd8>;
  64. clock-latency = <0xee6c>;
  65. clocks = <0x2 0x81 0x2 0x14 0x2 0x23 0x2 0x24 0x2 0x4 0x2 0x101 0x2 0xfa 0x2 0xf3>;
  66. clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src";
  67. arm-supply = <0x3>;
  68. soc-supply = <0x3>;
  69. fsl,arm-soc-shared = <0x1>;
  70. };
  71. };
  72.  
  73. interrupt-controller@00a01000 {
  74. compatible = "arm,cortex-a9-gic";
  75. #interrupt-cells = <0x3>;
  76. interrupt-controller;
  77. reg = <0xa01000 0x1000 0xa00100 0x100>;
  78. linux,phandle = <0x4>;
  79. phandle = <0x4>;
  80. };
  81.  
  82. clocks {
  83. #address-cells = <0x1>;
  84. #size-cells = <0x0>;
  85.  
  86. clock@0 {
  87. compatible = "fixed-clock";
  88. reg = <0x0>;
  89. #clock-cells = <0x0>;
  90. clock-frequency = <0x8000>;
  91. clock-output-names = "ckil";
  92. linux,phandle = <0x14>;
  93. phandle = <0x14>;
  94. };
  95.  
  96. clock@1 {
  97. compatible = "fixed-clock";
  98. reg = <0x1>;
  99. #clock-cells = <0x0>;
  100. clock-frequency = <0x16e3600>;
  101. clock-output-names = "osc";
  102. linux,phandle = <0x15>;
  103. phandle = <0x15>;
  104. };
  105.  
  106. clock@2 {
  107. compatible = "fixed-clock";
  108. reg = <0x2>;
  109. #clock-cells = <0x0>;
  110. clock-frequency = <0x0>;
  111. clock-output-names = "ipp_di0";
  112. linux,phandle = <0x16>;
  113. phandle = <0x16>;
  114. };
  115.  
  116. clock@3 {
  117. compatible = "fixed-clock";
  118. reg = <0x3>;
  119. #clock-cells = <0x0>;
  120. clock-frequency = <0x0>;
  121. clock-output-names = "ipp_di1";
  122. linux,phandle = <0x17>;
  123. phandle = <0x17>;
  124. };
  125. };
  126.  
  127. soc {
  128. #address-cells = <0x1>;
  129. #size-cells = <0x1>;
  130. compatible = "simple-bus";
  131. interrupt-parent = <0x4>;
  132. ranges;
  133.  
  134. busfreq {
  135. compatible = "fsl,imx6_busfreq";
  136. clocks = <0x2 0x5 0x2 0x14 0x2 0x1a 0x2 0x81 0x2 0x6 0x2 0x7c 0x2 0x26 0x2 0x50 0x2 0x28 0x2 0x3 0x2 0x4 0x2 0x7d 0x2 0x7f 0x2 0x7e 0x2 0x24 0x2 0x27 0x2 0x29 0x2 0x51 0x2 0x23 0x2 0xb3 0x2 0xab>;
  137. clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "pll1_sys", "periph2", "ahb", "ocram", "pll1_sw", "periph2_pre", "periph2_clk2_sel", "periph2_clk2", "step", "mmdc", "m4";
  138. fsl,max_ddr_freq = <0x17d78400>;
  139. };
  140.  
  141. pmu {
  142. compatible = "arm,cortex-a9-pmu";
  143. interrupts = <0x0 0x5e 0x4>;
  144. };
  145.  
  146. sram@008f8000 {
  147. compatible = "fsl,lpm-sram";
  148. reg = <0x8f8000 0x4000>;
  149. clocks = <0x2 0x9d>;
  150. };
  151.  
  152. sram@00900000 {
  153. compatible = "fsl,ddr-lpm-sram";
  154. reg = <0x900000 0x1000>;
  155. clocks = <0x2 0x7e>;
  156. };
  157.  
  158. sram@00901000 {
  159. compatible = "mmio-sram";
  160. reg = <0x901000 0x1e000>;
  161. clocks = <0x2 0x7e>;
  162. linux,phandle = <0x27>;
  163. phandle = <0x27>;
  164. };
  165.  
  166. sram-mf@00900000 {
  167. compatible = "fsl,mega-fast-sram";
  168. reg = <0x900000 0x20000>;
  169. clocks = <0x2 0x7e>;
  170. };
  171.  
  172. l2-cache@00a02000 {
  173. compatible = "arm,pl310-cache";
  174. reg = <0xa02000 0x1000>;
  175. interrupts = <0x0 0x5c 0x4>;
  176. cache-unified;
  177. cache-level = <0x2>;
  178. arm,tag-latency = <0x4 0x2 0x3>;
  179. arm,data-latency = <0x4 0x2 0x3>;
  180. linux,phandle = <0x1>;
  181. phandle = <0x1>;
  182. };
  183.  
  184. gpu@01800000 {
  185. compatible = "fsl,imx6sx-gpu", "fsl,imx6q-gpu";
  186. reg = <0x1800000 0x4000 0x80000000 0x0>;
  187. reg-names = "iobase_3d", "phys_baseaddr";
  188. interrupts = <0x0 0xa 0x4>;
  189. interrupt-names = "irq_3d";
  190. clocks = <0x2 0x54 0x2 0x9c 0x2 0x0>;
  191. clock-names = "gpu3d_axi_clk", "gpu3d_clk", "gpu3d_shader_clk";
  192. resets = <0x5 0x0>;
  193. reset-names = "gpu3d";
  194. power-domains = <0x6 0x1>;
  195. };
  196.  
  197. caam-sm@00100000 {
  198. compatible = "fsl,imx6q-caam-sm";
  199. reg = <0x100000 0x3fff>;
  200. };
  201.  
  202. dma-apbh@01804000 {
  203. compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh";
  204. reg = <0x1804000 0x2000>;
  205. interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>;
  206. interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
  207. #dma-cells = <0x1>;
  208. dma-channels = <0x4>;
  209. clocks = <0x2 0x84>;
  210. linux,phandle = <0x7>;
  211. phandle = <0x7>;
  212. };
  213.  
  214. caam_secvio {
  215. compatible = "fsl,imx6q-caam-secvio";
  216. interrupts = <0x0 0x14 0x4>;
  217. secvio_src = <0x8000001d>;
  218. };
  219.  
  220. gpmi-nand@01806000 {
  221. compatible = "fsl,imx6sx-gpmi-nand";
  222. #address-cells = <0x1>;
  223. #size-cells = <0x1>;
  224. reg = <0x1806000 0x2000 0x1808000 0x4000>;
  225. reg-names = "gpmi-nand", "bch";
  226. interrupts = <0x0 0xf 0x4>;
  227. interrupt-names = "bch";
  228. clocks = <0x2 0xc0 0x2 0xc1 0x2 0xbf 0x2 0xbe 0x2 0xb8>;
  229. clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch";
  230. dmas = <0x7 0x0>;
  231. dma-names = "rx-tx";
  232. status = "disabled";
  233. };
  234.  
  235. aips-bus@02000000 {
  236. compatible = "fsl,aips-bus", "simple-bus";
  237. #address-cells = <0x1>;
  238. #size-cells = <0x1>;
  239. reg = <0x2000000 0x100000>;
  240. ranges;
  241.  
  242. spba-bus@02000000 {
  243. compatible = "fsl,spba-bus", "simple-bus";
  244. #address-cells = <0x1>;
  245. #size-cells = <0x1>;
  246. reg = <0x2000000 0x40000>;
  247. ranges;
  248.  
  249. spdif@02004000 {
  250. compatible = "fsl,imx6sx-spdif", "fsl,imx35-spdif";
  251. reg = <0x2004000 0x4000>;
  252. interrupts = <0x0 0x34 0x4>;
  253. dmas = <0x8 0xe 0x12 0x0 0x8 0xf 0x12 0x0>;
  254. dma-names = "rx", "tx";
  255. clocks = <0x2 0x10d 0x2 0x3 0x2 0xc5 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x52 0x2 0x0 0x2 0x0 0x2 0xc4>;
  256. clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "dma";
  257. status = "disabled";
  258. pinctrl-names = "default";
  259. pinctrl-0 = <0x9>;
  260. linux,phandle = <0x46>;
  261. phandle = <0x46>;
  262. };
  263.  
  264. ecspi@02008000 {
  265. #address-cells = <0x1>;
  266. #size-cells = <0x0>;
  267. compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
  268. reg = <0x2008000 0x4000>;
  269. interrupts = <0x0 0x1f 0x4>;
  270. clocks = <0x2 0x91 0x2 0x91>;
  271. clock-names = "ipg", "per";
  272. dmas = <0x8 0x3 0x7 0x1 0x8 0x4 0x7 0x2>;
  273. dma-names = "rx", "tx";
  274. status = "disabled";
  275. };
  276.  
  277. ecspi@0200c000 {
  278. #address-cells = <0x1>;
  279. #size-cells = <0x0>;
  280. compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
  281. reg = <0x200c000 0x4000>;
  282. interrupts = <0x0 0x20 0x4>;
  283. clocks = <0x2 0x92 0x2 0x92>;
  284. clock-names = "ipg", "per";
  285. dmas = <0x8 0x5 0x7 0x1 0x8 0x6 0x7 0x2>;
  286. dma-names = "rx", "tx";
  287. status = "disabled";
  288. fsl,spi-num-chipselects = <0x1>;
  289. cs-gpios = <0xa 0xe 0x1>;
  290. pinctrl-names = "default";
  291. pinctrl-0 = <0xb>;
  292.  
  293. spi@0 {
  294. compatible = "spidev";
  295. reg = <0x0>;
  296. spi-max-frequency = <0x1e8480>;
  297. };
  298. };
  299.  
  300. ecspi@02010000 {
  301. #address-cells = <0x1>;
  302. #size-cells = <0x0>;
  303. compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
  304. reg = <0x2010000 0x4000>;
  305. interrupts = <0x0 0x21 0x4>;
  306. clocks = <0x2 0x93 0x2 0x93>;
  307. clock-names = "ipg", "per";
  308. dmas = <0x8 0x7 0x7 0x1 0x8 0x8 0x7 0x2>;
  309. dma-names = "rx", "tx";
  310. status = "disabled";
  311. };
  312.  
  313. ecspi@02014000 {
  314. #address-cells = <0x1>;
  315. #size-cells = <0x0>;
  316. compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
  317. reg = <0x2014000 0x4000>;
  318. interrupts = <0x0 0x22 0x4>;
  319. clocks = <0x2 0x94 0x2 0x94>;
  320. clock-names = "ipg", "per";
  321. dmas = <0x8 0x9 0x7 0x1 0x8 0xa 0x7 0x2>;
  322. dma-names = "rx", "tx";
  323. status = "disabled";
  324. };
  325.  
  326. serial@02020000 {
  327. compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
  328. reg = <0x2020000 0x4000>;
  329. interrupts = <0x0 0x1a 0x4>;
  330. clocks = <0x2 0xcc 0x2 0xcd>;
  331. clock-names = "ipg", "per";
  332. dmas = <0x8 0x19 0x4 0x0 0x8 0x1a 0x4 0x0>;
  333. dma-names = "rx", "tx";
  334. status = "okay";
  335. pinctrl-names = "default";
  336. pinctrl-0 = <0xc>;
  337. };
  338.  
  339. esai@02024000 {
  340. compatible = "fsl,imx35-esai";
  341. reg = <0x2024000 0x4000>;
  342. interrupts = <0x0 0x33 0x4>;
  343. clocks = <0x2 0xef 0x2 0xf0 0x2 0x98 0x2 0xef 0x2 0xc4>;
  344. clock-names = "core", "mem", "extal", "fsys", "dma";
  345. dmas = <0x8 0x17 0x15 0x0 0x8 0x18 0x15 0x0>;
  346. dma-names = "rx", "tx";
  347. status = "disabled";
  348. };
  349.  
  350. ssi@02028000 {
  351. compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
  352. reg = <0x2028000 0x4000>;
  353. interrupts = <0x0 0x2e 0x4>;
  354. clocks = <0x2 0xc6 0x2 0xc9>;
  355. clock-names = "ipg", "baud";
  356. dmas = <0x8 0x25 0x1 0x0 0x8 0x26 0x1 0x0>;
  357. dma-names = "rx", "tx";
  358. status = "disabled";
  359. fsl,mode = "i2s-master";
  360. linux,phandle = <0x44>;
  361. phandle = <0x44>;
  362. };
  363.  
  364. ssi@0202c000 {
  365. compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
  366. reg = <0x202c000 0x4000>;
  367. interrupts = <0x0 0x2f 0x4>;
  368. clocks = <0x2 0xc7 0x2 0xca>;
  369. clock-names = "ipg", "baud";
  370. dmas = <0x8 0x29 0x1 0x0 0x8 0x2a 0x1 0x0>;
  371. dma-names = "rx", "tx";
  372. status = "okay";
  373. fsl,mode = "i2s-master";
  374. linux,phandle = <0x42>;
  375. phandle = <0x42>;
  376. };
  377.  
  378. ssi@02030000 {
  379. compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
  380. reg = <0x2030000 0x4000>;
  381. interrupts = <0x0 0x30 0x4>;
  382. clocks = <0x2 0xc8 0x2 0xcb>;
  383. clock-names = "ipg", "baud";
  384. dmas = <0x8 0x2d 0x1 0x0 0x8 0x2e 0x1 0x0>;
  385. dma-names = "rx", "tx";
  386. status = "disabled";
  387. };
  388.  
  389. asrc@02034000 {
  390. compatible = "fsl,imx53-asrc";
  391. reg = <0x2034000 0x4000>;
  392. interrupts = <0x0 0x32 0x4>;
  393. clocks = <0x2 0xeb 0x2 0xec 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0x0 0x2 0xc5 0x2 0x0 0x2 0x0 0x2 0xc4>;
  394. clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "dma";
  395. dmas = <0x8 0x11 0x17 0x1 0x8 0x12 0x17 0x1 0x8 0x13 0x17 0x1 0x8 0x14 0x17 0x1 0x8 0x15 0x17 0x1 0x8 0x16 0x17 0x1>;
  396. dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc";
  397. fsl,asrc-rate = <0xbb80>;
  398. fsl,asrc-width = <0x10>;
  399. status = "okay";
  400. };
  401.  
  402. asrc_p2p {
  403. compatible = "fsl,imx6q-asrc-p2p";
  404. fsl,p2p-rate = <0xbb80>;
  405. fsl,p2p-width = <0x10>;
  406. fsl,asrc-dma-rx-events = <0x11 0x12 0x13>;
  407. fsl,asrc-dma-tx-events = <0x14 0x15 0x16>;
  408. status = "okay";
  409. };
  410. };
  411.  
  412. pwm@02080000 {
  413. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  414. reg = <0x2080000 0x4000>;
  415. interrupts = <0x0 0x53 0x4>;
  416. clocks = <0x2 0xba 0x2 0xba>;
  417. clock-names = "ipg", "per";
  418. #pwm-cells = <0x2>;
  419. status = "disabled";
  420. pinctrl-names = "default";
  421. pinctrl-0 = <0xd>;
  422. };
  423.  
  424. pwm@02084000 {
  425. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  426. reg = <0x2084000 0x4000>;
  427. interrupts = <0x0 0x54 0x4>;
  428. clocks = <0x2 0xbb 0x2 0xbb>;
  429. clock-names = "ipg", "per";
  430. #pwm-cells = <0x2>;
  431. status = "disabled";
  432. pinctrl-names = "default";
  433. pinctrl-0 = <0xe>;
  434. };
  435.  
  436. pwm@02088000 {
  437. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  438. reg = <0x2088000 0x4000>;
  439. interrupts = <0x0 0x55 0x4>;
  440. clocks = <0x2 0xbc 0x2 0xbc>;
  441. clock-names = "ipg", "per";
  442. #pwm-cells = <0x2>;
  443. status = "disabled";
  444. pinctrl-names = "default";
  445. pinctrl-0 = <0xf>;
  446. };
  447.  
  448. pwm@0208c000 {
  449. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  450. reg = <0x208c000 0x4000>;
  451. interrupts = <0x0 0x56 0x4>;
  452. clocks = <0x2 0xbd 0x2 0xbd>;
  453. clock-names = "ipg", "per";
  454. #pwm-cells = <0x2>;
  455. status = "disabled";
  456. pinctrl-names = "default";
  457. pinctrl-0 = <0x10>;
  458. };
  459.  
  460. can@02090000 {
  461. compatible = "fsl,imx6sx-flexcan", "fsl,imx6q-flexcan";
  462. reg = <0x2090000 0x4000>;
  463. interrupts = <0x0 0x6e 0x4>;
  464. clocks = <0x2 0x89 0x2 0x8a>;
  465. clock-names = "ipg", "per";
  466. stop-mode = <0x11 0x10 0x1 0x10 0x11>;
  467. status = "disabled";
  468. pinctrl-names = "default";
  469. pinctrl-0 = <0x12>;
  470. };
  471.  
  472. can@02094000 {
  473. compatible = "fsl,imx6sx-flexcan", "fsl,imx6q-flexcan";
  474. reg = <0x2094000 0x4000>;
  475. interrupts = <0x0 0x6f 0x4>;
  476. clocks = <0x2 0x8b 0x2 0x8c>;
  477. clock-names = "ipg", "per";
  478. stop-mode = <0x11 0x10 0x2 0x10 0x12>;
  479. status = "disabled";
  480. pinctrl-names = "default";
  481. pinctrl-0 = <0x13>;
  482. };
  483.  
  484. gpt@02098000 {
  485. compatible = "fsl,imx6sx-gpt", "fsl,imx31-gpt";
  486. reg = <0x2098000 0x4000>;
  487. interrupts = <0x0 0x37 0x4>;
  488. clocks = <0x2 0x9a 0x2 0x9b>;
  489. clock-names = "ipg", "per";
  490. };
  491.  
  492. gpio@0209c000 {
  493. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  494. reg = <0x209c000 0x4000>;
  495. interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>;
  496. gpio-controller;
  497. #gpio-cells = <0x2>;
  498. interrupt-controller;
  499. #interrupt-cells = <0x2>;
  500. linux,phandle = <0x3f>;
  501. phandle = <0x3f>;
  502. };
  503.  
  504. gpio@020a0000 {
  505. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  506. reg = <0x20a0000 0x4000>;
  507. interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>;
  508. gpio-controller;
  509. #gpio-cells = <0x2>;
  510. interrupt-controller;
  511. #interrupt-cells = <0x2>;
  512. linux,phandle = <0x2b>;
  513. phandle = <0x2b>;
  514. };
  515.  
  516. gpio@020a4000 {
  517. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  518. reg = <0x20a4000 0x4000>;
  519. interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>;
  520. gpio-controller;
  521. #gpio-cells = <0x2>;
  522. interrupt-controller;
  523. #interrupt-cells = <0x2>;
  524. };
  525.  
  526. gpio@020a8000 {
  527. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  528. reg = <0x20a8000 0x4000>;
  529. interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>;
  530. gpio-controller;
  531. #gpio-cells = <0x2>;
  532. interrupt-controller;
  533. #interrupt-cells = <0x2>;
  534. m4-reserved-pin = <0x4 0x6 0x8 0x9>;
  535. linux,phandle = <0x41>;
  536. phandle = <0x41>;
  537. };
  538.  
  539. gpio@020ac000 {
  540. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  541. reg = <0x20ac000 0x4000>;
  542. interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>;
  543. gpio-controller;
  544. #gpio-cells = <0x2>;
  545. interrupt-controller;
  546. #interrupt-cells = <0x2>;
  547. m4-reserved-pin = <0xc 0xd 0xe 0xf 0x12 0x13 0x14 0x15>;
  548. linux,phandle = <0x26>;
  549. phandle = <0x26>;
  550. };
  551.  
  552. gpio@020b0000 {
  553. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  554. reg = <0x20b0000 0x4000>;
  555. interrupts = <0x0 0x4c 0x4 0x0 0x4d 0x4>;
  556. gpio-controller;
  557. #gpio-cells = <0x2>;
  558. interrupt-controller;
  559. #interrupt-cells = <0x2>;
  560. m4-reserved-pin = <0x12 0x13>;
  561. linux,phandle = <0xa>;
  562. phandle = <0xa>;
  563. };
  564.  
  565. gpio@020b4000 {
  566. compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
  567. reg = <0x20b4000 0x4000>;
  568. interrupts = <0x0 0x4e 0x4 0x0 0x4f 0x4>;
  569. gpio-controller;
  570. #gpio-cells = <0x2>;
  571. interrupt-controller;
  572. #interrupt-cells = <0x2>;
  573. linux,phandle = <0x47>;
  574. phandle = <0x47>;
  575. };
  576.  
  577. kpp@020b8000 {
  578. compatible = "fsl,imx6sx-kpp", "fsl,imx21-kpp";
  579. reg = <0x20b8000 0x4000>;
  580. interrupts = <0x0 0x52 0x4>;
  581. clocks = <0x2 0x0>;
  582. status = "disabled";
  583. };
  584.  
  585. wdog@020bc000 {
  586. compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
  587. reg = <0x20bc000 0x4000>;
  588. interrupts = <0x0 0x50 0x4>;
  589. clocks = <0x2 0x0>;
  590. };
  591.  
  592. wdog@020c0000 {
  593. compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
  594. reg = <0x20c0000 0x4000>;
  595. interrupts = <0x0 0x51 0x4>;
  596. clocks = <0x2 0x0>;
  597. status = "disabled";
  598. };
  599.  
  600. ccm@020c4000 {
  601. compatible = "fsl,imx6sx-ccm";
  602. reg = <0x20c4000 0x4000>;
  603. interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>;
  604. #clock-cells = <0x1>;
  605. clocks = <0x14 0x15 0x16 0x17>;
  606. clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
  607. fsl,shared-clks-number = <0x23>;
  608. fsl,shared-clks-index = <0x5 0x12 0x14 0x6 0x17 0x18 0x19 0x7 0x8 0x7e 0x8a 0x89 0x8c 0x8b 0x9e 0x91 0x92 0x93 0x94 0x95 0xb1 0xb7 0xc9 0xca 0xcb 0xcd 0xcc 0x28 0x108 0xa0 0xa1 0xa2 0xd9 0x96 0x97>;
  609. fsl,shared-mem-addr = <0x91f000>;
  610. fsl,shared-mem-size = <0x1000>;
  611. linux,phandle = <0x2>;
  612. phandle = <0x2>;
  613. };
  614.  
  615. anatop@020c8000 {
  616. compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop", "syscon", "simple-bus";
  617. reg = <0x20c8000 0x1000>;
  618. interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>;
  619. linux,phandle = <0x18>;
  620. phandle = <0x18>;
  621.  
  622. regulator-1p1@110 {
  623. compatible = "fsl,anatop-regulator";
  624. regulator-name = "vdd1p1";
  625. regulator-min-microvolt = <0xc3500>;
  626. regulator-max-microvolt = <0x14fb18>;
  627. regulator-always-on;
  628. anatop-reg-offset = <0x110>;
  629. anatop-vol-bit-shift = <0x8>;
  630. anatop-vol-bit-width = <0x5>;
  631. anatop-min-bit-val = <0x4>;
  632. anatop-min-voltage = <0xc3500>;
  633. anatop-max-voltage = <0x14fb18>;
  634. };
  635.  
  636. regulator-3p0@120 {
  637. compatible = "fsl,anatop-regulator";
  638. regulator-name = "vdd3p0";
  639. regulator-min-microvolt = <0x2ab980>;
  640. regulator-max-microvolt = <0x3010b0>;
  641. regulator-always-on;
  642. anatop-reg-offset = <0x120>;
  643. anatop-vol-bit-shift = <0x8>;
  644. anatop-vol-bit-width = <0x5>;
  645. anatop-min-bit-val = <0x0>;
  646. anatop-min-voltage = <0x280de8>;
  647. anatop-max-voltage = <0x33e140>;
  648. };
  649.  
  650. regulator-2p5@130 {
  651. compatible = "fsl,anatop-regulator";
  652. regulator-name = "vdd2p5";
  653. regulator-min-microvolt = <0x200b20>;
  654. regulator-max-microvolt = <0x2bde78>;
  655. regulator-always-on;
  656. anatop-reg-offset = <0x130>;
  657. anatop-vol-bit-shift = <0x8>;
  658. anatop-vol-bit-width = <0x5>;
  659. anatop-min-bit-val = <0x0>;
  660. anatop-min-voltage = <0x200b20>;
  661. anatop-max-voltage = <0x2bde78>;
  662. };
  663.  
  664. regulator-vddcore@140 {
  665. compatible = "fsl,anatop-regulator";
  666. regulator-name = "cpu";
  667. regulator-min-microvolt = <0xb1008>;
  668. regulator-max-microvolt = <0x162010>;
  669. regulator-always-on;
  670. anatop-reg-offset = <0x140>;
  671. anatop-vol-bit-shift = <0x0>;
  672. anatop-vol-bit-width = <0x5>;
  673. anatop-delay-reg-offset = <0x170>;
  674. anatop-delay-bit-shift = <0x18>;
  675. anatop-delay-bit-width = <0x2>;
  676. anatop-min-bit-val = <0x1>;
  677. anatop-min-voltage = <0xb1008>;
  678. anatop-max-voltage = <0x162010>;
  679. };
  680.  
  681. regulator-vddpcie-phy@140 {
  682. compatible = "fsl,anatop-regulator";
  683. regulator-name = "vddpcie-phy";
  684. regulator-min-microvolt = <0xb1008>;
  685. regulator-max-microvolt = <0x162010>;
  686. anatop-reg-offset = <0x140>;
  687. anatop-vol-bit-shift = <0x9>;
  688. anatop-vol-bit-width = <0x5>;
  689. anatop-delay-reg-offset = <0x170>;
  690. anatop-delay-bit-shift = <0x1a>;
  691. anatop-delay-bit-width = <0x2>;
  692. anatop-min-bit-val = <0x1>;
  693. anatop-min-voltage = <0xb1008>;
  694. anatop-max-voltage = <0x162010>;
  695. linux,phandle = <0x1a>;
  696. phandle = <0x1a>;
  697. };
  698.  
  699. regulator-vddsoc@140 {
  700. compatible = "fsl,anatop-regulator";
  701. regulator-name = "vddsoc";
  702. regulator-min-microvolt = <0xb1008>;
  703. regulator-max-microvolt = <0x162010>;
  704. regulator-always-on;
  705. anatop-reg-offset = <0x140>;
  706. anatop-vol-bit-shift = <0x12>;
  707. anatop-vol-bit-width = <0x5>;
  708. anatop-delay-reg-offset = <0x170>;
  709. anatop-delay-bit-shift = <0x1c>;
  710. anatop-delay-bit-width = <0x2>;
  711. anatop-min-bit-val = <0x1>;
  712. anatop-min-voltage = <0xb1008>;
  713. anatop-max-voltage = <0x162010>;
  714. };
  715. };
  716.  
  717. tempmon {
  718. compatible = "fsl,imx6sx-tempmon";
  719. interrupts = <0x0 0x31 0x4>;
  720. fsl,tempmon = <0x18>;
  721. fsl,tempmon-data = <0x19>;
  722. clocks = <0x2 0x6>;
  723. };
  724.  
  725. usbphy@020c9000 {
  726. compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
  727. reg = <0x20c9000 0x1000>;
  728. interrupts = <0x0 0x2c 0x4>;
  729. clocks = <0x2 0xb>;
  730. fsl,anatop = <0x18>;
  731. linux,phandle = <0x1d>;
  732. phandle = <0x1d>;
  733. };
  734.  
  735. usbphy@020ca000 {
  736. compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
  737. reg = <0x20ca000 0x1000>;
  738. interrupts = <0x0 0x2d 0x4>;
  739. clocks = <0x2 0xc>;
  740. fsl,anatop = <0x18>;
  741. linux,phandle = <0x21>;
  742. phandle = <0x21>;
  743. };
  744.  
  745. usbphy_nop1 {
  746. compatible = "usb-nop-xceiv";
  747. clocks = <0x2 0xb>;
  748. clock-names = "main_clk";
  749. linux,phandle = <0x23>;
  750. phandle = <0x23>;
  751. };
  752.  
  753. mqs {
  754. compatible = "fsl,imx6sx-mqs";
  755. gpr = <0x11>;
  756. status = "disabled";
  757. };
  758.  
  759. caam-snvs@020cc000 {
  760. compatible = "fsl,imx6q-caam-snvs";
  761. reg = <0x20cc000 0x4000>;
  762. };
  763.  
  764. snvs@020cc000 {
  765. compatible = "fsl,sec-v4.0-mon", "simple-bus";
  766. #address-cells = <0x1>;
  767. #size-cells = <0x1>;
  768. ranges = <0x0 0x20cc000 0x4000>;
  769. status = "disabled";
  770.  
  771. snvs-rtc-lp@34 {
  772. compatible = "fsl,sec-v4.0-mon-rtc-lp";
  773. reg = <0x34 0x58>;
  774. interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>;
  775. };
  776. };
  777.  
  778. snvs-pwrkey@0x020cc000 {
  779. compatible = "fsl,imx6sx-snvs-pwrkey";
  780. reg = <0x20cc000 0x4000>;
  781. interrupts = <0x0 0x4 0x4>;
  782. fsl,keycode = <0x74>;
  783. fsl,wakeup;
  784. };
  785.  
  786. epit@020d0000 {
  787. reg = <0x20d0000 0x4000>;
  788. interrupts = <0x0 0x38 0x4>;
  789. };
  790.  
  791. epit@020d4000 {
  792. reg = <0x20d4000 0x4000>;
  793. interrupts = <0x0 0x39 0x4>;
  794. };
  795.  
  796. src@020d8000 {
  797. compatible = "fsl,imx6sx-src", "fsl,imx51-src";
  798. reg = <0x20d8000 0x4000>;
  799. interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>;
  800. #reset-cells = <0x1>;
  801. linux,phandle = <0x5>;
  802. phandle = <0x5>;
  803. };
  804.  
  805. gpc@020dc000 {
  806. compatible = "fsl,imx6sx-gpc", "fsl,imx6q-gpc";
  807. reg = <0x20dc000 0x4000>;
  808. interrupts = <0x0 0x59 0x4>;
  809. fsl,mf-mix-wakeup-irq = <0x7c00000 0x3d00 0x0 0x400240>;
  810. clocks = <0x2 0x9c 0x2 0x52 0x2 0xaa 0x2 0xad 0x2 0xaf 0x2 0xa9 0x2 0xae 0x2 0x9f 0x2 0xd7>;
  811. clock-names = "gpu3d_core", "ipg", "pxp_axi", "disp_axi", "lcdif1_pix", "lcdif_axi", "lcdif2_pix", "csi_mclk";
  812. pcie-phy-supply = <0x1a>;
  813. #power-domain-cells = <0x1>;
  814. fsl,ldo-bypass = <0x1>;
  815. linux,phandle = <0x6>;
  816. phandle = <0x6>;
  817. };
  818.  
  819. iomuxc@020e0000 {
  820. compatible = "fsl,imx6sx-iomuxc";
  821. reg = <0x20e0000 0x4000>;
  822. pinctrl-names = "default";
  823. pinctrl-0 = <0x1b 0x1c>;
  824.  
  825. imx6x-udoo-neo {
  826.  
  827. hoggrp {
  828. fsl,pins = <0x220 0x568 0x0 0x5 0x0 0x80000000 0x224 0x56c 0x0 0x5 0x0 0x80000000 0x228 0x570 0x0 0x5 0x0 0x80000000 0x144 0x48c 0x0 0x5 0x0 0x80000000 0x178 0x4c0 0x0 0x5 0x0 0x80000000 0x1a8 0x4f0 0x0 0x5 0x0 0x80000000 0x21c 0x564 0x0 0x5 0x0 0x80000000 0x200 0x548 0x0 0x5 0x0 0x80000000 0x194 0x4dc 0x0 0x5 0x0 0x80000000 0x198 0x4e0 0x0 0x5 0x0 0x80000000 0x188 0x4d0 0x0 0x5 0x0 0x80000000 0x18c 0x4d4 0x0 0x5 0x0 0x80000000 0x174 0x4bc 0x0 0x5 0x0 0x80000000 0x140 0x488 0x0 0x5 0x0 0x80000000>;
  829. linux,phandle = <0x1b>;
  830. phandle = <0x1b>;
  831. };
  832.  
  833. audmuxgrp-hdmi {
  834. fsl,pins = <0xa4 0x3ec 0x66c 0x4 0x0 0x130b0 0xa8 0x3f0 0x670 0x4 0x0 0x130b0 0xb8 0x400 0x660 0x4 0x0 0x120b0>;
  835. linux,phandle = <0x2f>;
  836. phandle = <0x2f>;
  837. };
  838.  
  839. uart3grp-1 {
  840. fsl,pins = <0x70 0x3b8 0x0 0x2 0x0 0x10059 0x268 0x5b0 0x840 0x3 0x2 0x13059 0x26c 0x5b4 0x0 0x3 0x0 0x13059 0x270 0x5b8 0x83c 0x3 0x2 0x13059 0x274 0x5bc 0x0 0x3 0x0 0x13059 0xc0 0x408 0x0 0x5 0x0 0x15059>;
  841. linux,phandle = <0x31>;
  842. phandle = <0x31>;
  843. };
  844.  
  845. usbotg1grp {
  846. fsl,pins = <0x34 0x37c 0x860 0x0 0x0 0x10b0 0x38 0x380 0x0 0x5 0x0 0x10b0>;
  847. linux,phandle = <0x3e>;
  848. phandle = <0x3e>;
  849. };
  850.  
  851. usbotg1idgrp {
  852. fsl,pins = <0x3c 0x384 0x624 0x0 0x0 0x17059>;
  853. linux,phandle = <0x20>;
  854. phandle = <0x20>;
  855. };
  856.  
  857. usbot2ggrp {
  858. fsl,pins = <0x180 0x4c8 0x85c 0x1 0x2 0x10b0 0x170 0x4b8 0x0 0x5 0x0 0x10b0>;
  859. linux,phandle = <0x40>;
  860. phandle = <0x40>;
  861. };
  862.  
  863. enet1grp-2 {
  864. fsl,pins = <0x88 0x3d0 0x764 0x0 0x1 0xa0b1 0x84 0x3cc 0x0 0x0 0x0 0xa0b1 0x1d8 0x520 0x0 0x0 0x0 0xa0b1 0x1dc 0x524 0x0 0x0 0x0 0xa0b1 0x1e8 0x530 0x0 0x0 0x0 0xa0b1 0x1d4 0x51c 0x0 0x1 0x0 0x3081 0x90 0x3d8 0x760 0x1 0x1 0x3081 0x1c0 0x508 0x0 0x0 0x0 0x3081 0x1c4 0x50c 0x0 0x0 0x0 0x3081 0x1d0 0x518 0x0 0x0 0x0 0x3081 0xa0 0x3e8 0x0 0x5 0x0 0x3081>;
  865. linux,phandle = <0x24>;
  866. phandle = <0x24>;
  867. };
  868.  
  869. enet1_clkoutgrp-2 {
  870. fsl,pins = <0x9c 0x3e4 0x0 0x1 0x0 0x91>;
  871. linux,phandle = <0x25>;
  872. phandle = <0x25>;
  873. };
  874.  
  875. usdhc2grp-1 {
  876. fsl,pins = <0x23c 0x584 0x0 0x0 0x0 0x17059 0x238 0x580 0x0 0x0 0x0 0x10059 0x240 0x588 0x0 0x0 0x0 0x17059 0x244 0x58c 0x0 0x0 0x0 0x17059 0x248 0x590 0x0 0x0 0x0 0x17059 0x24c 0x594 0x0 0x0 0x0 0x17059>;
  877. linux,phandle = <0x28>;
  878. phandle = <0x28>;
  879. };
  880.  
  881. usdhc3grp-wifi {
  882. fsl,pins = <0x254 0x59c 0x0 0x0 0x0 0x17069 0x250 0x598 0x0 0x0 0x0 0x10069 0x258 0x5a0 0x0 0x0 0x0 0x17069 0x25c 0x5a4 0x0 0x0 0x0 0x17069 0x260 0x5a8 0x0 0x0 0x0 0x17069 0x264 0x5ac 0x0 0x0 0x0 0x17069 0xac 0x3f4 0x0 0x5 0x0 0x15059 0xbc 0x404 0x0 0x5 0x0 0x13059>;
  883. linux,phandle = <0x29>;
  884. phandle = <0x29>;
  885. };
  886.  
  887. i2c1grp-1 {
  888. fsl,pins = <0x18 0x360 0x7ac 0x0 0x1 0x4001b8b1 0x14 0x35c 0x7a8 0x0 0x1 0x4001b8b1>;
  889. linux,phandle = <0x2c>;
  890. phandle = <0x2c>;
  891. };
  892.  
  893. i2c2grp-1 {
  894. fsl,pins = <0x20 0x368 0x7b4 0x0 0x1 0x4001b8b1 0x1c 0x364 0x7b0 0x0 0x1 0x4001b8b1>;
  895. linux,phandle = <0x2d>;
  896. phandle = <0x2d>;
  897. };
  898.  
  899. i2c3grp-2 {
  900. fsl,pins = <0xc8 0x410 0x7bc 0x2 0x2 0x4001b8b1 0xb4 0x3fc 0x7b8 0x2 0x2 0x4001b8b1>;
  901. linux,phandle = <0x2e>;
  902. phandle = <0x2e>;
  903. };
  904.  
  905. i2c4grp-1 {
  906. fsl,pins = <0x2a4 0x5ec 0x7c4 0x3 0x1 0x4001b8b1 0x2a8 0x5f0 0x7c0 0x3 0x1 0x4001b8b1>;
  907. linux,phandle = <0x32>;
  908. phandle = <0x32>;
  909. };
  910.  
  911. lcdifdatgrp {
  912. fsl,pins = <0xd0 0x418 0x0 0x0 0x0 0x4001b0b0 0xd4 0x41c 0x0 0x0 0x0 0x4001b0b0 0xd8 0x420 0x0 0x0 0x0 0x4001b0b0 0xdc 0x424 0x0 0x0 0x0 0x4001b0b0 0xe0 0x428 0x0 0x0 0x0 0x4001b0b0 0xe4 0x42c 0x0 0x0 0x0 0x4001b0b0 0xe8 0x430 0x0 0x0 0x0 0x4001b0b0 0xec 0x434 0x0 0x0 0x0 0x4001b0b0 0xf0 0x438 0x0 0x0 0x0 0x4001b0b0 0xf4 0x43c 0x0 0x0 0x0 0x4001b0b0 0xf8 0x440 0x0 0x0 0x0 0x4001b0b0 0xfc 0x444 0x0 0x0 0x0 0x4001b0b0 0x100 0x448 0x0 0x0 0x0 0x4001b0b0 0x104 0x44c 0x0 0x0 0x0 0x4001b0b0 0x108 0x450 0x0 0x0 0x0 0x4001b0b0 0x10c 0x454 0x0 0x0 0x0 0x4001b0b0 0x110 0x458 0x0 0x0 0x0 0x4001b0b0 0x114 0x45c 0x0 0x0 0x0 0x4001b0b0 0x118 0x460 0x0 0x0 0x0 0x4001b0b0 0x11c 0x464 0x0 0x0 0x0 0x4001b0b0 0x120 0x468 0x0 0x0 0x0 0x4001b0b0 0x124 0x46c 0x0 0x0 0x0 0x4001b0b0 0x128 0x470 0x0 0x0 0x0 0x4001b0b0 0x12c 0x474 0x0 0x0 0x0 0x4001b0b0>;
  913. linux,phandle = <0x34>;
  914. phandle = <0x34>;
  915. };
  916.  
  917. lcdifctrlgrp {
  918. fsl,pins = <0xcc 0x414 0x0 0x0 0x0 0x4001b0b0 0x130 0x478 0x0 0x0 0x0 0x4001b0b0 0x13c 0x484 0x0 0x0 0x0 0x4001b0b0 0x134 0x47c 0x7e0 0x0 0x0 0x4001b0b0 0x138 0x480 0x0 0x5 0x0 0x80000000>;
  919. linux,phandle = <0x35>;
  920. phandle = <0x35>;
  921. };
  922.  
  923. ldbctrlgrp-0 {
  924. fsl,pins = <0x22c 0x574 0x0 0x5 0x0 0x80000000 0x1ac 0x4f4 0x0 0x5 0x0 0x80000000>;
  925. };
  926.  
  927. st1232grp-0 {
  928. fsl,pins = <0x230 0x578 0x0 0x5 0x0 0x80000000 0x234 0x57c 0x0 0x5 0x0 0x80000000>;
  929. };
  930.  
  931. hoggrp-2 {
  932. fsl,pins = <0x168 0x4b0 0x0 0x5 0x0 0x80000000 0x16c 0x4b4 0x0 0x5 0x0 0x80000000 0x298 0x5e0 0x0 0x5 0x0 0x80000000 0x29c 0x5e4 0x0 0x5 0x0 0x80000000 0x278 0x5c0 0x0 0x5 0x0 0x80000000 0x27c 0x5c4 0x0 0x5 0x0 0x80000000 0x2a0 0x5e8 0x0 0x5 0x0 0x80000000 0x74 0x3bc 0x0 0x5 0x0 0x80000000 0x78 0x3c0 0x0 0x5 0x0 0x80000000 0x6c 0x3b4 0x0 0x5 0x0 0x80000000 0x4c 0x394 0x0 0x5 0x0 0x80000000 0x50 0x398 0x0 0x5 0x0 0x80000000 0x54 0x39c 0x0 0x5 0x0 0x80000000 0x58 0x3a0 0x0 0x5 0x0 0x80000000 0x2a8 0x5f0 0x0 0x5 0x0 0x80000000 0x2a4 0x5ec 0x0 0x5 0x0 0x80000000 0x28c 0x5d4 0x0 0x5 0x0 0x80000000 0x288 0x5d0 0x0 0x5 0x0 0x80000000 0x284 0x5cc 0x0 0x5 0x0 0x80000000 0x280 0x5c8 0x0 0x5 0x0 0x80000000 0x19c 0x4e4 0x0 0x5 0x0 0x80000000 0x1b0 0x4f8 0x0 0x5 0x0 0x80000000 0x1bc 0x504 0x0 0x5 0x0 0x80000000 0x190 0x4d8 0x0 0x5 0x0 0x80000000 0x30 0x378 0x0 0x5 0x0 0x80000000 0x2c 0x374 0x0 0x5 0x0 0x80000000>;
  933. linux,phandle = <0x1c>;
  934. phandle = <0x1c>;
  935. };
  936.  
  937. audmuxgrp-dac {
  938. fsl,pins = <0x4c 0x394 0x684 0x2 0x1 0x130b0 0x50 0x398 0x688 0x2 0x1 0x130b0 0x6c 0x3b4 0x678 0x2 0x1 0x120b0>;
  939. };
  940.  
  941. ecspi2grp {
  942. fsl,pins = <0x278 0x5c0 0x724 0x2 0x1 0x100b1 0x27c 0x5c4 0x728 0x2 0x1 0x100b1 0x284 0x5cc 0x720 0x2 0x1 0x100b1 0x280 0x5c8 0x0 0x5 0x0 0xb0b1>;
  943. linux,phandle = <0xb>;
  944. phandle = <0xb>;
  945. };
  946.  
  947. uart1grp-1 {
  948. fsl,pins = <0x24 0x36c 0x0 0x0 0x0 0x1b0b1 0x28 0x370 0x830 0x0 0x1 0x1b0b1>;
  949. linux,phandle = <0xc>;
  950. phandle = <0xc>;
  951. };
  952.  
  953. uart2grp-1 {
  954. fsl,pins = <0x30 0x378 0x838 0x0 0x1 0x1b0b1 0x2c 0x374 0x0 0x0 0x0 0x1b0b1>;
  955. linux,phandle = <0x30>;
  956. phandle = <0x30>;
  957. };
  958.  
  959. uart6grp-1 {
  960. fsl,pins = <0x68 0x3b0 0x0 0x4 0x0 0x1b0b1 0x64 0x3ac 0x854 0x4 0x0 0x1b0b1 0x60 0x3a8 0x0 0x4 0x0 0x1b0b1 0x5c 0x3a4 0x858 0x4 0x0 0x1b0b1>;
  961. linux,phandle = <0x3b>;
  962. phandle = <0x3b>;
  963. };
  964.  
  965. pwm1grp {
  966. fsl,pins = <0x2a8 0x5f0 0x0 0x1 0x0 0x1b0b1>;
  967. linux,phandle = <0xd>;
  968. phandle = <0xd>;
  969. };
  970.  
  971. pwm2grp {
  972. fsl,pins = <0x2a4 0x5ec 0x0 0x1 0x0 0x1b0b1>;
  973. linux,phandle = <0xe>;
  974. phandle = <0xe>;
  975. };
  976.  
  977. pwm3grp {
  978. fsl,pins = <0x168 0x4b0 0x0 0x4 0x0 0x1b0b1>;
  979. linux,phandle = <0xf>;
  980. phandle = <0xf>;
  981. };
  982.  
  983. pwm4grp {
  984. fsl,pins = <0x16c 0x4b4 0x0 0x4 0x0 0x1b0b1>;
  985. linux,phandle = <0x10>;
  986. phandle = <0x10>;
  987. };
  988.  
  989. pwm5grp {
  990. fsl,pins = <0x5c 0x3a4 0x0 0x7 0x0 0x1b0b1>;
  991. linux,phandle = <0x3c>;
  992. phandle = <0x3c>;
  993. };
  994.  
  995. pwm6grp {
  996. fsl,pins = <0x60 0x3a8 0x0 0x7 0x0 0x1b0b1>;
  997. linux,phandle = <0x3d>;
  998. phandle = <0x3d>;
  999. };
  1000.  
  1001. flexcan1grp {
  1002. fsl,pins = <0x1b0 0x4f8 0x0 0x1 0x0 0x80000000 0x19c 0x4e4 0x68c 0x1 0x2 0x80000000>;
  1003. linux,phandle = <0x12>;
  1004. phandle = <0x12>;
  1005. };
  1006.  
  1007. flexcan2grp {
  1008. fsl,pins = <0x1bc 0x504 0x690 0x1 0x2 0x80000000 0x190 0x4d8 0x0 0x1 0x0 0x80000000>;
  1009. linux,phandle = <0x13>;
  1010. phandle = <0x13>;
  1011. };
  1012.  
  1013. spdifgrp {
  1014. fsl,pins = <0x5c 0x3a4 0x0 0x2 0x0 0x1b0b0>;
  1015. linux,phandle = <0x9>;
  1016. phandle = <0x9>;
  1017. };
  1018. };
  1019. };
  1020.  
  1021. iomuxc-gpr@020e4000 {
  1022. compatible = "fsl,imx6sx-iomuxc-gpr", "syscon";
  1023. reg = <0x20e4000 0x4000>;
  1024. linux,phandle = <0x11>;
  1025. phandle = <0x11>;
  1026. };
  1027.  
  1028. ldb@020e0014 {
  1029. #address-cells = <0x1>;
  1030. #size-cells = <0x0>;
  1031. compatible = "fsl,imx6sx-ldb", "fsl,imx53-ldb";
  1032. gpr = <0x11>;
  1033. status = "disabled";
  1034. clocks = <0x2 0xb0 0x2 0x49 0x2 0x4a 0x2 0x76 0x2 0x77 0x2 0x39>;
  1035. clock-names = "ldb_di0", "di0_sel", "di1_sel", "ldb_di0_div_3_5", "ldb_di0_div_7", "ldb_di0_div_sel";
  1036.  
  1037. lvds-channel@0 {
  1038. reg = <0x0>;
  1039. status = "disabled";
  1040. };
  1041. };
  1042.  
  1043. sdma@020ec000 {
  1044. compatible = "fsl,imx6sx-sdma", "fsl,imx35-sdma";
  1045. reg = <0x20ec000 0x4000>;
  1046. interrupts = <0x0 0x2 0x4>;
  1047. clocks = <0x2 0xc3 0x2 0xc3>;
  1048. clock-names = "ipg", "ahb";
  1049. #dma-cells = <0x3>;
  1050. fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
  1051. linux,phandle = <0x8>;
  1052. phandle = <0x8>;
  1053. };
  1054. };
  1055.  
  1056. aips-bus@02100000 {
  1057. compatible = "fsl,aips-bus", "simple-bus";
  1058. #address-cells = <0x1>;
  1059. #size-cells = <0x1>;
  1060. reg = <0x2100000 0x100000>;
  1061. ranges;
  1062.  
  1063. caam@2100000 {
  1064. compatible = "fsl,sec-v4.0";
  1065. #address-cells = <0x1>;
  1066. #size-cells = <0x1>;
  1067. reg = <0x2100000 0x40000>;
  1068. ranges = <0x0 0x2100000 0x40000>;
  1069. interrupt-parent = <0x4>;
  1070. clocks = <0x2 0x86 0x2 0x87 0x2 0x88 0x2 0xd5>;
  1071. clock-names = "caam_mem", "caam_aclk", "caam_ipg", "caam_emi_slow";
  1072.  
  1073. jr0@1000 {
  1074. compatible = "fsl,sec-v4.0-job-ring";
  1075. reg = <0x1000 0x1000>;
  1076. interrupt-parent = <0x4>;
  1077. interrupts = <0x0 0x69 0x4>;
  1078. };
  1079.  
  1080. jr1@2000 {
  1081. compatible = "fsl,sec-v4.0-job-ring";
  1082. reg = <0x2000 0x1000>;
  1083. interrupt-parent = <0x4>;
  1084. interrupts = <0x0 0x6a 0x4>;
  1085. };
  1086. };
  1087.  
  1088. usb@02184000 {
  1089. compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
  1090. reg = <0x2184000 0x200>;
  1091. interrupts = <0x0 0x2b 0x4>;
  1092. clocks = <0x2 0xd0>;
  1093. fsl,usbphy = <0x1d>;
  1094. fsl,usbmisc = <0x1e 0x0>;
  1095. fsl,anatop = <0x18>;
  1096. status = "okay";
  1097. vbus-supply = <0x1f>;
  1098. pinctrl-names = "default";
  1099. pinctrl-0 = <0x20>;
  1100. imx6-usb-charger-detection;
  1101. };
  1102.  
  1103. usb@02184200 {
  1104. compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
  1105. reg = <0x2184200 0x200>;
  1106. interrupts = <0x0 0x2a 0x4>;
  1107. clocks = <0x2 0xd0>;
  1108. fsl,usbphy = <0x21>;
  1109. fsl,usbmisc = <0x1e 0x1>;
  1110. status = "okay";
  1111. vbus-supply = <0x22>;
  1112. dr_mode = "host";
  1113. };
  1114.  
  1115. usb@02184400 {
  1116. compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
  1117. reg = <0x2184400 0x200>;
  1118. interrupts = <0x0 0x28 0x4>;
  1119. clocks = <0x2 0xd0>;
  1120. fsl,usbmisc = <0x1e 0x2>;
  1121. phy_type = "hsic";
  1122. fsl,usbphy = <0x23>;
  1123. fsl,anatop = <0x18>;
  1124. status = "disabled";
  1125. };
  1126.  
  1127. usbmisc@02184800 {
  1128. #index-cells = <0x1>;
  1129. compatible = "fsl,imx6sx-usbmisc", "fsl,imx6q-usbmisc";
  1130. reg = <0x2184800 0x200>;
  1131. clocks = <0x2 0xd0>;
  1132. linux,phandle = <0x1e>;
  1133. phandle = <0x1e>;
  1134. };
  1135.  
  1136. ethernet@02188000 {
  1137. compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
  1138. reg = <0x2188000 0x4000>;
  1139. interrupts = <0x0 0x76 0x4 0x0 0x77 0x4>;
  1140. clocks = <0x2 0xac 0x2 0xe1 0x2 0xe4 0x2 0x11 0x2 0xe4>;
  1141. clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out";
  1142. fsl,num-tx-queues = <0x3>;
  1143. fsl,num-rx-queues = <0x3>;
  1144. status = "okay";
  1145. pinctrl-names = "default";
  1146. pinctrl-0 = <0x24 0x25>;
  1147. phy-reset-gpios = <0x26 0x4 0x0>;
  1148. phy-mode = "rmii";
  1149. fsl,num_tx_queues = <0x3>;
  1150. fsl,num_rx_queues = <0x3>;
  1151. };
  1152.  
  1153. mlb@0218c000 {
  1154. compatible = "fsl,imx6sx-mlb50";
  1155. reg = <0x218c000 0x4000>;
  1156. interrupts = <0x0 0x35 0x4 0x0 0x75 0x4 0x0 0x7e 0x4>;
  1157. clocks = <0x2 0xb2>;
  1158. clock-names = "mlb";
  1159. iram = <0x27>;
  1160. status = "disabled";
  1161. };
  1162.  
  1163. usdhc@02190000 {
  1164. compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
  1165. reg = <0x2190000 0x4000>;
  1166. interrupts = <0x0 0x16 0x4>;
  1167. clocks = <0x2 0xd1 0x2 0xd1 0x2 0xd1>;
  1168. clock-names = "ipg", "ahb", "per";
  1169. bus-width = <0x4>;
  1170. status = "disabled";
  1171. };
  1172.  
  1173. usdhc@02194000 {
  1174. compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
  1175. reg = <0x2194000 0x4000>;
  1176. interrupts = <0x0 0x17 0x4>;
  1177. clocks = <0x2 0xd2 0x2 0xd2 0x2 0xd2>;
  1178. clock-names = "ipg", "ahb", "per";
  1179. bus-width = <0x4>;
  1180. status = "okay";
  1181. pinctrl-names = "default";
  1182. pinctrl-0 = <0x28>;
  1183. no-1-8-v;
  1184. cd-gpios = <0xa 0x2 0x0>;
  1185. keep-power-in-suspend;
  1186. enable-sdio-wakeup;
  1187. };
  1188.  
  1189. usdhc@02198000 {
  1190. compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
  1191. reg = <0x2198000 0x4000>;
  1192. interrupts = <0x0 0x18 0x4>;
  1193. clocks = <0x2 0xd3 0x2 0xd3 0x2 0xd3>;
  1194. clock-names = "ipg", "ahb", "per";
  1195. bus-width = <0x4>;
  1196. status = "okay";
  1197. pinctrl-names = "default";
  1198. pinctrl-0 = <0x29>;
  1199. enable-sdio-wakeup;
  1200. non-removable;
  1201. vmmc-supply = <0x2a>;
  1202. cap-power-off-card;
  1203. keep-power-in-suspend;
  1204. #address-cells = <0x1>;
  1205. #size-cells = <0x0>;
  1206.  
  1207. wlcore@0 {
  1208. compatible = "ti,wl1831";
  1209. reg = <0x2>;
  1210. interrupt-parent = <0x2b>;
  1211. interrupts = <0x10 0x1>;
  1212. ref-clock-frequency = <0x249f000>;
  1213. tcxo-clock-frequency = <0x18cba80>;
  1214. };
  1215. };
  1216.  
  1217. usdhc@0219c000 {
  1218. compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
  1219. reg = <0x219c000 0x4000>;
  1220. interrupts = <0x0 0x19 0x4>;
  1221. clocks = <0x2 0xd4 0x2 0xd4 0x2 0xd4>;
  1222. clock-names = "ipg", "ahb", "per";
  1223. bus-width = <0x4>;
  1224. status = "disabled";
  1225. };
  1226.  
  1227. i2c@021a0000 {
  1228. #address-cells = <0x1>;
  1229. #size-cells = <0x0>;
  1230. compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
  1231. reg = <0x21a0000 0x4000>;
  1232. interrupts = <0x0 0x24 0x4>;
  1233. clocks = <0x2 0xa0>;
  1234. status = "okay";
  1235. clock-frequency = <0x186a0>;
  1236. pinctrl-names = "default";
  1237. pinctrl-0 = <0x2c>;
  1238.  
  1239. pfuze3000@08 {
  1240. compatible = "fsl,pfuze3000";
  1241. reg = <0x8>;
  1242.  
  1243. regulators {
  1244.  
  1245. sw1a {
  1246. regulator-min-microvolt = <0xaae60>;
  1247. regulator-max-microvolt = <0x1681b8>;
  1248. regulator-boot-on;
  1249. regulator-always-on;
  1250. regulator-ramp-delay = <0x186a>;
  1251. linux,phandle = <0x3>;
  1252. phandle = <0x3>;
  1253. };
  1254.  
  1255. sw1b {
  1256. regulator-min-microvolt = <0xaae60>;
  1257. regulator-max-microvolt = <0x1681b8>;
  1258. regulator-boot-on;
  1259. regulator-always-on;
  1260. regulator-ramp-delay = <0x186a>;
  1261. };
  1262.  
  1263. sw2 {
  1264. regulator-min-microvolt = <0x16e360>;
  1265. regulator-max-microvolt = <0x1c3a90>;
  1266. regulator-boot-on;
  1267. regulator-always-on;
  1268. };
  1269.  
  1270. sw3 {
  1271. regulator-min-microvolt = <0xdbba0>;
  1272. regulator-max-microvolt = <0x192d50>;
  1273. regulator-boot-on;
  1274. regulator-always-on;
  1275. };
  1276.  
  1277. swbst {
  1278. regulator-min-microvolt = <0x4c4b40>;
  1279. regulator-max-microvolt = <0x4e9530>;
  1280. };
  1281.  
  1282. vsnvs {
  1283. regulator-min-microvolt = <0xf4240>;
  1284. regulator-max-microvolt = <0x2dc6c0>;
  1285. regulator-boot-on;
  1286. regulator-always-on;
  1287. };
  1288.  
  1289. vrefddr {
  1290. regulator-boot-on;
  1291. regulator-always-on;
  1292. };
  1293.  
  1294. vldo1 {
  1295. regulator-min-microvolt = <0x1b7740>;
  1296. regulator-max-microvolt = <0x325aa0>;
  1297. regulator-always-on;
  1298. };
  1299.  
  1300. vldo2 {
  1301. regulator-min-microvolt = <0xc3500>;
  1302. regulator-max-microvolt = <0x17a6b0>;
  1303. };
  1304.  
  1305. vccsd {
  1306. regulator-min-microvolt = <0x2b7cd0>;
  1307. regulator-max-microvolt = <0x325aa0>;
  1308. regulator-always-on;
  1309. };
  1310.  
  1311. v33 {
  1312. regulator-min-microvolt = <0x2b7cd0>;
  1313. regulator-max-microvolt = <0x325aa0>;
  1314. regulator-always-on;
  1315. };
  1316.  
  1317. vldo3 {
  1318. regulator-min-microvolt = <0x1b7740>;
  1319. regulator-max-microvolt = <0x325aa0>;
  1320. regulator-always-on;
  1321. linux,phandle = <0x36>;
  1322. phandle = <0x36>;
  1323. };
  1324.  
  1325. vldo4 {
  1326. regulator-min-microvolt = <0x1b7740>;
  1327. regulator-max-microvolt = <0x325aa0>;
  1328. regulator-always-on;
  1329. };
  1330. };
  1331. };
  1332. };
  1333.  
  1334. i2c@021a4000 {
  1335. #address-cells = <0x1>;
  1336. #size-cells = <0x0>;
  1337. compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
  1338. reg = <0x21a4000 0x4000>;
  1339. interrupts = <0x0 0x25 0x4>;
  1340. clocks = <0x2 0xa1>;
  1341. status = "okay";
  1342. clock-frequency = <0x186a0>;
  1343. pinctrl-names = "default";
  1344. pinctrl-0 = <0x2d>;
  1345.  
  1346. mpl3115@60 {
  1347. compatible = "fsl,mpl3115";
  1348. reg = <0x60>;
  1349. };
  1350.  
  1351. tsl2561@29 {
  1352. compatible = "amstaos,tsl2561";
  1353. reg = <0x29>;
  1354. };
  1355.  
  1356. lm75@48 {
  1357. compatible = "national,lm75";
  1358. reg = <0x48>;
  1359. };
  1360.  
  1361. si70xx@40 {
  1362. compatible = "silabs,si70xx";
  1363. reg = <0x40>;
  1364. };
  1365. };
  1366.  
  1367. i2c@021a8000 {
  1368. #address-cells = <0x1>;
  1369. #size-cells = <0x0>;
  1370. compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
  1371. reg = <0x21a8000 0x4000>;
  1372. interrupts = <0x0 0x26 0x4>;
  1373. clocks = <0x2 0xa2>;
  1374. status = "okay";
  1375. clock-frequency = <0x186a0>;
  1376. pinctrl-names = "default";
  1377. pinctrl-0 = <0x2e>;
  1378.  
  1379. tda19988@34 {
  1380. compatible = "udoo,tda19988";
  1381. reg = <0x34>;
  1382. status = "okay";
  1383. };
  1384. };
  1385.  
  1386. mmdc@021b0000 {
  1387. compatible = "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";
  1388. reg = <0x21b0000 0x4000>;
  1389. };
  1390.  
  1391. ethernet@021b4000 {
  1392. compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
  1393. reg = <0x21b4000 0x4000>;
  1394. interrupts = <0x0 0x66 0x4 0x0 0x67 0x4>;
  1395. clocks = <0x2 0xac 0x2 0xe1 0x2 0xe4 0x2 0xe7 0x2 0xe4>;
  1396. clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out";
  1397. fsl,num-tx-queues = <0x3>;
  1398. fsl,num-rx-queues = <0x3>;
  1399. status = "disabled";
  1400. };
  1401.  
  1402. weim@021b8000 {
  1403. compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim";
  1404. reg = <0x21b8000 0x4000>;
  1405. interrupts = <0x0 0xe 0x4>;
  1406. clocks = <0x2 0xd5>;
  1407. };
  1408.  
  1409. ocotp-ctrl@021bc000 {
  1410. compatible = "syscon";
  1411. reg = <0x21bc000 0x4000>;
  1412. clocks = <0x2 0xa3>;
  1413. linux,phandle = <0x19>;
  1414. phandle = <0x19>;
  1415. };
  1416.  
  1417. ocotp-fuse@021bc000 {
  1418. compatible = "fsl,imx6sx-ocotp", "fsl,imx6q-ocotp";
  1419. reg = <0x21bc000 0x4000>;
  1420. clocks = <0x2 0xa3>;
  1421. };
  1422.  
  1423. romcp@021ac000 {
  1424. compatible = "fsl,imx6sx-romcp", "syscon";
  1425. reg = <0x21ac000 0x4000>;
  1426. };
  1427.  
  1428. sai@021d4000 {
  1429. compatible = "fsl,imx6sx-sai";
  1430. reg = <0x21d4000 0x4000>;
  1431. interrupts = <0x0 0x61 0x4>;
  1432. clocks = <0x2 0xed 0x2 0xce 0x2 0x0 0x2 0x0>;
  1433. clock-names = "bus", "mclk1", "mclk2", "mclk3";
  1434. dma-names = "rx", "tx";
  1435. dmas = <0x8 0x1f 0x19 0x0 0x8 0x20 0x19 0x0>;
  1436. dma-source = <0x11 0x0 0xf 0x0 0x10>;
  1437. status = "disabled";
  1438. };
  1439.  
  1440. audmux@021d8000 {
  1441. compatible = "fsl,imx6sx-audmux", "fsl,imx31-audmux";
  1442. reg = <0x21d8000 0x4000>;
  1443. status = "okay";
  1444. pinctrl-names = "default";
  1445. pinctrl-0 = <0x2f>;
  1446. };
  1447.  
  1448. sai@021dc000 {
  1449. compatible = "fsl,imx6sx-sai";
  1450. reg = <0x21dc000 0x4000>;
  1451. interrupts = <0x0 0x62 0x4>;
  1452. clocks = <0x2 0xee 0x2 0xcf 0x2 0x0 0x2 0x0>;
  1453. clock-names = "bus", "mclk1", "mclk2", "mclk3";
  1454. dma-names = "rx", "tx";
  1455. dmas = <0x8 0x21 0x19 0x0 0x8 0x22 0x19 0x0>;
  1456. dma-source = <0x11 0x0 0x11 0x0 0x12>;
  1457. status = "disabled";
  1458. };
  1459.  
  1460. qspi@021e0000 {
  1461. #address-cells = <0x1>;
  1462. #size-cells = <0x0>;
  1463. compatible = "fsl,imx6sx-qspi";
  1464. reg = <0x21e0000 0x4000 0x60000000 0x10000000>;
  1465. reg-names = "QuadSPI", "QuadSPI-memory";
  1466. interrupts = <0x0 0x6b 0x4>;
  1467. clocks = <0x2 0xb1 0x2 0xb1>;
  1468. clock-names = "qspi_en", "qspi";
  1469. status = "disabled";
  1470. };
  1471.  
  1472. qspi@021e4000 {
  1473. #address-cells = <0x1>;
  1474. #size-cells = <0x0>;
  1475. compatible = "fsl,imx6sx-qspi";
  1476. reg = <0x21e4000 0x4000 0x70000000 0x10000000>;
  1477. reg-names = "QuadSPI", "QuadSPI-memory";
  1478. interrupts = <0x0 0x6d 0x4>;
  1479. clocks = <0x2 0xb7 0x2 0xb7>;
  1480. clock-names = "qspi_en", "qspi";
  1481. status = "disabled";
  1482. };
  1483.  
  1484. qspi-m4 {
  1485. compatible = "fsl,imx6sx-qspi-m4-restore";
  1486. reg = <0x21e4000 0x4000>;
  1487. status = "okay";
  1488. };
  1489.  
  1490. serial@021e8000 {
  1491. compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
  1492. reg = <0x21e8000 0x4000>;
  1493. interrupts = <0x0 0x1b 0x4>;
  1494. clocks = <0x2 0xcc 0x2 0xcd>;
  1495. clock-names = "ipg", "per";
  1496. dmas = <0x8 0x1b 0x4 0x0 0x8 0x1c 0x4 0x0>;
  1497. dma-names = "rx", "tx";
  1498. status = "disabled";
  1499. pinctrl-names = "default";
  1500. pinctrl-0 = <0x30>;
  1501. };
  1502.  
  1503. serial@021ec000 {
  1504. compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
  1505. reg = <0x21ec000 0x4000>;
  1506. interrupts = <0x0 0x1c 0x4>;
  1507. clocks = <0x2 0xcc 0x2 0xcd>;
  1508. clock-names = "ipg", "per";
  1509. dmas = <0x8 0x1d 0x4 0x0 0x8 0x1e 0x4 0x0>;
  1510. dma-names = "rx", "tx";
  1511. status = "okay";
  1512. pinctrl-names = "default";
  1513. pinctrl-0 = <0x31>;
  1514. fsl,uart-has-rtscts;
  1515. };
  1516.  
  1517. serial@021f0000 {
  1518. compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
  1519. reg = <0x21f0000 0x4000>;
  1520. interrupts = <0x0 0x1d 0x4>;
  1521. clocks = <0x2 0xcc 0x2 0xcd>;
  1522. clock-names = "ipg", "per";
  1523. dmas = <0x8 0x1f 0x4 0x0 0x8 0x20 0x4 0x0>;
  1524. dma-names = "rx", "tx";
  1525. status = "disabled";
  1526. };
  1527.  
  1528. serial@021f4000 {
  1529. compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
  1530. reg = <0x21f4000 0x4000>;
  1531. interrupts = <0x0 0x1e 0x4>;
  1532. clocks = <0x2 0xcc 0x2 0xcd>;
  1533. clock-names = "ipg", "per";
  1534. dmas = <0x8 0x21 0x4 0x0 0x8 0x22 0x4 0x0>;
  1535. dma-names = "rx", "tx";
  1536. status = "disabled";
  1537. };
  1538.  
  1539. i2c@021f8000 {
  1540. #address-cells = <0x1>;
  1541. #size-cells = <0x0>;
  1542. compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
  1543. reg = <0x21f8000 0x4000>;
  1544. interrupts = <0x0 0x23 0x4>;
  1545. clocks = <0x2 0xd9>;
  1546. status = "disabled";
  1547. clock-frequency = <0x186a0>;
  1548. pinctrl-names = "default";
  1549. pinctrl-0 = <0x32>;
  1550.  
  1551. fxos8700@1e {
  1552. compatible = "fsl,fxos8700";
  1553. reg = <0x1e>;
  1554. };
  1555.  
  1556. fxas2100x@20 {
  1557. compatible = "fsl,fxas2100x";
  1558. reg = <0x20>;
  1559. };
  1560. };
  1561.  
  1562. qosc@021fc000 {
  1563. compatible = "fsl,imx6sx-qosc";
  1564. reg = <0x21fc000 0x4000>;
  1565. };
  1566. };
  1567.  
  1568. aips-bus@02200000 {
  1569. compatible = "fsl,aips-bus", "simple-bus";
  1570. #address-cells = <0x1>;
  1571. #size-cells = <0x1>;
  1572. reg = <0x2200000 0x100000>;
  1573. ranges;
  1574.  
  1575. spba-bus@02200000 {
  1576. compatible = "fsl,spba-bus", "simple-bus";
  1577. #address-cells = <0x1>;
  1578. #size-cells = <0x1>;
  1579. reg = <0x2240000 0x40000>;
  1580. ranges;
  1581.  
  1582. dcic@0220c000 {
  1583. compatible = "fsl,imx6sx-dcic";
  1584. reg = <0x220c000 0x4000>;
  1585. interrupts = <0x0 0x7c 0x4>;
  1586. clocks = <0x2 0x8e 0x2 0xad>;
  1587. clock-names = "dcic", "disp-axi";
  1588. gpr = <0x11>;
  1589. status = "okay";
  1590. dcic_id = <0x0>;
  1591. dcic_mux = "dcic-lcdif1";
  1592. };
  1593.  
  1594. dcic@02210000 {
  1595. compatible = "fsl,imx6sx-dcic";
  1596. reg = <0x2210000 0x4000>;
  1597. interrupts = <0x0 0x7d 0x4>;
  1598. clocks = <0x2 0x8f 0x2 0xad>;
  1599. clock-names = "dcic", "disp-axi";
  1600. gpr = <0x11>;
  1601. status = "disabled";
  1602. };
  1603.  
  1604. csi@02214000 {
  1605. compatible = "fsl,imx6s-csi";
  1606. reg = <0x2214000 0x4000>;
  1607. interrupts = <0x0 0x7 0x4>;
  1608. clocks = <0x2 0xad 0x2 0x9f 0x2 0x8e>;
  1609. clock-names = "disp-axi", "csi_mclk", "disp_dcic";
  1610. power-domains = <0x6 0x2>;
  1611. status = "okay";
  1612.  
  1613. port {
  1614.  
  1615. endpoint {
  1616. remote-endpoint = <0x33>;
  1617. linux,phandle = <0x39>;
  1618. phandle = <0x39>;
  1619. };
  1620. };
  1621. };
  1622.  
  1623. pxp@02218000 {
  1624. compatible = "fsl,imx6sx-pxp-dma", "fsl,imx6sl-pxp-dma", "fsl,imx6dl-pxp-dma";
  1625. reg = <0x2218000 0x4000>;
  1626. interrupts = <0x0 0x8 0x4>;
  1627. clocks = <0x2 0xaa 0x2 0xad>;
  1628. clock-names = "pxp-axi", "disp-axi";
  1629. power-domains = <0x6 0x2>;
  1630. status = "okay";
  1631. };
  1632.  
  1633. csi@0221c000 {
  1634. compatible = "fsl,imx6s-csi";
  1635. reg = <0x221c000 0x4000>;
  1636. interrupts = <0x0 0x29 0x4>;
  1637. clocks = <0x2 0xad 0x2 0x9f 0x2 0x8f>;
  1638. clock-names = "disp-axi", "csi_mclk", "disp_dcic";
  1639. power-domains = <0x6 0x2>;
  1640. status = "disabled";
  1641. };
  1642.  
  1643. lcdif@02220000 {
  1644. compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
  1645. reg = <0x2220000 0x4000>;
  1646. interrupts = <0x0 0x5 0x4>;
  1647. clocks = <0x2 0xaf 0x2 0xa9 0x2 0xad>;
  1648. clock-names = "pix", "axi", "disp_axi";
  1649. power-domains = <0x6 0x2>;
  1650. status = "okay";
  1651. pinctrl-names = "default";
  1652. pinctrl-0 = <0x34 0x35>;
  1653. lcd-supply = <0x36>;
  1654. display = <0x37>;
  1655.  
  1656. display {
  1657. bits-per-pixel = <0x20>;
  1658. bus-width = <0x18>;
  1659. linux,phandle = <0x37>;
  1660. phandle = <0x37>;
  1661.  
  1662. display-timings {
  1663. native-mode = <0x38>;
  1664.  
  1665. timing0 {
  1666. clock-frequency = <0x46cf710>;
  1667. hactive = <0x500>;
  1668. vactive = <0x2d0>;
  1669. hback-porch = <0xdc>;
  1670. hfront-porch = <0x6e>;
  1671. vback-porch = <0x14>;
  1672. vfront-porch = <0x5>;
  1673. hsync-len = <0x28>;
  1674. vsync-len = <0x5>;
  1675. hsync-active = <0x0>;
  1676. vsync-active = <0x1>;
  1677. de-active = <0x1>;
  1678. pixelclk-active = <0x0>;
  1679. linux,phandle = <0x38>;
  1680. phandle = <0x38>;
  1681. };
  1682. };
  1683. };
  1684. };
  1685.  
  1686. lcdif@02224000 {
  1687. compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
  1688. reg = <0x2224000 0x4000>;
  1689. interrupts = <0x0 0x6 0x4>;
  1690. clocks = <0x2 0xae 0x2 0xa9 0x2 0xad>;
  1691. clock-names = "pix", "axi", "disp_axi";
  1692. power-domains = <0x6 0x2>;
  1693. status = "disabled";
  1694. };
  1695.  
  1696. vadc@02228000 {
  1697. compatible = "fsl,imx6sx-vadc";
  1698. reg = <0x2228000 0x4000 0x222c000 0x4000>;
  1699. reg-names = "vadc-vafe", "vadc-vdec";
  1700. clocks = <0x2 0xd7 0x2 0x9f>;
  1701. clock-names = "vadc", "csi";
  1702. power-domains = <0x6 0x2>;
  1703. gpr = <0x11>;
  1704. status = "okay";
  1705. vadc_in = <0x0>;
  1706. csi_id = <0x0>;
  1707.  
  1708. port {
  1709.  
  1710. endpoint {
  1711. remote-endpoint = <0x39>;
  1712. linux,phandle = <0x33>;
  1713. phandle = <0x33>;
  1714. };
  1715. };
  1716. };
  1717. };
  1718.  
  1719. adc@02280000 {
  1720. compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
  1721. reg = <0x2280000 0x4000>;
  1722. interrupts = <0x0 0x64 0x4>;
  1723. clocks = <0x2 0x52>;
  1724. num-channels = <0x4>;
  1725. clock-names = "adc";
  1726. status = "disabled";
  1727. vref-supply = <0x3a>;
  1728. };
  1729.  
  1730. adc@02284000 {
  1731. compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
  1732. reg = <0x2284000 0x4000>;
  1733. interrupts = <0x0 0x65 0x4>;
  1734. clocks = <0x2 0x52>;
  1735. num-channels = <0x4>;
  1736. clock-names = "adc";
  1737. status = "disabled";
  1738. vref-supply = <0x3a>;
  1739. };
  1740.  
  1741. wdog@02288000 {
  1742. compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
  1743. reg = <0x2288000 0x4000>;
  1744. interrupts = <0x0 0xb 0x4>;
  1745. clocks = <0x2 0x0>;
  1746. status = "disabled";
  1747. };
  1748.  
  1749. ecspi@0228c000 {
  1750. #address-cells = <0x1>;
  1751. #size-cells = <0x0>;
  1752. compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
  1753. reg = <0x228c000 0x4000>;
  1754. interrupts = <0x0 0x12 0x4>;
  1755. clocks = <0x2 0x95 0x2 0x95>;
  1756. clock-names = "ipg", "per";
  1757. status = "disabled";
  1758. };
  1759.  
  1760. sema4@02290000 {
  1761. compatible = "fsl,imx6sx-sema4";
  1762. reg = <0x2290000 0x4000>;
  1763. interrupts = <0x0 0x74 0x4>;
  1764. status = "okay";
  1765. };
  1766.  
  1767. mu@02294000 {
  1768. compatible = "fsl,imx6sx-mu";
  1769. reg = <0x2294000 0x4000>;
  1770. interrupts = <0x0 0x5a 0x4>;
  1771. status = "okay";
  1772. };
  1773.  
  1774. mcctest {
  1775. compatible = "fsl,imx6sx-mcc-test";
  1776. status = "disabled";
  1777. };
  1778.  
  1779. mcctty {
  1780. compatible = "fsl,imx6sx-mcc-tty";
  1781. status = "okay";
  1782. };
  1783.  
  1784. serial@022a0000 {
  1785. compatible = "fsl,imx6sx-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
  1786. reg = <0x22a0000 0x4000>;
  1787. interrupts = <0x0 0x11 0x4>;
  1788. clocks = <0x2 0xcc 0x2 0xcd>;
  1789. clock-names = "ipg", "per";
  1790. dmas = <0x8 0x0 0x4 0x0 0x8 0x2f 0x4 0x0>;
  1791. dma-names = "rx", "tx";
  1792. status = "okay";
  1793. pinctrl-names = "default";
  1794. pinctrl-0 = <0x3b>;
  1795. fsl,uart-has-rtscts;
  1796. };
  1797.  
  1798. pwm@022a4000 {
  1799. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  1800. reg = <0x22a4000 0x4000>;
  1801. interrupts = <0x0 0x53 0x4>;
  1802. clocks = <0x2 0xda 0x2 0xda>;
  1803. clock-names = "ipg", "per";
  1804. #pwm-cells = <0x2>;
  1805. status = "disabled";
  1806. pinctrl-names = "default";
  1807. pinctrl-0 = <0x3c>;
  1808. };
  1809.  
  1810. pwm@022a8000 {
  1811. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  1812. reg = <0x22a8000 0x4000>;
  1813. interrupts = <0x0 0x54 0x4>;
  1814. clocks = <0x2 0xdb 0x2 0xdb>;
  1815. clock-names = "ipg", "per";
  1816. #pwm-cells = <0x2>;
  1817. status = "disabled";
  1818. pinctrl-names = "default";
  1819. pinctrl-0 = <0x3d>;
  1820. };
  1821.  
  1822. pwm@022ac000 {
  1823. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  1824. reg = <0x22ac000 0x4000>;
  1825. interrupts = <0x0 0x55 0x4>;
  1826. clocks = <0x2 0xdc 0x2 0xdc>;
  1827. clock-names = "ipg", "per";
  1828. #pwm-cells = <0x2>;
  1829. status = "disabled";
  1830. };
  1831.  
  1832. pwm@0022b0000 {
  1833. compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
  1834. reg = <0x22b0000 0x4000>;
  1835. interrupts = <0x0 0x56 0x4>;
  1836. clocks = <0x2 0xd6 0x2 0xd6>;
  1837. clock-names = "ipg", "per";
  1838. #pwm-cells = <0x2>;
  1839. status = "disabled";
  1840. };
  1841. };
  1842.  
  1843. pcie@0x08000000 {
  1844. compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
  1845. reg = <0x8ffc000 0x4000 0x8f00000 0x80000>;
  1846. reg-names = "dbi", "config";
  1847. #address-cells = <0x3>;
  1848. #size-cells = <0x2>;
  1849. device_type = "pci";
  1850. ranges = <0x81000000 0x0 0x0 0x8f80000 0x0 0x10000 0x82000000 0x0 0x8000000 0x8000000 0x0 0xf00000>;
  1851. num-lanes = <0x1>;
  1852. interrupts = <0x0 0x78 0x4>;
  1853. interrupt-names = "msi";
  1854. #interrupt-cells = <0x1>;
  1855. interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  1856. interrupt-map = <0x0 0x0 0x0 0x1 0x4 0x0 0x7b 0x4 0x0 0x0 0x0 0x2 0x4 0x0 0x7a 0x4 0x0 0x0 0x0 0x3 0x4 0x0 0x79 0x4 0x0 0x0 0x0 0x4 0x4 0x0 0x78 0x4>;
  1857. clocks = <0x2 0xb6 0x2 0xea 0x2 0x10 0x2 0xad>;
  1858. clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
  1859. pcie-phy-supply = <0x1a>;
  1860. power-domains = <0x6 0x2>;
  1861. status = "disabled";
  1862. };
  1863. };
  1864.  
  1865. pxp_v4l2_out {
  1866. compatible = "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
  1867. status = "disabled";
  1868. };
  1869.  
  1870. regulators {
  1871. compatible = "simple-bus";
  1872.  
  1873. regulator@0 {
  1874. compatible = "regulator-fixed";
  1875. regulator-name = "vref-3v3";
  1876. regulator-min-microvolt = <0x325aa0>;
  1877. regulator-max-microvolt = <0x325aa0>;
  1878. linux,phandle = <0x3a>;
  1879. phandle = <0x3a>;
  1880. };
  1881.  
  1882. psu_5v0 {
  1883. compatible = "regulator-fixed";
  1884. regulator-name = "PSU-5V0";
  1885. regulator-min-microvolt = <0x4c4b40>;
  1886. regulator-max-microvolt = <0x4c4b40>;
  1887. regulator-boot-on;
  1888. };
  1889.  
  1890. usb_otg1_vbus {
  1891. compatible = "regulator-fixed";
  1892. pinctrl-names = "default";
  1893. pinctrl-0 = <0x3e>;
  1894. regulator-name = "usb_otg1_vbus";
  1895. regulator-min-microvolt = <0x4c4b40>;
  1896. regulator-max-microvolt = <0x4c4b40>;
  1897. gpio = <0x3f 0x9 0x0>;
  1898. enable-active-high;
  1899. linux,phandle = <0x1f>;
  1900. phandle = <0x1f>;
  1901. };
  1902.  
  1903. usb_otg2_vbus {
  1904. compatible = "regulator-fixed";
  1905. pinctrl-names = "default";
  1906. pinctrl-0 = <0x40>;
  1907. regulator-name = "usb_otg2_vbus";
  1908. regulator-min-microvolt = <0x4c4b40>;
  1909. regulator-max-microvolt = <0x4c4b40>;
  1910. gpio = <0x41 0xc 0x0>;
  1911. enable-active-high;
  1912. linux,phandle = <0x22>;
  1913. phandle = <0x22>;
  1914. };
  1915.  
  1916. fixedregulator@1 {
  1917. compatible = "regulator-fixed";
  1918. regulator-name = "wlan-en-regulator";
  1919. regulator-min-microvolt = <0x1b7740>;
  1920. regulator-max-microvolt = <0x1b7740>;
  1921. gpio = <0x2b 0xc 0x0>;
  1922. startup-delay-us = <0x11170>;
  1923. enable-active-high;
  1924. linux,phandle = <0x2a>;
  1925. phandle = <0x2a>;
  1926. };
  1927. };
  1928.  
  1929. leds {
  1930. compatible = "gpio-leds";
  1931.  
  1932. led0 {
  1933. label = "led0";
  1934. gpios = <0xa 0x0 0x0>;
  1935. default-state = "off";
  1936. linux,default-trigger = "mmc0";
  1937. };
  1938. };
  1939.  
  1940. kim {
  1941. compatible = "kim";
  1942. nshutdown_gpio = <0x31>;
  1943. dev_name = "/dev/ttymxc2";
  1944. flow_cntrl = <0x1>;
  1945. baud_rate = <0xe1000>;
  1946. };
  1947.  
  1948. btwilink {
  1949. compatible = "btwilink";
  1950. };
  1951.  
  1952. poweroff {
  1953. compatible = "udoo,poweroff";
  1954. };
  1955.  
  1956. reserved-memory {
  1957. #address-cells = <0x1>;
  1958. #size-cells = <0x1>;
  1959. ranges;
  1960.  
  1961. m4@0x84000000 {
  1962. no-map;
  1963. reg = <0x84000000 0x800000>;
  1964. };
  1965.  
  1966. m4@0xBFF00000 {
  1967. no-map;
  1968. reg = <0xbff00000 0x100000>;
  1969. };
  1970. };
  1971.  
  1972. hdmi-codec {
  1973. compatible = "udoo,tda19988-codec";
  1974. status = "okay";
  1975. linux,phandle = <0x43>;
  1976. phandle = <0x43>;
  1977. };
  1978.  
  1979. sound_hdmi {
  1980. compatible = "udoo,imx-audio-tda19988";
  1981. model = "imx6sx-tda19988";
  1982. cpu-dai = <0x42>;
  1983. audio-codec = <0x43>;
  1984. mux-int-port = <0x2>;
  1985. mux-ext-port = <0x5>;
  1986. ssi-controller = <0x42>;
  1987. status = "okay";
  1988. };
  1989.  
  1990. dac-codec {
  1991. compatible = "udoo,es9023";
  1992. status = "disabled";
  1993. linux,phandle = <0x45>;
  1994. phandle = <0x45>;
  1995. };
  1996.  
  1997. sound_dac {
  1998. compatible = "udoo,imx-audio-es9023";
  1999. model = "imx6sx-es9023";
  2000. cpu-dai = <0x44>;
  2001. audio-codec = <0x45>;
  2002. mux-int-port = <0x1>;
  2003. mux-ext-port = <0x6>;
  2004. ssi-controller = <0x44>;
  2005. status = "disabled";
  2006. };
  2007.  
  2008. sound_spdif {
  2009. compatible = "fsl,imx-audio-spdif";
  2010. model = "imx-spdif";
  2011. spdif-controller = <0x46>;
  2012. spdif-out;
  2013. status = "disabled";
  2014. };
  2015.  
  2016. onewire@16 {
  2017. compatible = "w1-gpio";
  2018. gpios = <0x41 0xa 0x0>;
  2019. status = "disabled";
  2020. };
  2021.  
  2022. onewire@17 {
  2023. compatible = "w1-gpio";
  2024. gpios = <0x41 0xb 0x0>;
  2025. status = "disabled";
  2026. };
  2027.  
  2028. onewire@18 {
  2029. compatible = "w1-gpio";
  2030. gpios = <0xa 0x14 0x0>;
  2031. status = "disabled";
  2032. };
  2033.  
  2034. onewire@19 {
  2035. compatible = "w1-gpio";
  2036. gpios = <0xa 0x15 0x0>;
  2037. status = "disabled";
  2038. };
  2039.  
  2040. onewire@20 {
  2041. compatible = "w1-gpio";
  2042. gpios = <0xa 0xc 0x0>;
  2043. status = "disabled";
  2044. };
  2045.  
  2046. onewire@21 {
  2047. compatible = "w1-gpio";
  2048. gpios = <0xa 0xd 0x0>;
  2049. status = "disabled";
  2050. };
  2051.  
  2052. onewire@22 {
  2053. compatible = "w1-gpio";
  2054. gpios = <0xa 0x16 0x0>;
  2055. status = "disabled";
  2056. };
  2057.  
  2058. onewire@23 {
  2059. compatible = "w1-gpio";
  2060. gpios = <0xa 0x18 0x0>;
  2061. status = "disabled";
  2062. };
  2063.  
  2064. onewire@24 {
  2065. compatible = "w1-gpio";
  2066. gpios = <0x3f 0x19 0x0>;
  2067. status = "disabled";
  2068. };
  2069.  
  2070. onewire@25 {
  2071. compatible = "w1-gpio";
  2072. gpios = <0x3f 0x16 0x0>;
  2073. status = "disabled";
  2074. };
  2075.  
  2076. onewire@26 {
  2077. compatible = "w1-gpio";
  2078. gpios = <0x3f 0xe 0x0>;
  2079. status = "disabled";
  2080. };
  2081.  
  2082. onewire@27 {
  2083. compatible = "w1-gpio";
  2084. gpios = <0x3f 0xf 0x0>;
  2085. status = "disabled";
  2086. };
  2087.  
  2088. onewire@28 {
  2089. compatible = "w1-gpio";
  2090. gpios = <0x3f 0x10 0x0>;
  2091. status = "disabled";
  2092. };
  2093.  
  2094. onewire@29 {
  2095. compatible = "w1-gpio";
  2096. gpios = <0x3f 0x11 0x0>;
  2097. status = "disabled";
  2098. };
  2099.  
  2100. onewire@30 {
  2101. compatible = "w1-gpio";
  2102. gpios = <0x3f 0x12 0x0>;
  2103. status = "disabled";
  2104. };
  2105.  
  2106. onewire@31 {
  2107. compatible = "w1-gpio";
  2108. gpios = <0x3f 0x13 0x0>;
  2109. status = "disabled";
  2110. };
  2111.  
  2112. onewire@32 {
  2113. compatible = "w1-gpio";
  2114. gpios = <0x3f 0x14 0x0>;
  2115. status = "disabled";
  2116. };
  2117.  
  2118. onewire@33 {
  2119. compatible = "w1-gpio";
  2120. gpios = <0x3f 0x15 0x0>;
  2121. status = "disabled";
  2122. };
  2123.  
  2124. onewire@34 {
  2125. compatible = "w1-gpio";
  2126. gpios = <0x47 0xb 0x0>;
  2127. status = "disabled";
  2128. };
  2129.  
  2130. onewire@35 {
  2131. compatible = "w1-gpio";
  2132. gpios = <0x47 0xa 0x0>;
  2133. status = "disabled";
  2134. };
  2135.  
  2136. onewire@36 {
  2137. compatible = "w1-gpio";
  2138. gpios = <0xa 0x11 0x0>;
  2139. status = "disabled";
  2140. };
  2141.  
  2142. onewire@37 {
  2143. compatible = "w1-gpio";
  2144. gpios = <0xa 0x10 0x0>;
  2145. status = "disabled";
  2146. };
  2147.  
  2148. onewire@38 {
  2149. compatible = "w1-gpio";
  2150. gpios = <0xa 0xf 0x0>;
  2151. status = "disabled";
  2152. };
  2153.  
  2154. onewire@39 {
  2155. compatible = "w1-gpio";
  2156. gpios = <0xa 0xe 0x0>;
  2157. status = "disabled";
  2158. };
  2159.  
  2160. onewire@40 {
  2161. compatible = "w1-gpio";
  2162. gpios = <0x41 0x17 0x0>;
  2163. status = "disabled";
  2164. };
  2165.  
  2166. onewire@41 {
  2167. compatible = "w1-gpio";
  2168. gpios = <0x41 0x1c 0x0>;
  2169. status = "disabled";
  2170. };
  2171.  
  2172. onewire@42 {
  2173. compatible = "w1-gpio";
  2174. gpios = <0x41 0x1f 0x0>;
  2175. status = "disabled";
  2176. };
  2177.  
  2178. onewire@43 {
  2179. compatible = "w1-gpio";
  2180. gpios = <0x41 0x14 0x0>;
  2181. status = "disabled";
  2182. };
  2183.  
  2184. onewire@44 {
  2185. compatible = "w1-gpio";
  2186. gpios = <0x3f 0x7 0x0>;
  2187. status = "disabled";
  2188. };
  2189.  
  2190. onewire@45 {
  2191. compatible = "w1-gpio";
  2192. gpios = <0x3f 0x6 0x0>;
  2193. status = "disabled";
  2194. };
  2195.  
  2196. onewire@46 {
  2197. compatible = "w1-gpio";
  2198. gpios = <0x3f 0x5 0x0>;
  2199. status = "disabled";
  2200. };
  2201.  
  2202. onewire@47 {
  2203. compatible = "w1-gpio";
  2204. gpios = <0x3f 0x4 0x0>;
  2205. status = "disabled";
  2206. };
  2207. };
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement
Public Pastes
Advertisement
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!