Advertisement
zmatt

src/arm/am57xx-beagle-x15-custom.dts

Nov 13th, 2018 (edited)
168
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
C++ 3.63 KB | None | 0 0
  1. #include "am57xx-beagle-x15-revc.dts"
  2. #include "bbx15-pins.h"  // https://pastebin.com/raw/tGcpaiyg
  3. #include "bbx15-gpios.h"  // https://pastebin.com/raw/rELLdW1k
  4.  
  5. &{/chosen} {
  6.     base_dtb = "am57xx-beagle-x15-custom.dts";  // <-- fill in name of this file
  7.     base_dtb_timestamp = __TIMESTAMP__;
  8. };
  9.  
  10.  
  11. // uncomment this line if you want the two ethernet ports to be connected via
  12. // internal switch instead of being two independent ports:
  13. &mac {  /delete-property/ dual_emac;  };
  14.  
  15.  
  16. //====== EXAMPLE: gpios ======================================
  17. //
  18. // For more documentation about gpio-of-helper see:
  19. //   https://github.com/mvduin/overlay-utils/blob/master/gpio-demo.dtsi
  20. // (but note that this is for the BBB and uses different pinmux syntax)
  21.  
  22. / {
  23.     // Any name is fine as long as it doesn't conflict with existing nodes
  24.     gpio-demo {
  25.         compatible = "gpio-of-helper";
  26.  
  27.         pinctrl-names = "default";
  28.         pinctrl-0 = <&gpio_demo_pins>;
  29.  
  30.         P16.36 {
  31.             gpio = <P16_36_GPIO GPIO_ACTIVE_HIGH>;
  32.             input;
  33.             dir-changeable;
  34.         };
  35.  
  36.         P16.43 {
  37.             gpio = <P16_43_GPIO GPIO_ACTIVE_HIGH>;
  38.             input;
  39.             dir-changeable;
  40.         };
  41.     };
  42. };
  43.  
  44. &dra7_pmx_core {
  45.     gpio_demo_pins: gpio-demo {
  46.         pinctrl-single,pins = <
  47.             DRA7XX_CORE_IOPAD( P16_36, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P16.36 / gpio 6.03
  48.             DRA7XX_CORE_IOPAD( P16_43, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P16.43 / gpio 6.04
  49.         >;
  50.     };
  51. };
  52.  
  53.  
  54. //====== EXAMPLE: eCAP pwm output ======================================
  55.  
  56. // enable subsystem containing ecap0
  57. &epwmss0 {
  58.     status = "okay";
  59. };
  60.  
  61. // enable ecap0 and configure its pin
  62. &ecap0 {
  63.     status = "okay";
  64.     pinctrl-names = "default";
  65.     pinctrl-0 = <&ecap0_pins>;
  66. };
  67.  
  68. &dra7_pmx_core {
  69.     // pin config block for ecap0
  70.     ecap0_pins: ecap0 {
  71.         pinctrl-single,pins = <
  72.             DRA7XX_CORE_IOPAD( P18_12,  PIN_OUTPUT_PULLDOWN | MUX_MODE10 )  // P18.12 ecap0
  73.         >;
  74.     };
  75. };
  76.  
  77.  
  78. //====== EXAMPLE: spi ==================================================
  79.  
  80. &mcspi3 {
  81.     // enable spi controller and mux pins:
  82.     status = "okay";
  83.     pinctrl-names = "default";
  84.     pinctrl-0 = <&mcspi3_pins>;
  85.  
  86.     // create spi slave device for chip select 0:
  87.     spidev@0 {
  88.         reg = <0>;
  89.         compatible = "spidev";
  90.         spi-max-frequency = <24000000>;
  91.         spi-cpol; spi-cpha;  // configure spi mode 3 by default
  92.  
  93.         symlink = "spi/2.0";  // create symlink at /dev/spi/2.0
  94.     };
  95.  
  96.     // create spi slave device for chip select 1:
  97.     spidev@1 {
  98.         reg = <1>;
  99.         compatible = "spidev";
  100.         spi-max-frequency = <24000000>;
  101.         spi-cpol; spi-cpha;  // configure spi mode 3 by default
  102.  
  103.         symlink = "spi/2.1";  // create symlink at /dev/spi/2.1
  104.     };
  105. };
  106.  
  107. &dra7_pmx_core {
  108.     mcspi3_pins: mcspi3 {
  109.         // choose an option:
  110. #if 1
  111.         // spi 2 ioset 4
  112.         pinctrl-single,pins = <
  113.             DRA7XX_CORE_IOPAD( P16_34, PIN_INPUT_PULLUP  | MUX_MODE3 )  // P16.34  spi 2 clk
  114.             DRA7XX_CORE_IOPAD( P16_04, PIN_OUTPUT_PULLUP | MUX_MODE3 )  // P16.04  spi 2 d1 (mosi)
  115.             DRA7XX_CORE_IOPAD( P16_33, PIN_INPUT_PULLUP  | MUX_MODE3 )  // P16.33  spi 2 d0 (miso)
  116.             DRA7XX_CORE_IOPAD( P16_03, PIN_OUTPUT_PULLUP | MUX_MODE3 )  // P16.03  spi 2 cs0
  117.             DRA7XX_CORE_IOPAD( P16_05, PIN_OUTPUT_PULLUP | MUX_MODE3 )  // P16.05  spi 2 cs1
  118.         >;
  119. #else
  120.         // spi 2 ioset 6
  121.         pinctrl-single,pins = <
  122.             DRA7XX_CORE_IOPAD( P17_04, PIN_INPUT_PULLUP  | MUX_MODE1 )  // P17.04  spi 2 clk
  123.             DRA7XX_CORE_IOPAD( P17_07, PIN_OUTPUT_PULLUP | MUX_MODE1 )  // P17.07  spi 2 d1 (mosi)
  124.             DRA7XX_CORE_IOPAD( P17_36, PIN_INPUT_PULLUP  | MUX_MODE1 )  // P17.36  spi 2 d0 (miso)
  125.             DRA7XX_CORE_IOPAD( P17_08, PIN_OUTPUT_PULLUP | MUX_MODE1 )  // P17.08  spi 2 cs0
  126.             DRA7XX_CORE_IOPAD( P17_33, PIN_OUTPUT_PULLUP | MUX_MODE1 )  // P17.33  spi 2 cs1
  127.         >;
  128. #endif
  129.     };
  130. };
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement