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  1. ___ ___ _
  2. / | \ ___ __/ \__ ___ ___ /\__
  3. \ / \ // __>\_ _// __|/ __\/ \
  4. \_____/_\__ \ \_/ \___|\___/\_/\_/
  5. \____/ 2.3
  6.  
  7. 1. ABOUT
  8. WStech doc v2.3 made by Judge and Dox
  9. Special thanks to -anonymous- contributor for some usefull info.
  10.  
  11. For more info please visit http://www.pocketdomain.net
  12.  
  13. Comments/updates/infos please send to dox@space.pl
  14.  
  15. What's new in version 2.3:
  16.  
  17. - SRAM size update (section 6)
  18. - initial value of Timer Control (section 10)
  19.  
  20. 2. CPU
  21.  
  22. Bandai SPGY-1001 ASWAN 9850KK003
  23. NEC V30 MZ - fast version of V30 with internal pipeline (16 bytes prefatch buffer) running at 3.072 MHz.
  24. V30 MZ is aprox 4 times faster than V30.
  25. The V30MZ performs pipeline processing internally, performing instruction fetch (prefetch), instruction decode, and
  26. instruction execution in parallel. For this reason, it is difficult to determine what part of the program is currently being
  27. executed by monitoring the output of the address bus for the instruction code fetch.
  28. If there are conditional branch instructions, even in case branching does not occur, the address of the branch
  29. destination is prefetched (only one time), so that further monitoring of the program is difficult.
  30. The V30MZ has 8 prefetch queues (16 bytes).
  31.  
  32. There are a few other differences between V30MZ and V30 cpu (unsupported opcodes , different flag handling after mul/div).
  33.  
  34. Timing:
  35.  
  36. Hblank : 256 CPU cycles
  37. Vblank : 159 Hblank = 159*256/3072000 = 75.47Hz
  38.  
  39.  
  40. 3. MEMORY
  41.  
  42. 20 bit addressing space = 1 Megabyte. Memory is splitted into 64KB blocks (segments/banks).
  43.  
  44. Segments:
  45.  
  46. 0 - RAM - 16 KB (WS) / 64 KB (WSC) internal RAM (see below)
  47.  
  48. 1 - SRAM (cart) SRAM is BSI device BS62LV256TC - 256K(32Kx8) Static RAM - TSOP 0 - 70 c, 70 ns (http://www.bsi.com.tw/product/bs62lv256.pdf)
  49.  
  50. 2 - ROM Bank (initial bank = last)
  51. 3 - ROM Bank (lnitial bank = last)
  52.  
  53. 4 - ROM Bank (initial bank = last - 11)
  54. 5 - ROM Bank (initial bank = last - 10)
  55. 6 - ROM Bank (initial bank = last - 9)
  56. 7 - ROM Bank (initial bank = last - 8)
  57. 8 - ROM Bank (initial bank = last - 7)
  58. 9 - ROM Bank (initial bank = last - 6)
  59. A - ROM Bank (initial bank = last - 5)
  60. B - ROM Bank (initial bank = last - 4)
  61. C - ROM Bank (initial bank = last - 3)
  62. D - ROM Bank (initial bank = last - 2)
  63. E - ROM Bank (initial bank = last - 1)
  64. F - ROM Bank (initial bank = last)
  65.  
  66. Segments 2-$F are switchable using ports :
  67.  
  68. $C2 - Segment 2 (value written to port is ROM Bank number ($FF means last ROM bank (last 64 kbytes of ROM file) , $FE = last - 1 .. etc)
  69. $C3 - Segment 3 (same as above)
  70. $C0 - Segments 4-$F - bits 0,1,2 and 3 of port $C0 are bits 4,5,6 and 7 of ROM bank number in segments 4-$F . Bits 0-3
  71. are taken form segment number ( for example , IO[$C0]=$4E -> segment 9 contains ROM bank $E9).
  72.  
  73. RAM Map :
  74.  
  75. $0000 - $1FFF WS/WSC
  76. $2000 - $3FFF 4 Col Tiles WS/WSC
  77. -------------
  78. $4000 - $7FFF 16 Col Tiles Bank 0 WSC only
  79. $8000 - $BFFF 16 Col Tiles Bank 1 WSC only
  80. $C000 - $FDFF WSC only
  81. $FE00 - $FFFF Palettes (WSC) WSC only
  82.  
  83. Some games required initialized (?) part of RAM, for example:
  84.  
  85. $75AC = $41 = "A"
  86. $75AD = $5F = "_"
  87. $75AE = $43 = "C"
  88. $75AF = $31 = "1"
  89. $75B0 = $6E = "n"
  90. $75B1 = $5F = "_"
  91. $75B2 = $63 = "c"
  92. $75B3 = $31 = "1"
  93.  
  94. 4. VIDEO
  95.  
  96. Screen size - 224 x 144 pixels (28 x 18 tiles)
  97. Tile size - 8 x 8 dots , 16 bytes/tile (4 col modes) or 32 bytes/tile (16 col modes)
  98. Map size - 256 x 256 pixels (32 x 32 tiles)
  99. Layers - Two layers - Background and Foreground (top layer)
  100. Maps locations - Selectable using port $07
  101. Tiles locations - Fixed, two banks - one at $4000 , second at $8000
  102. Map format - Each position in the map is defined by one word:
  103. bits 0 - 8 - Tile number (0-511)
  104. bits 9 - 12 - Palette number (0-15)
  105. bit 13 - WS = unused / WSC = tile bank
  106. bit 14 - Horizontal flip
  107. bit 15 - Vertical flip
  108. Tile formats - Depends on video mode (port $60)
  109. Sprites - Max 128 sprites , limited to max 32 on scanline
  110. sprite format:
  111. byte 0,1 - bits
  112. 0 - 8 - Tile number (0-511)
  113. 9 - 11 - Palette number (0-7) + 8 -> (8-15)
  114. 12 - Sprite window clipping on/off
  115. 13 - Priority with respect to the layers
  116. 0 - appear between the 2 background and foreground layers
  117. 1 - appear on top of both layers
  118. 14 - Horizontal flip
  119. 15 - Vertical flip
  120. byte 2 - Y position on the screen
  121. byte 3 - X position on the screen
  122.  
  123. Sprite table is buffered durning frame display.
  124. Probably up to scanline 140 (1238-144?)
  125.  
  126. Colors - Wonderswan (Mono) is capable of showing 16 shades of gray(only 8 can be selected at any one time)
  127. These 8 shades form a pool from which the palette definition can select shades. There are 16 palettes.
  128. All 16 palettes are used by BG and FG layers , the last 8 are used also by sprites.
  129. Which 8 colors are used for palette generation is defined by ports 1C and 1E- port 1C
  130. defines palette colors 0 - 3, port 1E defines 4 - 7. Each palette selection is 4 bits in
  131. size:
  132. 1C : 11110000
  133. 1D : 33332222
  134. 1E : 55554444
  135. 1F : 77776666
  136.  
  137. (where color 15 is the darkest one)
  138.  
  139. Ports 20 - 3E are used to define the palettes themselves.
  140. 20 : x111x000 - palette #0
  141. 21 : x333x222
  142.  
  143. In color video modes each color is defined using one word,
  144. where bits:
  145. 0 - 3 Blue
  146. 4 - 7 Green
  147. 8 - 11 Red
  148. 12 - 14 unused
  149. Color palettes are stored in the RAM (segment 0) , at address $FE00
  150.  
  151. Scrolling - Each of layers can be scrolled horizontal or vertical using ports $10 - $13
  152.  
  153. Transparency - Wonderswan - if bit 3 on palette number is set - color 0 of that palette is transparent
  154. Wonderswan color - color 0 of each palette is transparent
  155. Windows - There are two windows - rectangular areas for disabling /enabling FG layer (FG window) or sprites(Sprite window)
  156.  
  157. 5. SOUND
  158.  
  159. 4 Audio channels.
  160. Each channel can play short samples ( 4 bit , 16 bytes ( 32 sampels = 2 samples in byte (bits 0-3 and 4-7))
  161. with selectable frequency = 3,072 *10e6 / ((2048 - N) x 32 ) Hz , where N = 11 bit value.
  162. Location of that samples is unknown.
  163.  
  164. Volume of each audio channle is controlled by writing two 4 bit values ( for left/right output
  165. channel) into ports $88 - $8B. Master volume is controlled by port $91
  166. (2 bit value = first 'used' bit in master volume output (11 bit wide) , D/A converter can
  167. read only 8 bits , starting from bit set in port $91 , for example if first 'used' bit
  168. is set to 2 , D/A using bits 2,3,4,5,6,7,8,9 for audio output)
  169.  
  170. Additional (selectable) functions :
  171. - channel 2 - voice - can play 8 bit samples writing frequently data to ch2 volume I/O port
  172. - channel 3 - sweep - two parameters:
  173. - step = 2.667 x (N + 1) ms , where N = 5 bit value
  174. - value - signed byte (-128 - 127)
  175. - channel 4 - noise - 7 selectable noise generators (probably I/O port $8E)
  176.  
  177. For detailed info please check ports $80 - $91 in section I/O Ports.
  178.  
  179. There's also Audio DMA (please chec ports $4a - $52).
  180. Transfer rate is 12KHz (HBlank).
  181. I/O ports $4A-$4B and $4E-$4F are autupdated durning data transfer .
  182.  
  183. 6. ROM HEADER
  184.  
  185. Header taking last 10 bytes of each ROM file.
  186. Bytes :
  187. 0 - Developer ID
  188. 1 - Minimum support system
  189. 00 - WS Mono
  190. 01 - WS Color
  191. 2 - Cart ID number for developer defined at byte 0
  192. 3 - ??
  193. 4 - ROM Size
  194. 01 - ?
  195. 02 - 4Mbit
  196. 03 - 8Mbit
  197. 04 - 16Mbit
  198. 05 - ?
  199. 06 - 32Mbit
  200. 07 - ?
  201. 08 - 64Mbit
  202. 09 - 128Mbit
  203. 5 - SRAM/EEPROM Size
  204. 00 - 0k
  205. 01 - 64k SRAM
  206. 02 - 256k SRAM
  207. 03 - 1M SRAM (Taikyoku Igo Heisei Kiin)
  208. 04 - 2M SRAM (WonderWitch)
  209. 10 - 1k EEPROM
  210. 20 - 16k EEPROM
  211. 50 - 8k EEPROM
  212. 6 - Additional capabilities(?)
  213. - bit 0 - 1 - vertical position , 1 - horizontal position
  214. - bit 2 - always 1
  215.  
  216. 7 - 1 - RTC (Real Time Clock)
  217. 8,9 - Checksum = sum of all ROM bytes except two last ones ( where checksum is stored)
  218.  
  219. 7. INTERRUPTS
  220. The Wonderswan CPU recognizes 7 interrupts from the hardware, these are:
  221. 7 - HBlank Timer
  222. 6 - VBlank
  223. 5 - VBlank Timer
  224. 4 - Drawing line detection
  225. 3 - Serial Recieve
  226. 2 - RTC Alarm (cartridge)
  227. 1 - Key press
  228. 0 - Serial Send
  229.  
  230. Whether the CPU should indeed take action when one of these interrupts come in
  231. is determined by port B2. The above mentioned interrupts correspond with the bit
  232. numbers of port B2. When an interrupt occurs the corresponding bit of port B6 gets
  233. set to 1 and, if enabled, an interrupt to the CPU is generated. This bit of port B6
  234. will have to be cleared through code when the interrupt has been handled.
  235.  
  236. Example:
  237. The Wonderswan is set to react to VBlank begin interrupts. Then bit 7 of B6 is set high
  238. and keeps the interrupt line high until the CPU is able to take action upon this interrupt.
  239. A typical VBlank interrupt routine is as follows:
  240. <push registers>
  241. <do some useful work>
  242. out B6,40
  243. <pop registers>
  244. iret
  245.  
  246. The mentioned interrupts do not correspond with the same interrupt numbers for the vectors
  247. in the vector table. The base for the actual interrupt numbers is set through port B0. If B0
  248. is set to 20h then a VBlank begin interrupt routine must be set at vector 26h. (Base is 20h
  249. and VBlank begin interrupt is 6)
  250.  
  251. 8. CONTROLS - It's easy to check buttons status reading/writing port $B5(see below).
  252. There's required some delay between writing and reading port $B5 ( few NOP-s)
  253.  
  254. 9. Internal EEPROM Communication(?) and 'owner' info structure
  255. I/O Ports in range 0xBA -0xBE seems to be used for serial reading of internal
  256. WS EEPROM (for example - 'owner' info).
  257.  
  258. 0xBA (Word) - Data
  259. 0xBC (Word) - Address (calculated probably Modulo EEPROM size (unknown))
  260. 0xBE (Byte) - Communication (?)
  261. bit 4 set before reading data
  262. bit 1 set by hardware , when data is ready to read
  263.  
  264. Example :
  265.  
  266. mov ax, $1B9
  267. out $BC, ax
  268. mov al, $10
  269. out $BE, al
  270. xor dx, dx
  271. miniloop:
  272. inc dx
  273. cmp dl, 32
  274. jnc bad_data
  275. in al, $BE
  276. and al, 1
  277. jz miniloop
  278. in ax, $BA ; Month and Day of birth
  279.  
  280.  
  281. 'Owner' info structure :
  282.  
  283. - Name - 16 bytes ( 0 = Space, 1 = '0' ... 0xA = '9', 0xB = 'A'... )
  284. - Year of birth - 2 bytes (BCD)
  285. - Month of birth - 1 byte (BCD)
  286. - Day of birth - 1 byte (BCD)
  287. - Sex - 1 byte (1 - male , 2 - female)
  288. - Blood - 1 byte (1 - A, 2 - B, 3 - 0, 4 - AB)
  289.  
  290.  
  291. Struct size - 22 bytes = 11 reads,
  292. Address range = 0x1B0 - 0x1BA
  293.  
  294. 10. I/O PORTS (port number /initial value / description)
  295.  
  296. - $00 - $00 - Display control
  297. bit 0 - background layer on/off
  298. bit 1 - foreground layer on/off
  299. bit 2 - sprites on/off
  300. bit 3 - sprite window on/off (window coords defined in ports $0C - $0F)
  301. bit 4,5 - fg win inside on/off (window coords defined in ports $08 - $0B)
  302. Meaning of bits 4 and 5 :
  303. 5 4
  304. ---
  305. 0 0 FG layer is displayed inside and outside FG window area
  306. 0 1 ??
  307. 1 0 FG layer is displayed only inside window
  308. 1 1 FG layer is displayed outside window
  309. - $01 - $00 - Determines the background color
  310. bit 0-3 - background color
  311. bit 4-7 - background palette (WSC only)
  312. - $02 - ??? - Current Line (0 - 158) (159 ???)
  313. - $03 - $BB - Line compare (for drawning line detection interrupt)
  314. - $04 - $00 - Determines the base address for the sprite table.
  315. To get the address of the table, shift this value left 9 times.
  316. x xxxxxxx0 00000000
  317. - $05 - $00 - Determines the number of the sprite to start drawing with
  318. - $06 - $00 - Determines the number of the sprite to stop drawing.
  319. - $07 - $26 - Determines the location of the foreground and background screens in RAM.
  320. Format:
  321. bits 7-0 : ffffbbbb
  322. bit 7-4 - Determines foreground location (address is 0ffff000 00000000)
  323. bit 3-0 - Determines background location (address is 0bbbb000 00000000)
  324. - $08 - $FE - x0 of FG window (x0,y0) = top left corner, (x1,y1) = bottom right corner
  325. - $09 - $DE - y0 of FG window
  326. - $0A - $F9 - x1 of FG window
  327. - $0B - $FB - y1 of FG window
  328. - $0C - $DB - x0 of SPR window
  329. - $0D - $D7 - y0 of SPR window
  330. - $0E - $7F - x1 of SPR window
  331. - $0F - $F5 - y1 of SPR window
  332. - $10 - $00 - Background layer X scroll register
  333. - $11 - $00 - Background layer Y scroll register
  334. - $12 - $00 - Foreground layer X scroll register
  335. - $13 - $00 - Foreground layer Y scroll register
  336. - $14 - $01 - LCD Control (???)
  337. bit 0 - 1 - LCD on
  338. 0 - LCD off
  339. - $15 - $00 - LCD Icons
  340. bit 0 - LCD Sleep
  341. bit 1 - Vertical Position
  342. bit 2 - Horizontal Position
  343. bit 3 - Dot 1
  344. bit 4 - Dot 2
  345. bit 5 - Dot 3
  346. bit 6 - Not Used ?
  347. bit 7 - Not Used ?
  348. - $16 - $9E - ???
  349. - $17 - $9B - ???
  350. - $18 - $00 - ???
  351. - $19 - $00 - ???
  352. - $1A - $00 - ???
  353. - $1B - $00 - ???
  354. - $1C - $99 - PALCOL10
  355. - $1D - $FD - PALCOL32
  356. - $1E - $B7 - PALCOL54
  357. - $1F - $DF - PALCOL76
  358. - $20 - $30 - PAL00
  359. - $21 - $57 - PAL01
  360. - $22 - $75 - PAL10
  361. - $23 - $76 - PAL11
  362. - $24 - $15 - PAL20
  363. - $25 - $73 - PAL21
  364. - $26 - $77 - PAL30
  365. - $27 - $77 - PAL31
  366. - $28 - $20 - PAL40
  367. - $29 - $75 - PAL41
  368. - $2A - $50 - PAL50
  369. - $2B - $36 - PAL51
  370. - $2C - $70 - PAL60
  371. - $2D - $67 - PAL61
  372. - $2E - $50 - PAL70
  373. - $2F - $77 - PAL70
  374. - $30 - $57 - PAL00
  375. - $31 - $54 - PAL01
  376. - $32 - $75 - PAL10
  377. - $33 - $77 - PAL11
  378. - $34 - $75 - PAL20
  379. - $35 - $17 - PAL21
  380. - $36 - $37 - PAL30
  381. - $37 - $73 - PAL31
  382. - $38 - $50 - PAL40
  383. - $39 - $57 - PAL41
  384. - $3A - $60 - PAL50
  385. - $3B - $77 - PAL51
  386. - $3C - $70 - PAL60
  387. - $3D - $77 - PAL61
  388. - $3E - $10 - PAL70
  389. - $3F - $73 - PAL70
  390. - $40 - $00 - DMA (?) copy source address
  391. - $41 - $00 - ^^^
  392. - $42 - $00 - copy source bank
  393. - $43 - $00 - copy destination bank
  394. - $44 - $00 - copy destination address
  395. - $45 - $00 - ^^^
  396. - $46 - $00 - size of copied data (in bytes)
  397. - $47 - $00 - ^^^
  398. - $48 - $00 - bit 7 = 1 -> copy start
  399. (bit 7=0 when data transfer is finished)
  400. DMA(?) isn't immediate and not stopping
  401. the main cpu operations (like gbc GDMA)
  402. ports $40-$48 are updated durning copy process
  403. - $49 - $00 - ???
  404.  
  405. - $4A - $00 - sound DMA source address
  406. - $4B - $00 - ^^^
  407. - $4C - $00 - DMA source memory segment bank
  408. - $4D - $00 - ???
  409. - $4E - $00 - DMA transfer size (in bytes)
  410. - $4F - $00 - ^^^
  411. - $50 - $00 - ???
  412. - $51 - $00 - ???
  413. - $52 - $00 - bit 7 = 1 -> DMA start
  414. - $53 - $00 - ???
  415. - $54 - $00 - ???
  416. - $55 - $00 - ???
  417. - $56 - $00 - ???
  418. - $57 - $00 - ???
  419. - $58 - $00 - ???
  420. - $59 - $00 - ???
  421. - $5A - $00 - ???
  422. - $5B - $00 - ???
  423. - $5C - $00 - ???
  424. - $5D - $00 - ???
  425. - $5E - $00 - ???
  426. - $5F - $00 - ???
  427. - $60 - $0A - video mode
  428. Meaning of bits 5-7:
  429. 765
  430. ---
  431. 111 16 col/tile 'packed' mode - tiles like in Genesis, 16 col/tile
  432. 110 16 col/tile 'layered' mode - tiles like in GameGear, 16 col/tile
  433. 010 4 col/tile - the same as mono (below) but using color palettes, 4 cols/tile, one tile = 16 bytes, WSC only
  434. 000 4 col/tile mono - tiles like in GameBoy,
  435. [bit 7 = 16/4 color/tile , bit 6 - color/mono mode, bit 5 - 'packed' mode on/off]
  436. - $61 - $00 - ???
  437. - $62 - $00 - ???
  438. - $63 - $00 - ???
  439. - $64 - $00 - ???
  440. - $65 - $00 - ???
  441. - $66 - $00 - ???
  442. - $67 - $00 - ???
  443. - $68 - $00 - ???
  444. - $69 - $00 - ???
  445. - $6A - $00 - ???
  446. - $6B - $0F - ???
  447. - $6C - $00 - ???
  448. - $6D - $00 - ???
  449. - $6E - $00 - ???
  450. - $6F - $00 - ???
  451. - $70 - $00 - ???
  452. - $71 - $00 - ???
  453. - $72 - $00 - ???
  454. - $73 - $00 - ???
  455. - $74 - $00 - ???
  456. - $75 - $00 - ???
  457. - $76 - $00 - ???
  458. - $77 - $00 - ???
  459. - $78 - $00 - ???
  460. - $79 - $00 - ???
  461. - $7A - $00 - ???
  462. - $7B - $00 - ???
  463. - $7C - $00 - ???
  464. - $7D - $00 - ???
  465. - $7E - $00 - ???
  466. - $7F - $00 - ???
  467. - $80 - $00 - Audio 1 Freq
  468. - $81 - $00 - ^^^
  469. - $82 - $00 - Audio 2 Freq
  470. - $83 - $00 - ^^^
  471. - $84 - $00 - Audio 3 Freq
  472. - $85 - $00 - ^^^
  473. - $86 - $00 - Audio 4 Freq
  474. - $87 - $00 - ^^^
  475. - $88 - $00 - Audio 1 volume
  476. - $89 - $00 - Audio 2 volume
  477. - $8A - $00 - Audio 3 volume
  478. - $8B - $00 - Audio 4 volume
  479. - $8C - $00 - ?? Sweep value
  480. - $8D - $1F - ?? Sweep step
  481. - $8E - $00 - Noise control
  482. Bits :
  483. 0 - Noise generator type
  484. 1 - ^^^
  485. 2 - ^^^
  486. 3 - Reset
  487. 4 - Enable
  488. 5 - ???
  489. 6 - ???
  490. 7 - ???
  491. - $8F - $00 - Sample location
  492. To get the address of samples, shift this value left 6 times.
  493. 0 00xxxxxx xx000000
  494. - $90 - $00 - Audio control
  495. Bits:
  496. 0 - Audio 1 on/off
  497. 1 - Audio 2 on/off
  498. 2 - Audio 3 on/off
  499. 3 - Audio 4 on/off
  500. 4 - ???
  501. 5 - Audio 2 Voice
  502. 6 - Audio 3 Sweep
  503. 7 - Audio 4 Noise
  504. - $91 - $00 - Audio Output
  505. Bits :
  506. 0 - Mono
  507. 1 - Output Volume
  508. 2 - ^^^
  509. 3 - External Stereo
  510. 4 - ???
  511. 5 - ???
  512. 6 - ???
  513. 7 - External Speaker (set by hardware)
  514. - $92 - $00 - Noise Counter Shift Register (15 bits)
  515. - $93 - $00 - ^^^
  516. - $94 - $00 - Volume (4 bit)
  517. - $95 - $00 - ???
  518. - $96 - $00 - ???
  519. - $97 - $00 - ???
  520. - $98 - $00 - ???
  521. - $99 - $00 - ???
  522. - $9A - $00 - ???
  523. - $9B - $00 - ???
  524. - $9C - $00 - ???
  525. - $9D - $00 - ???
  526. - $9E - $03 - ???
  527. - $9F - $00 - ???
  528. - $A0 - $87 - Hardware type
  529. bit 1 - 1 - color
  530. 0 - mono
  531. - $A1 - $00 - ???
  532. - $A2 - $0C - Timer Control
  533. bit 0 - Hblank Timer on/off
  534. bit 1 - Hblank Timer Mode
  535. 0 - One Shot
  536. 1 - Auto Preset
  537. bit 2 - Vblank Timer(1/75s) on/off
  538. bit 3 - Vblank Timer Mode
  539. 0 - One Shot
  540. 1 - Auto Preset
  541. - $A3 - $00 - ???
  542. - $A4 - $00 - Hblank Timer 'frequency'
  543. 0 = no HBLANK Interrupt
  544. n = HBLANK Interrupt every n lines (???)
  545. - $A5 - $00 - ^^^
  546. - $A6 - $4F - Vblank Timer 'frequency'
  547. - $A7 - $FF - ^^^
  548. - $A8 - $00 - Hblank Counter - 1/12000s
  549. - $A9 - $00 - Hblank Counter - 1/(12000>>8)s
  550. - $AA - $00 - Vblank Counter - 1/75s
  551. - $AB - $00 - Vblank Counter - 1/(75>>8)s
  552. - $AC - $00 - ???
  553. - $AD - $00 - ???
  554. - $AE - $00 - ???
  555. - $AF - $00 - ???
  556. - $B0 - $00 - Interrupt Base
  557. - $B1 - $DB - Communication byte
  558. - $B2 - $00 - Interrupt enable
  559. bit 7 - HBlank Timer
  560. bit 6 - VBlank begin
  561. bit 5 - VBlank Timer
  562. bit 4 - Drawing line detection
  563. bit 3 - Serial receive
  564. bit 2 - RTC Alarm
  565. bit 1 - Key press
  566. bit 0 - Serial transmit
  567. - $B3 - $00 - Communication direction
  568. bit 7 - Recieve data interrupt generation
  569. bit 6 - Connection Speed
  570. 0 - 9600 bps
  571. 1 - 38400 bps
  572. bit 5 - Send data interrupt generation
  573. bit 4 - ???
  574. bit 3 - ???
  575. bit 2 - Send Complete
  576. bit 1 - Error
  577. bit 0 - Recieve Complete
  578.  
  579. write $00-$7f = read $00
  580. write $80-$bf = read $84
  581. write $c0-$cf = read $c4
  582. - $B4 - $00 - ???
  583. - $B5 - $40 - Controls
  584. bits 4-7 : read/write - Select line of inputs to read
  585. 0001 - read vertical cursors
  586. 0010 - read hozizontal cursors
  587. 0100 - read buttons
  588. bits 0-3 : read only - Read the current state of the input lines (positive logic) after having written 10h,20h, or 40h.
  589. Meaning of the bits when reading cursors:
  590. bit 0 - cursor up
  591. bit 1 - cursor right
  592. bit 2 - cursor down
  593. bit 3 - cursor left
  594. Meaning of the bits when reading buttons:
  595. bit 0 - ???
  596. bit 1 - START
  597. bit 2 - A
  598. bit 3 - B
  599. - $B6 - $00 - Interrupt Acknowledge
  600. bit 7 - HBlank Timer
  601. bit 6 - VBlank begin
  602. bit 5 - VBlank Timer
  603. bit 4 - Drawing line detection
  604. bit 3 - Serial receive
  605. bit 2 - RTC Alarm
  606. bit 1 - Key press
  607. bit 0 - Serial transmit
  608. - $B7 - $00 - ???
  609. - $B8 - $00 - ???
  610. - $B9 - $00 - ???
  611. - $BA - $01 - Internal EEPROM (?) Data
  612. - $BB - $00 - ^^^
  613. - $BC - $42 - Internal EEPROM (?) Address (calculated probably Modulo EEPROM (1kbit?) size (mirroring for read/write))
  614. - $BD - $00 - ^^^
  615. - $BE - $83 - Internal EEPROM (?) Command
  616. bit 7 - Initialize ?
  617. bit 6 - Protect ?
  618. bit 5 - Write
  619. bit 4 - Read
  620. bit 3 - ???
  621. bit 2 - ???
  622. bit 1 - Write Complete (Read only)
  623. bit 0 - Read Complete (Read only)
  624. - $BF - $00 - ???
  625. - $C0 - $2F - ROM Bank Base Selector for segments 4-$F
  626. - $C1 - $3F - SRAM Bank selector (???)
  627. - $C2 - $FF - BNK2SLCT - ROM Bank selector for segment 2
  628. - $C3 - $FF - BNK3SLCT - ROM Bank selector for segment 3
  629. - $C4 - $00 - EEPROM Data
  630. - $C5 - $00 - ^^^
  631. - $C6 - $00 - 1kbit EEPROM (16bit*64) :
  632. - bits 0-5 - address
  633. - bits 6-7 - command :
  634. 0 - Extended Comand Address bits 4-5
  635. 0 - Write Disable
  636. 1 - Write All
  637. 2 - Erase All
  638. 3 - Write Enable
  639. 1 - Write
  640. 2 - Read
  641. 3 - Erase
  642. - 16 kbit EEPROM (16bit*1024) - bits 0-7 - address (low)
  643. - $C7 - $00 - 1kbit EEPROM (16bit*64) :
  644. bit 0 - Start
  645. - 16 kbit EEPROM (16bit*1024) :
  646. - bits 0-1 - address (high)
  647. - bits 2-3 - command :
  648. 0 - Extended Comand Address bits 0-1
  649. 0 - Write Disable
  650. 1 - Write All
  651. 2 - Erase All
  652. 3 - Write Enable
  653. 1 - Write
  654. 2 - Read
  655. 3 - Erase
  656. - bit 4 - Start
  657. - $C8 - $D1 - EEPROM Command :
  658. bit 7 - Initialize ???
  659. bit 6 - Protect ???
  660. bit 5 - Write
  661. bit 4 - Read
  662. bit 3 - ???
  663. bit 2 - ???
  664. bit 1 - Write Complete (Read only)
  665. bit 0 - Read Complete (Read only)
  666. - $C9 - $D1 - ???
  667. - $CA - $D1 - RTC Command
  668. Write :
  669. - $10 - Reset
  670. - $12 - ??? Alarm ???
  671. - $13 - ???
  672. - $14 - Set Time
  673. - $15 - Get Time
  674. Read:
  675. - bit 7 - Ack [HACK = 1]
  676. - $CB - $D1 - RTC Data
  677. Write :
  678. Sometimes $40 , and wait for bit 7 = 1
  679. After Command ($CA):
  680. - $14 - 7 writes (all BCD):
  681. - Year ( + 2000)
  682. - Month
  683. - Day
  684. - Day Of Week
  685. - Hour
  686. - Min
  687. - Sec
  688. Read
  689. After Command ($CA) :
  690. - $13 - bit 7 - Ack [HACK = 1]
  691. - $15 - 7 reads (all BCD)
  692. - Year ( + 2000)
  693. - Month
  694. - Day
  695. - Day Of Week
  696. - Hour
  697. - Min
  698. - Sec
  699. - $CC - $D1 - ???
  700. - $CD - $D1 - ???
  701. - $CE - $D1 - ???
  702. - $CF - $D1 - ???
  703. - $D0 - $D1 - ???
  704. - $D1 - $D1 - ???
  705. - $D2 - $D1 - ???
  706. - $D3 - $D1 - ???
  707. - $D4 - $D1 - ???
  708. - $D5 - $D1 - ???
  709. - $D6 - $D1 - ???
  710. - $D7 - $D1 - ???
  711. - $D8 - $D1 - ???
  712. - $D9 - $D1 - ???
  713. - $DA - $D1 - ???
  714. - $DB - $D1 - ???
  715. - $DC - $D1 - ???
  716. - $DD - $D1 - ???
  717. - $DE - $D1 - ???
  718. - $DF - $D1 - ???
  719. - $E0 - $D1 - ???
  720. - $E1 - $D1 - ???
  721. - $E2 - $D1 - ???
  722. - $E3 - $D1 - ???
  723. - $E4 - $D1 - ???
  724. - $E5 - $D1 - ???
  725. - $E6 - $D1 - ???
  726. - $E7 - $D1 - ???
  727. - $E8 - $D1 - ???
  728. - $E9 - $D1 - ???
  729. - $EA - $D1 - ???
  730. - $EB - $D1 - ???
  731. - $EC - $D1 - ???
  732. - $ED - $D1 - ???
  733. - $EE - $D1 - ???
  734. - $EF - $D1 - ???
  735. - $F0 - $D1 - ???
  736. - $F1 - $D1 - ???
  737. - $F2 - $D1 - ???
  738. - $F3 - $D1 - ???
  739. - $F4 - $D1 - ???
  740. - $F5 - $D1 - ???
  741. - $F6 - $D1 - ???
  742. - $F7 - $D1 - ???
  743. - $F8 - $D1 - ???
  744. - $F9 - $D1 - ???
  745. - $FA - $D1 - ???
  746. - $FB - $D1 - ???
  747. - $FC - $D1 - ???
  748. - $FD - $D1 - ???
  749. - $FE - $D1 - ???
  750. - $FF - $D1 - ???
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