API tools faq
paste
Advertisement
Guest User

Untitled

a guest
Aug 19th, 2017
87
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 67.42 KB | None | 0 0
raw download clone embed print report
  1. // FB Alpha MSX arcade driver module, by dink. memory mapping code (megarom) from fMSX
  2. //
  3. // TODO:
  4. // 1: Clean-up!
  5. //
  6. // Oddities:
  7. // VoidRunner and Milk Race freeze when selecting between kbd/joy. (VoidRunner has a kludge, but it doesn't work for Milk Race)
  8. // Krakout any key starts, can't get into settings
  9. #include "machine.h"
  10. #include "d_msx.h"
  11.  
  12. #define K051649 1
  13. //#define CASSETTE 1
  14. //#define KANJI 1
  15. //#define DAC 1
  16. #define RAZE 1
  17.  
  18. #ifdef RAZE
  19. #include "raze\raze.h"
  20. static void __fastcall msx_write_konami4(UINT16 address, UINT8 data);
  21. static void __fastcall msx_write_konami4scc(UINT16 address, UINT8 data);
  22. static void __fastcall msx_write_scc(UINT16 address, UINT8 data);
  23. #endif
  24. static void setFetch(UINT32 I, UINT8 *ram);
  25.  
  26. //static UINT8 __fastcall msx_read(UINT16 address);
  27. static void __fastcall msx_write(UINT16 address, UINT8 data);
  28.  
  29. static UINT8 __fastcall msx_read_port(UINT16 port);
  30. static void __fastcall msx_write_port(UINT16 port, UINT8 data);
  31. void updateSound(unsigned int *addr);
  32. void updateSlaveSound();
  33. void updateSlaveSoundSCC();
  34. void updateScreen();
  35.  
  36. unsigned int cnt;
  37. unsigned int cnt2;
  38. unsigned int cnt3;
  39.  
  40. #define INT_DIGITS 19
  41. char *itoa(i)
  42. int i;
  43. {
  44. /* Room for INT_DIGITS digits, - and '\0' */
  45. static char buf[INT_DIGITS + 2];
  46. char *p = buf + INT_DIGITS + 1; /* points to terminating '\0' */
  47. if (i >= 0) {
  48. do {
  49. *--p = '0' + (i % 10);
  50. i /= 10;
  51. } while (i != 0);
  52. return p;
  53. }
  54. else { /* i < 0 */
  55. do {
  56. *--p = '0' - (i % 10);
  57. i /= 10;
  58. } while (i != 0);
  59. *--p = '-';
  60. }
  61. return p;
  62. }
  63.  
  64. int ovlInit(char *szShortName)
  65. {
  66. struct BurnDriver nBurnDrvMSX_1942 = {
  67. "msx", NULL,
  68. "MSX1 System",
  69. MSX_1942RomInfo, MSX_1942RomName, MSXInputInfo, MSXDIPInfo,
  70. DrvInit, DrvExit, DrvFrame, NULL
  71. };
  72.  
  73. memcpy(shared,&nBurnDrvMSX_1942,sizeof(struct BurnDriver));
  74.  
  75. ss_reg = (SclNorscl *)SS_REG;
  76. ss_regs = (SclSysreg *)SS_REGS;
  77. file_id = 2;
  78. }
  79. //-------------------------------------------------------------------------------------------------------------------------------------
  80. #if 1
  81. static void load_rom()
  82. {
  83. PCM_MeStop(pcm);
  84. memset(SOUND_BUFFER,0x00,RING_BUF_SIZE*8);
  85.  
  86. struct BurnRomInfo ri;
  87.  
  88. BurnDrvGetRomInfo(&ri, 0);
  89. ri.nLen = GetFileSize(file_id);
  90. GFS_Load(file_id, 0, game, ri.nLen);
  91. CurRomSizeA = ri.nLen;
  92.  
  93. z80_init_memmap();
  94.  
  95. z80_map_fetch (0x0000, 0x3fff, maincpu);
  96. z80_map_read (0x0000, 0x3fff, maincpu);
  97. z80_end_memmap();
  98.  
  99. z80_set_in((unsigned char (*)(unsigned short))&msx_read_port);
  100. z80_set_out((void (*)(unsigned short, unsigned char))&msx_write_port);
  101.  
  102. nSoundBufferPos=0;
  103. *(unsigned int*)OPEN_CSH_VAR(nSoundBufferPos) = 0;
  104. PCM_MeStart(pcm);
  105. }
  106. #endif
  107. //-------------------------------------------------------------------------------------------------------------------------------------
  108. /*static*/ UINT8 update_input1(void)
  109. {
  110. unsigned int i=0,k;
  111. UINT8 temp = 0xFF;
  112. SysDevice *device;
  113. // __port = PER_OpenPort();
  114. // PER_GetPort(__port);
  115. if(( device = PER_GetDeviceR( &__port[0], 0 )) != NULL )
  116. {
  117. pltriggerE[0] = pltrigger[0];
  118. pltrigger[0] = PER_GetTrigger( device );
  119. pltriggerE[0] = (pltrigger[0]) ^ (pltriggerE[0]);
  120. pltriggerE[0] = (pltrigger[0]) & (pltriggerE[0]);
  121.  
  122. if((pltriggerE[0] & PER_DGT_S)!=0)
  123. {
  124. cleanmemmap();
  125. load_rom();
  126. DrvDoReset();
  127. // DrvExit();
  128. // DrvInit();
  129. // FNT_Print256_2bppSel((volatile Uint8 *)SS_FONT,(Uint8 *)" ",24,40);
  130. return;
  131. }
  132.  
  133. for(i=10;i<12;i++)
  134. {
  135. // if((pltrigger[0] & pad_asign[i])!=0)
  136. if((pltriggerE[0] & pad_asign[i])!=0)
  137. {
  138. switch(pltriggerE[0] & pad_asign[i] )
  139. {
  140. case PER_DGT_TR:
  141. if (file_id<=file_max) file_id++;
  142. else file_id=2;
  143. //#ifdef FONT
  144. FNT_Print256_2bpp((volatile Uint8 *)SS_FONT,
  145. (Uint8 *)" ",26,200);
  146. FNT_Print256_2bpp((volatile Uint8 *)SS_FONT,
  147. (Uint8 *)GFS_IdToName(file_id),26,200);
  148. //#endif
  149. break;
  150.  
  151. case PER_DGT_TL:
  152. if (file_id>2) file_id--;
  153. else file_id=file_max+1;
  154. FNT_Print256_2bpp((volatile Uint8 *)SS_FONT,
  155. (Uint8 *)" ",26,200);
  156. FNT_Print256_2bpp((volatile Uint8 *)SS_FONT,
  157. (Uint8 *)GFS_IdToName(file_id),26,200);
  158.  
  159. default:
  160. break;
  161. }
  162. }
  163. }
  164. }
  165. else pltrigger[0] = pltriggerE[0] = 0;
  166.  
  167. return 0;
  168. }
  169. //-------------------------------------------------------------------------------------------------------------------------------------
  170. static void SetVblank2( void ){
  171. int imask;
  172.  
  173.  
  174. imask = get_imask();
  175. set_imask(2);
  176. // INT_ChgMsk(INT_MSK_NULL,INT_MSK_VBLK_IN | INT_MSK_VBLK_OUT);
  177. INT_ChgMsk(INT_MSK_NULL, INT_MSK_VBLK_OUT);
  178. // INT_SetScuFunc(INT_SCU_VBLK_IN,UsrVblankIn2);
  179. INT_SetScuFunc(INT_SCU_VBLK_OUT,update_input1);
  180. // INT_ChgMsk(INT_MSK_VBLK_IN | INT_MSK_VBLK_OUT,INT_MSK_NULL);
  181. INT_ChgMsk(INT_MSK_VBLK_OUT,INT_MSK_NULL);
  182. set_imask(imask);
  183. __port = PER_OpenPort();
  184.  
  185. }
  186. //-------------------------------------------------------------------------------------------------------------------------------------
  187. static inline void intkeyOn(INT32 row, INT32 bit) {
  188. keyRows[row] = ((keyRows[row] & 0xff) | (1 << bit));
  189. }
  190.  
  191. static inline void intkeyOff(INT32 row, INT32 bit) {
  192. keyRows[row] = ((keyRows[row] & 0xff) & ~(1 << bit));
  193. }
  194.  
  195. static UINT8 keyRowGet(INT32 row) { // for ppi to read
  196. if (row > 11) return 0xff;
  197. return ~keyRows[row];
  198. }
  199.  
  200. static void keyInput(UINT8 kchar, UINT8 onoff) { // input from emulator
  201.  
  202. INT32 i = 0;
  203. INT32 gotkey = 0;
  204.  
  205. while (charMatrix[i][0] != '\0') {
  206. if (kchar == charMatrix[i][0]) {
  207. if (onoff) {
  208. intkeyOn(charMatrix[i][1], charMatrix[i][2]);
  209. } else {
  210. intkeyOff(charMatrix[i][1], charMatrix[i][2]);
  211. }
  212. gotkey = 1;
  213. break;
  214. }
  215. i++;
  216. }
  217. }
  218.  
  219. void msxKeyCallback(UINT8 code, UINT8 KeyType, UINT8 down)
  220. {
  221. static INT32 lastshifted = 0;
  222.  
  223. //bprintf(0, _T(" %c:%S,"), code, (down==1)?"DOWN":"UP");
  224. if (SwapSlash && code == '/') code = 0xe0;
  225.  
  226. if (lastshifted) memset(&keyRows, 0, sizeof(keyRows));
  227. keyInput(/*VK_SHIFT*/'\x10', (KeyType & 0xf0));
  228. keyInput(code, down);
  229. lastshifted = (KeyType & 0xf0);
  230. // Note regarding 'lastshifted'. If shift+key is pressed (f.ex. ") and shift
  231. // is let up before the key is let up, windows won't send the right keyup message.
  232. // this causes keys to get stuck. To kludge around this, we clear the keyboard
  233. // matrix-buffer when shift is let up. -dink
  234. }
  235.  
  236. static const char *ROMNames[MAXMAPPERS + 1] =
  237. {
  238. "KonamiGeneric 8k\0", "KonamiGeneric 16k\0", "Konami-SCC\0",
  239. "Konami\0", "ASCII 8k\0", "ASCII 16k\0",
  240. "Dooly\0", "Cross Blaim\0", "R-Type\0", "???\0"
  241. };
  242.  
  243. #ifdef CASSETTE
  244. #define CAS_BLOAD 1
  245. #define CAS_RUN 2
  246. #define CAS_CLOAD 3
  247. #define CAS_CLOADRR 4
  248. #define CAS_WRONGSIDE 5
  249.  
  250. static const char *CASAutoLoadTypes[] =
  251. {
  252. "bload \"cas:\", r\x0d", "run \"cas:\"\x0d", "cload\x0drun\x0d",
  253. "cload\x0drun\x0drun\x0d", "rem Set Tape Side-A in DIPs & reboot!\x0d"
  254. };
  255. #endif
  256.  
  257. static INT32 InsertCart(UINT8 *cartbuf, INT32 cartsize, INT32 nSlot);
  258. static void PageMap(INT32 CartSlot, const char *cMap); //("0:0:0:0:0:0:0:0")
  259. static void MapMegaROM(UINT8 nSlot, UINT8 nPg0, UINT8 nPg1, UINT8 nPg2, UINT8 nPg3);
  260.  
  261. #ifdef CASSETTE
  262. static INT32 CASAutoLoadPos = 0;
  263. static INT32 CASAutoLoadTicker = 0;
  264.  
  265. static void CASSideChange()
  266. {
  267. curtape = (CASSide) ? game2 : game;
  268. curtapelen = (CASSide) ? CurRomSizeB : CurRomSizeA;
  269. CASPos = 0;
  270. CASSideLast = CASSide;
  271. }
  272.  
  273. static void CASAutoLoad()
  274. {
  275. CASAutoLoadPos = 0;
  276. CASAutoLoadTicker = 0;
  277. CASFrameCounter = 0;
  278. CASPos = 0;
  279. }
  280.  
  281. static void CASAutoLoadTick()
  282. {
  283. if (CASAutoLoadPos == 0xff) return;
  284.  
  285. UINT8 CASModeTmp = (CASSide) ? CAS_WRONGSIDE : CASMode;
  286. UINT8 c = CASAutoLoadTypes[CASModeTmp - 1][CASAutoLoadPos];
  287. if (!c) {
  288. CASAutoLoadPos = 0xff;
  289. return;
  290. }
  291.  
  292. keyInput(c, !(CASAutoLoadTicker & 1));
  293. if (c == '\"' || c == ':' || c == '&' || c == '!')
  294. keyInput(0x10/*SHIFT*/, !(CASAutoLoadTicker & 1));
  295. if (CASAutoLoadTicker & 1) CASAutoLoadPos++;
  296. CASAutoLoadTicker++;
  297. }
  298.  
  299. static void CASPatchBIOS(UINT8 *bios)
  300. {
  301. UINT8 PatchBytes[] = { 0xe1, 0xe4, 0xe7, 0xea, 0xed, 0xf0, 0xf3, 0x00 };
  302. UINT8 i = 0;
  303.  
  304. while (PatchBytes[i] != 0x00) {
  305. UINT8 *p = bios + PatchBytes[i];
  306. p[0] = 0xed;
  307. p[1] = 0xfe;
  308. p[2] = 0xc9;
  309. i++;
  310. }
  311. }
  312. #endif
  313.  
  314. void msxinit(INT32 cart_len)
  315. {
  316. for(INT32 i = 0; i < MAXSLOTS; i++) {
  317. ROMMask[i] = 0;
  318. ROMData[i] = 0;
  319. ROMType[i] = 0;
  320. SRAMData[i] = 0;
  321. SCCReg[i] = 0;
  322. }
  323.  
  324. BIOSSLOT = DEFAULT_BIOSSLOT;
  325. CARTSLOTA = DEFAULT_CARTSLOTA;
  326. CARTSLOTB = DEFAULT_CARTSLOTB;
  327. RAMSLOT = DEFAULT_RAMSLOT;
  328.  
  329. if (SwapRamslot) { // Kludge for Toshiba-EMI's Break Out! - needs ram in slot 2
  330. RAMSLOT = 2;
  331. CARTSLOTB = 3;
  332. }
  333.  
  334. memset(EmptyRAM, 0xff, 0x4000); // bus is pulled high for unmapped reads
  335. /*
  336. memset(pAY8910Buffer[0],0x00,nBurnSoundLen * sizeof(INT16));
  337. memset(pAY8910Buffer[1],0x00,nBurnSoundLen * sizeof(INT16));
  338. memset(pAY8910Buffer[2],0x00,nBurnSoundLen * sizeof(INT16));
  339. DrvNMI = 0;
  340. */
  341.  
  342. for(INT32 PSlot = 0; PSlot < 4; PSlot++) // Point all pages there by default
  343. {
  344. for(INT32 Page = 0; Page < 8; Page++)
  345. {
  346. MemMap[PSlot][Page] = EmptyRAM;
  347. }
  348. }
  349. RAMPages = 4; // 64k
  350. RAMMask = RAMPages - 1;
  351. RAMData = main_mem;
  352. #ifdef CASSETTE
  353. if (CASMode) {
  354. // bprintf(0, _T("Cassette mode.\n"));
  355. // CZetSetEDFECallback(Z80EDFECallback);
  356. CASPatchBIOS(maincpu);
  357. CASAutoLoad();
  358. CASSide = 0; // Always start @ side A
  359. CASSideChange();
  360. }
  361. #endif
  362. // "Insert" BIOS ROM
  363. ROMData[BIOSSLOT] = maincpu;
  364. PageMap(BIOSSLOT, "0:1:2:3:e:e:e:e");
  365.  
  366. // if (!msx_basicmode)
  367. InsertCart(game, cart_len, CARTSLOTA);
  368.  
  369. PSLReg = 0;
  370.  
  371. for (INT32 i = 0; i < 4; i++) {
  372. WriteMode[i] = 0;
  373. PSL[i] = 0;
  374. MemMap[RAMSLOT][i * 2] = RAMData + (3 - i) * 0x4000;
  375. MemMap[RAMSLOT][i * 2 + 1] = MemMap[RAMSLOT][i * 2] + 0x2000;
  376. RAMMapper[i] = 3 - i;
  377. RAM[i * 2] = MemMap[BIOSSLOT][i * 2];
  378. RAM[i * 2 + 1] = MemMap[BIOSSLOT][i * 2 + 1];
  379. }
  380.  
  381. for (INT32 J = 0; J < MAXSLOTS; J++)
  382. if (((ROMMask[J] + 1) > 4) || (ROMType[J] == MAP_DOOLY))
  383. {
  384. INT32 I = ROMMask[J] + 1;
  385.  
  386. if ((ROMData[J][0] == 'A') && (ROMData[J][1] == 'B')) {
  387. MapMegaROM(J, 0, 1, 2, 3);
  388.  
  389. } else {
  390. if ((ROMData[J][(I - 2) << 13] == 'A') && (ROMData[J][((I - 2) << 13) + 1] == 'B'))
  391. MapMegaROM(J, I - 2, I - 1, I - 2, I - 1);
  392. }
  393. }
  394. }
  395.  
  396. static void rtype_do_bank(UINT8 *romdata)
  397. {
  398. rtype_bank_base[0] = romdata + 15 * 0x4000;
  399. if (rtype_selected_bank & 0x10)
  400. {
  401. rtype_selected_bank &= 0x17;
  402. }
  403. rtype_bank_base[1] = romdata + rtype_selected_bank * 0x4000;
  404. }
  405.  
  406. static void crossblaim_do_bank(UINT8 *romdata)
  407. {
  408. crossblaim_bank_base[0] = ( crossblaim_selected_bank & 2 ) ? NULL : romdata + ( crossblaim_selected_bank & 0x03 ) * 0x4000;
  409. crossblaim_bank_base[1] = romdata;
  410. crossblaim_bank_base[2] = romdata + ( crossblaim_selected_bank & 0x03 ) * 0x4000;
  411. crossblaim_bank_base[3] = ( crossblaim_selected_bank & 2 ) ? NULL : romdata + ( crossblaim_selected_bank & 0x03 ) * 0x4000;
  412. }
  413.  
  414. static void Mapper_write(UINT16 address, UINT8 data)
  415. {
  416. UINT8 Page = address >> 14; // pg. num
  417. UINT8 PSlot = PSL[Page];
  418.  
  419. if (PSlot >= MAXSLOTS) return;
  420.  
  421. if (!ROMData[PSlot] && (address == 0x9000))
  422. SCCReg[PSlot] = (data == 0x3f) ? 1 : 0;
  423.  
  424. #ifdef K051649
  425.  
  426. if (((address & 0xdf00) == 0x9800) && SCCReg[PSlot]) { // Handle Konami-SCC (+)
  427. UINT16 offset = address & 0x00ff;
  428.  
  429.  
  430. if (offset < 0x80) {
  431. cnt++;
  432. K051649WaveformWrite(offset, data);
  433. }
  434. else
  435. if (offset < 0xa0) {
  436. offset &= 0xf;
  437.  
  438. if (offset < 0xa) {
  439. cnt2++;
  440. K051649FrequencyWrite(offset, data);
  441. }
  442. else if (offset < 0xf) {
  443. cnt3++;
  444. K051649VolumeWrite(offset - 0xa, data);
  445. }
  446. else {
  447. K051649KeyonoffWrite(data);
  448. }
  449. }
  450. return;
  451. }
  452. #endif
  453.  
  454. if (!ROMData[PSlot] || !ROMMask[PSlot]) return;
  455.  
  456. switch (ROMType[PSlot])
  457. {
  458. case MAP_DOOLY:
  459. dooly_prot = data & 0x07;
  460. return;
  461.  
  462. case MAP_CROSSBL:
  463. crossblaim_selected_bank = data & 3;
  464. if (crossblaim_selected_bank == 0) {
  465. crossblaim_selected_bank = 1;
  466. }
  467. crossblaim_do_bank(ROMData[PSlot]);
  468.  
  469. return;
  470.  
  471. case MAP_RTYPE:
  472. if (address >= 0x7000 && address < 0x8000)
  473. {
  474. rtype_selected_bank = data & 0x1f;
  475. if (rtype_selected_bank & 0x10)
  476. {
  477. rtype_selected_bank &= 0x17;
  478. }
  479. rtype_bank_base[1] = ROMData[PSlot] + rtype_selected_bank * 0x4000;
  480. }
  481.  
  482. case MAP_KONGEN8:
  483. if ((address < 0x4000) || (address > 0xbfff)) break;
  484. Page = (address - 0x4000) >> 13;
  485. if (Page == 2) SCCReg[PSlot] = (data == 0x3f) ? 1 : 0;
  486.  
  487. data &= ROMMask[PSlot];
  488. if (data != ROMMapper[PSlot][Page])
  489. {
  490. RAM[Page + 2] = MemMap[PSlot][Page + 2] = ROMData[PSlot] + (data << 13);
  491. setFetch(Page + 2, RAM[Page + 2]);
  492. ROMMapper[PSlot][Page] = data;
  493. }
  494. return;
  495.  
  496. case MAP_KONGEN16:
  497. if ((address < 0x4000) || (address > 0xbfff)) break;
  498. Page = (address & 0x8000) >> 14;
  499.  
  500. data = (data << 1) & ROMMask[PSlot];
  501.  
  502. if (data != ROMMapper[PSlot][Page])
  503. {
  504. RAM[Page + 2] = MemMap[PSlot][Page + 2] = ROMData[PSlot] + (data << 13);
  505. RAM[Page + 3] = MemMap[PSlot][Page + 3] = RAM[Page + 2] + 0x2000;
  506. setFetch(Page + 2, RAM[Page + 2]);
  507. setFetch(Page + 3, RAM[Page + 3]);
  508.  
  509. ROMMapper[PSlot][Page] = data;
  510. ROMMapper[PSlot][Page + 1] = data + 1;
  511. }
  512. return;
  513.  
  514. case MAP_KONAMI5:
  515. if ((address < 0x5000) || (address > 0xb000) || ((address & 0x1fff) != 0x1000))
  516. {
  517. break;
  518. }
  519. Page = (address - 0x5000) >> 13;
  520.  
  521. if (Page == 2) SCCReg[PSlot] = (data == 0x3f) ? 1 : 0;
  522.  
  523. data &= ROMMask[PSlot];
  524. if (data != ROMMapper[PSlot][Page])
  525. {
  526. RAM[Page + 2] = MemMap[PSlot][Page + 2] = ROMData[PSlot] + (data << 13);
  527. setFetch(Page + 2,RAM[Page + 2]);
  528. //setFetchKonami4SCC();
  529. ROMMapper[PSlot][Page] = data;
  530. }
  531.  
  532. return;
  533.  
  534. case MAP_KONAMI4:
  535. if ((address < 0x6000) || (address > 0xa000) || (address & 0x1fff)) break;
  536. Page = (address - 0x4000) >> 13;
  537.  
  538. data &= ROMMask[PSlot];
  539. if (data != ROMMapper[PSlot][Page])
  540. {
  541. RAM[Page + 2] = MemMap[PSlot][Page + 2] = ROMData[PSlot] + (data << 13);
  542. setFetch(Page + 2,RAM[Page + 2]);
  543. ROMMapper[PSlot][Page] = data;
  544. }
  545. return;
  546.  
  547. case MAP_ASCII8:
  548. if ((address >= 0x6000) && (address < 0x8000))
  549. {
  550. UINT8 *pgPtr;
  551.  
  552. Page = (address & 0x1800) >> 11;
  553.  
  554. if (data & (ROMMask[PSlot] + 1)) {
  555. data = 0xff;
  556. pgPtr = SRAMData[PSlot];
  557. }
  558. else
  559. {
  560. data &= ROMMask[PSlot];
  561. pgPtr = ROMData[PSlot] + (data << 13);
  562. }
  563.  
  564. if (data != ROMMapper[PSlot][Page])
  565. {
  566. MemMap[PSlot][Page + 2] = pgPtr;
  567. ROMMapper[PSlot][Page] = data;
  568.  
  569. if (PSL[(Page >> 1) + 1] == PSlot)
  570. {
  571. RAM[Page + 2] = pgPtr;
  572. setFetch(Page + 2, pgPtr);
  573. // setFetchAscii8();
  574. }
  575. }
  576. return;
  577. }
  578. if ((address >= 0x8000) && (address < 0xc000) && (ROMMapper[PSlot][((address >> 13) & 1) + 2] == 0xff))
  579. {
  580. RAM[address >> 13][address & 0x1fff] = data;
  581. return;
  582. }
  583. break;
  584.  
  585. case MAP_ASCII16:
  586. if ((address >= 0x6000) && (address < 0x8000) && ((data <= ROMMask[PSlot] + 1) || !(address & 0x0fff)))
  587. {
  588. UINT8 *pgPtr;
  589. Page = (address & 0x1000) >> 11;
  590.  
  591. if (data & (ROMMask[PSlot] + 1))
  592. {
  593. data = 0xff;
  594. pgPtr = SRAMData[PSlot];
  595. }
  596. else
  597. {
  598. data = (data << 1) & ROMMask[PSlot];
  599. pgPtr = ROMData[PSlot] + (data << 13);
  600. }
  601.  
  602. if (data != ROMMapper[PSlot][Page])
  603. {
  604. MemMap[PSlot][Page + 2] = pgPtr;
  605. MemMap[PSlot][Page + 3] = pgPtr + 0x2000;
  606. ROMMapper[PSlot][Page] = data;
  607. ROMMapper[PSlot][Page + 1] = data + 1;
  608.  
  609. if (PSL[(Page >> 1) + 1] == PSlot)
  610. {
  611. RAM[Page + 2] = pgPtr;
  612. RAM[Page + 3] = pgPtr + 0x2000;
  613. setFetch(Page + 2, pgPtr);
  614. setFetch(Page + 3, pgPtr + 0x2000);
  615. }
  616. }
  617. return;
  618. }
  619.  
  620. if ((address >= 0x8000) && (address < 0xc000) && (ROMMapper[PSlot][2] == 0xff))
  621. {
  622. UINT8 *pgPtr = RAM[address >> 13];
  623. address &= 0x07ff;
  624. pgPtr[address + 0x0800] = pgPtr[address + 0x1000] = pgPtr[address + 0x1800] =
  625. pgPtr[address + 0x2000] = pgPtr[address + 0x2800] = pgPtr[address + 0x3000] =
  626. pgPtr[address + 0x3800] = pgPtr[address] = data;
  627. return;
  628. }
  629.  
  630. break;
  631. }
  632. //bprintf(0, _T("Unhandled mapper write. 0x%04X: %02X, slot %d\n"), address, data, PSlot);
  633. }
  634. //int vbt2 = 0;
  635. /*
  636. static INT32 Mapper_read(UINT16 address, UINT8 *data)
  637. {
  638. UINT8 Page = address >> 14;
  639. UINT8 PSlot = PSL[Page];
  640.  
  641. if (PSlot >= MAXSLOTS) return 0;
  642.  
  643. if (!ROMData[PSlot] || !ROMMask[PSlot]) return 0;
  644.  
  645. switch (ROMType[PSlot])
  646. {
  647. case MAP_CROSSBL:
  648. {
  649. UINT8 *bank_base = crossblaim_bank_base[address >> 14];
  650.  
  651. if (bank_base != NULL) {
  652. *data = bank_base[address & 0x3fff];
  653. return 1;
  654. }
  655. }
  656. case MAP_DOOLY:
  657. {
  658. if ((address > 0x3fff) && (address < 0xc000)) {
  659. UINT8 rb = ROMData[PSlot][address - 0x4000];
  660.  
  661. if (dooly_prot == 0x04) {
  662. rb = BITSWAP08(rb, 7, 6, 5, 4, 3, 1, 0, 2);
  663. }
  664.  
  665. *data = rb;
  666. return 1;
  667. }
  668. }
  669. case MAP_RTYPE:
  670. {
  671. if (address > 0x3fff && address < 0xc000)
  672. {
  673. *data = rtype_bank_base[address >> 15][address & 0x3fff];
  674. return 1;
  675. }
  676. }
  677. }
  678. return 0;
  679. }
  680. */
  681. //-----------------------------------------------------------------------------------------------------------------------------
  682. setFetchKonGen8()
  683. {
  684. #ifndef RAZE
  685. // bank 1 ---------------------------------------------------------------------------
  686. CZetMapArea( 0x4000, 0x5fff, 0, &RAM[2][0x0000] );
  687. CZetMapArea( 0x4000, 0x5fff, 1, NULL );
  688. CZetMapArea( 0x4000, 0x5fff, 2, &RAM[2][0x0000] );
  689. // bank 2 ---------------------------------------------------------------------------
  690. CZetMapArea( 0x6000, 0x7fff, 0, &RAM[3][0x0000] );
  691. CZetMapArea( 0x6000, 0x7fff, 1, NULL );
  692. CZetMapArea( 0x6000, 0x7fff, 2, &RAM[3][0x0000] );
  693. // bank 3 ---------------------------------------------------------------------------
  694. CZetMapArea( 0x8000, 0x9fff, 0, &RAM[4][0x0000] );
  695. CZetMapArea( 0x8000, 0x9fff, 1, NULL );
  696. CZetMapArea( 0x8000, 0x9fff, 2, &RAM[4][0x0000] );
  697. // bank 4 ---------------------------------------------------------------------------
  698. CZetMapArea( 0xA000, 0xbfff, 0, &RAM[5][0x0000] );
  699. CZetMapArea( 0xA000, 0xbfff, 1, NULL );
  700. CZetMapArea( 0xA000, 0xbfff, 2, &RAM[5][0x0000] );
  701. // end ------------------------------------------------------------------------------
  702. #else
  703. // bank 1 ---------------------------------------------------------------------------
  704. z80_map_read( 0x4000, 0x5fff, &RAM[2][0x0000] );
  705. z80_map_fetch( 0x4000, 0x5fff, &RAM[2][0x0000] );
  706. // bank 2 ---------------------------------------------------------------------------
  707. z80_map_read( 0x6000, 0x7fff, &RAM[3][0x0000] );
  708. z80_map_fetch( 0x6000, 0x7fff, &RAM[3][0x0000] );
  709. // bank 3 ---------------------------------------------------------------------------
  710. z80_map_read( 0x8000, 0x9fff, &RAM[4][0x0000] );
  711. z80_map_fetch( 0x8000, 0x9fff, &RAM[4][0x0000] );
  712. // bank 4 ---------------------------------------------------------------------------
  713. z80_map_read( 0xa000, 0xbfff, &RAM[5][0x0000] );
  714. z80_map_fetch( 0xa000, 0xbfff, &RAM[5][0x0000] );
  715. // end ------------------------------------------------------------------------------
  716. z80_map_read( 0xc000, 0xdfff, &RAM[6][0x0000]);
  717. z80_map_fetch( 0xc000, 0xdfff, &RAM[6][0x0000] );
  718.  
  719. z80_map_read( 0xe000, 0xffff, &RAM[7][0x0000]);
  720. z80_map_fetch( 0xe000, 0xffff, &RAM[7][0x0000] );
  721.  
  722. if(WriteMode[3])
  723. {
  724. z80_map_write( 0xc000, 0xdfff, &RAM[6][0x0000]);
  725. z80_map_write( 0xe000, 0xffff, &RAM[7][0x0000]);
  726. }
  727. else
  728. {
  729. z80_map_write( 0xc000, 0xdfff, NULL);
  730. z80_map_write( 0xe000, 0xffff, NULL);
  731. }
  732. #endif
  733. }
  734. //-----------------------------------------------------------------------------------------------------------------------------
  735. void setFetchRType()
  736. {
  737. #ifndef RAZE
  738. // bank 1 ---------------------------------------------------------------------------
  739. CZetMapArea( 0x4000, 0x5fff, 0, &RAM[2][0x0000] );
  740. CZetMapArea( 0x4000, 0x5fff, 1, NULL );
  741. CZetMapArea( 0x4000, 0x5fff, 2, &RAM[2][0x0000] );
  742. // bank 2 ---------------------------------------------------------------------------
  743. CZetMapArea( 0x6000, 0x7fff, 0, &RAM[3][0x0000] );
  744. CZetMapArea( 0x6000, 0x7fff, 1, NULL );
  745. CZetMapArea( 0x6000, 0x7fff, 2, &RAM[3][0x0000] );
  746. // bank 3 ---------------------------------------------------------------------------
  747. CZetMapArea( 0x8000, 0x9fff, 0, &RAM[4][0x0000] );
  748. CZetMapArea( 0x8000, 0x9fff, 1, NULL );
  749. CZetMapArea( 0x8000, 0x9fff, 2, &RAM[4][0x0000] );
  750. // bank 4 ---------------------------------------------------------------------------
  751. CZetMapArea( 0xA000, 0xbfff, 0, &RAM[5][0x0000] );
  752. CZetMapArea( 0xA000, 0xbfff, 1, NULL );
  753. CZetMapArea( 0xA000, 0xbfff, 2, &RAM[5][0x0000] );
  754. // end ------------------------------------------------------------------------------
  755. #else
  756. // bank 1 ---------------------------------------------------------------------------
  757. z80_map_read( 0x4000, 0x5fff, &RAM[2][0x0000] );
  758. z80_map_fetch( 0x4000, 0x5fff, &RAM[2][0x0000] );
  759. // bank 2 ---------------------------------------------------------------------------
  760. z80_map_read( 0x6000, 0x7fff, &RAM[3][0x0000] );
  761. z80_map_fetch( 0x6000, 0x7fff, &RAM[3][0x0000] );
  762. // bank 3 ---------------------------------------------------------------------------
  763. z80_map_read( 0x8000, 0x9fff, &RAM[4][0x0000] );
  764. z80_map_fetch( 0x8000, 0x9fff, &RAM[4][0x0000] );
  765. // bank 4 ---------------------------------------------------------------------------
  766. z80_map_read( 0xa000, 0xbfff, &RAM[5][0x0000] );
  767. z80_map_fetch( 0xa000, 0xbfff, &RAM[5][0x0000] );
  768. // end ------------------------------------------------------------------------------
  769. z80_map_read( 0xc000, 0xdfff, &RAM[6][0x0000]);
  770. z80_map_write( 0xc000, 0xdfff, &RAM[6][0x0000]);
  771. z80_map_fetch( 0xc000, 0xdfff, &RAM[6][0x0000] );
  772.  
  773. z80_map_read( 0xe000, 0xffff, &RAM[7][0x0000]);
  774. z80_map_write( 0xe000, 0xffff, &RAM[7][0x0000]);
  775. z80_map_fetch( 0xe000, 0xffff, &RAM[7][0x0000] );
  776. #endif
  777. }
  778. //-----------------------------------------------------------------------------------------------------------------------------
  779. void setFetchAscii8()
  780. {
  781. /*
  782. Since the size of the mapper is 8Kb, the memory banks are:
  783.  
  784. Bank 1: 4000h - 5FFFh
  785. Bank 2: 6000h - 7FFFh
  786. Bank 3: 8000h - 9FFFh
  787. Bank 4: A000h - BFFFh
  788.  
  789. And the address to change banks:
  790.  
  791. Bank 1: 6000h - 67FFh (6000h used)
  792. Bank 2: 6800h - 6FFFh (6800h used)
  793. Bank 3: 7000h - 77FFh (7000h used)
  794. Bank 4: 7800h - 7FFFh (7800h used)
  795. */
  796. #ifndef RAZE
  797. // bank 1 ---------------------------------------------------------------------------
  798. CZetMapArea( 0x4000, 0x5fff, 0, &RAM[2][0x0000] );
  799. CZetMapArea( 0x4000, 0x5fff, 1, &RAM[2][0x0000] );
  800. CZetMapArea( 0x4000, 0x5fff, 2, &RAM[2][0x0000] );
  801. // bank 2 ---------------------------------------------------------------------------
  802. CZetMapArea( 0x6000, 0x7fff, 0, &RAM[3][0x0000] );
  803. CZetMapArea( 0x6000, 0x7fff, 1, NULL );
  804. CZetMapArea( 0x6000, 0x7fff, 2, &RAM[3][0x0000] );
  805. // bank 3 ---------------------------------------------------------------------------
  806. CZetMapArea( 0x8000, 0x9fff, 0, &RAM[4][0x0000] );
  807. CZetMapArea( 0x8000, 0x9fff, 1, &RAM[4][0x0000] );
  808. CZetMapArea( 0x8000, 0x9fff, 2, &RAM[4][0x0000] );
  809. // bank 4 ---------------------------------------------------------------------------
  810. CZetMapArea( 0xA000, 0xbfff, 0, &RAM[5][0x0000] );
  811. CZetMapArea( 0xA000, 0xbfff, 1, &RAM[5][0x0000] );
  812. CZetMapArea( 0xA000, 0xbfff, 2, &RAM[5][0x0000] );
  813. // end ------------------------------------------------------------------------------
  814. #else
  815. // bank 1 ---------------------------------------------------------------------------
  816. z80_map_read( 0x4000, 0x5fff, &RAM[2][0x0000] );
  817. z80_map_write( 0x4000, 0x5fff, &RAM[2][0x0000] );
  818. z80_map_fetch( 0x4000, 0x5fff, &RAM[2][0x0000] );
  819. // bank 2 ---------------------------------------------------------------------------
  820. z80_map_read( 0x6000, 0x7fff, &RAM[3][0x0000] );
  821. z80_map_write( 0x6000, 0x7fff, NULL );
  822. z80_map_fetch( 0x6000, 0x7fff, &RAM[3][0x0000] );
  823. // bank 3 ---------------------------------------------------------------------------
  824. z80_map_read( 0x8000, 0x9fff, &RAM[4][0x0000] );
  825. z80_map_write( 0x8000, 0x9fff, &RAM[4][0x0000] );
  826. z80_map_fetch( 0x8000, 0x9fff, &RAM[4][0x0000] );
  827. // bank 4 ---------------------------------------------------------------------------
  828. z80_map_read( 0xA000, 0xbfff, &RAM[5][0x0000] );
  829. z80_map_write( 0xA000, 0xbfff, &RAM[5][0x0000] );
  830. z80_map_fetch( 0xA000, 0xbfff, &RAM[5][0x0000] );
  831. // end ------------------------------------------------------------------------------
  832. z80_map_read( 0xc000, 0xdfff, &RAM[6][0x0000]);
  833. z80_map_fetch( 0xc000, 0xdfff, &RAM[6][0x0000] );
  834.  
  835. z80_map_read( 0xe000, 0xffff, &RAM[7][0x0000]);
  836. z80_map_fetch( 0xe000, 0xffff, &RAM[7][0x0000] );
  837.  
  838. if(WriteMode[3])
  839. {
  840. z80_map_write( 0xc000, 0xdfff, &RAM[6][0x0000]);
  841. z80_map_write( 0xe000, 0xffff, &RAM[7][0x0000]);
  842. }
  843. #endif
  844. }
  845. //-----------------------------------------------------------------------------------------------------------------------------
  846. void setFetchAscii16()
  847. {
  848. /*
  849. Since the size of the mapper is 16Kb, the memory banks are:
  850.  
  851. Bank 1: 4000h - 7FFFh
  852. Bank 2: 8000h - BFFFh
  853.  
  854. And the address to change banks:
  855.  
  856. Bank 1: 6000h - 67FFh (6000h used)
  857. Bank 2: 7000h - 77FFh (7000h and 77FFh used)
  858. */
  859. #ifndef RAZE
  860. // bank 1 ---------------------------------------------------------------------------
  861. CZetMapArea( 0x4000, 0x5fff, 0, &RAM[2][0x0000] );
  862. CZetMapArea( 0x6000, 0x7fff, 0, &RAM[3][0x0000] );
  863.  
  864. CZetMapArea( 0x4000, 0x5fff, 1, &RAM[2][0x0000] );
  865. CZetMapArea( 0x6000, 0x6fff, 1, NULL );
  866. CZetMapArea( 0x6800, 0x6fff, 1, &RAM[3][0x0800] );
  867. CZetMapArea( 0x7000, 0x77ff, 1, NULL );
  868. CZetMapArea( 0x7800, 0x7fff, 1, &RAM[3][0x1800] );
  869.  
  870. CZetMapArea( 0x4000, 0x5fff, 2, &RAM[2][0x0000] );
  871. CZetMapArea( 0x6000, 0x7fff, 2, &RAM[3][0x0000] );
  872. // bank 2 ---------------------------------------------------------------------------
  873. CZetMapArea( 0x8000, 0x9fff, 0, &RAM[4][0x0000] );
  874. CZetMapArea( 0xa000, 0xbfff, 0, &RAM[5][0x0000] );
  875. CZetMapArea( 0x8000, 0x9fff, 1, &RAM[4][0x0000] );
  876. CZetMapArea( 0xa000, 0xbfff, 1, &RAM[5][0x0000] );
  877. CZetMapArea( 0x8000, 0x9fff, 2, &RAM[4][0x0000] );
  878. CZetMapArea( 0xa000, 0xbfff, 2, &RAM[5][0x0000] );
  879. #else
  880. // bank 1 ---------------------------------------------------------------------------
  881. z80_map_read( 0x4000, 0x5fff, &RAM[2][0x0000] );
  882. z80_map_write( 0x4000, 0x5fff, &RAM[2][0x0000] );
  883. z80_map_fetch( 0x4000, 0x5fff, &RAM[2][0x0000] );
  884. // bank 2 ---------------------------------------------------------------------------
  885. z80_map_read( 0x6000, 0x7fff, &RAM[3][0x0000] );
  886. z80_map_write( 0x6000, 0x67ff, NULL );
  887. z80_map_write( 0x6800, 0x6fff, &RAM[3][0x0800] );
  888. z80_map_write( 0x7000, 0x77ff, NULL );
  889. z80_map_write( 0x7800, 0x7fff, &RAM[3][0x1800] );
  890. z80_map_fetch( 0x6000, 0x7fff, &RAM[3][0x0000] );
  891. // bank 3 ---------------------------------------------------------------------------
  892. z80_map_read( 0x8000, 0x9fff, &RAM[4][0x0000] );
  893. z80_map_write( 0x8000, 0x9fff, &RAM[4][0x0000] );
  894. z80_map_fetch( 0x8000, 0x9fff, &RAM[4][0x0000] );
  895. // bank 4 ---------------------------------------------------------------------------
  896. z80_map_read( 0xA000, 0xbfff, &RAM[5][0x0000] );
  897. z80_map_write( 0xA000, 0xbfff, &RAM[5][0x0000] );
  898. z80_map_fetch( 0xA000, 0xbfff, &RAM[5][0x0000] );
  899. // end ------------------------------------------------------------------------------
  900. z80_map_read( 0xc000, 0xdfff, &RAM[6][0x0000]);
  901. z80_map_write( 0xc000, 0xdfff, &RAM[6][0x0000]);
  902. z80_map_fetch( 0xc000, 0xdfff, &RAM[6][0x0000] );
  903.  
  904. z80_map_read( 0xe000, 0xffff, &RAM[7][0x0000]);
  905. z80_map_write( 0xe000, 0xffff, &RAM[7][0x0000]);
  906. z80_map_fetch( 0xe000, 0xffff, &RAM[7][0x0000] );
  907. #endif
  908. }
  909. //-----------------------------------------------------------------------------------------------------------------------------
  910. void setFetchKonami4SCC()
  911. {
  912. /*
  913. Since the size of the mapper is 8Kb, the memory banks are:
  914.  
  915. Bank 1: 4000h - 5FFFh
  916. Bank 2: 6000h - 7FFFh
  917. Bank 3: 8000h - 9FFFh
  918. Bank 4: A000h - BFFFh
  919.  
  920. And the address to change banks:
  921.  
  922. Bank 1: 5000h - 57FFh (5000h used)
  923. Bank 2: 7000h - 77FFh (7000h used)
  924. Bank 3: 9000h - 97FFh (9000h used)
  925. Bank 4: B000h - B7FFh (B000h used)
  926.  
  927. */
  928. #ifndef RAZE
  929. // bank 1 ---------------------------------------------------------------------------
  930. CZetMapArea( 0x4000, 0x5fff, 0, &RAM[2][0x0000] );
  931. CZetMapArea( 0x4000, 0x4fff, 1, &RAM[2][0x0000] );
  932. CZetMapArea( 0x5000, 0x57ff, 1, NULL );
  933. CZetMapArea( 0x5800, 0x5fff, 1, &RAM[2][0x1800] );
  934. CZetMapArea( 0x4000, 0x5fff, 2, &RAM[2][0x0000] );
  935. // bank 2 ---------------------------------------------------------------------------
  936. CZetMapArea( 0x6000, 0x7fff, 0, &RAM[3][0x0000] );
  937. CZetMapArea( 0x6000, 0x6fff, 1, &RAM[3][0x0000] );
  938. CZetMapArea( 0x7000, 0x77ff, 1, NULL );
  939. CZetMapArea( 0x7800, 0x7fff, 1, &RAM[3][0x1800] );
  940. CZetMapArea( 0x6000, 0x7fff, 2, &RAM[3][0x0000] );
  941. // bank 3 ---------------------------------------------------------------------------
  942. CZetMapArea( 0x8000, 0x9fff, 0, &RAM[4][0x0000] );
  943. CZetMapArea( 0x8000, 0x8fff, 1, &RAM[4][0x0000] );
  944. CZetMapArea( 0x9000, 0x9fff, 1, NULL );
  945. // CZetMapArea( 0x9000, 0x98ff, 1, NULL );
  946. // CZetMapArea( 0x9900, 0x9fff, 1, &RAM[4][0x1800] );
  947. CZetMapArea( 0x8000, 0x9fff, 2, &RAM[4][0x0000] );
  948. // bank 4 ---------------------------------------------------------------------------
  949. CZetMapArea( 0xa000, 0xbfff, 0, &RAM[5][0x0000] );
  950. CZetMapArea( 0xa000, 0xafff, 1, &RAM[5][0x0000] );
  951. CZetMapArea( 0xb000, 0xb7ff, 1, NULL );
  952. CZetMapArea( 0xb800, 0xbfff, 1, &RAM[5][0x1800] );
  953. CZetMapArea( 0xA000, 0xbfff, 2, &RAM[5][0x0000] );
  954. // end ------------------------------------------------------------------------------
  955. #else
  956. // bank 1 ---------------------------------------------------------------------------
  957. z80_map_read( 0x4000, 0x5fff, &RAM[2][0x0000] );
  958. z80_map_write( 0x4000, 0x4fff, &RAM[2][0x0000] );
  959. z80_map_write( 0x5800, 0x5fff, &RAM[2][0x1800] );
  960. z80_map_fetch( 0x4000, 0x5fff, &RAM[2][0x0000] );
  961. // bank 2 ---------------------------------------------------------------------------
  962. z80_map_read( 0x6000, 0x7fff, &RAM[3][0x0000] );
  963. z80_map_write( 0x6000, 0x6fff, &RAM[3][0x0000] );
  964. z80_map_write( 0x7800, 0x7fff, &RAM[3][0x1800] );
  965. z80_map_fetch( 0x6000, 0x7fff, &RAM[3][0x0000] );
  966. // bank 3 ---------------------------------------------------------------------------
  967. z80_map_read( 0x8000, 0x9fff, &RAM[4][0x0000] );
  968. z80_map_write( 0x8000, 0x8fff, &RAM[4][0x0000] );
  969. z80_map_write( 0x9800, 0x9fff, &RAM[4][0x1800] );
  970. z80_map_fetch( 0x8000, 0x9fff, &RAM[4][0x0000] );
  971. // bank 4 ---------------------------------------------------------------------------
  972. z80_map_read( 0xa000, 0xbfff, &RAM[5][0x0000] );
  973. z80_map_write( 0xa000, 0xafff, &RAM[5][0x0000] );
  974. z80_map_write( 0xb800, 0xbfff, &RAM[5][0x1800] );
  975. z80_map_fetch( 0xa000, 0xbfff, &RAM[5][0x0000] );
  976. // end ------------------------------------------------------------------------------
  977. z80_map_read( 0xc000, 0xdfff, &RAM[6][0x0000]);
  978. z80_map_write( 0xc000, 0xdfff, &RAM[6][0x0000]);
  979. z80_map_fetch( 0xc000, 0xdfff, &RAM[6][0x0000] );
  980.  
  981. z80_map_read( 0xe000, 0xffff, &RAM[7][0x0000]);
  982. z80_map_write( 0xe000, 0xffff, &RAM[7][0x0000]);
  983. z80_map_fetch( 0xe000, 0xffff, &RAM[7][0x0000] );
  984. #endif
  985. }
  986. //-----------------------------------------------------------------------------------------------------------------------------
  987. void setFetchKonami4()
  988. {
  989. /*
  990. Since the size of the mapper is 8Kb, the memory banks are:
  991.  
  992. Bank 1: 4000h - 5FFFh
  993. Bank 2: 6000h - 7FFFh
  994. Bank 3: 8000h - 9FFFh
  995. Bank 4: A000h - BFFFh
  996.  
  997. And the address to change banks:
  998.  
  999. Bank 1: <none>
  1000. Bank 2: 6000h - 7FFFh (6000h used)
  1001. Bank 3: 8000h - 9FFFh (8000h used)
  1002. Bank 4: A000h - BFFFh (A000h used)
  1003. */
  1004. #ifndef RAZE
  1005. // bank 1 ---------------------------------------------------------------------------
  1006. CZetMapArea( 0x4000, 0x5fff, 0, &RAM[2][0x0000] );
  1007. CZetMapArea( 0x4000, 0x5fff, 1, &RAM[2][0x0000] );
  1008. CZetMapArea( 0x4000, 0x5fff, 2, &RAM[2][0x0000] );
  1009. // bank 2 ---------------------------------------------------------------------------
  1010. CZetMapArea( 0x6000, 0x7fff, 0, &RAM[3][0x0000] );
  1011. CZetMapArea( 0x6000, 0x7fff, 1, NULL );
  1012. CZetMapArea( 0x6000, 0x7fff, 2, &RAM[3][0x0000] );
  1013. // bank 3 ---------------------------------------------------------------------------
  1014. CZetMapArea( 0x8000, 0x9fff, 0, &RAM[4][0x0000] );
  1015. CZetMapArea( 0x8000, 0x9fff, 1, NULL );
  1016. CZetMapArea( 0x8000, 0x9fff, 2, &RAM[4][0x0000] );
  1017. // bank 4 ---------------------------------------------------------------------------
  1018. CZetMapArea( 0xA000, 0xbfff, 0, &RAM[5][0x0000] );
  1019. CZetMapArea( 0xA000, 0xbfff, 1, NULL );
  1020. CZetMapArea( 0xA000, 0xbfff, 2, &RAM[5][0x0000] );
  1021. // end ------------------------------------------------------------------------------
  1022. #else
  1023. // bank 1 ---------------------------------------------------------------------------
  1024. z80_map_read( 0x4000, 0x5fff, &RAM[2][0x0000] );
  1025. z80_map_write( 0x4000, 0x5fff, &RAM[2][0x0000] );
  1026. z80_map_fetch( 0x4000, 0x5fff, &RAM[2][0x0000] );
  1027.  
  1028. // bank 2 ---------------------------------------------------------------------------
  1029. z80_map_read( 0x6000, 0x7fff, &RAM[3][0x0000] );
  1030. z80_map_fetch( 0x6000, 0x7fff, &RAM[3][0x0000] );
  1031. // bank 3 ---------------------------------------------------------------------------
  1032. z80_map_read( 0x8000, 0x9fff, &RAM[4][0x0000] );
  1033. z80_map_fetch( 0x8000, 0x9fff, &RAM[4][0x0000] );
  1034. // bank 4 ---------------------------------------------------------------------------
  1035. z80_map_read( 0xa000, 0xbfff, &RAM[5][0x0000] );
  1036. z80_map_fetch( 0xa000, 0xbfff, &RAM[5][0x0000] );
  1037. // end ------------------------------------------------------------------------------
  1038. z80_map_read( 0xc000, 0xdfff, &RAM[6][0x0000]);
  1039. z80_map_fetch( 0xc000, 0xdfff, &RAM[6][0x0000] );
  1040.  
  1041. z80_map_read( 0xe000, 0xffff, &RAM[7][0x0000]);
  1042. z80_map_fetch( 0xe000, 0xffff, &RAM[7][0x0000] );
  1043.  
  1044. if(WriteMode[3])
  1045. {
  1046. z80_map_write( 0xc000, 0xdfff, &RAM[6][0x0000]);
  1047. z80_map_write( 0xe000, 0xffff, &RAM[7][0x0000]);
  1048. }
  1049. /* else
  1050. {
  1051. z80_map_write( 0xc000, 0xdfff, NULL);
  1052. z80_map_write( 0xe000, 0xffff, NULL);
  1053.  
  1054. }*/
  1055. #endif
  1056. }
  1057. //-----------------------------------------------------------------------------------------------------------------------------
  1058. static void setFetch(UINT32 I, UINT8 *ram)
  1059. {
  1060. UINT32 addr1=0x2000*I;
  1061. #ifndef RAZE
  1062. CZetMapArea(addr1, addr1+0x1fff, 0, ram); // working with zet
  1063. CZetMapArea(addr1, addr1+0x1fff, 2, ram); // working with zet
  1064. #else
  1065. // z80_map_read (addr1, addr1+0x1fff, &RAM[I][0x0000] ); // working with zet
  1066. z80_map_fetch(addr1, addr1+0x1fff, ram); // working with zet
  1067. z80_map_read(addr1, addr1+0x1fff, ram);
  1068. #endif
  1069. }
  1070. //-----------------------------------------------------------------------------------------------------------------------------
  1071. static void SetSlot(UINT8 nSlot)
  1072. {
  1073. UINT32 I, J;
  1074.  
  1075. if (PSLReg != nSlot) {
  1076. PSLReg = nSlot;
  1077. for (J = 0; J < 4; J++) {
  1078. I = J << 1;
  1079. PSL[J] = nSlot & 3;
  1080. RAM[I] = MemMap[PSL[J]][I];
  1081. RAM[I + 1] = MemMap[PSL[J]][I + 1];
  1082. WriteMode[J] = (PSL[J] == RAMSLOT) && (MemMap[RAMSLOT][I] != EmptyRAM);
  1083. setFetch(I, RAM[I]);
  1084. setFetch(I+1, RAM[I+1]);
  1085. nSlot >>= 2;
  1086. }
  1087. }
  1088. }
  1089.  
  1090. static void PageMap(INT32 CartSlot, const char *cMap)
  1091. {
  1092. for (INT32 i = 0; i < 8; i++) {
  1093. switch (cMap[i << 1]) {
  1094. case 'n': // no change
  1095. break;
  1096. case 'e': // empty page
  1097. {
  1098. MemMap[CartSlot][i] = EmptyRAM;
  1099. }
  1100. break;
  1101. default: // map page num.
  1102. {
  1103. MemMap[CartSlot][i] = ROMData[CartSlot] + ((cMap[i << 1] - '0') * 0x2000);
  1104. }
  1105. }
  1106. }
  1107. }
  1108.  
  1109. static void MapMegaROM(UINT8 nSlot, UINT8 nPg0, UINT8 nPg1, UINT8 nPg2, UINT8 nPg3)
  1110. {
  1111. if (nSlot >= MAXSLOTS) return;
  1112.  
  1113. nPg0 &= ROMMask[nSlot];
  1114. nPg1 &= ROMMask[nSlot];
  1115. nPg2 &= ROMMask[nSlot];
  1116. nPg3 &= ROMMask[nSlot];
  1117.  
  1118. MemMap[nSlot][2] = ROMData[nSlot] + nPg0 * 0x2000;
  1119. MemMap[nSlot][3] = ROMData[nSlot] + nPg1 * 0x2000;
  1120. MemMap[nSlot][4] = ROMData[nSlot] + nPg2 * 0x2000;
  1121. MemMap[nSlot][5] = ROMData[nSlot] + nPg3 * 0x2000;
  1122.  
  1123. ROMMapper[nSlot][0] = nPg0;
  1124. ROMMapper[nSlot][1] = nPg1;
  1125. ROMMapper[nSlot][2] = nPg2;
  1126. ROMMapper[nSlot][3] = nPg3;
  1127. }
  1128.  
  1129. static INT32 GuessROM(UINT8 *buf, INT32 Size)
  1130. {
  1131. INT32 i, j;
  1132. INT32 ROMCount[MAXMAPPERS];
  1133.  
  1134. for (i = 0; i < MAXMAPPERS; i++)
  1135. ROMCount[i] = 1;
  1136.  
  1137. ROMCount[MAP_KONGEN8] += 1;
  1138. ROMCount[MAP_ASCII16] -= 1;
  1139.  
  1140. for (i = 0; i < Size-2; i++) {
  1141. switch (buf[i] + (buf[i + 1] << 8) + (buf[i + 2] << 16))
  1142. {
  1143. case 0x500032:
  1144. case 0x900032:
  1145. case 0xB00032:
  1146. {
  1147. ROMCount[MAP_KONAMI5]++;
  1148. break;
  1149. }
  1150. case 0x400032:
  1151. case 0x800032:
  1152. case 0xA00032:
  1153. {
  1154. ROMCount[MAP_KONAMI4]++;
  1155. break;
  1156. }
  1157. case 0x680032:
  1158. case 0x780032:
  1159. {
  1160. ROMCount[MAP_ASCII8]++;
  1161. break;
  1162. }
  1163. case 0x600032:
  1164. {
  1165. ROMCount[MAP_KONAMI4]++;
  1166. ROMCount[MAP_ASCII8]++;
  1167. ROMCount[MAP_ASCII16]++;
  1168. break;
  1169. }
  1170. case 0x700032:
  1171. {
  1172. ROMCount[MAP_KONAMI5]++;
  1173. ROMCount[MAP_ASCII8]++;
  1174. ROMCount[MAP_ASCII16]++;
  1175. break;
  1176. }
  1177. case 0x77FF32:
  1178. {
  1179. ROMCount[MAP_ASCII16]++;
  1180. break;
  1181. }
  1182. }
  1183. }
  1184.  
  1185. for (i = 0, j = 0; j < MAXMAPPERS; j++)
  1186. if (ROMCount[j] > ROMCount[i]) i = j;
  1187.  
  1188. return i;
  1189. }
  1190.  
  1191. static INT32 IsBasicROM(UINT8 *rom)
  1192. {
  1193. return (rom[2] == 0 && rom[3] == 0 && rom[8] && rom[9]);
  1194. }
  1195.  
  1196. static UINT16 GetRomStart(UINT8* romData, INT32 size)
  1197. {
  1198. INT32 pages[3] = { 0, 0, 0 };
  1199.  
  1200. for (INT32 startPage = 0; startPage < 2; startPage++) {
  1201. UINT8* romPtr = romData + 0x4000 * startPage;
  1202.  
  1203. if (size < 0x4000 * startPage + 0x10) {
  1204. continue;
  1205. }
  1206. if (romPtr[0] == 'A' && romPtr[1] == 'B') {
  1207. for (INT32 i = 0; i < 4; i++) {
  1208. UINT16 address = romPtr[2 * i + 2] + 256 * (UINT16)romPtr[2 * i + 3];
  1209.  
  1210. if (address > 0) {
  1211. UINT16 page = address / 0x4000 - startPage;
  1212.  
  1213. if (page < 3) {
  1214. pages[page]++;
  1215. }
  1216. }
  1217. }
  1218. }
  1219. }
  1220.  
  1221. if (pages[1] && (pages[1] >= pages[0]) && (pages[1] >= pages[2])) {
  1222. return 0x4000;
  1223. }
  1224.  
  1225. if (pages[0] && pages[0] >= pages[2]) {
  1226. return 0x0000;
  1227. }
  1228.  
  1229. if (pages[2]) {
  1230. return 0x8000;
  1231. }
  1232.  
  1233. return 0x0000;
  1234. }
  1235.  
  1236. static INT32 InsertCart(UINT8 *cartbuf, INT32 cartsize, INT32 nSlot)
  1237. {
  1238. INT32 Len, Pages, Flat64, BasicROM;
  1239. UINT8 ca, cb;
  1240.  
  1241. if (nSlot >= MAXSLOTS) return 0;
  1242.  
  1243. Len = cartsize >> 13; // Len, in 8k pages
  1244.  
  1245. char toto2[100];
  1246. char *titi2 = &toto2[0];
  1247. titi2=itoa(file_id);
  1248. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"fileid ",4,30);
  1249. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)titi2,40,30);
  1250.  
  1251. /*
  1252. char toto[100];
  1253. char *titi = &toto[0];
  1254. titi=itoa(Len);
  1255. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"Len ",4,10);
  1256. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)titi,40,10);
  1257.  
  1258. titi=itoa(cartsize);
  1259. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"cartsize ",4,20);
  1260. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)titi,40,20);
  1261. */
  1262. for (Pages = 1; Pages < Len; Pages <<= 1); // Calculate nearest power of 2 of len
  1263.  
  1264. ROMData[nSlot] = cartbuf;
  1265. SRAMData[nSlot] = game_sram;
  1266.  
  1267. Flat64 = 0;
  1268. BasicROM = 0;
  1269.  
  1270. ca = cartbuf[0];
  1271. cb = cartbuf[1];
  1272.  
  1273. if ((ca == 'A') || (cb == 'B')) {
  1274. BasicROM = IsBasicROM(cartbuf);
  1275. } else {
  1276. ca = cartbuf[0 + 0x4000];
  1277. cb = cartbuf[1 + 0x4000];
  1278. Flat64 = (ca == 'A') && (cb == 'B');
  1279. }
  1280.  
  1281. if ((Len >= 2) && ((ca != 'A') || (cb != 'B'))) { // check last page
  1282. ca = cartbuf[0 + 0x2000 * (Len - 2)];
  1283. cb = cartbuf[1 + 0x2000 * (Len - 2)];
  1284. }
  1285.  
  1286. if ((ca != 'A') || (cb != 'B')) {
  1287. // bprintf(0, _T("MSX Cartridge signature not found!\n"));
  1288. return 0;
  1289. }
  1290.  
  1291. if (Len < Pages) { // rom isn't a valid page-length, so mirror
  1292. memcpy(ROMData[nSlot] + Len * 0x2000,
  1293. ROMData[nSlot] + (Len - Pages / 2) * 0x2000,
  1294. (Pages - Len) * 0x2000);
  1295. }
  1296.  
  1297. ROMMask[nSlot]= !Flat64 && (Len > 4) ? (Pages - 1) : 0x00;
  1298.  
  1299. if (ROMMask[nSlot] + 1 > 4)
  1300. {
  1301. ROMType[nSlot] = GuessROM(ROMData[nSlot], 0x2000 * (ROMMask[nSlot] + 1));
  1302. }
  1303.  
  1304. UINT8 filename[12];
  1305.  
  1306. strcpy(filename,GFS_IdToName(file_id));
  1307. if ( strcmp(filename, "VALIS.ROM") == 0
  1308. || strcmp(filename, "1942.ROM") == 0
  1309. || strcmp(filename, "HYDLIDE3.ROM") == 0
  1310. || strcmp(filename, "DRAGONQ1.ROM") == 0
  1311. || strcmp(filename, "DRAGONQ2.ROM") == 0
  1312. || strcmp(filename, "FNTSYZON.ROM") == 0
  1313. || strcmp(filename, "XANADU.ROM") == 0
  1314. )
  1315. ROMType[nSlot] = MAP_ASCII8;
  1316. if ( strcmp(filename, "GOLVEL.ROM") == 0
  1317. || strcmp(filename, "CRAZE.ROM") == 0
  1318. || strcmp(filename, "ADVENKID.ROM") == 0)
  1319. ROMType[nSlot] = MAP_ASCII16;
  1320. if ( strcmp(filename, "1942K.ROM") == 0
  1321. || strcmp(filename, "PENGADV.ROM") == 0
  1322. || strcmp(filename, "ROBOCOP.ROM") == 0
  1323. || strcmp(filename, "VALISK.ROM") == 0
  1324. || strcmp(filename, "SLAYDOKK.ROM") == 0
  1325. )
  1326. ROMType[nSlot] = MAP_KONAMI4;
  1327. if ( strcmp(filename, "SALAMAND.ROM") == 0
  1328. || strcmp(filename, "SALAMANK.ROM") == 0
  1329. || strcmp(filename, "MRMOLE.ROM") == 0
  1330. || strcmp(filename, "GRADIUS2.ROM") == 0
  1331. || strcmp(filename, "A1SPIRIT.ROM") == 0
  1332. || strcmp(filename, "F1SPIRIT.ROM") == 0
  1333. // || strcmp(filename, "GRADIUS3.ROM") == 0
  1334. )
  1335. ROMType[nSlot] = MAP_KONAMI5;
  1336. /*
  1337. <derek> invasion of the zombie monsters
  1338. <derek> chick fighter ;)
  1339. <derek> The Goonies
  1340. <gamezfan> Goonies :)
  1341. */
  1342.  
  1343. char toto[100];
  1344. char *titi = &toto[0];
  1345. titi=itoa(ROMType[nSlot]);
  1346. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"romtyp ",4,10);
  1347. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)titi,40,10);
  1348. titi=itoa(cartsize);
  1349. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"rsize ",4,20);
  1350. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)titi,40,20);
  1351.  
  1352. //FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"golvelious ",4,10);
  1353. // ROMType[nSlot] = MAP_KONAMI4; // gradius pengadv 1942k valisk
  1354. // ROMType[nSlot] = MAP_KONAMI5; // salamander
  1355. // ROMType[nSlot] = MAP_KONGEN8; // craze
  1356. // ROMType[nSlot] = MAP_ASCII8; // valis 1942 xanadu
  1357. // ROMType[nSlot] = MAP_ASCII16; // golvellious toobin craze
  1358. // ROMType[nSlot] = MAP_RTYPE;
  1359.  
  1360. if (ROMType[nSlot] != MAP_DOOLY) { // set-up non-megarom mirroring & mapping
  1361. switch (Len)
  1362. {
  1363. case 1: // 8k rom-mirroring
  1364. if (BasicROM)
  1365. { // BasicROM only on page 2
  1366. PageMap(nSlot, "e:e:e:e:0:0:e:e");
  1367. } else
  1368. { // normal 8k ROM
  1369. PageMap(nSlot, "0:0:0:0:0:0:0:0");
  1370. }
  1371. break;
  1372.  
  1373. case 2: // 16k rom-mirroring
  1374. if (BasicROM)
  1375. { // BasicROM only on page 2
  1376. PageMap(nSlot, "e:e:e:e:0:1:e:e");
  1377. } else
  1378. { // normal 16k ROM
  1379. PageMap(nSlot, "0:1:0:1:0:1:0:1");
  1380. }
  1381. break;
  1382.  
  1383. case 3: // MAP_KONAMI4
  1384. case 4: // 24k & 32k rom-mirroring
  1385. if (GetRomStart(cartbuf, cartsize) != 0x4000) {
  1386. PageMap(nSlot, "0:1:0:1:2:3:2:3"); // normal
  1387. } else {
  1388. PageMap(nSlot, "2:3:0:1:2:3:0:1"); // swapped
  1389. }
  1390. break;
  1391.  
  1392. default:
  1393. if (Flat64)
  1394. { // Flat-64k ROM
  1395. PageMap(nSlot, "0:1:2:3:4:5:6:7");
  1396. }
  1397. break;
  1398. }
  1399. }
  1400.  
  1401. // map gen/16k megaROM pages 0:1:last-1:last
  1402. if ((ROMType[nSlot] == MAP_KONGEN16) && (ROMMask[nSlot] + 1 > 4))
  1403. {
  1404. MapMegaROM(nSlot, 0, 1, ROMMask[nSlot] - 1, ROMMask[nSlot]);
  1405. }
  1406. return 1;
  1407. }
  1408.  
  1409.  
  1410. static void __fastcall msx_write_port(UINT16 port, UINT8 data)
  1411. {
  1412. port &= 0xff;
  1413. switch (port)
  1414. {
  1415. case 0x98:
  1416. TMS9928AWriteVRAM(data);
  1417. return;
  1418.  
  1419. case 0x99:
  1420. TMS9928AWriteRegs(data);
  1421. return;
  1422.  
  1423. case 0xa0:
  1424. AY8910Write(0, 0, data);
  1425. break;
  1426.  
  1427. case 0xa1:
  1428. AY8910Write(0, 1, data);
  1429. break;
  1430.  
  1431. case 0xa8:
  1432. case 0xa9:
  1433. case 0xaa:
  1434. case 0xab:
  1435. ppi8255_w(0, port & 3, data);
  1436. return;
  1437.  
  1438. case 0xd8: // Kanji high bit address selector
  1439. Kana = (Kana & 0x1f800) | (data & 0x3f) << 5;
  1440. KanaByte = 0;
  1441. return;
  1442.  
  1443. case 0xd9: // Kanji low bit address selector
  1444. Kana = (Kana & 0x007e0) | (data & 0x3f) << 11;
  1445. KanaByte = 0;
  1446. return;
  1447. }
  1448. }
  1449.  
  1450. static UINT8 __fastcall msx_read_port(UINT16 port)
  1451. {
  1452. port &= 0xff;
  1453.  
  1454. switch (port)
  1455. {
  1456. case 0x98:
  1457. return TMS9928AReadVRAM();
  1458.  
  1459. case 0x99:
  1460. return TMS9928AReadRegs() | ((VBlankKludge) ? 0x80 : 0x00);
  1461.  
  1462. case 0xa2:
  1463. return AY8910Read(0);
  1464.  
  1465. case 0xa8:
  1466. case 0xa9:
  1467. case 0xaa:
  1468. case 0xab:
  1469. return ppi8255_r(0, port & 3);
  1470.  
  1471. case 0xd9: {
  1472. UINT8 Kan = (use_kanji) ? kanji_rom[Kana + KanaByte] : 0xff;
  1473. KanaByte = (KanaByte + 1) & 0x1f;
  1474. return Kan;
  1475. }
  1476.  
  1477. case 0xfc: // map ram-page 0x0000, 0x4000, 0x8000, 0xc000
  1478. case 0xfd:
  1479. case 0xfe:
  1480. case 0xff:
  1481. return RAMMapper[port - 0xfc] | ~RAMMask;
  1482. }
  1483. return 0xff;
  1484. }
  1485.  
  1486. static UINT8 msx_ppi8255_portB_read()
  1487. {
  1488. return keyRowGet(ppiC_row);
  1489. }
  1490.  
  1491. static void msx_ppi8255_portA_write(UINT8 data)
  1492. {
  1493. SetSlot(data);
  1494. }
  1495.  
  1496. static void msx_ppi8255_portC_write(UINT8 data)
  1497. {
  1498. ppiC_row = data & 0x0f;
  1499. #ifdef DAC
  1500. if (DrvDips[0] & 0x02)
  1501. {
  1502. DACWrite(0, (data & 0x80) ? 0x80 : 0x00); // Key-Clicker / 1-bit DAC
  1503. }
  1504. #endif
  1505. }
  1506.  
  1507. static UINT8 ay8910portAread(UINT32 offset)
  1508. {
  1509. if (SwapJoyports) {
  1510. return (Joyselect) ? DrvInputs[0] : DrvInputs[1];
  1511. } else {
  1512. return (Joyselect) ? DrvInputs[1] : DrvInputs[0];
  1513. }
  1514. }
  1515.  
  1516. static void ay8910portAwrite(UINT32 offset, UINT32 data)
  1517. {
  1518. //bprintf(0, _T("8910 portAwrite %X:%X\n"), offset, data);
  1519. }
  1520.  
  1521. static void ay8910portBwrite(UINT32 offset, UINT32 data)
  1522. {
  1523. //bprintf(0, _T("B %X:%X\n"), offset, data);
  1524. Joyselect = (data & 0x40) ? 1 : 0;
  1525. }
  1526.  
  1527. static void vdp_interrupt(INT32 state)
  1528. {
  1529. #ifdef RAZE
  1530. if(state)
  1531. z80_raise_IRQ(0);
  1532. else
  1533. z80_lower_IRQ();
  1534. #else
  1535. CZetSetIRQLine(0, state ? ZET_IRQSTATUS_ACK : ZET_IRQSTATUS_NONE);
  1536. #endif
  1537. }
  1538.  
  1539. static void DrvDoReset()
  1540. {
  1541. memset (AllRam, 0, RamEnd - AllRam);
  1542.  
  1543. memset(&keyRows, 0, sizeof(keyRows));
  1544. ppiC_row = 0;
  1545.  
  1546. Kana = 0;
  1547. KanaByte = 0;
  1548.  
  1549. cnt=cnt2=cnt3=0;
  1550.  
  1551. msxinit(CurRomSizeA);
  1552.  
  1553. for (UINT8 J = 0; J < 4; J++)
  1554. {
  1555. UINT8 I = J << 1;
  1556. setFetch(I, RAM[I]);
  1557. setFetch(I+1, RAM[I+1]);
  1558. }
  1559.  
  1560. switch (ROMType[CARTSLOTA])
  1561. {
  1562. case MAP_KONAMI4:
  1563. setFetchKonami4();
  1564. if(WriteMode[3])
  1565. z80_add_write(0x6000, 0xbfff, 1, (void *)&msx_write);
  1566. else
  1567. z80_add_write(0x6000, 0xffff, 1, (void *)&msx_write);
  1568. break;
  1569.  
  1570. case MAP_KONAMI5:
  1571. setFetchKonami4SCC();
  1572. z80_add_write(0x5000, 0x8fff, 1, (void *)&msx_write_konami4scc);
  1573. z80_add_write(0x9000, 0x9fff, 1, (void *)&msx_write_scc);
  1574. z80_add_write(0xa000, 0xbfff, 1, (void *)&msx_write_konami4scc);
  1575. break;
  1576.  
  1577. case MAP_RTYPE:
  1578. setFetchRType();
  1579. z80_add_write(0x4000, 0xffff, 1, (void *)&msx_write);
  1580. break;
  1581.  
  1582. case MAP_KONGEN8:
  1583. setFetchKonGen8();
  1584. if(WriteMode[3])
  1585. z80_add_write(0x4000, 0xbfff, 1, (void *)&msx_write);
  1586. else
  1587. z80_add_write(0x4000, 0xffff, 1, (void *)&msx_write);
  1588. break;
  1589.  
  1590. case MAP_KONGEN16:
  1591.  
  1592. break;
  1593.  
  1594. case MAP_ASCII8:
  1595. setFetchAscii8();
  1596. if(WriteMode[3])
  1597. z80_add_write(0x6000, 0xbfff, 1, (void *)&msx_write);
  1598. else
  1599. z80_add_write(0x6000, 0xffff, 1, (void *)&msx_write);
  1600. break;
  1601.  
  1602. case MAP_ASCII16:
  1603. setFetchAscii16();
  1604. z80_add_write(0x6000, 0xffff, 1, (void *)&msx_write);
  1605. break;
  1606. }
  1607.  
  1608. ppi8255_init(1); // there is no reset, so use this.
  1609. #ifdef RAZE
  1610. z80_reset();
  1611. #else
  1612. CZetOpen(0);
  1613. CZetReset();
  1614. #endif
  1615. TMS9928AReset();
  1616. #ifndef RAZE
  1617. CZetClose();
  1618. #endif
  1619. AY8910Reset(0);
  1620. #ifdef K051649
  1621. K051649Reset();
  1622. #endif
  1623. #ifdef DAC
  1624. DACReset();
  1625. #endif
  1626. }
  1627.  
  1628. static INT32 MemIndex()
  1629. {
  1630. UINT8 *Next; Next = AllMem;
  1631. maincpu = Next; Next += 0x020000;
  1632. game = (UINT8 *)0x00280000; //MAX_MSX_CARTSIZE;
  1633.  
  1634. #ifdef CASSETTE
  1635. game2 = (UINT8 *)0x00280000; //MAX_MSX_CARTSIZE;
  1636. #endif
  1637.  
  1638. #ifdef KANJI
  1639. kanji_rom = Next; Next += 0x040000;
  1640. #endif
  1641. game_sram = Next; Next += 0x004000;
  1642.  
  1643. AllRam = Next;
  1644.  
  1645. main_mem = Next; Next += 0x020000;
  1646. EmptyRAM = Next; Next += 0x010000;
  1647.  
  1648. RamEnd = Next;
  1649.  
  1650. pAY8910Buffer[0] = (INT16*)Next; Next += nBurnSoundLen * sizeof(INT16);
  1651. pAY8910Buffer[1] = (INT16*)Next; Next += nBurnSoundLen * sizeof(INT16);
  1652. pAY8910Buffer[2] = (INT16*)Next; Next += nBurnSoundLen * sizeof(INT16);
  1653.  
  1654. #ifdef K051649
  1655. SCCMixerBuffer = (INT16*)Next; Next += 2 * 7680L * sizeof(INT16);
  1656. SCCMixerTable = (INT16*)0x00200000;//(INT16*)Next; Next += 512 * 5 * sizeof(INT16);
  1657. #endif
  1658. // CZ80Context = Next; Next += 0x1080;
  1659. MemEnd = Next;
  1660. return 0;
  1661. }
  1662. #ifdef RAZE
  1663. static void __fastcall msx_write_konami4(UINT16 address, UINT8 data)
  1664. {
  1665. UINT32 Page = address >> 14; // pg. num
  1666. UINT32 PSlot = PSL[Page];
  1667.  
  1668. if (PSlot >= MAXSLOTS) return;
  1669.  
  1670. // if (!ROMData[PSlot] || !ROMMask[PSlot]) return;
  1671.  
  1672. Page = (address - 0x4000) >> 13;
  1673.  
  1674. data &= ROMMask[PSlot];
  1675. if (data != ROMMapper[PSlot][Page])
  1676. {
  1677. RAM[Page + 2] = MemMap[PSlot][Page + 2] = ROMData[PSlot] + (data << 13);
  1678. setFetch(Page + 2, RAM[Page + 2]);
  1679. ROMMapper[PSlot][Page] = data;
  1680. }
  1681. }
  1682.  
  1683. static void __fastcall msx_write_scc(UINT16 address, UINT8 data)
  1684. {
  1685. UINT8 Page = address >> 14; // pg. num
  1686. UINT32 PSlot = PSL[Page];
  1687.  
  1688. if (PSlot >= MAXSLOTS) return;
  1689.  
  1690. // if (!ROMData[PSlot] || !ROMMask[PSlot]) {cnt++; return; }
  1691.  
  1692. if (!ROMData[PSlot] && (address == 0x9000))
  1693. SCCReg[PSlot] = (data == 0x3f) ? 1 : 0;
  1694.  
  1695. #ifdef K051649
  1696. if (((address & 0xdf00) == 0x9800) && SCCReg[PSlot]) // Handle Konami-SCC (+)
  1697. { // Handle Konami-SCC (+)
  1698. UINT16 offset = address & 0x00ff;
  1699.  
  1700.  
  1701. if (offset < 0x80) {
  1702. K051649WaveformWrite(offset, data);
  1703. }
  1704. else
  1705. if (offset < 0xa0) {
  1706. offset &= 0xf;
  1707.  
  1708. if (offset < 0xa) {
  1709. K051649FrequencyWrite(offset, data);
  1710. }
  1711. else if (offset < 0xf) {
  1712. K051649VolumeWrite(offset - 0xa, data);
  1713. }
  1714. else {
  1715. K051649KeyonoffWrite(data);
  1716. }
  1717. }
  1718. return;
  1719. }
  1720.  
  1721. Page = (address - 0x5000) >> 13;
  1722.  
  1723. if (Page == 2) SCCReg[PSlot] = (data == 0x3f) ? 1 : 0;
  1724.  
  1725. data &= ROMMask[PSlot];
  1726. if (data != ROMMapper[PSlot][Page])
  1727. {
  1728. RAM[Page + 2] = /*MemMap[PSlot][Page + 2] =*/ ROMData[PSlot] + (data << 13);
  1729. setFetch(Page + 2,RAM[Page + 2]);
  1730. ROMMapper[PSlot][Page] = data;
  1731. }
  1732.  
  1733. #endif
  1734. }
  1735.  
  1736. static void __fastcall msx_write_konami4scc(UINT16 address, UINT8 data)
  1737. {
  1738. UINT32 Page = address >> 14; // pg. num
  1739. UINT32 PSlot = PSL[Page];
  1740.  
  1741. if (PSlot >= MAXSLOTS) return;
  1742.  
  1743. // if (!ROMData[PSlot] || !ROMMask[PSlot]) return;
  1744.  
  1745. Page = (address - 0x5000) >> 13;
  1746.  
  1747. if (Page == 2) SCCReg[PSlot] = (data == 0x3f) ? 1 : 0;
  1748.  
  1749. data &= ROMMask[PSlot];
  1750. if (data != ROMMapper[PSlot][Page])
  1751. {
  1752. RAM[Page + 2] = /*MemMap[PSlot][Page + 2] =*/ ROMData[PSlot] + (data << 13);
  1753. setFetch(Page + 2,RAM[Page + 2]);
  1754. ROMMapper[PSlot][Page] = data;
  1755. }
  1756. }
  1757.  
  1758. #endif
  1759.  
  1760.  
  1761.  
  1762.  
  1763. static void __fastcall msx_write(UINT16 address, UINT8 data)
  1764. {
  1765. if (WriteMode[address >> 14]) {
  1766. /*
  1767. if(address==65535 && data==240)
  1768. {
  1769. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"msx_write std ",4,10);
  1770. }
  1771. */
  1772. RAM[address >> 13][address & 0x1fff] = data;
  1773. return;
  1774. }
  1775.  
  1776. if ((address > 0x3fff) && (address < 0xc000))
  1777. {
  1778. /*
  1779. if(address==48896 && data==255)
  1780. {
  1781. FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"Mapper_write ",4,10);
  1782. }*/
  1783. //FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)"msx_write mapper ",4,10);
  1784.  
  1785. Mapper_write(address, data);
  1786. }
  1787. }
  1788. /*
  1789. static UINT8 __fastcall msx_read_ori(UINT16 address)
  1790. {
  1791. UINT8 d = 0;
  1792. if (Mapper_read(address, &d)) {
  1793. return d;
  1794. }
  1795. return (RAM[address >> 13][address & 0x1fff]);
  1796. }
  1797. */
  1798. /*
  1799. static UINT8 __fastcall msx_read(UINT16 address)
  1800. {
  1801. UINT8 d = 0;
  1802. if (Mapper_read(address, &d)) {
  1803. return d;
  1804. }
  1805.  
  1806. UINT8 Page = address >> 13; // pg. num
  1807. return (RAM[Page][address & 0x1fff]);
  1808. }
  1809. */
  1810. #ifdef DAC
  1811. static INT32 DrvSyncDAC()
  1812. {
  1813. #ifdef RAZE
  1814. return (INT32)(float)(nBurnSoundLen * (z80_get_cycles_elapsed() / (3579545.000 / ((Hertz60) ? 60.0 : 50.0))));
  1815. #else
  1816. return (INT32)(float)(nBurnSoundLen * (CZetTotalCycles() / (3579545.000 / ((Hertz60) ? 60.0 : 50.0))));
  1817. #endif
  1818. }
  1819. #endif
  1820.  
  1821. static INT32 DrvInit()
  1822. {
  1823. DrvInitSaturn();
  1824. AllMem = NULL;
  1825. MemIndex();
  1826. INT32 nLen = MemEnd - (UINT8 *)0;
  1827.  
  1828. if ((AllMem = (UINT8 *)BurnMalloc(nLen)) == NULL) return 1;
  1829. memset(AllMem, 0, nLen);
  1830. MemIndex();
  1831.  
  1832. {
  1833. struct BurnRomInfo ri;
  1834.  
  1835. // bprintf(0, _T("MSXINIT...\n"));
  1836. DrvDips[0] = 0x10;
  1837.  
  1838. Hertz60 = (DrvDips[0] & 0x10) ? 1 : 0;
  1839. BiosmodeJapan = (DrvDips[0] & 0x01) ? 1 : 0;
  1840. SwapJoyports = (DrvDips[0] & 0x20) ? 1 : 0;
  1841.  
  1842. // bprintf(0, _T("%Shz mode.\n"), (Hertz60) ? "60" : "50");
  1843. // bprintf(0, _T("BIOS mode: %S\n"), (BiosmodeJapan) ? "Japanese" : "Normal");
  1844. // bprintf(0, _T("%S"), (SwapJoyports) ? "Joystick Ports: Swapped.\n" : "");
  1845. // if (BurnLoadRom(maincpu, 0x80 + BiosmodeJapan, 1)) return 1; // BIOS
  1846.  
  1847. if (BurnLoadRom(maincpu, 2 + BiosmodeJapan, 1)) return 1; // BIOS
  1848. #ifdef KANJI
  1849. // use_kanji = (BurnLoadRom(kanji_rom, 0x82, 1) == 0);
  1850. use_kanji = (BurnLoadRom(kanji_rom, 3, 1) == 0);
  1851. #endif
  1852.  
  1853. memset(game, 0xff, MAX_MSX_CARTSIZE);
  1854.  
  1855. BurnDrvGetRomInfo(&ri, 0);
  1856. ri.nLen = GetFileSize(file_id);
  1857.  
  1858. GFS_Load(file_id, 0, game, ri.nLen);
  1859. CurRomSizeA = ri.nLen;
  1860.  
  1861. #ifdef CASSETTE
  1862. BurnDrvGetRomInfo(&ri, 1);
  1863.  
  1864. if (ri.nLen > 0 && ri.nLen < MAX_MSX_CARTSIZE) {
  1865. memset(game2, 0xff, MAX_MSX_CARTSIZE);
  1866.  
  1867. if (BurnLoadRom(game2 + 0x00000, 1, 1)) return 1;
  1868.  
  1869. CurRomSizeB = ri.nLen;
  1870. // bprintf(0, _T("Loaded secondary tape/rom, size: %d.\n"), CurRomSizeB);
  1871. }
  1872. #endif
  1873. // msxinit(ri.nLen); //(in DrvDoReset()! -dink) ne pas décommenter !!!
  1874. }
  1875.  
  1876. #ifdef RAZE
  1877. z80_init_memmap();
  1878.  
  1879. z80_map_fetch (0x0000, 0x3fff, maincpu);
  1880. z80_map_read (0x0000, 0x3fff, maincpu);
  1881. z80_end_memmap();
  1882.  
  1883. z80_set_in((unsigned char (*)(unsigned short))&msx_read_port);
  1884. z80_set_out((void (*)(unsigned short, unsigned char))&msx_write_port);
  1885.  
  1886. #else
  1887. CZetInit2(1,CZ80Context);
  1888. CZetOpen(0);
  1889. CZetMapArea(0x0000, 0x3fff, 0, maincpu);
  1890. CZetMapArea(0x0000, 0x3fff, 2, maincpu);
  1891.  
  1892. CZetSetOutHandler(msx_write_port);
  1893. CZetSetInHandler(msx_read_port);
  1894.  
  1895. CZetSetWriteHandler(msx_write);
  1896. CZetSetReadHandler(msx_read);
  1897. CZetClose();
  1898.  
  1899. #endif
  1900. AY8910Init(0, 3579545/2, nBurnSoundRate, ay8910portAread, NULL, ay8910portAwrite, ay8910portBwrite);
  1901. // AY8910SetAllRoutes(0, 0.15, BURN_SND_ROUTE_BOTH);
  1902.  
  1903. #ifdef K051649
  1904. K051649Init(3579545/2,SCCMixerBuffer,SCCMixerTable);
  1905. #endif
  1906. // K051649SetRoute(0.20, BURN_SND_ROUTE_BOTH);
  1907. #ifdef DAC
  1908. DACInit(0, 0, 1, DrvSyncDAC);
  1909. #endif
  1910. // DACSetRoute(0, 0.30, BURN_SND_ROUTE_BOTH);
  1911.  
  1912. TMS9928AInit(TMS99x8A, 0x4000, 0, 0, vdp_interrupt);
  1913.  
  1914. ppi8255_init(1);
  1915. PPI0PortReadB = msx_ppi8255_portB_read;
  1916. PPI0PortWriteA = msx_ppi8255_portA_write;
  1917. PPI0PortWriteC = msx_ppi8255_portC_write;
  1918.  
  1919. DrvDoReset();
  1920.  
  1921. return 0;
  1922. }
  1923.  
  1924. void cleanmemmap()
  1925. {
  1926. for(INT32 PSlot = 0; PSlot < 4; PSlot++)
  1927. {
  1928. for(INT32 Page = 0; Page < 8; Page++)
  1929. {
  1930. MemMap[PSlot][Page] = NULL;
  1931. }
  1932. }
  1933.  
  1934. for(INT32 Page = 0; Page < 8; Page++)
  1935. {
  1936. RAM[Page] = NULL;
  1937. }
  1938.  
  1939. switch (ROMType[CARTSLOTA])
  1940. {
  1941. case MAP_KONAMI4:
  1942. setFetchKonami4();
  1943. z80_add_write(0x6000, 0xffff, 1, (void *)NULL);
  1944. z80_add_write(0x6000, 0xbfff, 1, (void *)NULL);
  1945. break;
  1946.  
  1947. case MAP_KONAMI5:
  1948. setFetchKonami4SCC();
  1949. z80_add_write(0x5000, 0x8fff, 1, (void *)NULL);
  1950. z80_add_write(0x9000, 0x9fff, 1, (void *)NULL);
  1951. z80_add_write(0xa000, 0xbfff, 1, (void *)NULL);
  1952. break;
  1953.  
  1954. case MAP_RTYPE:
  1955. setFetchRType();
  1956. z80_add_write(0x4000, 0xffff, 1, (void *)&msx_write);
  1957. break;
  1958.  
  1959. case MAP_KONGEN8:
  1960. setFetchKonGen8();
  1961. z80_add_write(0x4000, 0xffff, 1, (void *)NULL);
  1962. z80_add_write(0x4000, 0xbfff, 1, (void *)NULL);
  1963. break;
  1964.  
  1965. case MAP_KONGEN16:
  1966. break;
  1967.  
  1968. case MAP_ASCII8:
  1969. setFetchAscii8();
  1970. z80_add_write(0x6000, 0xffff, 1, (void *)NULL);
  1971. z80_add_write(0x6000, 0xbfff, 1, (void *)NULL);
  1972. break;
  1973.  
  1974. case MAP_ASCII16:
  1975. setFetchAscii16();
  1976. z80_add_write(0x6000, 0xffff, 1, (void *)NULL);
  1977. break;
  1978. }
  1979.  
  1980. for (UINT8 J = 0; J < 4; J++)
  1981. {
  1982. UINT8 I = J << 1;
  1983. setFetch(I, RAM[I]);
  1984. setFetch(I+1, RAM[I+1]);
  1985. }
  1986.  
  1987. z80_set_in((unsigned char (*)(unsigned short))NULL);
  1988. z80_set_out((void (*)(unsigned short, unsigned char))NULL);
  1989.  
  1990. z80_add_read(0x0000, 0xffff, 1, (void *)NULL);
  1991. z80_add_write(0x0000, 0xffff, 1, (void *)NULL);
  1992.  
  1993. for (unsigned int x=0; x<20;x++)
  1994. {
  1995. z80_set_reg(x,0);
  1996. }
  1997. }
  1998.  
  1999.  
  2000. static INT32 DrvExit()
  2001. {
  2002. nBurnFunction = NULL;
  2003.  
  2004. z80_stop_emulating();
  2005.  
  2006. cleanmemmap();
  2007.  
  2008. TMS9928AExit();
  2009. #ifdef K051649
  2010. K051649Exit();
  2011. #endif
  2012. AY8910Exit(0);
  2013. #ifdef DAC
  2014. DACExit();
  2015. #endif
  2016. ppi8255_exit();
  2017.  
  2018. for (int i = 0; i < 3; i++) {
  2019. pAY8910Buffer[i] = NULL;
  2020. }
  2021.  
  2022. maincpu = game = game_sram = AllRam = main_mem = NULL;
  2023. EmptyRAM = RAMData = MemEnd = RamEnd = NULL;
  2024.  
  2025. #ifdef K051649
  2026. SCCMixerBuffer = NULL;
  2027. SCCMixerTable = NULL;
  2028. #endif
  2029. // CZ80Context = NULL;
  2030.  
  2031. BurnFree (AllMem);
  2032. AllMem = NULL;
  2033.  
  2034. msx_basicmode = 0;
  2035. BiosmodeJapan = 0;
  2036. #ifdef CASSETTE
  2037. CASMode = 0;
  2038. #endif
  2039. VBlankKludge = 0;
  2040. SwapRamslot = 0;
  2041. SwapButton2 = 0;
  2042. SwapSlash = 0;
  2043. MapCursorToJoy1 = 0;
  2044.  
  2045. #ifdef BUILD_WIN32
  2046. cBurnerKeyCallback = NULL;
  2047. nReplayExternalDataCount = 0;
  2048. ReplayExternalData = NULL;
  2049. #endif
  2050. return 0;
  2051. }
  2052.  
  2053. static INT32 DrvFrame()
  2054. {
  2055. // FNT_Print256_2bpp((volatile unsigned char *)SS_FONT,(unsigned char *)" ",4,10);
  2056.  
  2057. static UINT8 lastnmi = 0;
  2058. /*
  2059. if (DrvReset) {
  2060. DrvDoReset();
  2061. }
  2062. */
  2063. { // Compile Inputs
  2064. memset (DrvInputs, 0xff, 2);
  2065. for (INT32 i = 0; i < 8; i++) {
  2066. DrvInputs[0] ^= (DrvJoy1[i] & 1) << i;
  2067. DrvInputs[1] ^= (DrvJoy2[i] & 1) << i;
  2068. }
  2069.  
  2070. #if 1
  2071. if (SwapButton2)
  2072. { // Kludge for Xenon and Astro Marine Corps where button #2 is the 'm' key.
  2073. static INT32 lastM = 0;
  2074. if (DrvJoy1[5]) {
  2075. keyInput('m', DrvJoy1[5]);
  2076. } else {
  2077. if (lastM) { // only turn 'm' off once after Button2 is unpressed.
  2078. keyInput('m', DrvJoy1[5]);
  2079. }
  2080. }
  2081. lastM = DrvJoy1[5];
  2082. }
  2083.  
  2084. SwapJoyports = (DrvDips[0] & 0x20) ? 1 : 0;
  2085. MapCursorToJoy1 = (DrvDips[0] & 0x80) ? 1 : 0;
  2086.  
  2087. // Keyboard fun!
  2088. keyInput(0xf1, DrvJoy4[3]); // f1 - f6
  2089. keyInput(0xf2, DrvJoy4[4]);
  2090. keyInput(0xf3, DrvJoy4[5]);
  2091. keyInput(0xf4, DrvJoy4[6]);
  2092. keyInput(0xf5, DrvJoy4[7]);
  2093. keyInput(0xf6, DrvJoy4[8]);
  2094.  
  2095. if (MapCursorToJoy1)
  2096. { // Mapped to Joy #1
  2097. keyInput(0xf8, DrvJoy1[0]); // Key UP
  2098. keyInput(0xf9, DrvJoy1[1]); // Key DOWN
  2099. keyInput(0xfa, DrvJoy1[2]); // Key LEFT
  2100. keyInput(0xfb, DrvJoy1[3]); // Key RIGHT
  2101. keyInput(' ', DrvJoy1[4]);
  2102. } else
  2103. { // Normal Cursor-key function
  2104. keyInput(0xf8, DrvJoy4[9]); // Key UP
  2105. keyInput(0xf9, DrvJoy4[10]); // Key DOWN
  2106. keyInput(0xfa, DrvJoy4[11]); // Key LEFT
  2107. keyInput(0xfb, DrvJoy4[12]); // Key RIGHT
  2108. }
  2109. #endif
  2110. }
  2111.  
  2112.  
  2113. #ifdef CASSETTE
  2114. { // detect tape side changes
  2115. CASSide = (DrvDips[0] & 0x40) ? 1 : 0;
  2116. if (CASSideLast != CASSide) {
  2117. // bprintf(0, _T("Tape change: Side %c\n"), (CASSide) ? 'B' : 'A');
  2118. CASSideChange();
  2119. }
  2120.  
  2121. // cassette auto-load keyboard stuffing
  2122. if (CASMode && CASFrameCounter > 250 && CASFrameCounter & 2)
  2123. CASAutoLoadTick();
  2124. CASFrameCounter++;
  2125. }
  2126. #endif
  2127.  
  2128. INT32 nInterleave = 256; //256;
  2129. INT32 nCyclesTotal[1] = { 3579545 / ((Hertz60) ? 60 : 50) };
  2130. INT32 nCyclesDone[1] = { 0 };
  2131. // INT32 nSoundBufferPos = 0;
  2132.  
  2133.  
  2134. #ifdef RAZE
  2135. if (DrvNMI && !lastnmi) {
  2136. z80_cause_NMI();
  2137. z80_emulate(1);
  2138. lastnmi = DrvNMI;
  2139. } else lastnmi = DrvNMI;
  2140. #else
  2141. // CZetNewFrame();
  2142. CZetOpen(0);
  2143.  
  2144. if (DrvNMI && !lastnmi) {
  2145. CZetNmi();
  2146. lastnmi = DrvNMI;
  2147. } else lastnmi = DrvNMI;
  2148. #endif
  2149.  
  2150.  
  2151. if( ROMType[CARTSLOTA] != MAP_KONAMI5)
  2152. SPR_RunSlaveSH((PARA_RTN*)updateSlaveSound, NULL);
  2153. else
  2154. SPR_RunSlaveSH((PARA_RTN*)updateSlaveSoundSCC, NULL);
  2155. for (UINT32 i = 0; i < nInterleave; i++)
  2156. {
  2157. #ifdef RAZE
  2158. nCyclesDone[0] += z80_emulate(nCyclesTotal[0] / nInterleave);
  2159. #else
  2160. nCyclesDone[0] += CZetRun(nCyclesTotal[0] / nInterleave);
  2161. #endif
  2162. }
  2163. #ifndef RAZE
  2164. CZetClose();
  2165. #endif
  2166.  
  2167. TMS9928AInterrupt();
  2168. TMS9928ADraw();
  2169.  
  2170. // }
  2171. #ifdef DAC
  2172. volatile signed short * pBurnSoundOut = (signed short *)0x25a20000;
  2173. DACUpdate(pBurnSoundOut, nBurnSoundLen);
  2174. #endif
  2175. // }
  2176.  
  2177. return 0;
  2178. }
  2179. //-------------------------------------------------------------------------------------------------------------------------------------
  2180. /*static*/ void updateSlaveSound()
  2181. {
  2182. unsigned int deltaSlave = *(unsigned int*)OPEN_CSH_VAR(nSoundBufferPos);
  2183. unsigned int *nSoundBuffer = (unsigned int *)0x25a20000+deltaSlave/2;
  2184.  
  2185. signed short *pAY8910Buffer0 = pAY8910Buffer[0];
  2186. signed short *pAY8910Buffer1 = pAY8910Buffer[1];
  2187. signed short *pAY8910Buffer2 = pAY8910Buffer[2];
  2188.  
  2189. AY8910Update(0, &pAY8910Buffer[0], nBurnSoundLen);
  2190.  
  2191. for (unsigned int n = 0; n < nBurnSoundLen/2; n++)
  2192. {
  2193. signed int nSample,nSample2;
  2194. nSample = (*pAY8910Buffer0++);
  2195. nSample += (*pAY8910Buffer1++);
  2196. nSample += (*pAY8910Buffer2++);
  2197. nSample >>=2;
  2198. BURN_SND_CLIP (nSample);
  2199.  
  2200. nSample2 = (*pAY8910Buffer0++);
  2201. nSample2 += (*pAY8910Buffer1++);
  2202. nSample2 += (*pAY8910Buffer2++);
  2203. nSample2 >>=2;
  2204. BURN_SND_CLIP (nSample2);
  2205.  
  2206. *nSoundBuffer++ = nSample<<16|(nSample2); // & 0xffff);
  2207. }
  2208. deltaSlave+=nBurnSoundLen;
  2209.  
  2210. if(deltaSlave>=RING_BUF_SIZE>>1)
  2211. {
  2212. deltaSlave=0;
  2213. PCM_Task(pcm); // bon emplacement
  2214. }
  2215.  
  2216. *(unsigned int*)OPEN_CSH_VAR(nSoundBufferPos) = deltaSlave;
  2217. }
  2218. //-------------------------------------------------------------------------------------------------------------------------------------
  2219. //-------------------------------------------------------------------------------------------------------------------------------------
  2220. /*static*/ void updateSlaveSoundSCC()
  2221. {
  2222. unsigned int deltaSlave = *(unsigned int*)OPEN_CSH_VAR(nSoundBufferPos);
  2223. unsigned int *nSoundBuffer = (unsigned int *)0x25a20000+deltaSlave/2;
  2224.  
  2225. signed short *pAY8910Buffer0 = pAY8910Buffer[0];
  2226. signed short *pAY8910Buffer1 = pAY8910Buffer[1];
  2227. signed short *pAY8910Buffer2 = pAY8910Buffer[2];
  2228.  
  2229. AY8910Update(0, &pAY8910Buffer[0], nBurnSoundLen);
  2230. #ifdef K051649
  2231. K051649UpdateVBT(nBurnSoundLen);
  2232.  
  2233. INT16 *mix = (INT16 *)SCCMixerBuffer;
  2234. INT16 *mixer_lut = &SCCMixerTable[0x500];
  2235. // INT16 *mixer_lut = (INT16 *)(SCCMixerTable+0x500);
  2236. #endif
  2237.  
  2238. for (unsigned int n = 0; n < nBurnSoundLen; n++)
  2239. {
  2240. signed int nSample,nSample2;
  2241. nSample = *pAY8910Buffer0++;
  2242. nSample += *pAY8910Buffer1++;
  2243. nSample += *pAY8910Buffer2++;
  2244. #ifdef K051649
  2245. nSample += mixer_lut[*mix++];
  2246. #endif
  2247. nSample >>=2;
  2248. BURN_SND_CLIP (nSample);
  2249.  
  2250. nSample2 = *pAY8910Buffer0++;
  2251. nSample2 += *pAY8910Buffer1++;
  2252. nSample2 += *pAY8910Buffer2++;
  2253.  
  2254. #ifdef K051649
  2255. nSample2 += mixer_lut[*mix++];
  2256. #endif
  2257. nSample2 >>=2;
  2258. BURN_SND_CLIP (nSample2);
  2259.  
  2260. *nSoundBuffer++ = nSample<<16|(nSample2); // & 0xffff);
  2261. }
  2262. deltaSlave+=nBurnSoundLen;
  2263.  
  2264. if(deltaSlave>=RING_BUF_SIZE>>1)
  2265. {
  2266. deltaSlave=0;
  2267. PCM_Task(pcm); // bon emplacement
  2268. }
  2269.  
  2270. *(unsigned int*)OPEN_CSH_VAR(nSoundBufferPos) = deltaSlave;
  2271. }
  2272. //-------------------------------------------------------------------------------------------------------------------------------------
  2273. /*static*/ void updateSound(unsigned int *addr)
  2274. {
  2275. signed short *pAY8910Buffer0 = pAY8910Buffer[0];
  2276. signed short *pAY8910Buffer1 = pAY8910Buffer[1];
  2277. signed short *pAY8910Buffer2 = pAY8910Buffer[2];
  2278.  
  2279. AY8910Update(0, &pAY8910Buffer[0], nBurnSoundLen);
  2280. /*
  2281. #ifdef K051649
  2282. K051649UpdateVBT(nBurnSoundLen);
  2283.  
  2284. INT16 *mix = (INT16 *)SCCMixerBuffer;
  2285. // INT16 *mixer_lut = &SCCMixerTable[0x500];
  2286. INT16 *mixer_lut = (INT16 *)(SCCMixerTable+0x500);
  2287. #endif
  2288. */
  2289. for (unsigned int n = 0; n < nBurnSoundLen/2; n++)
  2290. {
  2291. signed int nSample,nSample2;
  2292. nSample = *pAY8910Buffer0++;
  2293. nSample += *pAY8910Buffer1++;
  2294. nSample += *pAY8910Buffer2++;
  2295. nSample >>=2;
  2296. #ifdef K051649
  2297. // nSample += mixer_lut[*mix++];
  2298. #endif
  2299. BURN_SND_CLIP (nSample);
  2300.  
  2301. nSample2 = *pAY8910Buffer0++;
  2302. nSample2 += *pAY8910Buffer1++;
  2303. nSample2 += *pAY8910Buffer2++;
  2304. nSample2 >>=2;
  2305. #ifdef K051649
  2306. // nSample2 += mixer_lut[*mix++];
  2307. #endif
  2308. BURN_SND_CLIP (nSample2);
  2309.  
  2310. *addr++ = nSample<<16|(nSample2); // & 0xffff);
  2311. }
  2312.  
  2313. // K051649Update(&nSoundBuffer[deltaSlave], nBurnSoundLen);
  2314. nSoundBufferPos+=nBurnSoundLen;
  2315.  
  2316. if(nSoundBufferPos>=RING_BUF_SIZE>>1)
  2317. {
  2318. nSoundBufferPos=0;
  2319. PCM_Task(pcm); // bon emplacement
  2320. }
  2321. }
  2322. //-------------------------------------------------------------------------------------------------------------------------------------
  2323. /*static*/ void initColors()
  2324. {
  2325. memset(SclColRamAlloc256,0,sizeof(SclColRamAlloc256));
  2326. colAddr = (Uint16*)SCL_AllocColRam(SCL_SPR,OFF);
  2327. (Uint16*)SCL_AllocColRam(SCL_NBG1,OFF);
  2328. SCL_SetColRam(SCL_NBG1,8,8,palette);
  2329. }
  2330. //-------------------------------------------------------------------------------------------------------------------------------------
  2331. void initLayers(void)
  2332. {
  2333. // SclConfig config;
  2334. // **29/01/2007 : VBT sauvegarde cycle patter qui fonctionne jusqu'ą maintenant
  2335.  
  2336. Uint16 CycleTb[]={
  2337. // VBT 04/02/2007 : cycle pattern qui fonctionne just test avec des ee
  2338. 0xff5e, 0xffff, //A1
  2339. 0xffff, 0xffff, //A0
  2340. 0x04ee, 0xffff, //B1
  2341. 0xffff, 0xffff //B0
  2342. };
  2343. SclConfig scfg;
  2344.  
  2345. // SCL_InitConfigTb(&scfg);
  2346. scfg.dispenbl = OFF;
  2347. /*
  2348. scfg.charsize = SCL_CHAR_SIZE_1X1;//OK du 1*1 surtout pas toucher
  2349. scfg.pnamesize = SCL_PN1WORD;
  2350. scfg.flip = SCL_PN_10BIT;
  2351. scfg.platesize = SCL_PL_SIZE_1X1;
  2352. scfg.coltype = SCL_COL_TYPE_16;
  2353. scfg.datatype = SCL_CELL;
  2354. scfg.patnamecontrl = 0x000c;// VRAM B1 ‚ĢƒIƒtƒZƒbƒg
  2355. scfg.plate_addr[0] = ss_map; */
  2356. SCL_SetConfig(SCL_NBG0, &scfg);
  2357. SCL_SetConfig(SCL_NBG2, &scfg);
  2358.  
  2359. /********************************************/
  2360.  
  2361. // SCL_InitConfigTb(&scfg);
  2362. scfg.dispenbl = ON;
  2363. scfg.bmpsize = SCL_BMP_SIZE_512X256;
  2364. scfg.coltype = SCL_COL_TYPE_16;//SCL_COL_TYPE_256;
  2365. scfg.datatype = SCL_BITMAP;
  2366. scfg.mapover = SCL_OVER_0;
  2367. scfg.plate_addr[0] = ss_font;
  2368. SCL_SetConfig(SCL_NBG1, &scfg);
  2369. SCL_SetCycleTable(CycleTb);
  2370. }
  2371. //-------------------------------------------------------------------------------------------------------------------------------------
  2372. void initPosition(void)
  2373. {
  2374. SCL_Open();
  2375. ss_reg->n1_move_x = 0;
  2376. ss_reg->n1_move_y = 0;
  2377. }
  2378. //-------------------------------------------------------------------------------------------------------------------------------------
  2379. /*static*/ void DrvInitSaturn()
  2380. {
  2381. SPR_InitSlaveSH();
  2382. nBurnSprites = 4+32;//131;//27;
  2383. nBurnLinescrollSize = 0;
  2384. nSoundBufferPos = 0;//sound position ą renommer
  2385.  
  2386. SS_CACHE = cache =(Uint8 *)SCL_VDP2_VRAM_B1;
  2387. SS_MAP = ss_map =(Uint16 *)SCL_VDP2_VRAM_B0;
  2388. SS_FONT = ss_font =(Uint16 *)SCL_VDP2_VRAM_A1;
  2389.  
  2390. ss_BgPriNum = (SclBgPriNumRegister *)SS_N0PRI;
  2391. ss_SpPriNum = (SclSpPriNumRegister *)SS_SPPRI;
  2392.  
  2393. ss_sprite = (SprSpCmd *)SS_SPRIT;
  2394.  
  2395. ss_sprite[3].ax = 0;
  2396. ss_sprite[3].ay = 0;
  2397.  
  2398. ss_sprite[3].color = 0x0;
  2399. ss_sprite[3].charAddr = 0x2220;// 0x2000 => 0x80 sprites <<6
  2400. ss_sprite[3].control = ( JUMP_NEXT | FUNC_NORMALSP); // | DIR_LRTBREV); // | flip);
  2401. ss_sprite[3].drawMode = ( COLOR_0 | ECD_DISABLE | COMPO_REP); //4bpp
  2402. ss_sprite[3].charSize = 0x20C0; // 256x*192y
  2403.  
  2404. SS_SET_N0PRIN(0);
  2405. SS_SET_N1PRIN(6);
  2406. SS_SET_S0PRIN(5);
  2407.  
  2408. initLayers();
  2409. initColors();
  2410.  
  2411. nBurnFunction = update_input1;
  2412. *(unsigned int*)OPEN_CSH_VAR(nSoundBufferPos) = 0;
  2413.  
  2414. drawWindow(0,192,192,0,64);
  2415. SetVblank2();
  2416. }
  2417. //-------------------------------------------------------------------------------------------------------------------------------------
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement
Public Pastes
Advertisement
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!