.syntax unified
  .cpu cortex-m3
  .thumb
  .global sseglut

.equ    GPIOA_IDR, 0x40010808
.equ	GPIOB_ODR, 0x40010C0C

sseglut:
	ldr r7, =#0
	 //beginning
loop:
 // Read GPIOA_IDR
            ldr r0, =GPIOA_IDR
            ldr r1, [r0]

            // Extract bits required
       		ubfx r2,r1, #0, #3 //or #3


	//after ubfx
	//if gpioa is high
	cmp r2, #0
	it ne //gpio is high
	bne  performAction //branch to perform action

	//else branch back to beginning
	b loop

performAction:
//branch -perform action
// Get data from LUT
            ldr r3, =ssegdata
            ldrb r4, [r3,r7] //r7 is our counter

			// Shift data to the correct bits
            lsl r5, r4, #3

            // Write data to GPIOB_ODR
            ldr r6, =GPIOB_ODR
            str r5, [r6]


//	//if register contains the last number
cmp r7, #7
it eq
beq resetr7 //set the register to 'C'

//else
//increment a register and display the correct number
add r7, #1

//branch to waiting branch
b waitingBranch


waitingBranch:
//if gpio is still high, we need to stay in this branch until it goes low
ldr r0, =GPIOA_IDR
            ldr r1, [r0]

            // Extract bits required -input bits
       		ubfx r2,r1, #0, #3 //or #3
cmp r2, #0 //check if gpioa is high
it ne //if is  high
bne waitingBranch //branch back to start of waiting branch

b loop //branch back to the beginning


resetr7:
ldr r7, =0
b waitingBranch




.align 4
ssegdata:   // The LUT
    .byte 0x39  // C
    .byte 0x4F  // 3
    .byte 0x5B  // 2
    .byte 0x6D  // 5
    .byte 0x7D  // 6
    .byte 0x07  // 7
    .byte 0x4F  // 3
    .byte 0x3F  // 0


   /* .byte 0x3F  // 0
    .byte 0x06  // 1
    .byte 0x5B  // 2
    .byte 0x4F  // 3
    .byte 0x66  // 4
    .byte 0x6D  // 5
    .byte 0x7D  // 6
    .byte 0x07  // 7
    .byte 0x7F  // 8
    .byte 0x67  // 9
    .byte 0x77  // A
    .byte 0x7C  // B
    .byte 0x29  // C
    .byte 0x5E  // D
    .byte 0x79  // E
    .byte 0x71  // F
	*/