AC_LAB1_EX2

module add4(
    output[3:0] sum,
    output c_out,
    input[3:0] a, b);

    wire c_in1, c_in2, c_in3;
    full_adder f1(sum[0], c_in1, a[0], b[0], 0);
    full_adder f2(sum[1], c_in2, a[1], b[1], c_in1);
    full_adder f3(sum[2], c_in3, a[2], b[2], c_in2);
    full_adder f4(sum[3], c_out, a[3], b[3], c_in3);
endmodule