A1 00 02 30 02 28 3E 09 C2 00 5A 03 00 00 F1 00 A0 00 04 6C 00 00 3E 00 00 01 00 10 00 00 00 00 08 00 1E 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 7F 00 48 00 00 00 00 62 85 00 00 32 14 00 00 9F FF 80 00 08 6C 00 00 00 50 04 00 00 00 00 00 00 04 80 3F 80 00 00 00 00 00 08 0E 00 04 00 00 00 1B 10 00 00 14 01 00 00 00 00 00 00 01 20 0F E0 00 00 00 00 00 02 03 80 01 00 00 00 06 C2 00 00 05 00 40 00 00 00 00 00 00 48 03 F8 00 00 00 00 00 00 80 E0 00 40 00 00 01 B1 80 00 01 40 10 00 00 00 00 00 00 12 00 FE 00 00 00 00 00 00 20 38 00 10 00 00 00 C3 FF FF 80 00 02 90 00 00 00 04 02 B0 00 02 08 02 12 28 00 00 F8 09 00 00 3E 01 E8 00 01 40 0D 9C 00 00 0A 00 80 00 00 00 00 00 00 90 07 F0 00 00 00 00 00 01 01 C0 00 80 00 00 03 65 00 00 02 80 20 00 00 00 00 00 00 24 01 FC 00 00 00 00 00 00 40 70 00 20 00 00 00 D9 80 00 00 A0 08 00 00 00 00 00 00 09 00 7F 00 00 00 00 00 00 10 1C 00 08 00 00 00 36 40 00 00 28 02 00 00 00 00 00 00 02 40 1F C0 00 00 00 00 00 04 07 00 02 00 00 00 00

Start: 0
End:   0
Value: 0
Setting 0:0 to 0x0
PRV:            0
SPE 1:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 1
SPE 3:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 3
SPE 5:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 5
SPE 7:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 7
BEI
  Cell BE node ID 0
  BE_MMIO_base    200005
  IOIF1 base mask F80
  IOIF1 base addr 240000
  IOIF0 base mask F80
  IOIF0 base addr 280000
  AC0 config      2
  BIF/IOIF0 RXcfg 4
  BIF/IOIF0 TXcfg 4
  IOIF0 coherency 1
  IOIF0 reorder   4
  IOIF1 reorder   4
  IOIF1 RXcfg     2
  IOIF1 TXcfg     2
  FlexIO PLL cfg  100
EIB
  AC0 livelock    0
  Node ID         0
  AC1 config      0
  AC0 config      1
  AC0 cmd credits 2
  LBAR0_cfg       200000
  LBAMR0_cfg      3FFFF8
  AC1 livelock    0
SPE 6:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 6
SPE 4:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 4
SPE 2:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 2
SPE 0:    MC_BASE 0  MC_COMP_EN 4000  IOIF1_COMP_EN 380  BE_MMIO_base 40000  Cell BE node ID 0  SPE ID 0
MIC Bus Logic Bits
  Address start   0
  Address end     FFFC
  PRV BE_MMIO     20000509
  MIC BE_MMIO     2000050A
  Node ID         0
PowerPC Processor Unit Bits
  PIR_defn        0
  SReset Vector   2401FC00000
PowerPC Processor Storage Subsystem Bits
  L2 livelock     1
SPE disable: 10