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  1. /dts-v1/;
  2.  
  3. / {
  4. model = "Seacliff (P2) DD";
  5. compatible = "qcom,kona-mtp\0qcom,kona\0qcom,mtp";
  6. qcom,board-id = <0x08 0x62>;
  7.  
  8. fragment@0 {
  9. target = <0xffffffff>;
  10.  
  11. __overlay__ {
  12. #address-cells = <0x02>;
  13. #size-cells = <0x00>;
  14. interrupt-controller;
  15. #interrupt-cells = <0x04>;
  16.  
  17. qcom,pm8150@0 {
  18. compatible = "qcom,spmi-pmic";
  19. reg = <0x00 0x00>;
  20. #address-cells = <0x02>;
  21. #size-cells = <0x00>;
  22.  
  23. qcom,power-on@800 {
  24. compatible = "qcom,qpnp-power-on";
  25. reg = <0x800 0x100>;
  26. interrupts = <0x00 0x08 0x00 0x03 0x00 0x08 0x01 0x03>;
  27. interrupt-names = "kpdpwr\0resin";
  28. qcom,pon-dbc-delay = <0x3d09>;
  29. qcom,kpdpwr-sw-debounce;
  30. qcom,system-reset;
  31. qcom,store-hard-reset-reason;
  32.  
  33. qcom,pon_1 {
  34. qcom,pon-type = <0x00>;
  35. linux,code = <0x74>;
  36. qcom,pull-up;
  37. };
  38.  
  39. qcom,pon_2 {
  40. qcom,pon-type = <0x01>;
  41. linux,code = <0x72>;
  42. qcom,pull-up;
  43. };
  44. };
  45.  
  46. qcom,temp-alarm@2400 {
  47. compatible = "qcom,spmi-temp-alarm";
  48. reg = <0x2400 0x100>;
  49. interrupts = <0x00 0x24 0x00 0x03>;
  50. io-channels = <0x01 0x06>;
  51. io-channel-names = "thermal";
  52. #thermal-sensor-cells = <0x00>;
  53. qcom,temperature-threshold-set = <0x01>;
  54. phandle = <0x03>;
  55. };
  56.  
  57. clock-controller@5b00 {
  58. compatible = "qcom,spmi-clkdiv";
  59. reg = <0x5b00 0x200>;
  60. #clock-cells = <0x01>;
  61. qcom,num-clkdivs = <0x02>;
  62. clock-output-names = "pm8150_div_clk1\0pm8150_div_clk2";
  63. clocks = <0xffffffff 0x00>;
  64. clock-names = "xo";
  65. phandle = <0x97>;
  66. };
  67.  
  68. sdam@b100 {
  69. compatible = "qcom,spmi-sdam";
  70. reg = <0xb100 0x100>;
  71. phandle = <0x11>;
  72. };
  73.  
  74. pinctrl@c000 {
  75. compatible = "qcom,spmi-gpio";
  76. reg = <0xc000 0xa00>;
  77. interrupts = <0x00 0xc0 0x00 0x00 0x00 0xc2 0x00 0x00 0x00 0xc5 0x00 0x00 0x00 0xc6 0x00 0x00 0x00 0xc8 0x00 0x00 0x00 0xc9 0x00 0x00>;
  78. interrupt-names = "pm8150_gpio1\0pm8150_gpio3\0pm8150_gpio6\0pm8150_gpio7\0pm8150_gpio9\0pm8150_gpio10";
  79. gpio-controller;
  80. #gpio-cells = <0x02>;
  81. qcom,gpios-disallowed = <0x02 0x04 0x05 0x08>;
  82. phandle = <0x34>;
  83.  
  84. key_home {
  85.  
  86. key_home_default {
  87. pins = "gpio1";
  88. function = "normal";
  89. input-enable;
  90. bias-pull-up;
  91. power-source = <0x00>;
  92. phandle = <0x98>;
  93. };
  94. };
  95.  
  96. imu_clkin {
  97.  
  98. imu_clkin_default {
  99. pins = "gpio3";
  100. function = "func1";
  101. output-low;
  102. power-source = <0x00>;
  103. bias-disable;
  104. qcom,dtest-buffer = <0x01>;
  105. qcom,drive-strength = <0x01>;
  106. phandle = <0x99>;
  107. };
  108.  
  109. imu_clkin_sleep {
  110. pins = "gpio3";
  111. function = "func1";
  112. input-enable;
  113. bias-pull-down;
  114. power-source = <0x00>;
  115. qcom,dtest-buffer = <0x01>;
  116. qcom,drive-strength = <0x01>;
  117. phandle = <0x9a>;
  118. };
  119. };
  120.  
  121. key_vol_up {
  122.  
  123. key_vol_up_default {
  124. pins = "gpio6";
  125. function = "normal";
  126. input-enable;
  127. bias-pull-up;
  128. power-source = <0x01>;
  129. phandle = <0x33>;
  130. };
  131. };
  132.  
  133. key_confirm {
  134.  
  135. key_confirm_default {
  136. pins = "gpio7";
  137. function = "normal";
  138. input-enable;
  139. bias-pull-up;
  140. power-source = <0x00>;
  141. phandle = <0x9b>;
  142. };
  143. };
  144.  
  145. usb2_vbus_boost {
  146.  
  147. usb2_vbus_boost_default {
  148. pins = "gpio9";
  149. function = "normal";
  150. output-low;
  151. power-source = <0x01>;
  152. phandle = <0x9c>;
  153. };
  154. };
  155.  
  156. usb2_vbus_det {
  157.  
  158. usb2_vbus_det_default {
  159. pins = "gpio10";
  160. function = "normal";
  161. input-enable;
  162. bias-pull-down;
  163. power-source = <0x01>;
  164. phandle = <0x9d>;
  165. };
  166. };
  167.  
  168. pm8150_adc_therm {
  169.  
  170. pm_gpio_adc_default {
  171. pins = "gpio3";
  172. function = "normal";
  173. bias-high-impedance;
  174. phandle = <0x02>;
  175. };
  176. };
  177. };
  178.  
  179. qcom,pm8150_rtc {
  180. compatible = "qcom,pm8941-rtc";
  181. interrupts = <0x00 0x61 0x01 0x00>;
  182. phandle = <0x9e>;
  183. };
  184.  
  185. vadc@3100 {
  186. compatible = "qcom,spmi-adc5";
  187. reg = <0x3100 0x100>;
  188. #address-cells = <0x01>;
  189. #size-cells = <0x00>;
  190. interrupts = <0x00 0x31 0x00 0x01>;
  191. interrupt-names = "eoc-int-en-set";
  192. qcom,adc-vdd-reference = <0x753>;
  193. #io-channel-cells = <0x01>;
  194. io-channel-ranges;
  195. phandle = <0x01>;
  196.  
  197. ref_gnd@0 {
  198. reg = <0x00>;
  199. label = "ref_gnd";
  200. qcom,pre-scaling = <0x01 0x01>;
  201. };
  202.  
  203. vref_1p25@1 {
  204. reg = <0x01>;
  205. label = "vref_1p25";
  206. qcom,pre-scaling = <0x01 0x01>;
  207. };
  208.  
  209. die_temp@2 {
  210. reg = <0x06>;
  211. label = "die_temp";
  212. qcom,pre-scaling = <0x01 0x01>;
  213. };
  214.  
  215. vph_pwr@83 {
  216. reg = <0x83>;
  217. label = "vph_pwr";
  218. qcom,pre-scaling = <0x01 0x03>;
  219. };
  220.  
  221. vcoin@85 {
  222. reg = <0x85>;
  223. label = "vcoin";
  224. qcom,pre-scaling = <0x01 0x03>;
  225. };
  226.  
  227. xo_therm@4c {
  228. reg = <0x4c>;
  229. label = "xo_therm";
  230. qcom,ratiometric;
  231. qcom,hw-settle-time = <0xc8>;
  232. qcom,pre-scaling = <0x01 0x01>;
  233. };
  234.  
  235. rfpa_therm1@4e {
  236. reg = <0x4e>;
  237. label = "rfpa_therm";
  238. qcom,ratiometric;
  239. qcom,hw-settle-time = <0xc8>;
  240. qcom,pre-scaling = <0x01 0x01>;
  241. };
  242.  
  243. cam4_therm@52 {
  244. reg = <0x52>;
  245. label = "cam4_therm";
  246. qcom,ratiometric;
  247. qcom,hw-settle-time = <0xc8>;
  248. qcom,pre-scaling = <0x01 0x01>;
  249. };
  250.  
  251. imu_therm@4d {
  252. reg = <0x4d>;
  253. label = "imu_therm";
  254. qcom,ratiometric;
  255. qcom,hw-settle-time = <0xc8>;
  256. qcom,pre-scaling = <0x01 0x01>;
  257. };
  258. };
  259.  
  260. adc_tm@3500 {
  261. compatible = "qcom,adc-tm5";
  262. reg = <0x3500 0x100>;
  263. interrupts = <0x00 0x35 0x00 0x01>;
  264. interrupt-names = "thr-int-en";
  265. #address-cells = <0x01>;
  266. #size-cells = <0x00>;
  267. #thermal-sensor-cells = <0x01>;
  268. io-channels = <0x01 0x4c 0x01 0x4d 0x01 0x4e 0x01 0x52>;
  269. pinctrl-names = "default";
  270. pinctrl-0 = <0x02>;
  271. phandle = <0x35>;
  272.  
  273. xo_therm@4c {
  274. reg = <0x4c>;
  275. qcom,ratiometric;
  276. qcom,hw-settle-time = <0xc8>;
  277. };
  278.  
  279. rfpa_therm1@4e {
  280. reg = <0x4e>;
  281. qcom,ratiometric;
  282. qcom,hw-settle-time = <0xc8>;
  283. };
  284.  
  285. cam4_therm@52 {
  286. reg = <0x52>;
  287. qcom,ratiometric;
  288. qcom,hw-settle-time = <0xc8>;
  289. };
  290.  
  291. imu_therm@4d {
  292. reg = <0x4d>;
  293. qcom,ratiometric;
  294. qcom,hw-settle-time = <0xc8>;
  295. };
  296. };
  297. };
  298.  
  299. qcom,pm8150@1 {
  300. compatible = "qcom,spmi-pmic";
  301. reg = <0x01 0x00>;
  302. #address-cells = <0x02>;
  303. #size-cells = <0x00>;
  304. };
  305. };
  306. };
  307.  
  308. fragment@1 {
  309. target = <0xffffffff>;
  310.  
  311. __overlay__ {
  312.  
  313. pm8150_tz {
  314. polling-delay-passive = <0x64>;
  315. polling-delay = <0x00>;
  316. thermal-governor = "step_wise";
  317. thermal-sensors = <0x03>;
  318. wake-capable-sensor;
  319. phandle = <0x9f>;
  320.  
  321. trips {
  322.  
  323. trip0 {
  324. temperature = <0x17318>;
  325. hysteresis = <0x00>;
  326. type = "passive";
  327. phandle = <0xa0>;
  328. };
  329.  
  330. trip1 {
  331. temperature = <0x1c138>;
  332. hysteresis = <0x00>;
  333. type = "passive";
  334. phandle = <0xa1>;
  335. };
  336.  
  337. trip2 {
  338. temperature = <0x23668>;
  339. hysteresis = <0x00>;
  340. type = "passive";
  341. };
  342. };
  343. };
  344. };
  345. };
  346.  
  347. fragment@2 {
  348. target = <0xffffffff>;
  349.  
  350. __overlay__ {
  351. #address-cells = <0x02>;
  352. #size-cells = <0x00>;
  353. interrupt-controller;
  354. #interrupt-cells = <0x04>;
  355.  
  356. qcom,pm8150b@2 {
  357. compatible = "qcom,spmi-pmic";
  358. reg = <0x02 0x00>;
  359. #address-cells = <0x02>;
  360. #size-cells = <0x00>;
  361.  
  362. qcom,revid@100 {
  363. compatible = "qcom,qpnp-revid";
  364. reg = <0x100 0x100>;
  365. phandle = <0x07>;
  366. };
  367.  
  368. qcom,power-on@800 {
  369. compatible = "qcom,qpnp-power-on";
  370. reg = <0x800 0x100>;
  371. };
  372.  
  373. qcom,temp-alarm@2400 {
  374. compatible = "qcom,spmi-temp-alarm";
  375. reg = <0x2400 0x100>;
  376. interrupts = <0x02 0x24 0x00 0x03>;
  377. io-channels = <0x04 0x06>;
  378. io-channel-names = "thermal";
  379. #thermal-sensor-cells = <0x00>;
  380. qcom,temperature-threshold-set = <0x01>;
  381. phandle = <0x14>;
  382. };
  383.  
  384. clock-controller@6000 {
  385. compatible = "qcom,spmi-clkdiv";
  386. reg = <0x6000 0x100>;
  387. #clock-cells = <0x01>;
  388. qcom,num-clkdivs = <0x01>;
  389. clock-output-names = "pm8150b_div_clk1";
  390. clocks = <0xffffffff 0x00>;
  391. clock-names = "xo";
  392. phandle = <0xa2>;
  393. };
  394.  
  395. qcom,pbs@7200 {
  396. compatible = "qcom,qpnp-pbs";
  397. reg = <0x7200 0x100>;
  398. phandle = <0x10>;
  399. };
  400.  
  401. qcom,sdam-qnovo@b000 {
  402. compatible = "qcom,qpnp-qnovo5";
  403. reg = <0xb000 0x100>;
  404. interrupts = <0x02 0xb0 0x01 0x01>;
  405. interrupt-names = "ptrain-done";
  406. pinctrl-names = "q_state1\0q_state2";
  407. pinctrl-0 = <0x05>;
  408. pinctrl-1 = <0x06>;
  409. phandle = <0xa3>;
  410. };
  411.  
  412. pinctrl@c000 {
  413. compatible = "qcom,spmi-gpio";
  414. reg = <0xc000 0xc00>;
  415. interrupts = <0x02 0xc0 0x00 0x00 0x02 0xc1 0x00 0x00 0x02 0xc4 0x00 0x00 0x02 0xc5 0x00 0x00 0x02 0xc6 0x00 0x00 0x02 0xc7 0x00 0x00 0x02 0xc8 0x00 0x00 0x02 0xc9 0x00 0x00 0x02 0xcb 0x00 0x00>;
  416. interrupt-names = "pm8150b_gpio1\0pm8150b_gpio2\0pm8150b_gpio5\0pm8150b_gpio6\0pm8150b_gpio7\0pm8150b_gpio8\0pm8150b_gpio9\0pm8150b_gpio10\0pm8150b_gpio12";
  417. gpio-controller;
  418. #gpio-cells = <0x02>;
  419. qcom,gpios-disallowed = <0x03 0x04 0x0b>;
  420. phandle = <0x1e>;
  421.  
  422. qnovo_fet_ctrl {
  423.  
  424. qnovo_fet_ctrl_state1 {
  425. pins = "gpio8";
  426. function = "normal";
  427. input-enable;
  428. output-disable;
  429. bias-disable;
  430. power-source = <0x00>;
  431. phandle = <0x05>;
  432. };
  433.  
  434. qnovo_fet_ctrl_state2 {
  435. pins = "gpio8";
  436. function = "normal";
  437. input-enable;
  438. output-disable;
  439. bias-pull-down;
  440. power-source = <0x00>;
  441. phandle = <0x06>;
  442. };
  443. };
  444.  
  445. smb_stat {
  446.  
  447. smb_stat_default {
  448. pins = "gpio6";
  449. function = "normal";
  450. input-enable;
  451. bias-pull-up;
  452. qcom,pull-up-strength = <0x00>;
  453. power-source = <0x00>;
  454. phandle = <0x7b>;
  455. };
  456. };
  457.  
  458. haptics_boost {
  459.  
  460. haptics_boost_default {
  461. pins = "gpio5";
  462. function = "normal";
  463. output-enable;
  464. input-disable;
  465. bias-disable;
  466. qcom,drive-strength = <0x03>;
  467. power-source = <0x01>;
  468. phandle = <0x1f>;
  469. };
  470. };
  471.  
  472. pm8150b_adc_therm {
  473.  
  474. pmb_gpio_adc_default {
  475. pins = "gpio1\0gpio7\0gpio12";
  476. function = "normal";
  477. bias-high-impedance;
  478. phandle = <0x12>;
  479. };
  480. };
  481.  
  482. pm8150b_boost_5v_ext {
  483.  
  484. pmb_boost_5v_ext_default {
  485. pins = "gpio2\0gpio5";
  486. function = "normal";
  487. input-disable;
  488. output-enable;
  489. output-low;
  490. power-source = <0x00>;
  491. phandle = <0x09>;
  492. };
  493.  
  494. pmb_boost_5v_ext_active {
  495. pins = "gpio2\0gpio5";
  496. function = "normal";
  497. input-disable;
  498. output-enable;
  499. output-high;
  500. power-source = <0x00>;
  501. phandle = <0x0a>;
  502. };
  503.  
  504. pmb_vdd_vconn_suspend {
  505. pins = "gpio5";
  506. function = "normal";
  507. input-disable;
  508. output-enable;
  509. output-low;
  510. power-source = <0x00>;
  511. phandle = <0x0b>;
  512. };
  513.  
  514. pmb_vdd_vconn_active {
  515. pins = "gpio5";
  516. function = "normal";
  517. input-disable;
  518. output-enable;
  519. output-high;
  520. power-source = <0x00>;
  521. phandle = <0x0c>;
  522. };
  523. };
  524. };
  525.  
  526. qcom,qpnp-smb5 {
  527. compatible = "qcom,qpnp-smb5";
  528. #address-cells = <0x01>;
  529. #size-cells = <0x01>;
  530. #cooling-cells = <0x02>;
  531. qcom,pmic-revid = <0x07>;
  532. qcom,thermal-mitigation = <0x2dc6c0 0x16e360 0xf4240 0x7a120>;
  533. qcom,chg-term-src = <0x01>;
  534. qcom,charger-temp-max = <0x320>;
  535. qcom,smb-temp-max = <0x320>;
  536. status = "ok";
  537. dpdm-supply = <0xffffffff>;
  538. qcom,sec-charger-config = <0x02>;
  539. qcom,auto-recharge-soc = <0x5f>;
  540. io-channels = <0x04 0x08 0x04 0x1e 0x04 0x07 0x04 0x99 0x04 0x83 0x04 0x09 0x04 0x4f 0x04 0x15>;
  541. io-channel-names = "usb_in_voltage\0mid_voltage\0usb_in_current\0sbux_res\0vph_voltage\0chg_temp\0rblt_res\0psns_res";
  542. qcom,battery-data = <0x08>;
  543. qcom,step-charging-enable;
  544. qcom,sw-jeita-enable;
  545. qcom,wd-bark-time-secs = <0x10>;
  546. qcom,suspend-input-on-debug-batt;
  547. qcom,fcc-max-ua = <0x4970c8>;
  548. qcom,usb-icl-ua = <0x2dc6c0>;
  549. qcom,dc-icl-ua = <0x2dc6c0>;
  550. qcom,chg-term-current-ma = <0xfffffed4>;
  551. qcom,typec-dam-enable;
  552. dcin-icl-uv = <0x9c40>;
  553. pinctrl-names = "default\0boost_5v_active\0vdd_vconn_suspend\0vdd_vconn_active";
  554. pinctrl-0 = <0x09>;
  555. pinctrl-1 = <0x0a>;
  556. pinctrl-2 = <0x0b>;
  557. pinctrl-3 = <0x0c>;
  558. phandle = <0xa4>;
  559.  
  560. qcom,chgr@1000 {
  561. reg = <0x1000 0x100>;
  562. interrupts = <0x02 0x10 0x00 0x01 0x02 0x10 0x01 0x01 0x02 0x10 0x02 0x01 0x02 0x10 0x03 0x01 0x02 0x10 0x04 0x01 0x02 0x10 0x06 0x03 0x02 0x10 0x07 0x03>;
  563. interrupt-names = "chgr-error\0chg-state-change\0step-chg-state-change\0step-chg-soc-update-fail\0step-chg-soc-update-req\0vph-alarm\0vph-drop-prechg";
  564. };
  565.  
  566. qcom,dcdc@1100 {
  567. reg = <0x1100 0x100>;
  568. interrupts = <0x02 0x11 0x00 0x03 0x02 0x11 0x01 0x03 0x02 0x11 0x02 0x03 0x02 0x11 0x04 0x03 0x02 0x11 0x05 0x03 0x02 0x11 0x06 0x03 0x02 0x11 0x07 0x03>;
  569. interrupt-names = "otg-fail\0otg-oc-disable-sw\0otg-oc-hiccup\0high-duty-cycle\0input-current-limiting\0concurrent-mode-disable\0switcher-power-ok";
  570. };
  571.  
  572. qcom,batif@1200 {
  573. reg = <0x1200 0x100>;
  574. interrupts = <0x02 0x12 0x00 0x01 0x02 0x12 0x02 0x03 0x02 0x12 0x03 0x03 0x02 0x12 0x04 0x03 0x02 0x12 0x05 0x03 0x02 0x12 0x06 0x03 0x02 0x12 0x07 0x03>;
  575. interrupt-names = "bat-temp\0bat-ov\0bat-low\0bat-therm-or-id-missing\0bat-terminal-missing\0buck-oc\0vph-ov";
  576. };
  577.  
  578. qcom,usb@1300 {
  579. reg = <0x1300 0x100>;
  580. interrupts = <0x02 0x13 0x00 0x03 0x02 0x13 0x01 0x03 0x02 0x13 0x02 0x03 0x02 0x13 0x03 0x03 0x02 0x13 0x04 0x03 0x02 0x13 0x05 0x03 0x02 0x13 0x06 0x01 0x02 0x13 0x07 0x01>;
  581. interrupt-names = "usbin-collapse\0usbin-vashdn\0usbin-uv\0usbin-ov\0usbin-plugin\0usbin-revi-change\0usbin-src-change\0usbin-icl-change";
  582. };
  583.  
  584. qcom,dc@1400 {
  585. reg = <0x1400 0x100>;
  586. interrupts = <0x02 0x14 0x01 0x03 0x02 0x14 0x02 0x03 0x02 0x14 0x03 0x03 0x02 0x14 0x04 0x03 0x02 0x14 0x05 0x03 0x02 0x14 0x06 0x03 0x02 0x14 0x07 0x03>;
  587. interrupt-names = "dcin-vashdn\0dcin-uv\0dcin-ov\0dcin-plugin\0dcin-revi\0dcin-pon\0dcin-en";
  588. };
  589.  
  590. qcom,typec@1500 {
  591. reg = <0x1500 0x100>;
  592. interrupts = <0x02 0x15 0x00 0x01 0x02 0x15 0x01 0x03 0x02 0x15 0x02 0x01 0x02 0x15 0x03 0x03 0x02 0x15 0x04 0x01 0x02 0x15 0x05 0x01 0x02 0x15 0x06 0x03 0x02 0x15 0x07 0x01>;
  593. interrupt-names = "typec-or-rid-detect-change\0typec-vpd-detect\0typec-cc-state-change\0typec-vconn-oc\0typec-vbus-change\0typec-attach-detach\0typec-legacy-cable-detect\0typec-try-snk-src-detect";
  594. };
  595.  
  596. qcom,misc@1600 {
  597. reg = <0x1600 0x100>;
  598. interrupts = <0x02 0x16 0x00 0x01 0x02 0x16 0x01 0x01 0x02 0x16 0x02 0x03 0x02 0x16 0x03 0x03 0x02 0x16 0x04 0x03 0x02 0x16 0x06 0x03 0x02 0x16 0x07 0x03>;
  599. interrupt-names = "wdog-snarl\0wdog-bark\0aicl-fail\0aicl-done\0smb-en\0temp-change\0temp-change-smb";
  600. };
  601.  
  602. qcom,smb5-vconn {
  603. regulator-name = "smb5-vconn";
  604. phandle = <0x0e>;
  605. };
  606.  
  607. qcom,smb5-vbus {
  608. regulator-name = "smb5-vbus";
  609. phandle = <0x0d>;
  610. };
  611.  
  612. qcom,smb5-otg_boost {
  613. regulator-name = "smb5-otg_boost";
  614. phandle = <0x0f>;
  615. };
  616. };
  617.  
  618. qcom,usb-pdphy@1700 {
  619. compatible = "qcom,qpnp-pdphy";
  620. reg = <0x1700 0x100>;
  621. interrupts = <0x02 0x17 0x00 0x01 0x02 0x17 0x01 0x01 0x02 0x17 0x02 0x01 0x02 0x17 0x03 0x01 0x02 0x17 0x04 0x01 0x02 0x17 0x05 0x01 0x02 0x17 0x06 0x01 0x02 0x17 0x07 0x01>;
  622. interrupt-names = "sig-tx\0sig-rx\0msg-tx\0msg-rx\0msg-tx-failed\0msg-tx-discarded\0msg-rx-discarded\0fr-swap";
  623. qcom,default-sink-caps = <0x1388 0xbb8 0x2328 0xbb8>;
  624. vdd-pdphy-supply = <0xffffffff>;
  625. vbus-supply = <0x0d>;
  626. vconn-supply = <0x0e>;
  627. otg_boost-supply = <0x0f>;
  628. phandle = <0x20>;
  629. };
  630.  
  631. bcl@1d00 {
  632. compatible = "qcom,bcl-v5";
  633. reg = <0x1d00 0x100>;
  634. interrupts = <0x02 0x1d 0x00 0x00 0x02 0x1d 0x01 0x00 0x02 0x1d 0x02 0x00>;
  635. interrupt-names = "bcl-lvl0\0bcl-lvl1\0bcl-lvl2";
  636. #thermal-sensor-cells = <0x01>;
  637. phandle = <0x15>;
  638. };
  639.  
  640. bcl-soc {
  641. compatible = "qcom,msm-bcl-soc";
  642. #thermal-sensor-cells = <0x00>;
  643. phandle = <0x16>;
  644. };
  645.  
  646. qpnp,fg {
  647. compatible = "qcom,fg-gen4";
  648. #address-cells = <0x01>;
  649. #size-cells = <0x01>;
  650. qcom,pmic-revid = <0x07>;
  651. qcom,pmic-pbs = <0x10>;
  652. status = "ok";
  653. nvmem-names = "fg_sdam";
  654. nvmem = <0x11>;
  655. qcom,battery-data = <0x08>;
  656. qcom,hold-soc-while-full;
  657. qcom,linearize-soc;
  658. qcom,five-pin-battery;
  659. qcom,cl-wt-enable;
  660. qcom,fg-esr-timer-chg-fast = <0x00 0x07>;
  661. qcom,fg-esr-timer-dischg-fast = <0x00 0x07>;
  662. qcom,fg-esr-timer-chg-slow = <0x00 0x60>;
  663. qcom,fg-esr-timer-dischg-slow = <0x00 0x60>;
  664. qcom,fg-esr-cal-soc-thresh = <0x1a 0xe6>;
  665. qcom,fg-esr-cal-temp-thresh = <0x0a 0x28>;
  666. qcom,fg-sys-term-current = <0xfffffea2>;
  667. qcom,fg-cutoff-current = <0x10c>;
  668. qcom,fg-cutoff-voltage = <0xce4>;
  669. qcom,fg-empty-voltage = <0xb54>;
  670. phandle = <0xa5>;
  671.  
  672. qcom,fg-batt-soc@4000 {
  673. status = "okay";
  674. reg = <0x4000 0x100>;
  675. interrupts = <0x02 0x40 0x00 0x03 0x02 0x40 0x01 0x03 0x02 0x40 0x02 0x01 0x02 0x40 0x03 0x01 0x02 0x40 0x04 0x03 0x02 0x40 0x05 0x01 0x02 0x40 0x06 0x03 0x02 0x40 0x07 0x03>;
  676. interrupt-names = "soc-update\0soc-ready\0bsoc-delta\0msoc-delta\0msoc-low\0msoc-empty\0msoc-high\0msoc-full";
  677. };
  678.  
  679. qcom,fg-batt-info@4100 {
  680. status = "okay";
  681. reg = <0x4100 0x100>;
  682. interrupts = <0x02 0x41 0x00 0x03 0x02 0x41 0x01 0x03 0x02 0x41 0x03 0x01>;
  683. interrupt-names = "vbatt-low\0vbatt-pred-delta\0esr-delta";
  684. };
  685.  
  686. qcom,fg-rradc@4200 {
  687. status = "okay";
  688. reg = <0x4200 0x100>;
  689. interrupts = <0x02 0x42 0x00 0x03 0x02 0x42 0x01 0x03 0x02 0x42 0x02 0x03 0x02 0x42 0x03 0x03 0x02 0x42 0x04 0x03>;
  690. interrupt-names = "batt-missing\0batt-id\0batt-temp-delta\0batt-temp-hot\0batt-temp-cold";
  691. };
  692.  
  693. qcom,fg-memif@4300 {
  694. status = "okay";
  695. reg = <0x4300 0x100>;
  696. interrupts = <0x02 0x43 0x00 0x03 0x02 0x43 0x01 0x03 0x02 0x43 0x02 0x03 0x02 0x43 0x03 0x01 0x02 0x43 0x04 0x02>;
  697. interrupt-names = "ima-rdy\0ima-xcp\0dma-xcp\0dma-grant\0mem-attn";
  698. };
  699. };
  700.  
  701. vadc@3100 {
  702. compatible = "qcom,spmi-adc-rev2";
  703. reg = <0x3100 0x100 0x3700 0x100>;
  704. reg-names = "adc5-usr-base\0adc5-cal-base";
  705. #address-cells = <0x01>;
  706. #size-cells = <0x00>;
  707. interrupts = <0x02 0x31 0x00 0x01>;
  708. interrupt-names = "eoc-int-en-set";
  709. qcom,adc-vdd-reference = <0x753>;
  710. #io-channel-cells = <0x01>;
  711. io-channel-ranges;
  712. phandle = <0x04>;
  713.  
  714. ref_gnd@0 {
  715. reg = <0x00>;
  716. label = "ref_gnd";
  717. qcom,pre-scaling = <0x01 0x01>;
  718. };
  719.  
  720. vref_1p25@1 {
  721. reg = <0x01>;
  722. label = "vref_1p25";
  723. qcom,pre-scaling = <0x01 0x01>;
  724. };
  725.  
  726. die_temp@2 {
  727. reg = <0x06>;
  728. label = "die_temp";
  729. qcom,pre-scaling = <0x01 0x01>;
  730. };
  731.  
  732. chg_temp@9 {
  733. reg = <0x09>;
  734. label = "chg_temp";
  735. qcom,pre-scaling = <0x01 0x01>;
  736. };
  737.  
  738. bat_id@4b {
  739. reg = <0x4b>;
  740. label = "bat_id";
  741. qcom,ratiometric;
  742. qcom,hw-settle-time = <0xc8>;
  743. qcom,pre-scaling = <0x01 0x01>;
  744. };
  745.  
  746. smb1390_therm@e {
  747. reg = <0x0e>;
  748. label = "smb1390_therm";
  749. qcom,hw-settle-time = <0xc8>;
  750. qcom,pre-scaling = <0x01 0x01>;
  751. };
  752.  
  753. smb1355_therm@4e {
  754. reg = <0x4e>;
  755. label = "smb1355_therm";
  756. qcom,ratiometric;
  757. qcom,hw-settle-time = <0xc8>;
  758. qcom,pre-scaling = <0x01 0x01>;
  759. };
  760.  
  761. vph_pwr@83 {
  762. reg = <0x83>;
  763. label = "vph_pwr";
  764. qcom,pre-scaling = <0x01 0x03>;
  765. };
  766.  
  767. bat_therm@4a {
  768. reg = <0x4a>;
  769. label = "bat_therm";
  770. qcom,ratiometric;
  771. qcom,hw-settle-time = <0xc8>;
  772. qcom,pre-scaling = <0x01 0x01>;
  773. };
  774.  
  775. smb_therm@4e {
  776. reg = <0x4e>;
  777. label = "smb_therm";
  778. qcom,ratiometric;
  779. qcom,hw-settle-time = <0xc8>;
  780. qcom,pre-scaling = <0x01 0x01>;
  781. };
  782.  
  783. rblt@4f {
  784. reg = <0x4f>;
  785. label = "rblt";
  786. qcom,ratiometric;
  787. qcom,hw-settle-time = <0xc8>;
  788. qcom,pre-scaling = <0x01 0x01>;
  789. };
  790.  
  791. pcb1_therm@50 {
  792. reg = <0x50>;
  793. label = "pcb1_therm";
  794. qcom,ratiometric;
  795. qcom,hw-settle-time = <0xc8>;
  796. qcom,pre-scaling = <0x01 0x01>;
  797. };
  798.  
  799. cam3_therm@54 {
  800. reg = <0x54>;
  801. label = "cam3_therm";
  802. qcom,ratiometric;
  803. qcom,hw-settle-time = <0xc8>;
  804. qcom,pre-scaling = <0x01 0x01>;
  805. };
  806.  
  807. chg_sbux@99 {
  808. reg = <0x99>;
  809. label = "chg_sbux";
  810. qcom,pre-scaling = <0x01 0x03>;
  811. };
  812.  
  813. mid_chg_div6@1e {
  814. reg = <0x1e>;
  815. label = "chg_mid";
  816. qcom,pre-scaling = <0x01 0x06>;
  817. };
  818.  
  819. usb_in_i_uv@7 {
  820. reg = <0x07>;
  821. label = "usb_in_i_uv";
  822. qcom,pre-scaling = <0x01 0x01>;
  823. };
  824.  
  825. usb_in_v_div_16@8 {
  826. reg = <0x08>;
  827. label = "usb_in_v_div_16";
  828. qcom,pre-scaling = <0x01 0x10>;
  829. };
  830.  
  831. ipd_sensor@d {
  832. reg = <0x0d>;
  833. label = "ipd_sensor";
  834. qcom,hw-settle-time = <0xc8>;
  835. qcom,pre-scaling = <0x01 0x01>;
  836. qcom,decimation = <0x400>;
  837. };
  838.  
  839. pogo_therm@53 {
  840. reg = <0x53>;
  841. label = "pogo_therm";
  842. qcom,ratiometric;
  843. qcom,hw-settle-time = <0xc8>;
  844. qcom,pre-scaling = <0x01 0x01>;
  845. };
  846.  
  847. psns_vol@15 {
  848. reg = <0x15>;
  849. label = "psns_vol";
  850. qcom,pre-scaling = <0x01 0x01>;
  851. };
  852. };
  853.  
  854. adc_tm@3500 {
  855. compatible = "qcom,adc-tm5";
  856. reg = <0x3500 0x100>;
  857. interrupts = <0x02 0x35 0x00 0x01>;
  858. interrupt-names = "thr-int-en";
  859. #address-cells = <0x01>;
  860. #size-cells = <0x00>;
  861. #thermal-sensor-cells = <0x01>;
  862. qcom,pmic-revid = <0x07>;
  863. io-channels = <0x04 0x4e 0x04 0x50 0x04 0x53 0x04 0x54>;
  864. pinctrl-names = "default";
  865. pinctrl-0 = <0x12>;
  866. phandle = <0x37>;
  867.  
  868. smb_therm@4e {
  869. reg = <0x4e>;
  870. qcom,ratiometric;
  871. qcom,hw-settle-time = <0xc8>;
  872. };
  873.  
  874. pcb1_therm@50 {
  875. reg = <0x50>;
  876. qcom,ratiometric;
  877. qcom,hw-settle-time = <0xc8>;
  878. };
  879.  
  880. cam3_therm@54 {
  881. reg = <0x54>;
  882. qcom,ratiometric;
  883. qcom,hw-settle-time = <0xc8>;
  884. };
  885.  
  886. pogo_therm@53 {
  887. reg = <0x53>;
  888. qcom,ratiometric;
  889. qcom,hw-settle-time = <0xc8>;
  890. };
  891. };
  892. };
  893.  
  894. qcom,pm8150b@3 {
  895. compatible = "qcom,spmi-pmic";
  896. reg = <0x03 0x00>;
  897. #address-cells = <0x02>;
  898. #size-cells = <0x00>;
  899.  
  900. qcom,pwms@b100 {
  901. compatible = "qcom,pwm-lpg";
  902. reg = <0xb100 0x200>;
  903. reg-names = "lpg-base";
  904. #pwm-cells = <0x02>;
  905. qcom,num-lpg-channels = <0x02>;
  906. phandle = <0x13>;
  907. };
  908.  
  909. qcom,leds@d000 {
  910. compatible = "qcom,tri-led";
  911. reg = <0xd000 0x100>;
  912. nvmem-names = "pbs_sdam";
  913. nvmem = <0x11>;
  914. phandle = <0xa6>;
  915.  
  916. hr_led1 {
  917. label = "hr_led1";
  918. pwms = <0x13 0x00 0xf4240>;
  919. led-sources = <0x00>;
  920. };
  921.  
  922. hr_led2 {
  923. label = "hr_led2";
  924. pwms = <0x13 0x01 0xf4240>;
  925. led-sources = <0x01>;
  926. };
  927. };
  928.  
  929. qcom,haptics@c000 {
  930. compatible = "qcom,haptics";
  931. reg = <0xc000 0x100>;
  932. interrupts = <0x03 0xc0 0x00 0x03 0x03 0xc0 0x01 0x03>;
  933. interrupt-names = "hap-sc-irq\0hap-play-irq";
  934. qcom,actuator-type = "lra";
  935. qcom,vmax-mv = <0xe10>;
  936. qcom,play-rate-us = <0x1a0b>;
  937. qcom,lra-resonance-sig-shape = "sine";
  938. qcom,lra-auto-resonance-mode = "qwd";
  939. qcom,lra-allow-variable-play-rate;
  940. status = "disabled";
  941. phandle = <0xa7>;
  942.  
  943. wf_0 {
  944. qcom,effect-id = <0x00>;
  945. qcom,wf-vmax-mv = <0xe10>;
  946. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  947. qcom,wf-play-rate-us = <0x1a0b>;
  948. qcom,wf-brake-pattern = <0x00>;
  949. qcom,wf-repeat-count = <0x01>;
  950. qcom,wf-s-repeat-count = <0x01>;
  951. qcom,lra-auto-resonance-disable;
  952. };
  953.  
  954. wf_1 {
  955. qcom,effect-id = <0x01>;
  956. qcom,wf-vmax-mv = <0xe10>;
  957. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  958. qcom,wf-play-rate-us = <0x1a0b>;
  959. qcom,wf-brake-pattern = <0x00>;
  960. qcom,wf-repeat-count = <0x01>;
  961. qcom,wf-s-repeat-count = <0x01>;
  962. qcom,lra-auto-resonance-disable;
  963. };
  964.  
  965. wf_2 {
  966. qcom,effect-id = <0x02>;
  967. qcom,wf-vmax-mv = <0xe10>;
  968. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  969. qcom,wf-play-rate-us = <0x1a0b>;
  970. qcom,wf-brake-pattern = <0x00>;
  971. qcom,wf-repeat-count = <0x01>;
  972. qcom,wf-s-repeat-count = <0x01>;
  973. qcom,lra-auto-resonance-disable;
  974. };
  975.  
  976. wf_3 {
  977. qcom,effect-id = <0x03>;
  978. qcom,wf-vmax-mv = <0xe10>;
  979. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  980. qcom,wf-play-rate-us = <0x1a0b>;
  981. qcom,wf-brake-pattern = <0x00>;
  982. qcom,wf-repeat-count = <0x01>;
  983. qcom,wf-s-repeat-count = <0x01>;
  984. qcom,lra-auto-resonance-disable;
  985. };
  986.  
  987. wf_4 {
  988. qcom,effect-id = <0x04>;
  989. qcom,wf-vmax-mv = <0xe10>;
  990. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  991. qcom,wf-play-rate-us = <0x1a0b>;
  992. qcom,wf-brake-pattern = <0x00>;
  993. qcom,wf-repeat-count = <0x01>;
  994. qcom,wf-s-repeat-count = <0x01>;
  995. qcom,lra-auto-resonance-disable;
  996. };
  997.  
  998. wf_5 {
  999. qcom,effect-id = <0x05>;
  1000. qcom,wf-vmax-mv = <0xe10>;
  1001. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  1002. qcom,wf-play-rate-us = <0x1a0b>;
  1003. qcom,wf-brake-pattern = <0x00>;
  1004. qcom,wf-repeat-count = <0x01>;
  1005. qcom,wf-s-repeat-count = <0x01>;
  1006. qcom,lra-auto-resonance-disable;
  1007. };
  1008. };
  1009. };
  1010. };
  1011. };
  1012.  
  1013. fragment@3 {
  1014. target = <0xffffffff>;
  1015.  
  1016. __overlay__ {
  1017.  
  1018. pm8150b_tz {
  1019. polling-delay-passive = <0x64>;
  1020. polling-delay = <0x00>;
  1021. thermal-governor = "step_wise";
  1022. thermal-sensors = <0x14>;
  1023. wake-capable-sensor;
  1024. phandle = <0xa8>;
  1025.  
  1026. trips {
  1027.  
  1028. trip0 {
  1029. temperature = <0x17318>;
  1030. hysteresis = <0x00>;
  1031. type = "passive";
  1032. phandle = <0xa9>;
  1033. };
  1034.  
  1035. trip1 {
  1036. temperature = <0x1c138>;
  1037. hysteresis = <0x00>;
  1038. type = "passive";
  1039. phandle = <0xaa>;
  1040. };
  1041.  
  1042. trip2 {
  1043. temperature = <0x23668>;
  1044. hysteresis = <0x00>;
  1045. type = "passive";
  1046. };
  1047. };
  1048. };
  1049.  
  1050. pm8150b-ibat-lvl0 {
  1051. polling-delay-passive = <0x00>;
  1052. polling-delay = <0x00>;
  1053. thermal-governor = "step_wise";
  1054. thermal-sensors = <0x15 0x00>;
  1055. wake-capable-sensor;
  1056.  
  1057. trips {
  1058.  
  1059. ibat-lvl0 {
  1060. temperature = <0x1194>;
  1061. hysteresis = <0xc8>;
  1062. type = "passive";
  1063. phandle = <0xab>;
  1064. };
  1065. };
  1066. };
  1067.  
  1068. pm8150b-ibat-lvl1 {
  1069. polling-delay-passive = <0x00>;
  1070. polling-delay = <0x00>;
  1071. thermal-governor = "step_wise";
  1072. thermal-sensors = <0x15 0x01>;
  1073. wake-capable-sensor;
  1074.  
  1075. trips {
  1076.  
  1077. ibat-lvl1 {
  1078. temperature = <0x1388>;
  1079. hysteresis = <0xc8>;
  1080. type = "passive";
  1081. phandle = <0xac>;
  1082. };
  1083. };
  1084. };
  1085.  
  1086. pm8150b-vbat-lvl0 {
  1087. polling-delay-passive = <0x00>;
  1088. polling-delay = <0x00>;
  1089. thermal-governor = "low_limits_cap";
  1090. thermal-sensors = <0x15 0x02>;
  1091. tracks-low;
  1092. wake-capable-sensor;
  1093.  
  1094. trips {
  1095.  
  1096. vbat-lvl0 {
  1097. temperature = <0xbb8>;
  1098. hysteresis = <0xc8>;
  1099. type = "passive";
  1100. phandle = <0xad>;
  1101. };
  1102. };
  1103. };
  1104.  
  1105. pm8150b-vbat-lvl1 {
  1106. polling-delay-passive = <0x00>;
  1107. polling-delay = <0x00>;
  1108. thermal-governor = "low_limits_cap";
  1109. thermal-sensors = <0x15 0x03>;
  1110. tracks-low;
  1111. wake-capable-sensor;
  1112.  
  1113. trips {
  1114.  
  1115. vbat-lvl1 {
  1116. temperature = <0xaf0>;
  1117. hysteresis = <0xc8>;
  1118. type = "passive";
  1119. phandle = <0xae>;
  1120. };
  1121. };
  1122. };
  1123.  
  1124. pm8150b-vbat-lvl2 {
  1125. polling-delay-passive = <0x00>;
  1126. polling-delay = <0x00>;
  1127. thermal-governor = "low_limits_cap";
  1128. thermal-sensors = <0x15 0x04>;
  1129. tracks-low;
  1130. wake-capable-sensor;
  1131.  
  1132. trips {
  1133.  
  1134. vbat-lvl2 {
  1135. temperature = <0xa28>;
  1136. hysteresis = <0xc8>;
  1137. type = "passive";
  1138. phandle = <0xaf>;
  1139. };
  1140. };
  1141. };
  1142.  
  1143. pm8150b-bcl-lvl0 {
  1144. polling-delay-passive = <0x64>;
  1145. polling-delay = <0x00>;
  1146. thermal-governor = "step_wise";
  1147. thermal-sensors = <0x15 0x05>;
  1148. wake-capable-sensor;
  1149.  
  1150. trips {
  1151.  
  1152. b-bcl-lvl0 {
  1153. temperature = <0x01>;
  1154. hysteresis = <0x01>;
  1155. type = "passive";
  1156. phandle = <0x2d>;
  1157. };
  1158. };
  1159. };
  1160.  
  1161. pm8150b-bcl-lvl1 {
  1162. polling-delay-passive = <0x64>;
  1163. polling-delay = <0x00>;
  1164. thermal-governor = "step_wise";
  1165. thermal-sensors = <0x15 0x06>;
  1166. wake-capable-sensor;
  1167.  
  1168. trips {
  1169.  
  1170. b-bcl-lvl1 {
  1171. temperature = <0x01>;
  1172. hysteresis = <0x01>;
  1173. type = "passive";
  1174. phandle = <0x2e>;
  1175. };
  1176. };
  1177. };
  1178.  
  1179. pm8150b-bcl-lvl2 {
  1180. polling-delay-passive = <0x64>;
  1181. polling-delay = <0x00>;
  1182. thermal-governor = "step_wise";
  1183. thermal-sensors = <0x15 0x07>;
  1184. wake-capable-sensor;
  1185.  
  1186. trips {
  1187.  
  1188. b-bcl-lvl2 {
  1189. temperature = <0x01>;
  1190. hysteresis = <0x01>;
  1191. type = "passive";
  1192. phandle = <0x2f>;
  1193. };
  1194. };
  1195. };
  1196.  
  1197. soc {
  1198. polling-delay-passive = <0x64>;
  1199. polling-delay = <0x00>;
  1200. thermal-governor = "low_limits_cap";
  1201. thermal-sensors = <0x16>;
  1202. tracks-low;
  1203. wake-capable-sensor;
  1204.  
  1205. trips {
  1206.  
  1207. soc-trip {
  1208. temperature = <0x0a>;
  1209. hysteresis = <0x00>;
  1210. type = "passive";
  1211. phandle = <0x2c>;
  1212. };
  1213. };
  1214. };
  1215. };
  1216. };
  1217.  
  1218. fragment@4 {
  1219. target = <0xffffffff>;
  1220.  
  1221. __overlay__ {
  1222. #address-cells = <0x02>;
  1223. #size-cells = <0x00>;
  1224. interrupt-controller;
  1225. #interrupt-cells = <0x04>;
  1226.  
  1227. qcom,pm8150l@4 {
  1228. compatible = "qcom,spmi-pmic";
  1229. reg = <0x04 0x00>;
  1230. #address-cells = <0x02>;
  1231. #size-cells = <0x00>;
  1232.  
  1233. qcom,revid@100 {
  1234. compatible = "qcom,qpnp-revid";
  1235. reg = <0x100 0x100>;
  1236. phandle = <0x19>;
  1237. };
  1238.  
  1239. qcom,power-on@800 {
  1240. compatible = "qcom,qpnp-power-on";
  1241. reg = <0x800 0x100>;
  1242. };
  1243.  
  1244. qcom,temp-alarm@2400 {
  1245. compatible = "qcom,spmi-temp-alarm";
  1246. reg = <0x2400 0x100>;
  1247. interrupts = <0x04 0x24 0x00 0x03>;
  1248. io-channels = <0x17 0x06>;
  1249. io-channel-names = "thermal";
  1250. #thermal-sensor-cells = <0x00>;
  1251. qcom,temperature-threshold-set = <0x01>;
  1252. phandle = <0x1b>;
  1253. };
  1254.  
  1255. clock-controller@5b00 {
  1256. compatible = "qcom,spmi-clkdiv";
  1257. reg = <0x5b00 0x100>;
  1258. #clock-cells = <0x01>;
  1259. qcom,num-clkdivs = <0x01>;
  1260. clock-output-names = "pm8150l_div_clk1";
  1261. clocks = <0xffffffff 0x00>;
  1262. clock-names = "xo";
  1263. phandle = <0xb0>;
  1264. };
  1265.  
  1266. pinctrl@c000 {
  1267. compatible = "qcom,spmi-gpio";
  1268. reg = <0xc000 0xc00>;
  1269. interrupts = <0x04 0xc0 0x00 0x00 0x04 0xc2 0x00 0x00 0x04 0xc3 0x00 0x00 0x04 0xc4 0x00 0x00 0x04 0xc5 0x00 0x00 0x04 0xc6 0x00 0x00 0x04 0xc7 0x00 0x00 0x04 0xc9 0x00 0x00 0x04 0xca 0x00 0x00>;
  1270. interrupt-names = "pm8150l_gpio1\0pm8150l_gpio3\0pm8150l_gpio4\0pm8150l_gpio5\0pm8150l_gpio6\0pm8150l_gpio7\0pm8150l_gpio8\0pm8150l_gpio10\0pm8150l_gpio11";
  1271. gpio-controller;
  1272. #gpio-cells = <0x02>;
  1273. qcom,gpios-disallowed = <0x02 0x09 0x0c>;
  1274. phandle = <0xb1>;
  1275.  
  1276. pm8150l_adc_therm {
  1277.  
  1278. pml_gpio_adc_default {
  1279. pins = "gpio5\0gpio7";
  1280. function = "normal";
  1281. bias-high-impedance;
  1282. phandle = <0x18>;
  1283. };
  1284. };
  1285.  
  1286. fan_pwm@0 {
  1287.  
  1288. fan_pwm_default_0 {
  1289. pins = "gpio6";
  1290. function = "func1";
  1291. bias-disable;
  1292. power-source = <0x00>;
  1293. output-low;
  1294. qcom,drive-strength = <0x03>;
  1295. drive-push-pull;
  1296. status = "okay";
  1297. phandle = <0x4a>;
  1298. };
  1299. };
  1300.  
  1301. fan_pwm@1 {
  1302.  
  1303. fan_pwm_default_1 {
  1304. pins = "gpio10";
  1305. function = "func1";
  1306. bias-disable;
  1307. power-source = <0x01>;
  1308. output-low;
  1309. qcom,drive-strength = <0x03>;
  1310. drive-push-pull;
  1311. status = "okay";
  1312. phandle = <0x4c>;
  1313. };
  1314. };
  1315. };
  1316.  
  1317. vadc@3100 {
  1318. compatible = "qcom,spmi-adc5";
  1319. reg = <0x3100 0x100>;
  1320. #address-cells = <0x01>;
  1321. #size-cells = <0x00>;
  1322. interrupts = <0x04 0x31 0x00 0x01>;
  1323. interrupt-names = "eoc-int-en-set";
  1324. qcom,adc-vdd-reference = <0x753>;
  1325. #io-channel-cells = <0x01>;
  1326. io-channel-ranges;
  1327. phandle = <0x17>;
  1328.  
  1329. ref_gnd@0 {
  1330. reg = <0x00>;
  1331. label = "ref_gnd";
  1332. qcom,pre-scaling = <0x01 0x01>;
  1333. };
  1334.  
  1335. vref_1p25@1 {
  1336. reg = <0x01>;
  1337. label = "vref_1p25";
  1338. qcom,pre-scaling = <0x01 0x01>;
  1339. };
  1340.  
  1341. die_temp@2 {
  1342. reg = <0x06>;
  1343. label = "die_temp";
  1344. qcom,pre-scaling = <0x01 0x01>;
  1345. };
  1346.  
  1347. vph_pwr@83 {
  1348. reg = <0x83>;
  1349. label = "vph_pwr";
  1350. qcom,pre-scaling = <0x01 0x03>;
  1351. };
  1352.  
  1353. cam0_therm@4d {
  1354. reg = <0x4d>;
  1355. label = "cam0_therm";
  1356. qcom,ratiometric;
  1357. qcom,hw-settle-time = <0xc8>;
  1358. qcom,pre-scaling = <0x01 0x01>;
  1359. };
  1360.  
  1361. cam1_therm@4f {
  1362. reg = <0x4f>;
  1363. label = "cam1_therm";
  1364. qcom,ratiometric;
  1365. qcom,hw-settle-time = <0xc8>;
  1366. qcom,pre-scaling = <0x01 0x01>;
  1367. };
  1368.  
  1369. cam2_therm@52 {
  1370. reg = <0x52>;
  1371. label = "cam2_therm";
  1372. qcom,ratiometric;
  1373. qcom,hw-settle-time = <0xc8>;
  1374. qcom,pre-scaling = <0x01 0x01>;
  1375. };
  1376.  
  1377. soc_therm@4e {
  1378. reg = <0x4e>;
  1379. label = "soc_therm";
  1380. qcom,ratiometric;
  1381. qcom,hw-settle-time = <0xc8>;
  1382. qcom,pre-scaling = <0x01 0x01>;
  1383. };
  1384.  
  1385. usbc_therm@54 {
  1386. reg = <0x54>;
  1387. label = "usbc_therm";
  1388. qcom,ratiometric;
  1389. qcom,hw-settle-time = <0xc8>;
  1390. qcom,pre-scaling = <0x01 0x01>;
  1391. };
  1392. };
  1393.  
  1394. bcl@3d00 {
  1395. compatible = "qcom,bcl-v5";
  1396. reg = <0x3d00 0x100>;
  1397. interrupts = <0x04 0x3d 0x00 0x00 0x04 0x3d 0x01 0x00 0x04 0x3d 0x02 0x00>;
  1398. interrupt-names = "bcl-lvl0\0bcl-lvl1\0bcl-lvl2";
  1399. #thermal-sensor-cells = <0x01>;
  1400. phandle = <0x1c>;
  1401. };
  1402.  
  1403. adc_tm@3500 {
  1404. compatible = "qcom,adc-tm5";
  1405. reg = <0x3500 0x100>;
  1406. interrupts = <0x04 0x35 0x00 0x01>;
  1407. interrupt-names = "thr-int-en";
  1408. #address-cells = <0x01>;
  1409. #size-cells = <0x00>;
  1410. #thermal-sensor-cells = <0x01>;
  1411. io-channels = <0x17 0x4d 0x17 0x4e 0x17 0x4f 0x17 0x52>;
  1412. pinctrl-names = "default";
  1413. pinctrl-0 = <0x18>;
  1414. phandle = <0x36>;
  1415.  
  1416. cam0_therm@4d {
  1417. reg = <0x4d>;
  1418. qcom,ratiometric;
  1419. qcom,hw-settle-time = <0xc8>;
  1420. };
  1421.  
  1422. cam1_therm@4f {
  1423. reg = <0x4f>;
  1424. qcom,ratiometric;
  1425. qcom,hw-settle-time = <0xc8>;
  1426. };
  1427.  
  1428. cam2_therm@52 {
  1429. reg = <0x52>;
  1430. qcom,ratiometric;
  1431. qcom,hw-settle-time = <0xc8>;
  1432. };
  1433.  
  1434. soc_therm@4e {
  1435. reg = <0x4e>;
  1436. qcom,ratiometric;
  1437. qcom,hw-settle-time = <0xc8>;
  1438. };
  1439. };
  1440. };
  1441.  
  1442. qcom,pm8150l@5 {
  1443. compatible = "qcom,spmi-pmic";
  1444. reg = <0x05 0x00>;
  1445. #address-cells = <0x02>;
  1446. #size-cells = <0x00>;
  1447.  
  1448. qcom,lcdb@ec00 {
  1449. compatible = "qcom,qpnp-lcdb-regulator";
  1450. reg = <0xec00 0x100>;
  1451. interrupts = <0x05 0xec 0x01 0x01>;
  1452. interrupt-names = "sc-irq";
  1453. qcom,pmic-revid = <0x19>;
  1454. qcom,voltage-step-ramp;
  1455. status = "ok";
  1456. qcom,pwrdn-delay-ms = <0x08>;
  1457. qcom,pwrup-delay-ms = <0x04>;
  1458. qcom,pfm-peak-auto-adj-disabled;
  1459. phandle = <0xb2>;
  1460.  
  1461. ldo {
  1462. label = "ldo";
  1463. regulator-name = "lcdb_ldo";
  1464. regulator-min-microvolt = <0x5b8d80>;
  1465. regulator-max-microvolt = <0x5b8d80>;
  1466. qcom,ldo-ilim-ma = <0x1cc>;
  1467. phandle = <0x24>;
  1468. };
  1469.  
  1470. ncp {
  1471. label = "ncp";
  1472. regulator-name = "lcdb_ncp";
  1473. regulator-min-microvolt = <0x5b8d80>;
  1474. regulator-max-microvolt = <0x5b8d80>;
  1475. qcom,ncp-ilim-ma = <0x32a>;
  1476. phandle = <0x25>;
  1477. };
  1478.  
  1479. bst {
  1480. label = "bst";
  1481. regulator-name = "lcdb_bst";
  1482. regulator-min-microvolt = <0x47b760>;
  1483. regulator-max-microvolt = <0x5fbfb8>;
  1484. qcom,bst-ilim-ma = <0x258>;
  1485. phandle = <0xb3>;
  1486. };
  1487. };
  1488.  
  1489. qcom,leds@d300 {
  1490. compatible = "qcom,qpnp-flash-led-v2";
  1491. status = "disabled";
  1492. reg = <0xd300 0x100>;
  1493. label = "flash";
  1494. interrupts = <0x05 0xd3 0x00 0x01 0x05 0xd3 0x03 0x01 0x05 0xd3 0x04 0x01>;
  1495. interrupt-names = "led-fault-irq\0all-ramp-down-done-irq\0all-ramp-up-done-irq";
  1496. qcom,hdrm-auto-mode;
  1497. qcom,short-circuit-det;
  1498. qcom,open-circuit-det;
  1499. qcom,vph-droop-det;
  1500. qcom,thermal-derate-en;
  1501. qcom,thermal-derate-current = <0xc8 0x1f4 0x3e8>;
  1502. qcom,isc-delay = <0xc0>;
  1503. qcom,pmic-revid = <0x19>;
  1504. phandle = <0xb4>;
  1505.  
  1506. qcom,flash_0 {
  1507. label = "flash";
  1508. qcom,led-name = "led:flash_0";
  1509. qcom,max-current = <0x5dc>;
  1510. qcom,default-led-trigger = "flash0_trigger";
  1511. qcom,id = <0x00>;
  1512. qcom,current-ma = <0x3e8>;
  1513. qcom,duration-ms = <0x500>;
  1514. qcom,ires-ua = <0x30d4>;
  1515. qcom,hdrm-voltage-mv = <0x145>;
  1516. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1517. phandle = <0xb5>;
  1518. };
  1519.  
  1520. qcom,flash_1 {
  1521. label = "flash";
  1522. qcom,led-name = "led:flash_1";
  1523. qcom,max-current = <0x5dc>;
  1524. qcom,default-led-trigger = "flash1_trigger";
  1525. qcom,id = <0x01>;
  1526. qcom,current-ma = <0x3e8>;
  1527. qcom,duration-ms = <0x500>;
  1528. qcom,ires-ua = <0x30d4>;
  1529. qcom,hdrm-voltage-mv = <0x145>;
  1530. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1531. phandle = <0xb6>;
  1532. };
  1533.  
  1534. qcom,flash_2 {
  1535. label = "flash";
  1536. qcom,led-name = "led:flash_2";
  1537. qcom,max-current = <0x2ee>;
  1538. qcom,default-led-trigger = "flash2_trigger";
  1539. qcom,id = <0x02>;
  1540. qcom,current-ma = <0x1f4>;
  1541. qcom,duration-ms = <0x500>;
  1542. qcom,ires-ua = <0x30d4>;
  1543. qcom,hdrm-voltage-mv = <0x145>;
  1544. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1545. status = "disabled";
  1546. phandle = <0xb7>;
  1547. };
  1548.  
  1549. qcom,torch_0 {
  1550. label = "torch";
  1551. qcom,led-name = "led:torch_0";
  1552. qcom,max-current = <0x1f4>;
  1553. qcom,default-led-trigger = "torch0_trigger";
  1554. qcom,id = <0x00>;
  1555. qcom,current-ma = <0x12c>;
  1556. qcom,ires-ua = <0x30d4>;
  1557. qcom,hdrm-voltage-mv = <0x145>;
  1558. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1559. phandle = <0xb8>;
  1560. };
  1561.  
  1562. qcom,torch_1 {
  1563. label = "torch";
  1564. qcom,led-name = "led:torch_1";
  1565. qcom,max-current = <0x1f4>;
  1566. qcom,default-led-trigger = "torch1_trigger";
  1567. qcom,id = <0x01>;
  1568. qcom,current-ma = <0x12c>;
  1569. qcom,ires-ua = <0x30d4>;
  1570. qcom,hdrm-voltage-mv = <0x145>;
  1571. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1572. phandle = <0xb9>;
  1573. };
  1574.  
  1575. qcom,torch_2 {
  1576. label = "torch";
  1577. qcom,led-name = "led:torch_2";
  1578. qcom,max-current = <0x1f4>;
  1579. qcom,default-led-trigger = "torch2_trigger";
  1580. qcom,id = <0x02>;
  1581. qcom,current-ma = <0x12c>;
  1582. qcom,ires-ua = <0x30d4>;
  1583. qcom,hdrm-voltage-mv = <0x145>;
  1584. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1585. status = "disabled";
  1586. phandle = <0xba>;
  1587. };
  1588.  
  1589. qcom,led_switch_0 {
  1590. label = "switch";
  1591. qcom,led-name = "led:switch_0";
  1592. qcom,led-mask = <0x01>;
  1593. qcom,default-led-trigger = "switch0_trigger";
  1594. phandle = <0xbb>;
  1595. };
  1596.  
  1597. qcom,led_switch_1 {
  1598. label = "switch";
  1599. qcom,led-name = "led:switch_1";
  1600. qcom,led-mask = <0x02>;
  1601. qcom,default-led-trigger = "switch1_trigger";
  1602. phandle = <0xbc>;
  1603. };
  1604.  
  1605. qcom,led_switch_2 {
  1606. label = "switch";
  1607. qcom,led-name = "led:switch_2";
  1608. qcom,led-mask = <0x03>;
  1609. qcom,default-led-trigger = "switch2_trigger";
  1610. phandle = <0xbd>;
  1611. };
  1612.  
  1613. qcom,led_switch_3 {
  1614. label = "switch";
  1615. qcom,led-name = "led:switch_3";
  1616. qcom,led-mask = <0x04>;
  1617. qcom,default-led-trigger = "switch3_trigger";
  1618. phandle = <0xbe>;
  1619. };
  1620. };
  1621.  
  1622. qcom,wled@d800 {
  1623. compatible = "qcom,pm8150l-spmi-wled";
  1624. reg = <0xd800 0x100 0xd900 0x100>;
  1625. reg-names = "wled-ctrl-base\0wled-sink-base";
  1626. label = "backlight";
  1627. interrupts = <0x05 0xd8 0x01 0x01 0x05 0xd8 0x04 0x03 0x05 0xd8 0x05 0x03>;
  1628. interrupt-names = "ovp-irq\0pre-flash-irq\0flash-irq";
  1629. qcom,pmic-revid = <0x19>;
  1630. qcom,auto-calibration;
  1631. status = "disabled";
  1632. phandle = <0xbf>;
  1633.  
  1634. qcom,wled-flash {
  1635. label = "flash";
  1636. qcom,default-led-trigger = "wled_flash";
  1637. phandle = <0xc0>;
  1638. };
  1639.  
  1640. qcom,wled-torch {
  1641. label = "torch";
  1642. qcom,default-led-trigger = "wled_torch";
  1643. qcom,wled-torch-timer = <0x4b0>;
  1644. phandle = <0xc1>;
  1645. };
  1646.  
  1647. qcom,wled-switch {
  1648. label = "switch";
  1649. qcom,default-led-trigger = "wled_switch";
  1650. phandle = <0xc2>;
  1651. };
  1652. };
  1653.  
  1654. qcom,pwms@b100 {
  1655. compatible = "qcom,pwm-lpg";
  1656. reg = <0xb100 0x300 0xb000 0x100>;
  1657. reg-names = "lpg-base\0lut-base";
  1658. #pwm-cells = <0x02>;
  1659. qcom,num-lpg-channels = <0x03>;
  1660. qcom,lut-patterns = <0x00 0x0a 0x14 0x1e 0x28 0x32 0x3c 0x46 0x50 0x5a 0x64 0x5a 0x50 0x46 0x3c 0x32 0x28 0x1e 0x14 0x0a 0x00>;
  1661. phandle = <0x1a>;
  1662.  
  1663. lpg1 {
  1664. qcom,lpg-chan-id = <0x01>;
  1665. qcom,ramp-step-ms = <0x64>;
  1666. qcom,ramp-pause-hi-count = <0x02>;
  1667. qcom,ramp-pause-lo-count = <0x02>;
  1668. qcom,ramp-low-index = <0x00>;
  1669. qcom,ramp-high-index = <0x14>;
  1670. qcom,ramp-from-low-to-high;
  1671. qcom,ramp-pattern-repeat;
  1672. };
  1673.  
  1674. lpg2 {
  1675. qcom,lpg-chan-id = <0x02>;
  1676. qcom,ramp-step-ms = <0x64>;
  1677. qcom,ramp-pause-hi-count = <0x02>;
  1678. qcom,ramp-pause-lo-count = <0x02>;
  1679. qcom,ramp-low-index = <0x00>;
  1680. qcom,ramp-high-index = <0x14>;
  1681. qcom,ramp-from-low-to-high;
  1682. qcom,ramp-pattern-repeat;
  1683. };
  1684.  
  1685. lpg3 {
  1686. qcom,lpg-chan-id = <0x03>;
  1687. qcom,ramp-step-ms = <0x64>;
  1688. qcom,ramp-pause-hi-count = <0x02>;
  1689. qcom,ramp-pause-lo-count = <0x02>;
  1690. qcom,ramp-low-index = <0x00>;
  1691. qcom,ramp-high-index = <0x14>;
  1692. qcom,ramp-from-low-to-high;
  1693. qcom,ramp-pattern-repeat;
  1694. };
  1695. };
  1696.  
  1697. qcom,pwms@bc00 {
  1698. compatible = "qcom,pwm-lpg";
  1699. reg = <0xbc00 0x200>;
  1700. reg-names = "lpg-base";
  1701. #pwm-cells = <0x02>;
  1702. qcom,num-lpg-channels = <0x02>;
  1703. status = "okay";
  1704. phandle = <0x49>;
  1705. };
  1706.  
  1707. qcom,leds@d000 {
  1708. compatible = "qcom,tri-led";
  1709. reg = <0xd000 0x100>;
  1710. phandle = <0xc3>;
  1711.  
  1712. red {
  1713. label = "red";
  1714. pwms = <0x1a 0x00 0xf4240>;
  1715. led-sources = <0x00>;
  1716. linux,default-trigger = "timer";
  1717. qcom,continuous-mode;
  1718. qcom,default-brightness = <0x0a>;
  1719. };
  1720.  
  1721. green {
  1722. label = "green";
  1723. pwms = <0x1a 0x02 0xf4240>;
  1724. led-sources = <0x02>;
  1725. linux,default-trigger = "timer";
  1726. qcom,continuous-mode;
  1727. qcom,default-brightness = <0x0a>;
  1728. };
  1729.  
  1730. blue {
  1731. label = "blue";
  1732. pwms = <0x1a 0x01 0xf4240>;
  1733. led-sources = <0x01>;
  1734. linux,default-trigger = "timer";
  1735. qcom,continuous-mode;
  1736. qcom,default-brightness = <0x0a>;
  1737. };
  1738. };
  1739.  
  1740. qcom,amoled {
  1741. compatible = "qcom,qpnp-amoled-regulator";
  1742. #address-cells = <0x01>;
  1743. #size-cells = <0x01>;
  1744. status = "disabled";
  1745. phandle = <0xc4>;
  1746.  
  1747. oledb@e000 {
  1748. reg = <0xe000 0x100>;
  1749. reg-names = "oledb_base";
  1750. regulator-name = "oledb";
  1751. regulator-min-microvolt = <0x4b2648>;
  1752. regulator-max-microvolt = <0x7b98a0>;
  1753. qcom,swire-control;
  1754. phandle = <0xc5>;
  1755. };
  1756.  
  1757. ab@de00 {
  1758. reg = <0xde00 0x100>;
  1759. reg-names = "ab_base";
  1760. regulator-name = "ab";
  1761. regulator-min-microvolt = <0x4630c0>;
  1762. regulator-max-microvolt = <0x5d1420>;
  1763. qcom,swire-control;
  1764. phandle = <0xc6>;
  1765. };
  1766.  
  1767. ibb@dc00 {
  1768. reg = <0xdc00 0x100>;
  1769. reg-names = "ibb_base";
  1770. regulator-name = "ibb";
  1771. regulator-min-microvolt = <0xc3500>;
  1772. regulator-max-microvolt = <0x5265c0>;
  1773. qcom,swire-control;
  1774. phandle = <0xc7>;
  1775. };
  1776. };
  1777. };
  1778. };
  1779. };
  1780.  
  1781. fragment@5 {
  1782. target = <0xffffffff>;
  1783.  
  1784. __overlay__ {
  1785.  
  1786. pm8150l_tz {
  1787. polling-delay-passive = <0x64>;
  1788. polling-delay = <0x00>;
  1789. thermal-governor = "step_wise";
  1790. thermal-sensors = <0x1b>;
  1791. wake-capable-sensor;
  1792. phandle = <0xc8>;
  1793.  
  1794. trips {
  1795.  
  1796. trip0 {
  1797. temperature = <0x17318>;
  1798. hysteresis = <0x00>;
  1799. type = "passive";
  1800. };
  1801.  
  1802. trip1 {
  1803. temperature = <0x1c138>;
  1804. hysteresis = <0x00>;
  1805. type = "passive";
  1806. };
  1807.  
  1808. trip2 {
  1809. temperature = <0x23668>;
  1810. hysteresis = <0x00>;
  1811. type = "passive";
  1812. };
  1813. };
  1814. };
  1815.  
  1816. pm8150l-vph-lvl0 {
  1817. polling-delay-passive = <0x00>;
  1818. polling-delay = <0x00>;
  1819. thermal-governor = "low_limits_cap";
  1820. thermal-sensors = <0x1c 0x02>;
  1821. tracks-low;
  1822. wake-capable-sensor;
  1823.  
  1824. trips {
  1825.  
  1826. vph-lvl0 {
  1827. temperature = <0xbb8>;
  1828. hysteresis = <0xc8>;
  1829. type = "passive";
  1830. phandle = <0xc9>;
  1831. };
  1832. };
  1833. };
  1834.  
  1835. pm8150l-vph-lvl1 {
  1836. polling-delay-passive = <0x00>;
  1837. polling-delay = <0x00>;
  1838. thermal-governor = "low_limits_cap";
  1839. thermal-sensors = <0x1c 0x03>;
  1840. tracks-low;
  1841. wake-capable-sensor;
  1842.  
  1843. trips {
  1844.  
  1845. vph-lvl1 {
  1846. temperature = <0xabe>;
  1847. hysteresis = <0xc8>;
  1848. type = "passive";
  1849. phandle = <0xca>;
  1850. };
  1851. };
  1852. };
  1853.  
  1854. pm8150l-vph-lvl2 {
  1855. polling-delay-passive = <0x00>;
  1856. polling-delay = <0x00>;
  1857. thermal-governor = "low_limits_cap";
  1858. thermal-sensors = <0x1c 0x04>;
  1859. tracks-low;
  1860. wake-capable-sensor;
  1861.  
  1862. trips {
  1863.  
  1864. vph-lvl2 {
  1865. temperature = <0x9c4>;
  1866. hysteresis = <0xc8>;
  1867. type = "passive";
  1868. phandle = <0xcb>;
  1869. };
  1870. };
  1871. };
  1872.  
  1873. pm8150l-bcl-lvl0 {
  1874. polling-delay-passive = <0x64>;
  1875. polling-delay = <0x00>;
  1876. thermal-governor = "step_wise";
  1877. thermal-sensors = <0x1c 0x05>;
  1878. wake-capable-sensor;
  1879.  
  1880. trips {
  1881.  
  1882. l-bcl-lvl0 {
  1883. temperature = <0x01>;
  1884. hysteresis = <0x01>;
  1885. type = "passive";
  1886. phandle = <0x30>;
  1887. };
  1888. };
  1889. };
  1890.  
  1891. pm8150l-bcl-lvl1 {
  1892. polling-delay-passive = <0x64>;
  1893. polling-delay = <0x00>;
  1894. thermal-governor = "step_wise";
  1895. thermal-sensors = <0x1c 0x06>;
  1896. wake-capable-sensor;
  1897.  
  1898. trips {
  1899.  
  1900. l-bcl-lvl1 {
  1901. temperature = <0x01>;
  1902. hysteresis = <0x01>;
  1903. type = "passive";
  1904. phandle = <0x31>;
  1905. };
  1906. };
  1907. };
  1908.  
  1909. pm8150l-bcl-lvl2 {
  1910. polling-delay-passive = <0x64>;
  1911. polling-delay = <0x00>;
  1912. thermal-governor = "step_wise";
  1913. thermal-sensors = <0x1c 0x07>;
  1914. wake-capable-sensor;
  1915.  
  1916. trips {
  1917.  
  1918. l-bcl-lvl2 {
  1919. temperature = <0x01>;
  1920. hysteresis = <0x01>;
  1921. type = "passive";
  1922. phandle = <0x32>;
  1923. };
  1924. };
  1925. };
  1926. };
  1927. };
  1928.  
  1929. fragment@6 {
  1930. target = <0xffffffff>;
  1931.  
  1932. __overlay__ {
  1933. #address-cells = <0x02>;
  1934. #size-cells = <0x00>;
  1935. interrupt-controller;
  1936. #interrupt-cells = <0x04>;
  1937.  
  1938. qcom,pm8009@a {
  1939. compatible = "qcom,spmi-pmic";
  1940. reg = <0x0a 0x00>;
  1941. #address-cells = <0x02>;
  1942. #size-cells = <0x00>;
  1943.  
  1944. qcom,revid@100 {
  1945. compatible = "qcom,qpnp-revid";
  1946. reg = <0x100 0x100>;
  1947. };
  1948.  
  1949. qcom,power-on@800 {
  1950. compatible = "qcom,qpnp-power-on";
  1951. reg = <0x800 0x100>;
  1952. };
  1953.  
  1954. pinctrl@c000 {
  1955. compatible = "qcom,spmi-gpio";
  1956. reg = <0xc000 0x400>;
  1957. interrupts = <0x0a 0xc0 0x00 0x00 0x0a 0xc1 0x00 0x00 0x0a 0xc2 0x00 0x00 0x0a 0xc3 0x00 0x00>;
  1958. interrupt-names = "pm8009_gpio1\0pm8009_gpio2\0pm8009_gpio3\0pm8009_gpio4";
  1959. gpio-controller;
  1960. #gpio-cells = <0x02>;
  1961. phandle = <0x1d>;
  1962. };
  1963. };
  1964.  
  1965. qcom,pm8009@b {
  1966. compatible = "qcom,spmi-pmic";
  1967. reg = <0x0b 0x00>;
  1968. #address-cells = <0x02>;
  1969. #size-cells = <0x00>;
  1970. };
  1971. };
  1972. };
  1973.  
  1974. fragment@7 {
  1975. target = <0xffffffff>;
  1976.  
  1977. __overlay__ {
  1978. #address-cells = <0x02>;
  1979. #size-cells = <0x00>;
  1980. interrupt-controller;
  1981. #interrupt-cells = <0x04>;
  1982.  
  1983. qcom,pmxprairie@8 {
  1984. compatible = "qcom,spmi-pmic";
  1985. reg = <0x08 0x00>;
  1986. #address-cells = <0x02>;
  1987. #size-cells = <0x00>;
  1988.  
  1989. qcom,power-on@800 {
  1990. compatible = "qcom,qpnp-power-on";
  1991. reg = <0x800 0x100>;
  1992. qcom,modem-reset;
  1993. };
  1994. };
  1995.  
  1996. qcom,pmxprairie@9 {
  1997. compatible = "qcom,spmi-pmic";
  1998. reg = <0x09 0x00>;
  1999. #address-cells = <0x02>;
  2000. #size-cells = <0x00>;
  2001. };
  2002. };
  2003. };
  2004.  
  2005. fragment@8 {
  2006. target = <0xffffffff>;
  2007.  
  2008. __overlay__ {
  2009.  
  2010. regulator-dbb1 {
  2011. compatible = "regulator-fixed";
  2012. regulator-name = "vdd_tof";
  2013. regulator-min-microvolt = <0x36ee80>;
  2014. regulator-max-microvolt = <0x36ee80>;
  2015. gpio = <0x1d 0x01 0x00>;
  2016. startup-delay-us = <0x3e8>;
  2017. enable-active-high;
  2018. phandle = <0xcc>;
  2019. };
  2020.  
  2021. regulator-haptics-boost {
  2022. compatible = "regulator-fixed";
  2023. regulator-name = "vdd_hap_boost";
  2024. gpio = <0x1e 0x05 0x00>;
  2025. pinctrl-names = "default";
  2026. pinctrl-0 = <0x1f>;
  2027. startup-delay-us = <0x3e8>;
  2028. enable-active-high;
  2029. status = "disabled";
  2030. phandle = <0xcd>;
  2031. };
  2032. };
  2033. };
  2034.  
  2035. fragment@9 {
  2036. target = <0xffffffff>;
  2037.  
  2038. __overlay__ {
  2039. extcon = <0x20 0xffffffff>;
  2040. };
  2041. };
  2042.  
  2043. fragment@10 {
  2044. target = <0xffffffff>;
  2045.  
  2046. __overlay__ {
  2047. extcon = <0x20>;
  2048. };
  2049. };
  2050.  
  2051. fragment@11 {
  2052. target = <0xffffffff>;
  2053.  
  2054. __overlay__ {
  2055.  
  2056. display_panel_avdd_default {
  2057. phandle = <0x21>;
  2058.  
  2059. mux {
  2060. pins = "gpio61";
  2061. function = "gpio";
  2062. };
  2063.  
  2064. config {
  2065. pins = "gpio61";
  2066. drive-strength = <0x08>;
  2067. bias-disable = <0x00>;
  2068. output-high;
  2069. };
  2070. };
  2071. };
  2072. };
  2073.  
  2074. fragment@12 {
  2075. target = <0xffffffff>;
  2076.  
  2077. __overlay__ {
  2078.  
  2079. qcom,msm-ext-disp {
  2080. compatible = "qcom,msm-ext-disp";
  2081. phandle = <0x28>;
  2082.  
  2083. qcom,msm-ext-disp-audio-codec-rx {
  2084. compatible = "qcom,msm-ext-disp-audio-codec-rx";
  2085. phandle = <0x43>;
  2086. };
  2087. };
  2088.  
  2089. dsi_panel_pwr_supply {
  2090. #address-cells = <0x01>;
  2091. #size-cells = <0x00>;
  2092. phandle = <0xce>;
  2093.  
  2094. qcom,panel-supply-entry@0 {
  2095. reg = <0x00>;
  2096. qcom,supply-name = "vddio";
  2097. qcom,supply-min-voltage = <0x1b7740>;
  2098. qcom,supply-max-voltage = <0x1b7740>;
  2099. qcom,supply-enable-load = <0xf230>;
  2100. qcom,supply-disable-load = <0x50>;
  2101. qcom,supply-post-on-sleep = <0x14>;
  2102. };
  2103.  
  2104. qcom,panel-supply-entry@1 {
  2105. reg = <0x01>;
  2106. qcom,supply-name = "vdd";
  2107. qcom,supply-min-voltage = <0x325aa0>;
  2108. qcom,supply-max-voltage = <0x325aa0>;
  2109. qcom,supply-enable-load = <0xd13a8>;
  2110. qcom,supply-disable-load = <0x00>;
  2111. qcom,supply-post-on-sleep = <0x00>;
  2112. };
  2113.  
  2114. qcom,panel-supply-entry@2 {
  2115. reg = <0x02>;
  2116. qcom,supply-name = "lab";
  2117. qcom,supply-min-voltage = <0x4630c0>;
  2118. qcom,supply-max-voltage = <0x5b8d80>;
  2119. qcom,supply-enable-load = <0x186a0>;
  2120. qcom,supply-disable-load = <0x64>;
  2121. };
  2122.  
  2123. qcom,panel-supply-entry@3 {
  2124. reg = <0x03>;
  2125. qcom,supply-name = "ibb";
  2126. qcom,supply-min-voltage = <0x4630c0>;
  2127. qcom,supply-max-voltage = <0x5b8d80>;
  2128. qcom,supply-enable-load = <0x186a0>;
  2129. qcom,supply-disable-load = <0x64>;
  2130. qcom,supply-post-on-sleep = <0x14>;
  2131. };
  2132. };
  2133.  
  2134. dsi_panel_pwr_supply_lab_ibb {
  2135. #address-cells = <0x01>;
  2136. #size-cells = <0x00>;
  2137. phandle = <0x73>;
  2138.  
  2139. qcom,panel-supply-entry@0 {
  2140. reg = <0x00>;
  2141. qcom,supply-name = "vddio";
  2142. qcom,supply-min-voltage = <0x1cfde0>;
  2143. qcom,supply-max-voltage = <0x1cfde0>;
  2144. qcom,supply-enable-load = <0xf230>;
  2145. qcom,supply-disable-load = <0x50>;
  2146. qcom,supply-post-on-sleep = <0x14>;
  2147. qcom,supply-pre-off-sleep = <0x0f>;
  2148. };
  2149.  
  2150. qcom,panel-supply-entry@1 {
  2151. reg = <0x01>;
  2152. qcom,supply-name = "lab";
  2153. qcom,supply-min-voltage = <0x557300>;
  2154. qcom,supply-max-voltage = <0x5b8d80>;
  2155. qcom,supply-enable-load = <0x186a0>;
  2156. qcom,supply-disable-load = <0x64>;
  2157. };
  2158.  
  2159. qcom,panel-supply-entry@2 {
  2160. reg = <0x02>;
  2161. qcom,supply-name = "ibb";
  2162. qcom,supply-min-voltage = <0x557300>;
  2163. qcom,supply-max-voltage = <0x5b8d80>;
  2164. qcom,supply-enable-load = <0x186a0>;
  2165. qcom,supply-disable-load = <0x64>;
  2166. qcom,supply-post-on-sleep = <0x14>;
  2167. };
  2168.  
  2169. qcom,panel-supply-entry@3 {
  2170. reg = <0x03>;
  2171. qcom,supply-name = "blu-mcu";
  2172. qcom,supply-min-voltage = <0x2f9b80>;
  2173. qcom,supply-max-voltage = <0x2f9b80>;
  2174. qcom,supply-enable-load = <0xd13a8>;
  2175. qcom,supply-disable-load = <0x00>;
  2176. qcom,supply-post-on-sleep = <0x00>;
  2177. };
  2178.  
  2179. qcom,panel-supply-entry@4 {
  2180. reg = <0x04>;
  2181. qcom,supply-name = "blu-spi";
  2182. qcom,supply-min-voltage = <0x1b7740>;
  2183. qcom,supply-max-voltage = <0x1b7740>;
  2184. qcom,supply-enable-load = <0xf230>;
  2185. qcom,supply-disable-load = <0x00>;
  2186. qcom,supply-pre-on-sleep = <0x0a>;
  2187. };
  2188. };
  2189.  
  2190. dsi_panel_pwr_supply_avdd {
  2191. #address-cells = <0x01>;
  2192. #size-cells = <0x00>;
  2193. phandle = <0xcf>;
  2194.  
  2195. qcom,panel-supply-entry@0 {
  2196. reg = <0x00>;
  2197. qcom,supply-name = "vddio";
  2198. qcom,supply-min-voltage = <0x1b7740>;
  2199. qcom,supply-max-voltage = <0x1b7740>;
  2200. qcom,supply-enable-load = <0xf230>;
  2201. qcom,supply-disable-load = <0x50>;
  2202. qcom,supply-post-on-sleep = <0x14>;
  2203. };
  2204.  
  2205. qcom,panel-supply-entry@1 {
  2206. reg = <0x01>;
  2207. qcom,supply-name = "avdd";
  2208. qcom,supply-min-voltage = <0x4630c0>;
  2209. qcom,supply-max-voltage = <0x5b8d80>;
  2210. qcom,supply-enable-load = <0x186a0>;
  2211. qcom,supply-disable-load = <0x64>;
  2212. };
  2213. };
  2214.  
  2215. display_gpio_regulator@1 {
  2216. compatible = "regulator-fixed";
  2217. regulator-name = "display_panel_avdd";
  2218. regulator-min-microvolt = <0x53ec60>;
  2219. regulator-max-microvolt = <0x53ec60>;
  2220. regulator-enable-ramp-delay = <0xe9>;
  2221. gpio = <0xffffffff 0x3d 0x00>;
  2222. enable-active-high;
  2223. regulator-boot-on;
  2224. pinctrl-names = "default";
  2225. pinctrl-0 = <0x21>;
  2226. phandle = <0xd0>;
  2227. };
  2228.  
  2229. qcom,dsi-display-primary {
  2230. compatible = "qcom,dsi-display";
  2231. label = "primary";
  2232. qcom,dsi-ctrl = <0xffffffff 0xffffffff>;
  2233. qcom,dsi-phy = <0xffffffff 0xffffffff>;
  2234. clocks = <0xffffffff 0x06 0xffffffff 0x09 0xffffffff 0x03 0xffffffff 0x08 0xffffffff 0x12 0xffffffff 0x15 0xffffffff 0x0d 0xffffffff 0x11 0xffffffff 0x20 0xffffffff 0x23 0xffffffff 0x1d 0xffffffff 0x22 0xffffffff 0x2c 0xffffffff 0x2f 0xffffffff 0x27 0xffffffff 0x2b>;
  2235. clock-names = "mux_byte_clk0\0mux_pixel_clk0\0src_byte_clk0\0src_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0\0shadow_byte_clk0\0shadow_pixel_clk0\0mux_byte_clk1\0mux_pixel_clk1\0src_byte_clk1\0src_pixel_clk1\0cphy_byte_clk1\0cphy_pixel_clk1\0shadow_byte_clk1\0shadow_pixel_clk1";
  2236. pinctrl-names = "panel_active\0panel_suspend";
  2237. pinctrl-0 = <0x22>;
  2238. pinctrl-1 = <0x23>;
  2239. qcom,platform-te-gpio;
  2240. qcom,panel-te-source = <0x00>;
  2241. vddio-supply = <0xffffffff>;
  2242. vdd-supply = <0xffffffff>;
  2243. avdd-supply;
  2244. lab-supply = <0x24>;
  2245. ibb-supply = <0x25>;
  2246. qcom,mdp = <0xffffffff>;
  2247. blu-mcu-supply = <0xffffffff>;
  2248. qcom,dsi-default-panel = <0x26>;
  2249. blu-spi-supply = <0x27>;
  2250. phandle = <0x2a>;
  2251. };
  2252.  
  2253. qcom,dsi-display-secondary {
  2254. compatible = "qcom,dsi-display";
  2255. label = "secondary";
  2256. qcom,dsi-ctrl = <0xffffffff 0xffffffff>;
  2257. qcom,dsi-phy = <0xffffffff 0xffffffff>;
  2258. clocks = <0xffffffff 0x06 0xffffffff 0x09 0xffffffff 0x12 0xffffffff 0x15 0xffffffff 0x20 0xffffffff 0x23 0xffffffff 0x2c 0xffffffff 0x2f>;
  2259. clock-names = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0\0mux_byte_clk1\0mux_pixel_clk1\0cphy_byte_clk1\0cphy_pixel_clk1";
  2260. pinctrl-names = "panel_active\0panel_suspend";
  2261. pinctrl-0;
  2262. pinctrl-1;
  2263. qcom,platform-te-gpio;
  2264. qcom,panel-te-source = <0x01>;
  2265. vddio-supply = <0xffffffff>;
  2266. vdd-supply = <0xffffffff>;
  2267. avdd-supply;
  2268. qcom,mdp = <0xffffffff>;
  2269. phandle = <0x2b>;
  2270. };
  2271.  
  2272. qcom,wb-display@0 {
  2273. compatible = "qcom,wb-display";
  2274. cell-index = <0x00>;
  2275. label = "wb_display";
  2276. phandle = <0x29>;
  2277. };
  2278.  
  2279. qcom,msm_notifier@0 {
  2280. compatible = "qcom,msm-notifier";
  2281. status = "disabled";
  2282. phandle = <0xd1>;
  2283. };
  2284. };
  2285. };
  2286.  
  2287. fragment@13 {
  2288. target = <0xffffffff>;
  2289.  
  2290. __overlay__ {
  2291. qcom,dp-usbpd-detection = <0x20>;
  2292. qcom,ext-disp = <0x28>;
  2293. qcom,dp-aux-switch = <0xffffffff>;
  2294. qcom,usbplug-cc-gpio = <0xffffffff 0x41 0x00>;
  2295. pinctrl-names = "mdss_dp_active\0mdss_dp_sleep";
  2296. pinctrl-0 = <0xffffffff>;
  2297. pinctrl-1 = <0xffffffff>;
  2298. };
  2299. };
  2300.  
  2301. fragment@14 {
  2302. target = <0xffffffff>;
  2303.  
  2304. __overlay__ {
  2305. connectors = <0xffffffff 0x29 0x2a 0x2b 0xffffffff>;
  2306. };
  2307. };
  2308.  
  2309. fragment@15 {
  2310. target = <0xffffffff>;
  2311.  
  2312. __overlay__ {
  2313. #cooling-cells = <0x02>;
  2314. };
  2315. };
  2316.  
  2317. fragment@16 {
  2318. target = <0xffffffff>;
  2319.  
  2320. __overlay__ {
  2321.  
  2322. soc {
  2323.  
  2324. cooling-maps {
  2325.  
  2326. soc_cpu4 {
  2327. trip = <0x2c>;
  2328. cooling-device = <0xffffffff 0x01 0x01>;
  2329. };
  2330.  
  2331. soc_cpu5 {
  2332. trip = <0x2c>;
  2333. cooling-device = <0xffffffff 0x01 0x01>;
  2334. };
  2335.  
  2336. soc_cpu6 {
  2337. trip = <0x2c>;
  2338. cooling-device = <0xffffffff 0x01 0x01>;
  2339. };
  2340.  
  2341. soc_cpu7 {
  2342. trip = <0x2c>;
  2343. cooling-device = <0xffffffff 0x01 0x01>;
  2344. };
  2345. };
  2346. };
  2347.  
  2348. pm8150b-bcl-lvl0 {
  2349.  
  2350. cooling-maps {
  2351.  
  2352. vbat_cpu4 {
  2353. trip = <0x2d>;
  2354. cooling-device = <0xffffffff 0x01 0x01>;
  2355. };
  2356.  
  2357. vbat_cpu5 {
  2358. trip = <0x2d>;
  2359. cooling-device = <0xffffffff 0x01 0x01>;
  2360. };
  2361.  
  2362. vbat_gpu0 {
  2363. trip = <0x2d>;
  2364. cooling-device = <0xffffffff 0x02 0x02>;
  2365. };
  2366. };
  2367. };
  2368.  
  2369. pm8150b-bcl-lvl1 {
  2370.  
  2371. cooling-maps {
  2372.  
  2373. vbat_cpu6 {
  2374. trip = <0x2e>;
  2375. cooling-device = <0xffffffff 0x01 0x01>;
  2376. };
  2377.  
  2378. vbat_cpu7 {
  2379. trip = <0x2e>;
  2380. cooling-device = <0xffffffff 0x01 0x01>;
  2381. };
  2382.  
  2383. vbat_gpu1 {
  2384. trip = <0x2e>;
  2385. cooling-device = <0xffffffff 0x04 0x04>;
  2386. };
  2387. };
  2388. };
  2389.  
  2390. pm8150b-bcl-lvl2 {
  2391.  
  2392. cooling-maps {
  2393.  
  2394. vbat_gpu2 {
  2395. trip = <0x2f>;
  2396. cooling-device = <0xffffffff 0xfffffffe 0xfffffffe>;
  2397. };
  2398. };
  2399. };
  2400.  
  2401. pm8150l-bcl-lvl0 {
  2402. disable-thermal-zone;
  2403.  
  2404. cooling-maps {
  2405.  
  2406. vph_cpu4 {
  2407. trip = <0x30>;
  2408. cooling-device = <0xffffffff 0x01 0x01>;
  2409. };
  2410.  
  2411. vph_cpu5 {
  2412. trip = <0x30>;
  2413. cooling-device = <0xffffffff 0x01 0x01>;
  2414. };
  2415.  
  2416. vph_gpu0 {
  2417. trip = <0x30>;
  2418. cooling-device = <0xffffffff 0x02 0x02>;
  2419. };
  2420. };
  2421. };
  2422.  
  2423. pm8150l-bcl-lvl1 {
  2424. disable-thermal-zone;
  2425.  
  2426. cooling-maps {
  2427.  
  2428. vph_cpu6 {
  2429. trip = <0x31>;
  2430. cooling-device = <0xffffffff 0x01 0x01>;
  2431. };
  2432.  
  2433. vph_cpu7 {
  2434. trip = <0x31>;
  2435. cooling-device = <0xffffffff 0x01 0x01>;
  2436. };
  2437.  
  2438. vph_gpu1 {
  2439. trip = <0x31>;
  2440. cooling-device = <0xffffffff 0x04 0x04>;
  2441. };
  2442. };
  2443. };
  2444.  
  2445. pm8150l-bcl-lvl2 {
  2446. disable-thermal-zone;
  2447.  
  2448. cooling-maps {
  2449.  
  2450. vph_gpu2 {
  2451. trip = <0x32>;
  2452. cooling-device = <0xffffffff 0xfffffffe 0xfffffffe>;
  2453. };
  2454. };
  2455. };
  2456. };
  2457. };
  2458.  
  2459. fragment@17 {
  2460. target = <0xffffffff>;
  2461.  
  2462. __overlay__ {
  2463. reg = <0x82400000 0x1c00000>;
  2464. };
  2465. };
  2466.  
  2467. fragment@18 {
  2468. target = <0xffffffff>;
  2469.  
  2470. __overlay__ {
  2471. reg = <0x00 0x80b00000 0x00 0x3500000>;
  2472. };
  2473. };
  2474.  
  2475. fragment@19 {
  2476. target = <0xffffffff>;
  2477.  
  2478. __overlay__ {
  2479.  
  2480. ramoops {
  2481. compatible = "ramoops";
  2482. reg = <0x00 0x9ba00000 0x00 0x90000>;
  2483. record-size = <0x20000>;
  2484. console-size = <0x20000>;
  2485. pmsg-size = <0x20000>;
  2486. phandle = <0xd2>;
  2487. };
  2488. };
  2489. };
  2490.  
  2491. fragment@20 {
  2492. target = <0xffffffff>;
  2493.  
  2494. __overlay__ {
  2495.  
  2496. gpio_keys {
  2497. compatible = "gpio-keys";
  2498. label = "gpio-keys";
  2499. pinctrl-names = "default";
  2500. pinctrl-0 = <0x33>;
  2501.  
  2502. vol_up {
  2503. label = "volume_up";
  2504. gpios = <0x34 0x06 0x01>;
  2505. linux,input-type = <0x01>;
  2506. linux,code = <0x73>;
  2507. gpio-key,wakeup;
  2508. debounce-interval = <0x0f>;
  2509. linux,can-disable;
  2510. };
  2511. };
  2512. };
  2513. };
  2514.  
  2515. fragment@21 {
  2516. target = <0xffffffff>;
  2517.  
  2518. __overlay__ {
  2519. reg = <0xb0000000 0x00>;
  2520. reg-names = [00];
  2521. };
  2522. };
  2523.  
  2524. fragment@22 {
  2525. target = <0xffffffff>;
  2526.  
  2527. __overlay__ {
  2528.  
  2529. xo-therm-usr {
  2530. polling-delay-passive = <0x00>;
  2531. polling-delay = <0x00>;
  2532. thermal-governor = "user_space";
  2533. thermal-sensors = <0x35 0x4c>;
  2534.  
  2535. trips {
  2536.  
  2537. active-config0 {
  2538. temperature = <0x1e848>;
  2539. hysteresis = <0x3e8>;
  2540. type = "passive";
  2541. };
  2542. };
  2543. };
  2544.  
  2545. rfpa-usr {
  2546. polling-delay-passive = <0x00>;
  2547. polling-delay = <0x00>;
  2548. thermal-governor = "user_space";
  2549. thermal-sensors = <0x35 0x4e>;
  2550.  
  2551. trips {
  2552.  
  2553. active-config0 {
  2554. temperature = <0x1e848>;
  2555. hysteresis = <0x3e8>;
  2556. type = "passive";
  2557. };
  2558. };
  2559. };
  2560.  
  2561. cam4-usr {
  2562. polling-delay-passive = <0x00>;
  2563. polling-delay = <0x00>;
  2564. thermal-governor = "user_space";
  2565. thermal-sensors = <0x35 0x52>;
  2566.  
  2567. trips {
  2568.  
  2569. active-config0 {
  2570. temperature = <0x1e848>;
  2571. hysteresis = <0x3e8>;
  2572. type = "passive";
  2573. };
  2574. };
  2575. };
  2576.  
  2577. cam0-usr {
  2578. polling-delay-passive = <0x00>;
  2579. polling-delay = <0x00>;
  2580. thermal-governor = "user_space";
  2581. thermal-sensors = <0x36 0x4d>;
  2582.  
  2583. trips {
  2584.  
  2585. active-config0 {
  2586. temperature = <0x1e848>;
  2587. hysteresis = <0x3e8>;
  2588. type = "passive";
  2589. };
  2590. };
  2591. };
  2592.  
  2593. cam1-usr {
  2594. polling-delay-passive = <0x00>;
  2595. polling-delay = <0x00>;
  2596. thermal-governor = "user_space";
  2597. thermal-sensors = <0x36 0x4f>;
  2598.  
  2599. trips {
  2600.  
  2601. active-config0 {
  2602. temperature = <0x1e848>;
  2603. hysteresis = <0x3e8>;
  2604. type = "passive";
  2605. };
  2606. };
  2607. };
  2608.  
  2609. cam2-usr {
  2610. polling-delay-passive = <0x00>;
  2611. polling-delay = <0x00>;
  2612. thermal-governor = "user_space";
  2613. thermal-sensors = <0x36 0x52>;
  2614.  
  2615. trips {
  2616.  
  2617. active-config0 {
  2618. temperature = <0x1e848>;
  2619. hysteresis = <0x3e8>;
  2620. type = "passive";
  2621. };
  2622. };
  2623. };
  2624.  
  2625. smb-usr {
  2626. polling-delay-passive = <0x00>;
  2627. polling-delay = <0x00>;
  2628. thermal-governor = "user_space";
  2629. thermal-sensors = <0x37 0x4e>;
  2630.  
  2631. trips {
  2632.  
  2633. active-config0 {
  2634. temperature = <0x1e848>;
  2635. hysteresis = <0x3e8>;
  2636. type = "passive";
  2637. };
  2638. };
  2639. };
  2640.  
  2641. pcb1-usr {
  2642. polling-delay-passive = <0x00>;
  2643. polling-delay = <0x00>;
  2644. thermal-governor = "user_space";
  2645. thermal-sensors = <0x37 0x50>;
  2646.  
  2647. trips {
  2648.  
  2649. active-config0 {
  2650. temperature = <0x1e848>;
  2651. hysteresis = <0x3e8>;
  2652. type = "passive";
  2653. };
  2654. };
  2655. };
  2656.  
  2657. cam3-usr {
  2658. polling-delay-passive = <0x00>;
  2659. polling-delay = <0x00>;
  2660. thermal-governor = "user_space";
  2661. thermal-sensors = <0x37 0x54>;
  2662.  
  2663. trips {
  2664.  
  2665. active-config0 {
  2666. temperature = <0x1e848>;
  2667. hysteresis = <0x3e8>;
  2668. type = "passive";
  2669. };
  2670. };
  2671. };
  2672. };
  2673. };
  2674.  
  2675. fragment@23 {
  2676. target = <0xffffffff>;
  2677.  
  2678. __overlay__ {
  2679.  
  2680. lpi_pinctrl@33c0000 {
  2681. compatible = "qcom,lpi-pinctrl";
  2682. reg = <0x33c0000 0x00>;
  2683. qcom,slew-reg = <0x355a000 0x00>;
  2684. qcom,num-gpios = <0x0e>;
  2685. gpio-controller;
  2686. #gpio-cells = <0x02>;
  2687. qcom,lpi-offset-tbl = <0x00 0x1000 0x2000 0x3000 0x4000 0x5000 0x6000 0x7000 0x8000 0x9000 0xa000 0xb000 0xc000 0xd000>;
  2688. qcom,lpi-slew-offset-tbl = <0x00 0x02 0x04 0x08 0x0a 0x0c 0x00 0x00 0x00 0x00 0x10 0x12 0x00 0x00>;
  2689. clock-names = "lpass_core_hw_vote\0lpass_audio_hw_vote";
  2690. clocks = <0xffffffff 0x00 0xffffffff 0x00>;
  2691. phandle = <0xd3>;
  2692.  
  2693. quat_mi2s_sck {
  2694.  
  2695. quat_mi2s_sck_sleep {
  2696. phandle = <0xd4>;
  2697.  
  2698. mux {
  2699. pins = "gpio0";
  2700. function = "func2";
  2701. };
  2702.  
  2703. config {
  2704. pins = "gpio0";
  2705. drive-strength = <0x02>;
  2706. bias-pull-down;
  2707. input-enable;
  2708. };
  2709. };
  2710.  
  2711. quat_mi2s_sck_active {
  2712. phandle = <0xd5>;
  2713.  
  2714. mux {
  2715. pins = "gpio0";
  2716. function = "func2";
  2717. };
  2718.  
  2719. config {
  2720. pins = "gpio0";
  2721. drive-strength = <0x08>;
  2722. bias-disable;
  2723. output-high;
  2724. };
  2725. };
  2726. };
  2727.  
  2728. quat_mi2s_ws {
  2729.  
  2730. quat_mi2s_ws_sleep {
  2731. phandle = <0xd6>;
  2732.  
  2733. mux {
  2734. pins = "gpio1";
  2735. function = "func2";
  2736. };
  2737.  
  2738. config {
  2739. pins = "gpio1";
  2740. drive-strength = <0x02>;
  2741. bias-pull-down;
  2742. input-enable;
  2743. };
  2744. };
  2745.  
  2746. quat_mi2s_ws_active {
  2747. phandle = <0xd7>;
  2748.  
  2749. mux {
  2750. pins = "gpio1";
  2751. function = "func2";
  2752. };
  2753.  
  2754. config {
  2755. pins = "gpio1";
  2756. drive-strength = <0x08>;
  2757. bias-disable;
  2758. output-high;
  2759. };
  2760. };
  2761. };
  2762.  
  2763. quat_mi2s_sd0 {
  2764.  
  2765. quat_mi2s_sd0_sleep {
  2766. phandle = <0xd8>;
  2767.  
  2768. mux {
  2769. pins = "gpio2";
  2770. function = "func2";
  2771. };
  2772.  
  2773. config {
  2774. pins = "gpio2";
  2775. drive-strength = <0x02>;
  2776. bias-pull-down;
  2777. input-enable;
  2778. };
  2779. };
  2780.  
  2781. quat_mi2s_sd0_active {
  2782. phandle = <0xd9>;
  2783.  
  2784. mux {
  2785. pins = "gpio2";
  2786. function = "func2";
  2787. };
  2788.  
  2789. config {
  2790. pins = "gpio2";
  2791. drive-strength = <0x08>;
  2792. bias-disable;
  2793. output-high;
  2794. };
  2795. };
  2796. };
  2797.  
  2798. quat_mi2s_sd1 {
  2799.  
  2800. quat_mi2s_sd1_sleep {
  2801. phandle = <0xda>;
  2802.  
  2803. mux {
  2804. pins = "gpio3";
  2805. function = "func2";
  2806. };
  2807.  
  2808. config {
  2809. pins = "gpio3";
  2810. drive-strength = <0x02>;
  2811. bias-pull-down;
  2812. input-enable;
  2813. };
  2814. };
  2815.  
  2816. quat_mi2s_sd1_active {
  2817. phandle = <0xdb>;
  2818.  
  2819. mux {
  2820. pins = "gpio3";
  2821. function = "func2";
  2822. };
  2823.  
  2824. config {
  2825. pins = "gpio3";
  2826. drive-strength = <0x08>;
  2827. bias-disable;
  2828. output-high;
  2829. };
  2830. };
  2831. };
  2832.  
  2833. quat_mi2s_sd2 {
  2834.  
  2835. quat_mi2s_sd2_sleep {
  2836. phandle = <0xdc>;
  2837.  
  2838. mux {
  2839. pins = "gpio4";
  2840. function = "func2";
  2841. };
  2842.  
  2843. config {
  2844. pins = "gpio4";
  2845. drive-strength = <0x02>;
  2846. bias-pull-down;
  2847. input-enable;
  2848. };
  2849. };
  2850.  
  2851. quat_mi2s_sd2_active {
  2852. phandle = <0xdd>;
  2853.  
  2854. mux {
  2855. pins = "gpio4";
  2856. function = "func2";
  2857. };
  2858.  
  2859. config {
  2860. pins = "gpio4";
  2861. drive-strength = <0x08>;
  2862. bias-disable;
  2863. output-high;
  2864. };
  2865. };
  2866. };
  2867.  
  2868. quat_mi2s_sd3 {
  2869.  
  2870. quat_mi2s_sd3_sleep {
  2871. phandle = <0xde>;
  2872.  
  2873. mux {
  2874. pins = "gpio5";
  2875. function = "func4";
  2876. };
  2877.  
  2878. config {
  2879. pins = "gpio5";
  2880. drive-strength = <0x02>;
  2881. bias-pull-down;
  2882. input-enable;
  2883. };
  2884. };
  2885.  
  2886. quat_mi2s_sd3_active {
  2887. phandle = <0xdf>;
  2888.  
  2889. mux {
  2890. pins = "gpio5";
  2891. function = "func4";
  2892. };
  2893.  
  2894. config {
  2895. pins = "gpio5";
  2896. drive-strength = <0x08>;
  2897. bias-disable;
  2898. output-high;
  2899. };
  2900. };
  2901. };
  2902.  
  2903. lpi_i2s1_sck {
  2904.  
  2905. lpi_i2s1_sck_sleep {
  2906. phandle = <0x90>;
  2907.  
  2908. mux {
  2909. pins = "gpio6";
  2910. function = "func2";
  2911. };
  2912.  
  2913. config {
  2914. pins = "gpio6";
  2915. drive-strength = <0x02>;
  2916. bias-pull-down;
  2917. input-enable;
  2918. };
  2919. };
  2920.  
  2921. lpi_i2s1_sck_active {
  2922. phandle = <0x8c>;
  2923.  
  2924. mux {
  2925. pins = "gpio6";
  2926. function = "func2";
  2927. };
  2928.  
  2929. config {
  2930. pins = "gpio6";
  2931. drive-strength = <0x08>;
  2932. bias-disable;
  2933. output-high;
  2934. };
  2935. };
  2936. };
  2937.  
  2938. lpi_i2s1_ws {
  2939.  
  2940. lpi_i2s1_ws_sleep {
  2941. phandle = <0x93>;
  2942.  
  2943. mux {
  2944. pins = "gpio7";
  2945. function = "func2";
  2946. };
  2947.  
  2948. config {
  2949. pins = "gpio7";
  2950. drive-strength = <0x02>;
  2951. bias-pull-down;
  2952. input-enable;
  2953. };
  2954. };
  2955.  
  2956. lpi_i2s1_ws_active {
  2957. phandle = <0x8f>;
  2958.  
  2959. mux {
  2960. pins = "gpio7";
  2961. function = "func2";
  2962. };
  2963.  
  2964. config {
  2965. pins = "gpio7";
  2966. drive-strength = <0x08>;
  2967. bias-disable;
  2968. output-high;
  2969. };
  2970. };
  2971. };
  2972.  
  2973. lpi_i2s1_sd0 {
  2974.  
  2975. lpi_i2s1_sd0_sleep {
  2976. phandle = <0x91>;
  2977.  
  2978. mux {
  2979. pins = "gpio8";
  2980. function = "func2";
  2981. };
  2982.  
  2983. config {
  2984. pins = "gpio8";
  2985. drive-strength = <0x02>;
  2986. bias-pull-down;
  2987. input-enable;
  2988. };
  2989. };
  2990.  
  2991. lpi_i2s1_sd0_active {
  2992. phandle = <0x8d>;
  2993.  
  2994. mux {
  2995. pins = "gpio8";
  2996. function = "func2";
  2997. };
  2998.  
  2999. config {
  3000. pins = "gpio8";
  3001. drive-strength = <0x08>;
  3002. bias-disable;
  3003. output-high;
  3004. };
  3005. };
  3006. };
  3007.  
  3008. lpi_i2s1_sd1 {
  3009.  
  3010. lpi_i2s1_sd1_sleep {
  3011. phandle = <0x92>;
  3012.  
  3013. mux {
  3014. pins = "gpio9";
  3015. function = "func2";
  3016. };
  3017.  
  3018. config {
  3019. pins = "gpio9";
  3020. drive-strength = <0x02>;
  3021. bias-pull-down;
  3022. input-enable;
  3023. };
  3024. };
  3025.  
  3026. lpi_i2s1_sd1_active {
  3027. phandle = <0x8e>;
  3028.  
  3029. mux {
  3030. pins = "gpio9";
  3031. function = "func2";
  3032. };
  3033.  
  3034. config {
  3035. pins = "gpio9";
  3036. drive-strength = <0x08>;
  3037. bias-disable;
  3038. output-high;
  3039. };
  3040. };
  3041. };
  3042.  
  3043. lpi_i2s2_sck {
  3044.  
  3045. lpi_i2s2_sck_sleep {
  3046. phandle = <0xe0>;
  3047.  
  3048. mux {
  3049. pins = "gpio10";
  3050. function = "func1";
  3051. };
  3052.  
  3053. config {
  3054. pins = "gpio10";
  3055. drive-strength = <0x02>;
  3056. bias-pull-down;
  3057. input-enable;
  3058. };
  3059. };
  3060.  
  3061. lpi_i2s2_sck_active {
  3062. phandle = <0xe1>;
  3063.  
  3064. mux {
  3065. pins = "gpio10";
  3066. function = "func1";
  3067. };
  3068.  
  3069. config {
  3070. pins = "gpio10";
  3071. drive-strength = <0x08>;
  3072. bias-disable;
  3073. output-high;
  3074. };
  3075. };
  3076. };
  3077.  
  3078. lpi_i2s2_ws {
  3079.  
  3080. lpi_i2s2_ws_sleep {
  3081. phandle = <0xe2>;
  3082.  
  3083. mux {
  3084. pins = "gpio11";
  3085. function = "func1";
  3086. };
  3087.  
  3088. config {
  3089. pins = "gpio11";
  3090. drive-strength = <0x02>;
  3091. bias-pull-down;
  3092. input-enable;
  3093. };
  3094. };
  3095.  
  3096. lpi_i2s2_ws_active {
  3097. phandle = <0xe3>;
  3098.  
  3099. mux {
  3100. pins = "gpio11";
  3101. function = "func1";
  3102. };
  3103.  
  3104. config {
  3105. pins = "gpio11";
  3106. drive-strength = <0x08>;
  3107. bias-disable;
  3108. output-high;
  3109. };
  3110. };
  3111. };
  3112.  
  3113. lpi_i2s2_sd0 {
  3114.  
  3115. lpi_i2s2_sd0_sleep {
  3116. phandle = <0xe4>;
  3117.  
  3118. mux {
  3119. pins = "gpio12";
  3120. function = "func2";
  3121. };
  3122.  
  3123. config {
  3124. pins = "gpio12";
  3125. drive-strength = <0x02>;
  3126. bias-pull-down;
  3127. input-enable;
  3128. };
  3129. };
  3130.  
  3131. lpi_i2s2_sd0_active {
  3132. phandle = <0xe5>;
  3133.  
  3134. mux {
  3135. pins = "gpio12";
  3136. function = "func2";
  3137. };
  3138.  
  3139. config {
  3140. pins = "gpio12";
  3141. drive-strength = <0x08>;
  3142. bias-disable;
  3143. output-high;
  3144. };
  3145. };
  3146. };
  3147.  
  3148. lpi_i2s2_sd1 {
  3149.  
  3150. lpi_i2s2_sd1_sleep {
  3151. phandle = <0xe6>;
  3152.  
  3153. mux {
  3154. pins = "gpio13";
  3155. function = "func2";
  3156. };
  3157.  
  3158. config {
  3159. pins = "gpio13";
  3160. drive-strength = <0x02>;
  3161. bias-pull-down;
  3162. input-enable;
  3163. };
  3164. };
  3165.  
  3166. lpi_i2s2_sd1_active {
  3167. phandle = <0xe7>;
  3168.  
  3169. mux {
  3170. pins = "gpio13";
  3171. function = "func2";
  3172. };
  3173.  
  3174. config {
  3175. pins = "gpio13";
  3176. drive-strength = <0x08>;
  3177. bias-disable;
  3178. output-high;
  3179. };
  3180. };
  3181. };
  3182.  
  3183. quat_tdm_sck {
  3184.  
  3185. quat_tdm_sck_sleep {
  3186. phandle = <0xe8>;
  3187.  
  3188. mux {
  3189. pins = "gpio0";
  3190. function = "func2";
  3191. };
  3192.  
  3193. config {
  3194. pins = "gpio0";
  3195. drive-strength = <0x02>;
  3196. bias-pull-down;
  3197. input-enable;
  3198. };
  3199. };
  3200.  
  3201. quat_tdm_sck_active {
  3202. phandle = <0xe9>;
  3203.  
  3204. mux {
  3205. pins = "gpio0";
  3206. function = "func2";
  3207. };
  3208.  
  3209. config {
  3210. pins = "gpio0";
  3211. drive-strength = <0x08>;
  3212. bias-disable;
  3213. output-high;
  3214. };
  3215. };
  3216. };
  3217.  
  3218. quat_tdm_ws {
  3219.  
  3220. quat_tdm_ws_sleep {
  3221. phandle = <0xea>;
  3222.  
  3223. mux {
  3224. pins = "gpio1";
  3225. function = "func2";
  3226. };
  3227.  
  3228. config {
  3229. pins = "gpio1";
  3230. drive-strength = <0x02>;
  3231. bias-pull-down;
  3232. input-enable;
  3233. };
  3234. };
  3235.  
  3236. quat_tdm_ws_active {
  3237. phandle = <0xeb>;
  3238.  
  3239. mux {
  3240. pins = "gpio1";
  3241. function = "func2";
  3242. };
  3243.  
  3244. config {
  3245. pins = "gpio1";
  3246. drive-strength = <0x08>;
  3247. bias-disable;
  3248. output-high;
  3249. };
  3250. };
  3251. };
  3252.  
  3253. quat_tdm_sd0 {
  3254.  
  3255. quat_tdm_sd0_sleep {
  3256. phandle = <0xec>;
  3257.  
  3258. mux {
  3259. pins = "gpio2";
  3260. function = "func2";
  3261. };
  3262.  
  3263. config {
  3264. pins = "gpio2";
  3265. drive-strength = <0x02>;
  3266. bias-pull-down;
  3267. input-enable;
  3268. };
  3269. };
  3270.  
  3271. quat_tdm_sd0_active {
  3272. phandle = <0xed>;
  3273.  
  3274. mux {
  3275. pins = "gpio2";
  3276. function = "func2";
  3277. };
  3278.  
  3279. config {
  3280. pins = "gpio2";
  3281. drive-strength = <0x08>;
  3282. bias-disable;
  3283. output-high;
  3284. };
  3285. };
  3286. };
  3287.  
  3288. quat_tdm_sd1 {
  3289.  
  3290. quat_tdm_sd1_sleep {
  3291. phandle = <0xee>;
  3292.  
  3293. mux {
  3294. pins = "gpio3";
  3295. function = "func2";
  3296. };
  3297.  
  3298. config {
  3299. pins = "gpio3";
  3300. drive-strength = <0x02>;
  3301. bias-pull-down;
  3302. input-enable;
  3303. };
  3304. };
  3305.  
  3306. quat_tdm_sd1_active {
  3307. phandle = <0xef>;
  3308.  
  3309. mux {
  3310. pins = "gpio3";
  3311. function = "func2";
  3312. };
  3313.  
  3314. config {
  3315. pins = "gpio3";
  3316. drive-strength = <0x08>;
  3317. bias-disable;
  3318. output-high;
  3319. };
  3320. };
  3321. };
  3322.  
  3323. quat_tdm_sd2 {
  3324.  
  3325. quat_tdm_sd2_sleep {
  3326. phandle = <0xf0>;
  3327.  
  3328. mux {
  3329. pins = "gpio4";
  3330. function = "func2";
  3331. };
  3332.  
  3333. config {
  3334. pins = "gpio4";
  3335. drive-strength = <0x02>;
  3336. bias-pull-down;
  3337. input-enable;
  3338. };
  3339. };
  3340.  
  3341. quat_tdm_sd2_active {
  3342. phandle = <0xf1>;
  3343.  
  3344. mux {
  3345. pins = "gpio4";
  3346. function = "func2";
  3347. };
  3348.  
  3349. config {
  3350. pins = "gpio4";
  3351. drive-strength = <0x08>;
  3352. bias-disable;
  3353. output-high;
  3354. };
  3355. };
  3356. };
  3357.  
  3358. quat_tdm_sd3 {
  3359.  
  3360. quat_tdm_sd3_sleep {
  3361. phandle = <0xf2>;
  3362.  
  3363. mux {
  3364. pins = "gpio5";
  3365. function = "func4";
  3366. };
  3367.  
  3368. config {
  3369. pins = "gpio5";
  3370. drive-strength = <0x02>;
  3371. bias-pull-down;
  3372. input-enable;
  3373. };
  3374. };
  3375.  
  3376. quat_tdm_sd3_active {
  3377. phandle = <0xf3>;
  3378.  
  3379. mux {
  3380. pins = "gpio5";
  3381. function = "func4";
  3382. };
  3383.  
  3384. config {
  3385. pins = "gpio5";
  3386. drive-strength = <0x08>;
  3387. bias-disable;
  3388. output-high;
  3389. };
  3390. };
  3391. };
  3392.  
  3393. lpi_tdm1_sck {
  3394.  
  3395. lpi_tdm1_sck_sleep {
  3396. phandle = <0xf4>;
  3397.  
  3398. mux {
  3399. pins = "gpio6";
  3400. function = "func2";
  3401. };
  3402.  
  3403. config {
  3404. pins = "gpio6";
  3405. drive-strength = <0x02>;
  3406. bias-pull-down;
  3407. input-enable;
  3408. };
  3409. };
  3410.  
  3411. lpi_tdm1_sck_active {
  3412. phandle = <0xf5>;
  3413.  
  3414. mux {
  3415. pins = "gpio6";
  3416. function = "func2";
  3417. };
  3418.  
  3419. config {
  3420. pins = "gpio6";
  3421. drive-strength = <0x08>;
  3422. bias-disable;
  3423. output-high;
  3424. };
  3425. };
  3426. };
  3427.  
  3428. lpi_tdm1_ws {
  3429.  
  3430. lpi_tdm1_ws_sleep {
  3431. phandle = <0xf6>;
  3432.  
  3433. mux {
  3434. pins = "gpio7";
  3435. function = "func2";
  3436. };
  3437.  
  3438. config {
  3439. pins = "gpio7";
  3440. drive-strength = <0x02>;
  3441. bias-pull-down;
  3442. input-enable;
  3443. };
  3444. };
  3445.  
  3446. lpi_tdm1_ws_active {
  3447. phandle = <0xf7>;
  3448.  
  3449. mux {
  3450. pins = "gpio7";
  3451. function = "func2";
  3452. };
  3453.  
  3454. config {
  3455. pins = "gpio7";
  3456. drive-strength = <0x08>;
  3457. bias-disable;
  3458. output-high;
  3459. };
  3460. };
  3461. };
  3462.  
  3463. lpi_tdm1_sd0 {
  3464.  
  3465. lpi_tdm1_sd0_sleep {
  3466. phandle = <0xf8>;
  3467.  
  3468. mux {
  3469. pins = "gpio8";
  3470. function = "func2";
  3471. };
  3472.  
  3473. config {
  3474. pins = "gpio8";
  3475. drive-strength = <0x02>;
  3476. bias-pull-down;
  3477. input-enable;
  3478. };
  3479. };
  3480.  
  3481. lpi_tdm1_sd0_active {
  3482. phandle = <0xf9>;
  3483.  
  3484. mux {
  3485. pins = "gpio8";
  3486. function = "func2";
  3487. };
  3488.  
  3489. config {
  3490. pins = "gpio8";
  3491. drive-strength = <0x08>;
  3492. bias-disable;
  3493. output-high;
  3494. };
  3495. };
  3496. };
  3497.  
  3498. lpi_tdm1_sd1 {
  3499.  
  3500. lpi_tdm1_sd1_sleep {
  3501. phandle = <0xfa>;
  3502.  
  3503. mux {
  3504. pins = "gpio9";
  3505. function = "func2";
  3506. };
  3507.  
  3508. config {
  3509. pins = "gpio9";
  3510. drive-strength = <0x02>;
  3511. bias-pull-down;
  3512. input-enable;
  3513. };
  3514. };
  3515.  
  3516. lpi_tdm1_sd1_active {
  3517. phandle = <0xfb>;
  3518.  
  3519. mux {
  3520. pins = "gpio9";
  3521. function = "func2";
  3522. };
  3523.  
  3524. config {
  3525. pins = "gpio9";
  3526. drive-strength = <0x08>;
  3527. bias-disable;
  3528. output-high;
  3529. };
  3530. };
  3531. };
  3532.  
  3533. lpi_tdm2_sck {
  3534.  
  3535. lpi_tdm2_sck_sleep {
  3536. phandle = <0xfc>;
  3537.  
  3538. mux {
  3539. pins = "gpio10";
  3540. function = "func1";
  3541. };
  3542.  
  3543. config {
  3544. pins = "gpio10";
  3545. drive-strength = <0x02>;
  3546. bias-pull-down;
  3547. input-enable;
  3548. };
  3549. };
  3550.  
  3551. lpi_tdm2_sck_active {
  3552. phandle = <0xfd>;
  3553.  
  3554. mux {
  3555. pins = "gpio10";
  3556. function = "func1";
  3557. };
  3558.  
  3559. config {
  3560. pins = "gpio10";
  3561. drive-strength = <0x08>;
  3562. bias-disable;
  3563. output-high;
  3564. };
  3565. };
  3566. };
  3567.  
  3568. lpi_tdm2_ws {
  3569.  
  3570. lpi_tdm2_ws_sleep {
  3571. phandle = <0xfe>;
  3572.  
  3573. mux {
  3574. pins = "gpio11";
  3575. function = "func1";
  3576. };
  3577.  
  3578. config {
  3579. pins = "gpio11";
  3580. drive-strength = <0x02>;
  3581. bias-pull-down;
  3582. input-enable;
  3583. };
  3584. };
  3585.  
  3586. lpi_tdm2_ws_active {
  3587. phandle = <0xff>;
  3588.  
  3589. mux {
  3590. pins = "gpio11";
  3591. function = "func1";
  3592. };
  3593.  
  3594. config {
  3595. pins = "gpio11";
  3596. drive-strength = <0x08>;
  3597. bias-disable;
  3598. output-high;
  3599. };
  3600. };
  3601. };
  3602.  
  3603. lpi_tdm2_sd0 {
  3604.  
  3605. lpi_tdm2_sd0_sleep {
  3606. phandle = <0x100>;
  3607.  
  3608. mux {
  3609. pins = "gpio12";
  3610. function = "func2";
  3611. };
  3612.  
  3613. config {
  3614. pins = "gpio12";
  3615. drive-strength = <0x02>;
  3616. bias-pull-down;
  3617. input-enable;
  3618. };
  3619. };
  3620.  
  3621. lpi_tdm2_sd0_active {
  3622. phandle = <0x101>;
  3623.  
  3624. mux {
  3625. pins = "gpio12";
  3626. function = "func2";
  3627. };
  3628.  
  3629. config {
  3630. pins = "gpio12";
  3631. drive-strength = <0x08>;
  3632. bias-disable;
  3633. output-high;
  3634. };
  3635. };
  3636. };
  3637.  
  3638. lpi_tdm2_sd1 {
  3639.  
  3640. lpi_tdm2_sd1_sleep {
  3641. phandle = <0x102>;
  3642.  
  3643. mux {
  3644. pins = "gpio13";
  3645. function = "func2";
  3646. };
  3647.  
  3648. config {
  3649. pins = "gpio13";
  3650. drive-strength = <0x02>;
  3651. bias-pull-down;
  3652. input-enable;
  3653. };
  3654. };
  3655.  
  3656. lpi_tdm2_sd1_active {
  3657. phandle = <0x103>;
  3658.  
  3659. mux {
  3660. pins = "gpio13";
  3661. function = "func2";
  3662. };
  3663.  
  3664. config {
  3665. pins = "gpio13";
  3666. drive-strength = <0x08>;
  3667. bias-disable;
  3668. output-high;
  3669. };
  3670. };
  3671. };
  3672.  
  3673. quat_aux_sck {
  3674.  
  3675. quat_aux_sck_sleep {
  3676. phandle = <0x104>;
  3677.  
  3678. mux {
  3679. pins = "gpio0";
  3680. function = "func2";
  3681. };
  3682.  
  3683. config {
  3684. pins = "gpio0";
  3685. drive-strength = <0x02>;
  3686. bias-pull-down;
  3687. input-enable;
  3688. };
  3689. };
  3690.  
  3691. quat_aux_sck_active {
  3692. phandle = <0x105>;
  3693.  
  3694. mux {
  3695. pins = "gpio0";
  3696. function = "func2";
  3697. };
  3698.  
  3699. config {
  3700. pins = "gpio0";
  3701. drive-strength = <0x08>;
  3702. bias-disable;
  3703. output-high;
  3704. };
  3705. };
  3706. };
  3707.  
  3708. quat_aux_ws {
  3709.  
  3710. quat_aux_ws_sleep {
  3711. phandle = <0x106>;
  3712.  
  3713. mux {
  3714. pins = "gpio1";
  3715. function = "func2";
  3716. };
  3717.  
  3718. config {
  3719. pins = "gpio1";
  3720. drive-strength = <0x02>;
  3721. bias-pull-down;
  3722. input-enable;
  3723. };
  3724. };
  3725.  
  3726. quat_aux_ws_active {
  3727. phandle = <0x107>;
  3728.  
  3729. mux {
  3730. pins = "gpio1";
  3731. function = "func2";
  3732. };
  3733.  
  3734. config {
  3735. pins = "gpio1";
  3736. drive-strength = <0x08>;
  3737. bias-disable;
  3738. output-high;
  3739. };
  3740. };
  3741. };
  3742.  
  3743. quat_aux_sd0 {
  3744.  
  3745. quat_aux_sd0_sleep {
  3746. phandle = <0x108>;
  3747.  
  3748. mux {
  3749. pins = "gpio2";
  3750. function = "func2";
  3751. };
  3752.  
  3753. config {
  3754. pins = "gpio2";
  3755. drive-strength = <0x02>;
  3756. bias-pull-down;
  3757. input-enable;
  3758. };
  3759. };
  3760.  
  3761. quat_aux_sd0_active {
  3762. phandle = <0x109>;
  3763.  
  3764. mux {
  3765. pins = "gpio2";
  3766. function = "func2";
  3767. };
  3768.  
  3769. config {
  3770. pins = "gpio2";
  3771. drive-strength = <0x08>;
  3772. bias-disable;
  3773. output-high;
  3774. };
  3775. };
  3776. };
  3777.  
  3778. quat_aux_sd1 {
  3779.  
  3780. quat_aux_sd1_sleep {
  3781. phandle = <0x10a>;
  3782.  
  3783. mux {
  3784. pins = "gpio3";
  3785. function = "func2";
  3786. };
  3787.  
  3788. config {
  3789. pins = "gpio3";
  3790. drive-strength = <0x02>;
  3791. bias-pull-down;
  3792. input-enable;
  3793. };
  3794. };
  3795.  
  3796. quat_aux_sd1_active {
  3797. phandle = <0x10b>;
  3798.  
  3799. mux {
  3800. pins = "gpio3";
  3801. function = "func2";
  3802. };
  3803.  
  3804. config {
  3805. pins = "gpio3";
  3806. drive-strength = <0x08>;
  3807. bias-disable;
  3808. output-high;
  3809. };
  3810. };
  3811. };
  3812.  
  3813. quat_aux_sd2 {
  3814.  
  3815. quat_aux_sd2_sleep {
  3816. phandle = <0x10c>;
  3817.  
  3818. mux {
  3819. pins = "gpio4";
  3820. function = "func2";
  3821. };
  3822.  
  3823. config {
  3824. pins = "gpio4";
  3825. drive-strength = <0x02>;
  3826. bias-pull-down;
  3827. input-enable;
  3828. };
  3829. };
  3830.  
  3831. quat_aux_sd2_active {
  3832. phandle = <0x10d>;
  3833.  
  3834. mux {
  3835. pins = "gpio4";
  3836. function = "func2";
  3837. };
  3838.  
  3839. config {
  3840. pins = "gpio4";
  3841. drive-strength = <0x08>;
  3842. bias-disable;
  3843. output-high;
  3844. };
  3845. };
  3846. };
  3847.  
  3848. quat_aux_sd3 {
  3849.  
  3850. quat_aux_sd3_sleep {
  3851. phandle = <0x10e>;
  3852.  
  3853. mux {
  3854. pins = "gpio5";
  3855. function = "func4";
  3856. };
  3857.  
  3858. config {
  3859. pins = "gpio5";
  3860. drive-strength = <0x02>;
  3861. bias-pull-down;
  3862. input-enable;
  3863. };
  3864. };
  3865.  
  3866. quat_aux_sd3_active {
  3867. phandle = <0x10f>;
  3868.  
  3869. mux {
  3870. pins = "gpio5";
  3871. function = "func4";
  3872. };
  3873.  
  3874. config {
  3875. pins = "gpio5";
  3876. drive-strength = <0x08>;
  3877. bias-disable;
  3878. output-high;
  3879. };
  3880. };
  3881. };
  3882.  
  3883. lpi_aux1_sck {
  3884.  
  3885. lpi_aux1_sck_sleep {
  3886. phandle = <0x110>;
  3887.  
  3888. mux {
  3889. pins = "gpio6";
  3890. function = "func2";
  3891. };
  3892.  
  3893. config {
  3894. pins = "gpio6";
  3895. drive-strength = <0x02>;
  3896. bias-pull-down;
  3897. input-enable;
  3898. };
  3899. };
  3900.  
  3901. lpi_aux1_sck_active {
  3902. phandle = <0x111>;
  3903.  
  3904. mux {
  3905. pins = "gpio6";
  3906. function = "func2";
  3907. };
  3908.  
  3909. config {
  3910. pins = "gpio6";
  3911. drive-strength = <0x08>;
  3912. bias-disable;
  3913. output-high;
  3914. };
  3915. };
  3916. };
  3917.  
  3918. lpi_aux1_ws {
  3919.  
  3920. lpi_aux1_ws_sleep {
  3921. phandle = <0x112>;
  3922.  
  3923. mux {
  3924. pins = "gpio7";
  3925. function = "func2";
  3926. };
  3927.  
  3928. config {
  3929. pins = "gpio7";
  3930. drive-strength = <0x02>;
  3931. bias-pull-down;
  3932. input-enable;
  3933. };
  3934. };
  3935.  
  3936. lpi_aux1_ws_active {
  3937. phandle = <0x113>;
  3938.  
  3939. mux {
  3940. pins = "gpio7";
  3941. function = "func2";
  3942. };
  3943.  
  3944. config {
  3945. pins = "gpio7";
  3946. drive-strength = <0x08>;
  3947. bias-disable;
  3948. output-high;
  3949. };
  3950. };
  3951. };
  3952.  
  3953. lpi_aux1_sd0 {
  3954.  
  3955. lpi_aux1_sd0_sleep {
  3956. phandle = <0x114>;
  3957.  
  3958. mux {
  3959. pins = "gpio8";
  3960. function = "func2";
  3961. };
  3962.  
  3963. config {
  3964. pins = "gpio8";
  3965. drive-strength = <0x02>;
  3966. bias-pull-down;
  3967. input-enable;
  3968. };
  3969. };
  3970.  
  3971. lpi_aux1_sd0_active {
  3972. phandle = <0x115>;
  3973.  
  3974. mux {
  3975. pins = "gpio8";
  3976. function = "func2";
  3977. };
  3978.  
  3979. config {
  3980. pins = "gpio8";
  3981. drive-strength = <0x08>;
  3982. bias-disable;
  3983. output-high;
  3984. };
  3985. };
  3986. };
  3987.  
  3988. lpi_aux1_sd1 {
  3989.  
  3990. lpi_aux1_sd1_sleep {
  3991. phandle = <0x116>;
  3992.  
  3993. mux {
  3994. pins = "gpio9";
  3995. function = "func2";
  3996. };
  3997.  
  3998. config {
  3999. pins = "gpio9";
  4000. drive-strength = <0x02>;
  4001. bias-pull-down;
  4002. input-enable;
  4003. };
  4004. };
  4005.  
  4006. lpi_aux1_sd1_active {
  4007. phandle = <0x117>;
  4008.  
  4009. mux {
  4010. pins = "gpio9";
  4011. function = "func2";
  4012. };
  4013.  
  4014. config {
  4015. pins = "gpio9";
  4016. drive-strength = <0x08>;
  4017. bias-disable;
  4018. output-high;
  4019. };
  4020. };
  4021. };
  4022.  
  4023. lpi_aux2_sck {
  4024.  
  4025. lpi_aux2_sck_sleep {
  4026. phandle = <0x118>;
  4027.  
  4028. mux {
  4029. pins = "gpio10";
  4030. function = "func1";
  4031. };
  4032.  
  4033. config {
  4034. pins = "gpio10";
  4035. drive-strength = <0x02>;
  4036. bias-pull-down;
  4037. input-enable;
  4038. };
  4039. };
  4040.  
  4041. lpi_aux2_sck_active {
  4042. phandle = <0x119>;
  4043.  
  4044. mux {
  4045. pins = "gpio10";
  4046. function = "func1";
  4047. };
  4048.  
  4049. config {
  4050. pins = "gpio10";
  4051. drive-strength = <0x08>;
  4052. bias-disable;
  4053. output-high;
  4054. };
  4055. };
  4056. };
  4057.  
  4058. lpi_aux2_ws {
  4059.  
  4060. lpi_aux2_ws_sleep {
  4061. phandle = <0x11a>;
  4062.  
  4063. mux {
  4064. pins = "gpio11";
  4065. function = "func1";
  4066. };
  4067.  
  4068. config {
  4069. pins = "gpio11";
  4070. drive-strength = <0x02>;
  4071. bias-pull-down;
  4072. input-enable;
  4073. };
  4074. };
  4075.  
  4076. lpi_aux2_ws_active {
  4077. phandle = <0x11b>;
  4078.  
  4079. mux {
  4080. pins = "gpio11";
  4081. function = "func1";
  4082. };
  4083.  
  4084. config {
  4085. pins = "gpio11";
  4086. drive-strength = <0x08>;
  4087. bias-disable;
  4088. output-high;
  4089. };
  4090. };
  4091. };
  4092.  
  4093. lpi_aux2_sd0 {
  4094.  
  4095. lpi_aux2_sd0_sleep {
  4096. phandle = <0x11c>;
  4097.  
  4098. mux {
  4099. pins = "gpio12";
  4100. function = "func2";
  4101. };
  4102.  
  4103. config {
  4104. pins = "gpio12";
  4105. drive-strength = <0x02>;
  4106. bias-pull-down;
  4107. input-enable;
  4108. };
  4109. };
  4110.  
  4111. lpi_aux2_sd0_active {
  4112. phandle = <0x11d>;
  4113.  
  4114. mux {
  4115. pins = "gpio12";
  4116. function = "func2";
  4117. };
  4118.  
  4119. config {
  4120. pins = "gpio12";
  4121. drive-strength = <0x08>;
  4122. bias-disable;
  4123. output-high;
  4124. };
  4125. };
  4126. };
  4127.  
  4128. lpi_aux2_sd1 {
  4129.  
  4130. lpi_aux2_sd1_sleep {
  4131. phandle = <0x11e>;
  4132.  
  4133. mux {
  4134. pins = "gpio13";
  4135. function = "func2";
  4136. };
  4137.  
  4138. config {
  4139. pins = "gpio13";
  4140. drive-strength = <0x02>;
  4141. bias-pull-down;
  4142. input-enable;
  4143. };
  4144. };
  4145.  
  4146. lpi_aux2_sd1_active {
  4147. phandle = <0x11f>;
  4148.  
  4149. mux {
  4150. pins = "gpio13";
  4151. function = "func2";
  4152. };
  4153.  
  4154. config {
  4155. pins = "gpio13";
  4156. drive-strength = <0x08>;
  4157. bias-disable;
  4158. output-high;
  4159. };
  4160. };
  4161. };
  4162.  
  4163. wsa_swr_clk_pin {
  4164.  
  4165. wsa_swr_clk_sleep {
  4166. phandle = <0x120>;
  4167.  
  4168. mux {
  4169. pins = "gpio10";
  4170. function = "func2";
  4171. };
  4172.  
  4173. config {
  4174. pins = "gpio10";
  4175. drive-strength = <0x02>;
  4176. input-enable;
  4177. bias-pull-down;
  4178. };
  4179. };
  4180.  
  4181. wsa_swr_clk_active {
  4182. phandle = <0x121>;
  4183.  
  4184. mux {
  4185. pins = "gpio10";
  4186. function = "func2";
  4187. };
  4188.  
  4189. config {
  4190. pins = "gpio10";
  4191. drive-strength = <0x02>;
  4192. slew-rate = <0x01>;
  4193. bias-disable;
  4194. };
  4195. };
  4196. };
  4197.  
  4198. wsa_swr_data_pin {
  4199.  
  4200. wsa_swr_data_sleep {
  4201. phandle = <0x122>;
  4202.  
  4203. mux {
  4204. pins = "gpio11";
  4205. function = "func2";
  4206. };
  4207.  
  4208. config {
  4209. pins = "gpio11";
  4210. drive-strength = <0x02>;
  4211. input-enable;
  4212. bias-pull-down;
  4213. };
  4214. };
  4215.  
  4216. wsa_swr_data_active {
  4217. phandle = <0x123>;
  4218.  
  4219. mux {
  4220. pins = "gpio11";
  4221. function = "func2";
  4222. };
  4223.  
  4224. config {
  4225. pins = "gpio11";
  4226. drive-strength = <0x02>;
  4227. slew-rate = <0x01>;
  4228. bias-bus-hold;
  4229. };
  4230. };
  4231. };
  4232.  
  4233. tx_swr_clk_sleep {
  4234. phandle = <0x124>;
  4235.  
  4236. mux {
  4237. pins = "gpio0";
  4238. function = "func1";
  4239. input-enable;
  4240. bias-pull-down;
  4241. };
  4242.  
  4243. config {
  4244. pins = "gpio0";
  4245. drive-strength = <0x02>;
  4246. };
  4247. };
  4248.  
  4249. tx_swr_clk_active {
  4250. phandle = <0x125>;
  4251.  
  4252. mux {
  4253. pins = "gpio0";
  4254. function = "func1";
  4255. };
  4256.  
  4257. config {
  4258. pins = "gpio0";
  4259. drive-strength = <0x02>;
  4260. slew-rate = <0x01>;
  4261. bias-disable;
  4262. };
  4263. };
  4264.  
  4265. tx_swr_data1_sleep {
  4266. phandle = <0x126>;
  4267.  
  4268. mux {
  4269. pins = "gpio1";
  4270. function = "func1";
  4271. };
  4272.  
  4273. config {
  4274. pins = "gpio1";
  4275. drive-strength = <0x02>;
  4276. input-enable;
  4277. bias-bus-hold;
  4278. };
  4279. };
  4280.  
  4281. tx_swr_data1_active {
  4282. phandle = <0x127>;
  4283.  
  4284. mux {
  4285. pins = "gpio1";
  4286. function = "func1";
  4287. };
  4288.  
  4289. config {
  4290. pins = "gpio1";
  4291. drive-strength = <0x02>;
  4292. slew-rate = <0x01>;
  4293. bias-bus-hold;
  4294. };
  4295. };
  4296.  
  4297. tx_swr_data2_sleep {
  4298. phandle = <0x128>;
  4299.  
  4300. mux {
  4301. pins = "gpio2";
  4302. function = "func1";
  4303. };
  4304.  
  4305. config {
  4306. pins = "gpio2";
  4307. drive-strength = <0x02>;
  4308. input-enable;
  4309. bias-pull-down;
  4310. };
  4311. };
  4312.  
  4313. tx_swr_data2_active {
  4314. phandle = <0x129>;
  4315.  
  4316. mux {
  4317. pins = "gpio2";
  4318. function = "func1";
  4319. };
  4320.  
  4321. config {
  4322. pins = "gpio2";
  4323. drive-strength = <0x02>;
  4324. slew-rate = <0x01>;
  4325. bias-bus-hold;
  4326. };
  4327. };
  4328.  
  4329. rx_swr_clk_sleep {
  4330. phandle = <0x12a>;
  4331.  
  4332. mux {
  4333. pins = "gpio3";
  4334. function = "func1";
  4335. };
  4336.  
  4337. config {
  4338. pins = "gpio3";
  4339. drive-strength = <0x02>;
  4340. input-enable;
  4341. bias-pull-down;
  4342. };
  4343. };
  4344.  
  4345. rx_swr_clk_active {
  4346. phandle = <0x12b>;
  4347.  
  4348. mux {
  4349. pins = "gpio3";
  4350. function = "func1";
  4351. };
  4352.  
  4353. config {
  4354. pins = "gpio3";
  4355. drive-strength = <0x02>;
  4356. slew-rate = <0x01>;
  4357. bias-disable;
  4358. };
  4359. };
  4360.  
  4361. rx_swr_data_sleep {
  4362. phandle = <0x12c>;
  4363.  
  4364. mux {
  4365. pins = "gpio4";
  4366. function = "func1";
  4367. };
  4368.  
  4369. config {
  4370. pins = "gpio4";
  4371. drive-strength = <0x02>;
  4372. input-enable;
  4373. bias-pull-down;
  4374. };
  4375. };
  4376.  
  4377. rx_swr_data_active {
  4378. phandle = <0x12d>;
  4379.  
  4380. mux {
  4381. pins = "gpio4";
  4382. function = "func1";
  4383. };
  4384.  
  4385. config {
  4386. pins = "gpio4";
  4387. drive-strength = <0x02>;
  4388. slew-rate = <0x01>;
  4389. bias-bus-hold;
  4390. };
  4391. };
  4392.  
  4393. rx_swr_data1_sleep {
  4394. phandle = <0x12e>;
  4395.  
  4396. mux {
  4397. pins = "gpio5";
  4398. function = "func2";
  4399. };
  4400.  
  4401. config {
  4402. pins = "gpio5";
  4403. drive-strength = <0x02>;
  4404. input-enable;
  4405. bias-pull-down;
  4406. };
  4407. };
  4408.  
  4409. rx_swr_data1_active {
  4410. phandle = <0x12f>;
  4411.  
  4412. mux {
  4413. pins = "gpio5";
  4414. function = "func2";
  4415. };
  4416.  
  4417. config {
  4418. pins = "gpio5";
  4419. drive-strength = <0x02>;
  4420. slew-rate = <0x01>;
  4421. bias-bus-hold;
  4422. };
  4423. };
  4424.  
  4425. dmic01_clk_active {
  4426. phandle = <0x130>;
  4427.  
  4428. mux {
  4429. pins = "gpio6";
  4430. function = "func1";
  4431. };
  4432.  
  4433. config {
  4434. pins = "gpio6";
  4435. drive-strength = <0x08>;
  4436. output-high;
  4437. };
  4438. };
  4439.  
  4440. dmic01_clk_sleep {
  4441. phandle = <0x131>;
  4442.  
  4443. mux {
  4444. pins = "gpio6";
  4445. function = "func1";
  4446. };
  4447.  
  4448. config {
  4449. pins = "gpio6";
  4450. drive-strength = <0x02>;
  4451. bias-disable;
  4452. output-low;
  4453. };
  4454. };
  4455.  
  4456. dmic01_data_active {
  4457. phandle = <0x132>;
  4458.  
  4459. mux {
  4460. pins = "gpio7";
  4461. function = "func1";
  4462. };
  4463.  
  4464. config {
  4465. pins = "gpio7";
  4466. drive-strength = <0x08>;
  4467. input-enable;
  4468. };
  4469. };
  4470.  
  4471. dmic01_data_sleep {
  4472. phandle = <0x133>;
  4473.  
  4474. mux {
  4475. pins = "gpio7";
  4476. function = "func1";
  4477. };
  4478.  
  4479. config {
  4480. pins = "gpio7";
  4481. drive-strength = <0x02>;
  4482. pull-down;
  4483. input-enable;
  4484. };
  4485. };
  4486.  
  4487. dmic23_clk_active {
  4488. phandle = <0x134>;
  4489.  
  4490. mux {
  4491. pins = "gpio8";
  4492. function = "func1";
  4493. };
  4494.  
  4495. config {
  4496. pins = "gpio8";
  4497. drive-strength = <0x08>;
  4498. output-high;
  4499. };
  4500. };
  4501.  
  4502. dmic23_clk_sleep {
  4503. phandle = <0x135>;
  4504.  
  4505. mux {
  4506. pins = "gpio8";
  4507. function = "func1";
  4508. };
  4509.  
  4510. config {
  4511. pins = "gpio8";
  4512. drive-strength = <0x02>;
  4513. bias-disable;
  4514. output-low;
  4515. };
  4516. };
  4517.  
  4518. dmic23_data_active {
  4519. phandle = <0x136>;
  4520.  
  4521. mux {
  4522. pins = "gpio9";
  4523. function = "func1";
  4524. };
  4525.  
  4526. config {
  4527. pins = "gpio9";
  4528. drive-strength = <0x08>;
  4529. input-enable;
  4530. };
  4531. };
  4532.  
  4533. dmic23_data_sleep {
  4534. phandle = <0x137>;
  4535.  
  4536. mux {
  4537. pins = "gpio9";
  4538. function = "func1";
  4539. };
  4540.  
  4541. config {
  4542. pins = "gpio9";
  4543. drive-strength = <0x02>;
  4544. pull-down;
  4545. input-enable;
  4546. };
  4547. };
  4548.  
  4549. dmic45_clk_active {
  4550. phandle = <0x138>;
  4551.  
  4552. mux {
  4553. pins = "gpio12";
  4554. function = "func1";
  4555. };
  4556.  
  4557. config {
  4558. pins = "gpio12";
  4559. drive-strength = <0x08>;
  4560. output-high;
  4561. };
  4562. };
  4563.  
  4564. dmic45_clk_sleep {
  4565. phandle = <0x139>;
  4566.  
  4567. mux {
  4568. pins = "gpio12";
  4569. function = "func1";
  4570. };
  4571.  
  4572. config {
  4573. pins = "gpio12";
  4574. drive-strength = <0x02>;
  4575. bias-disable;
  4576. output-low;
  4577. };
  4578. };
  4579.  
  4580. dmic45_data_active {
  4581. phandle = <0x13a>;
  4582.  
  4583. mux {
  4584. pins = "gpio13";
  4585. function = "func1";
  4586. };
  4587.  
  4588. config {
  4589. pins = "gpio13";
  4590. drive-strength = <0x08>;
  4591. input-enable;
  4592. };
  4593. };
  4594.  
  4595. dmic45_data_sleep {
  4596. phandle = <0x13b>;
  4597.  
  4598. mux {
  4599. pins = "gpio13";
  4600. function = "func1";
  4601. };
  4602.  
  4603. config {
  4604. pins = "gpio13";
  4605. drive-strength = <0x02>;
  4606. pull-down;
  4607. input-enable;
  4608. };
  4609. };
  4610. };
  4611. };
  4612. };
  4613.  
  4614. fragment@24 {
  4615. target = <0xffffffff>;
  4616.  
  4617. __overlay__ {
  4618. qcom,init-voltage = <0x1b7740>;
  4619. qcom,init-mode = <0x04>;
  4620. };
  4621. };
  4622.  
  4623. fragment@25 {
  4624. target = <0xffffffff>;
  4625.  
  4626. __overlay__ {
  4627. qcom,init-voltage = <0x2f4d60>;
  4628. qcom,init-mode = <0x04>;
  4629. };
  4630. };
  4631.  
  4632. fragment@26 {
  4633. target = <0xffffffff>;
  4634.  
  4635. __overlay__ {
  4636.  
  4637. pri_mi2s {
  4638.  
  4639. pri_mi2s_sleep {
  4640. phandle = <0x39>;
  4641.  
  4642. mux {
  4643. pins = "gpio136";
  4644. function = "gpio";
  4645. };
  4646.  
  4647. config {
  4648. pins = "gpio136";
  4649. drive-strength = <0x02>;
  4650. bias-pull-down;
  4651. input-enable;
  4652. };
  4653. };
  4654.  
  4655. pri_mi2s_active {
  4656. phandle = <0x38>;
  4657.  
  4658. mux {
  4659. pins = "gpio136";
  4660. function = "pri_mi2s";
  4661. };
  4662.  
  4663. config {
  4664. pins = "gpio136";
  4665. drive-strength = <0x02>;
  4666. bias-disable;
  4667. output-high;
  4668. };
  4669. };
  4670. };
  4671.  
  4672. cm7120_speaker_en_pins {
  4673.  
  4674. cm7120_speaker_en_default {
  4675. phandle = <0x40>;
  4676.  
  4677. mux {
  4678. pins = "gpio146";
  4679. function = "gpio";
  4680. };
  4681.  
  4682. config {
  4683. pins = "gpio146";
  4684. drive-strength = <0x02>;
  4685. output-high;
  4686. bias-pull-up;
  4687. };
  4688. };
  4689.  
  4690. cm7120_speaker_en_suspend {
  4691. phandle = <0x41>;
  4692.  
  4693. mux {
  4694. pins = "gpio146";
  4695. function = "gpio";
  4696. };
  4697.  
  4698. config {
  4699. pins = "gpio146";
  4700. drive-strength = <0x02>;
  4701. output-low;
  4702. bias-pull-down;
  4703. };
  4704. };
  4705. };
  4706.  
  4707. cm7120_codec_ldo_en_pins {
  4708.  
  4709. cm7120_codec_ldo_en_default {
  4710. phandle = <0x3b>;
  4711.  
  4712. mux {
  4713. pins = "gpio147";
  4714. function = "gpio";
  4715. };
  4716.  
  4717. config {
  4718. pins = "gpio147";
  4719. drive-strength = <0x02>;
  4720. output-high;
  4721. bias-pull-up;
  4722. };
  4723. };
  4724.  
  4725. cm7120_ldo_en_suspend {
  4726. phandle = <0x3e>;
  4727.  
  4728. mux {
  4729. pins = "gpio147";
  4730. function = "gpio";
  4731. };
  4732.  
  4733. config {
  4734. pins = "gpio147";
  4735. drive-strength = <0x02>;
  4736. output-low;
  4737. bias-pull-down;
  4738. };
  4739. };
  4740. };
  4741.  
  4742. cm7120_codec_reset_pins {
  4743.  
  4744. cm7120_codec_reset_default {
  4745. phandle = <0x3c>;
  4746.  
  4747. mux {
  4748. pins = "gpio148";
  4749. function = "gpio";
  4750. };
  4751.  
  4752. config {
  4753. pins = "gpio148";
  4754. drive-strength = <0x10>;
  4755. output-high;
  4756. bias-no-pull;
  4757. };
  4758. };
  4759.  
  4760. cm7120_reset_suspend {
  4761. phandle = <0x3f>;
  4762.  
  4763. mux {
  4764. pins = "gpio148";
  4765. function = "gpio";
  4766. };
  4767.  
  4768. config {
  4769. pins = "gpio148";
  4770. drive-strength = <0x02>;
  4771. output-low;
  4772. bias-pull-down;
  4773. };
  4774. };
  4775. };
  4776. };
  4777. };
  4778.  
  4779. fragment@27 {
  4780. target = <0xffffffff>;
  4781.  
  4782. __overlay__ {
  4783.  
  4784. va_core_clk {
  4785. status = "ok";
  4786. compatible = "qcom,audio-ref-clk";
  4787. qcom,codec-ext-clk-src = <0x02>;
  4788. qcom,codec-lpass-ext-clk-freq = <0x124f800>;
  4789. qcom,codec-lpass-clk-id = <0x300>;
  4790. qcom,use-pinctrl = <0x01>;
  4791. pinctrl-names = "active\0sleep";
  4792. pinctrl-0 = <0x38>;
  4793. pinctrl-1 = <0x39>;
  4794. #clock-cells = <0x01>;
  4795. phandle = <0x3a>;
  4796. };
  4797.  
  4798. qcom,msm-pcm-dsp-noirq {
  4799. qcom,latency-level = "ull-pp";
  4800. phandle = <0x44>;
  4801. };
  4802. };
  4803. };
  4804.  
  4805. fragment@28 {
  4806. target = <0xffffffff>;
  4807.  
  4808. __overlay__ {
  4809. status = "okay";
  4810.  
  4811. cm7120-spi@0 {
  4812. status = "okay";
  4813. compatible = "C-Media,cm7120-spi";
  4814. reg = <0x00>;
  4815. spi-max-frequency = <0x16e3600>;
  4816. };
  4817. };
  4818. };
  4819.  
  4820. fragment@29 {
  4821. target = <0xffffffff>;
  4822.  
  4823. __overlay__ {
  4824. status = "ok";
  4825.  
  4826. cm7120@2d {
  4827. status = "ok";
  4828. compatible = "C-Media,cm7120";
  4829. reg = <0x2d>;
  4830. clock-names = "cm7120_mclk";
  4831. clocks = <0x3a 0x00>;
  4832. cm7120,codec_1v8-supply = <0xffffffff>;
  4833. cm7120,codec_3v3-supply = <0xffffffff>;
  4834. cm7120,firmware-name = "CM7120_TDM_I2S.bin";
  4835. qcom,use-pinctrl = <0x01>;
  4836. pinctrl-names = "active\0suspend\0spk_en\0spk_suspend";
  4837. pinctrl-0 = <0x3b 0x3c 0x3d>;
  4838. pinctrl-1 = <0x3e 0x3f>;
  4839. pinctrl-2 = <0x40>;
  4840. pinctrl-3 = <0x41>;
  4841. cm7120,headphone-det-gpios = <0xffffffff 0x79 0x00 0xffffffff 0x71 0x00>;
  4842. phandle = <0x42>;
  4843. };
  4844. };
  4845. };
  4846.  
  4847. fragment@30 {
  4848. target = <0xffffffff>;
  4849.  
  4850. __overlay__ {
  4851. qcom,msm-mi2s-rx-lines = <0x01>;
  4852. qcom,msm-mi2s-tx-lines = <0x02>;
  4853. };
  4854. };
  4855.  
  4856. fragment@31 {
  4857. target = <0xffffffff>;
  4858.  
  4859. __overlay__ {
  4860. status = "ok";
  4861.  
  4862. cm7120_snd {
  4863. status = "ok";
  4864. compatible = "qcom,kona-asoc-snd";
  4865. qcom,model = "kona-cm7120-tdm_i2s-snd-card";
  4866. qcom,msm-mi2s-master = <0x01 0x01 0x01 0x01 0x00 0x01>;
  4867. qcom,afe-rxtx-lb = <0x00>;
  4868. qcom,auxpcm-audio-intf = <0x01>;
  4869. qcom,ext-disp-audio-rx = <0x01>;
  4870. qcom,mi2s-audio-intf = <0x01>;
  4871. qcom,wcn-bt = <0x00>;
  4872. qcom,msm_audio_ssr_devs = <0xffffffff 0xffffffff>;
  4873. qcom,audio-routing = "AIF4 VI\0MCLK\0MADINPUT\0MCLK\0LDO_RXTX\0MCLK";
  4874. asoc-codec = <0xffffffff 0x42 0x43>;
  4875. asoc-codec-names = "msm-stub-codec.1\0cm7120_codec\0msm-ext-disp-audio-codec-rx";
  4876. asoc-platform = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x44>;
  4877. asoc-platform-names = "msm-pcm-dsp.0\0msm-pcm-dsp.1\0msm-pcm-dsp.2\0msm-voip-dsp\0msm-pcm-voice\0msm-pcm-loopback\0msm-compress-dsp\0msm-pcm-hostless\0msm-pcm-afe\0msm-lsm-client\0msm-pcm-routing\0msm-compr-dsp\0msm-pcm-dsp-noirq";
  4878. asoc-cpu = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  4879. asoc-cpu-names = "msm-dai-q6-dp.0\0msm-dai-q6-dp.1\0msm-dai-q6-mi2s.0\0msm-dai-q6-mi2s.1\0msm-dai-q6-mi2s.2\0msm-dai-q6-mi2s.3\0msm-dai-q6-mi2s.4\0msm-dai-q6-mi2s.5\0msm-dai-q6-auxpcm.1\0msm-dai-q6-auxpcm.2\0msm-dai-q6-auxpcm.3\0msm-dai-q6-auxpcm.4\0msm-dai-q6-auxpcm.5\0msm-dai-q6-auxpcm.6\0msm-dai-q6-dev.224\0msm-dai-q6-dev.225\0msm-dai-q6-dev.241\0msm-dai-q6-dev.240\0msm-dai-q6-dev.32771\0msm-dai-q6-dev.32772\0msm-dai-q6-dev.32773\0msm-dai-q6-dev.32770\0msm-dai-q6-dev.28672\0msm-dai-q6-dev.28673\0msm-dai-q6-dev.16398\0msm-dai-q6-dev.16399\0msm-dai-q6-tdm.36864\0msm-dai-q6-tdm.36865\0msm-dai-q6-tdm.36880\0msm-dai-q6-tdm.36881\0msm-dai-q6-tdm.36896\0msm-dai-q6-tdm.36897\0msm-dai-q6-tdm.36912\0msm-dai-q6-tdm.36913\0msm-dai-q6-tdm.36928\0msm-dai-q6-tdm.36929\0msm-dai-q6-tdm.36944\0msm-dai-q6-tdm.36945\0msm-dai-q6-dev.24577";
  4880. qcom,pri-mi2s-gpios = <0x45>;
  4881. qcom,quin-mi2s-gpios = <0x46>;
  4882. qcom,tdm-audio-intf = <0x01>;
  4883. qcom,tdm-max-slots = <0x04>;
  4884. phandle = <0x13c>;
  4885. };
  4886.  
  4887. pri_mi2s_gpios {
  4888. compatible = "qcom,msm-cdc-pinctrl";
  4889. pinctrl-names = "aud_active\0aud_sleep";
  4890. pinctrl-0 = <0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  4891. pinctrl-1 = <0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  4892. phandle = <0x45>;
  4893. };
  4894. };
  4895. };
  4896.  
  4897. fragment@32 {
  4898. target = <0xffffffff>;
  4899.  
  4900. __overlay__ {
  4901.  
  4902. config {
  4903. drive-strength = <0x06>;
  4904. };
  4905. };
  4906. };
  4907.  
  4908. fragment@33 {
  4909. target = <0xffffffff>;
  4910.  
  4911. __overlay__ {
  4912.  
  4913. config {
  4914. drive-strength = <0x06>;
  4915. };
  4916. };
  4917. };
  4918.  
  4919. fragment@34 {
  4920. target = <0xffffffff>;
  4921.  
  4922. __overlay__ {
  4923. regulator-min-microvolt = <0x100590>;
  4924. regulator-max-microvolt = <0x100590>;
  4925. qcom,init-voltage = <0x100590>;
  4926. qcom,init-mode = <0x04>;
  4927. };
  4928. };
  4929.  
  4930. fragment@35 {
  4931. target = <0xffffffff>;
  4932.  
  4933. __overlay__ {
  4934. qcom,init-voltage = <0x124f80>;
  4935. qcom,init-mode = <0x04>;
  4936. };
  4937. };
  4938.  
  4939. fragment@36 {
  4940. target = <0xffffffff>;
  4941.  
  4942. __overlay__ {
  4943. regulator-min-microvolt = <0x2d2a80>;
  4944. regulator-max-microvolt = <0x2d2a80>;
  4945. qcom,init-voltage = <0x2d2a80>;
  4946. qcom,init-mode = <0x04>;
  4947. };
  4948. };
  4949.  
  4950. fragment@37 {
  4951. target = <0xffffffff>;
  4952.  
  4953. __overlay__ {
  4954. qcom,init-voltage = <0x2d2a80>;
  4955. qcom,init-mode = <0x04>;
  4956. };
  4957. };
  4958.  
  4959. fragment@38 {
  4960. target = <0xffffffff>;
  4961.  
  4962. __overlay__ {
  4963. regulator-always-on;
  4964. regulator-min-microvolt = <0x2625a0>;
  4965. regulator-max-microvolt = <0x2625a0>;
  4966. qcom,init-voltage = <0x2625a0>;
  4967. qcom,init-mode = <0x04>;
  4968. };
  4969. };
  4970.  
  4971. fragment@39 {
  4972. target = <0xffffffff>;
  4973.  
  4974. __overlay__ {
  4975. qcom,init-mode = <0x04>;
  4976. };
  4977. };
  4978.  
  4979. fragment@40 {
  4980. target = <0xffffffff>;
  4981.  
  4982. __overlay__ {
  4983.  
  4984. qcom,cam-cdm-intf {
  4985. cdm-client-names = "vfe\0vife\0jpegdma\0jpegenc";
  4986. };
  4987.  
  4988. qcom,cam-res-mgr {
  4989. compatible = "qcom,cam-res-mgr";
  4990. status = "ok";
  4991. };
  4992. };
  4993. };
  4994.  
  4995. fragment@41 {
  4996. target = <0xffffffff>;
  4997.  
  4998. __overlay__ {
  4999.  
  5000. qcom,cam-sensor0 {
  5001. cell-index = <0x00>;
  5002. compatible = "qcom,cam-sensor";
  5003. csiphy-sd-index = <0x01>;
  5004. cam_avdd-supply = <0xffffffff>;
  5005. cam_dovdd-supply = <0xffffffff>;
  5006. cam_dvdd-supply = <0xffffffff>;
  5007. cam_clk-supply = <0xffffffff>;
  5008. regulator-names = "cam_avdd\0cam_dovdd\0cam_dvdd\0cam_clk";
  5009. rgltr-cntrl-support;
  5010. pwm-switch;
  5011. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x124f80 0x00>;
  5012. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x124f80 0x00>;
  5013. rgltr-load-current = <0x13880 0x1d4c0 0x124f80 0x00>;
  5014. gpio-no-mux = <0x00>;
  5015. pinctrl-names = "cam_default\0cam_suspend";
  5016. pinctrl-0 = <0xffffffff>;
  5017. pinctrl-1 = <0xffffffff>;
  5018. gpios = <0xffffffff 0x5f 0x00>;
  5019. gpio-req-tbl-num = <0x00>;
  5020. gpio-req-tbl-flags = <0x01>;
  5021. gpio-req-tbl-label = "CAMIF_MCLK1";
  5022. sensor-mode = <0x00>;
  5023. cci-master = <0x01>;
  5024. clocks = <0xffffffff 0x4b>;
  5025. clock-names = "cam_clk";
  5026. clock-cntl-level = "turbo";
  5027. clock-rates = <0x124f800>;
  5028. oculus,cam-mclk-no-power-down;
  5029. };
  5030.  
  5031. qcom,cam-sensor1 {
  5032. cell-index = <0x01>;
  5033. compatible = "qcom,cam-sensor";
  5034. csiphy-sd-index = <0x02>;
  5035. cam_avdd-supply = <0xffffffff>;
  5036. cam_dovdd-supply = <0xffffffff>;
  5037. cam_dvdd-supply = <0xffffffff>;
  5038. cam_clk-supply = <0xffffffff>;
  5039. regulator-names = "cam_avdd\0cam_dovdd\0cam_dvdd\0cam_clk";
  5040. rgltr-cntrl-support;
  5041. pwm-switch;
  5042. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x124f80 0x00>;
  5043. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x124f80 0x00>;
  5044. rgltr-load-current = <0x13880 0x1d4c0 0x124f80 0x00>;
  5045. gpio-no-mux = <0x00>;
  5046. pinctrl-names = "cam_default\0cam_suspend";
  5047. pinctrl-0 = <0xffffffff>;
  5048. pinctrl-1 = <0xffffffff>;
  5049. gpios = <0xffffffff 0x60 0x00>;
  5050. gpio-req-tbl-num = <0x00>;
  5051. gpio-req-tbl-flags = <0x01>;
  5052. gpio-req-tbl-label = "CAMIF_MCLK2";
  5053. sensor-mode = <0x00>;
  5054. cci-master = <0x01>;
  5055. clocks = <0xffffffff 0x4d>;
  5056. clock-names = "cam_clk";
  5057. clock-cntl-level = "turbo";
  5058. clock-rates = <0x124f800>;
  5059. oculus,cam-mclk-no-power-down;
  5060. };
  5061.  
  5062. qcom,cam-sensor2 {
  5063. cell-index = <0x02>;
  5064. compatible = "qcom,cam-sensor";
  5065. csiphy-sd-index = <0x03>;
  5066. cam_avdd-supply = <0xffffffff>;
  5067. cam_dovdd-supply = <0xffffffff>;
  5068. cam_clk-supply = <0xffffffff>;
  5069. regulator-names = "cam_avdd\0cam_dovdd\0cam_clk";
  5070. rgltr-cntrl-support;
  5071. pwm-switch;
  5072. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x00>;
  5073. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x00>;
  5074. rgltr-load-current = <0x13880 0x1d4c0 0x00>;
  5075. gpio-no-mux = <0x00>;
  5076. pinctrl-names = "cam_default\0cam_suspend";
  5077. pinctrl-0 = <0xffffffff>;
  5078. pinctrl-1 = <0xffffffff>;
  5079. gpios = <0xffffffff 0x61 0x00>;
  5080. gpio-req-tbl-num = <0x00>;
  5081. gpio-req-tbl-flags = <0x01>;
  5082. gpio-req-tbl-label = "CAMIF_MCLK3";
  5083. sensor-mode = <0x00>;
  5084. cci-master = <0x01>;
  5085. clocks = <0xffffffff 0x4f>;
  5086. clock-names = "cam_clk";
  5087. clock-cntl-level = "turbo";
  5088. clock-rates = <0x124f800>;
  5089. oculus,cam-mclk-no-power-down;
  5090. };
  5091.  
  5092. qcom,cam-sensor3 {
  5093. cell-index = <0x03>;
  5094. compatible = "qcom,cam-sensor";
  5095. csiphy-sd-index = <0x04>;
  5096. cam_avdd-supply = <0xffffffff>;
  5097. cam_dovdd-supply = <0xffffffff>;
  5098. cam_clk-supply = <0xffffffff>;
  5099. regulator-names = "cam_avdd\0cam_dovdd\0cam_clk";
  5100. rgltr-cntrl-support;
  5101. pwm-switch;
  5102. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x00>;
  5103. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x00>;
  5104. rgltr-load-current = <0x13880 0x1d4c0 0x00>;
  5105. gpio-no-mux = <0x00>;
  5106. pinctrl-names = "cam_default\0cam_suspend";
  5107. pinctrl-0 = <0xffffffff>;
  5108. pinctrl-1 = <0xffffffff>;
  5109. gpios = <0xffffffff 0x63 0x00>;
  5110. gpio-req-tbl-num = <0x00>;
  5111. gpio-req-tbl-flags = <0x01>;
  5112. gpio-req-tbl-label = "CAMIF_MCLK5";
  5113. sensor-mode = <0x00>;
  5114. cci-master = <0x01>;
  5115. clocks = <0xffffffff 0x53>;
  5116. clock-names = "cam_clk";
  5117. clock-cntl-level = "turbo";
  5118. clock-rates = <0x124f800>;
  5119. oculus,cam-mclk-no-power-down;
  5120. };
  5121.  
  5122. qcom,cam-sensor4 {
  5123. cell-index = <0x04>;
  5124. compatible = "qcom,cam-sensor";
  5125. csiphy-sd-index = <0x00>;
  5126. cam_avdd-supply = <0xffffffff>;
  5127. cam_dovdd-supply = <0xffffffff>;
  5128. cam_dvdd-supply = <0xffffffff>;
  5129. cam_clk-supply = <0xffffffff>;
  5130. regulator-names = "cam_avdd\0cam_dovdd\0cam_dvdd\0cam_clk";
  5131. rgltr-cntrl-support;
  5132. pwm-switch;
  5133. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x100590 0x00>;
  5134. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x100590 0x00>;
  5135. rgltr-load-current = <0x13880 0x1d4c0 0x100590 0x00>;
  5136. gpio-no-mux = <0x00>;
  5137. pinctrl-names = "cam_default\0cam_suspend";
  5138. pinctrl-0 = <0xffffffff>;
  5139. pinctrl-1 = <0xffffffff>;
  5140. gpios = <0xffffffff 0x5e 0x00>;
  5141. gpio-req-tbl-num = <0x00>;
  5142. gpio-req-tbl-flags = <0x01>;
  5143. gpio-req-tbl-label = "CAMIF_MCLK0";
  5144. sensor-mode = <0x00>;
  5145. cci-master = <0x01>;
  5146. clocks = <0xffffffff 0x49>;
  5147. clock-names = "cam_clk";
  5148. clock-cntl-level = "turbo";
  5149. clock-rates = <0x124f800>;
  5150. oculus,cam-mclk-no-power-down;
  5151. };
  5152.  
  5153. qcom,cam-sensor5 {
  5154. cell-index = <0x05>;
  5155. compatible = "qcom,cam-sensor";
  5156. csiphy-sd-index = <0x05>;
  5157. cam_avdd-supply = <0xffffffff>;
  5158. cam_dovdd-supply = <0xffffffff>;
  5159. cam_clk-supply = <0xffffffff>;
  5160. regulator-names = "cam_avdd\0cam_dovdd\0cam_clk";
  5161. rgltr-cntrl-support;
  5162. pwm-switch;
  5163. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x00>;
  5164. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x00>;
  5165. rgltr-load-current = <0x13880 0x1d4c0 0x00>;
  5166. gpio-no-mux = <0x00>;
  5167. pinctrl-names = "cam_default\0cam_suspend";
  5168. pinctrl-0 = <0xffffffff>;
  5169. pinctrl-1 = <0xffffffff>;
  5170. gpios = <0xffffffff 0x64 0x00>;
  5171. gpio-req-tbl-num = <0x00>;
  5172. gpio-req-tbl-flags = <0x01>;
  5173. gpio-req-tbl-label = "CAMIF_MCLK6";
  5174. sensor-mode = <0x00>;
  5175. cci-master = <0x01>;
  5176. clocks = <0xffffffff 0x55>;
  5177. clock-names = "cam_clk";
  5178. clock-cntl-level = "turbo";
  5179. clock-rates = <0x124f800>;
  5180. oculus,cam-mclk-no-power-down;
  5181. };
  5182. };
  5183. };
  5184.  
  5185. fragment@42 {
  5186. target = <0xffffffff>;
  5187.  
  5188. __overlay__ {
  5189.  
  5190. fan_tach_default@0 {
  5191. phandle = <0x4b>;
  5192.  
  5193. mux {
  5194. pins = "gpio71";
  5195. function = "gpio";
  5196. };
  5197.  
  5198. config {
  5199. pins = "gpio71";
  5200. drive-strength = <0x04>;
  5201. input-enable;
  5202. };
  5203. };
  5204.  
  5205. fan_tach_default@1 {
  5206. phandle = <0x4d>;
  5207.  
  5208. mux {
  5209. pins = "gpio72";
  5210. function = "gpio";
  5211. };
  5212.  
  5213. config {
  5214. pins = "gpio72";
  5215. drive-strength = <0x04>;
  5216. input-enable;
  5217. };
  5218. };
  5219. };
  5220. };
  5221.  
  5222. fragment@43 {
  5223. target = <0xffffffff>;
  5224.  
  5225. __overlay__ {
  5226.  
  5227. qcom,pm8150l@5 {
  5228.  
  5229. pwm-tach-fan@0 {
  5230. reg = <0x00>;
  5231. compatible = "pwm-tach-fan";
  5232. fan,tach-gpio = <0xffffffff 0x47 0x00>;
  5233. interrupt-parent = <0xffffffff>;
  5234. interrupts = <0x0d 0x01>;
  5235. interrupt-names = "fan_irq";
  5236. panel = <0x47 0x26 0x48>;
  5237. pwms = <0x49 0x00 0x9c40>;
  5238. pinctrl-names = "default";
  5239. pinctrl-0 = <0x4a 0x4b>;
  5240. status = "okay";
  5241. max-rpm = <0x960>;
  5242. #cooling-cells = <0x02>;
  5243. cooling-levels = <0x00 0x190 0x320 0x4b0 0x640 0x7d0 0x960>;
  5244. phandle = <0x4f>;
  5245. };
  5246.  
  5247. pwm-tach-fan@1 {
  5248. reg = <0x01>;
  5249. compatible = "pwm-tach-fan";
  5250. fan,tach-gpio = <0xffffffff 0x48 0x00>;
  5251. interrupt-parent = <0xffffffff>;
  5252. interrupts = <0x0d 0x01>;
  5253. interrupt-names = "fan_irq";
  5254. panel = <0x47 0x26 0x48>;
  5255. pwms = <0x49 0x01 0x9c40>;
  5256. pinctrl-names = "default";
  5257. pinctrl-0 = <0x4c 0x4d>;
  5258. status = "okay";
  5259. max-rpm = <0x960>;
  5260. #cooling-cells = <0x02>;
  5261. cooling-levels = <0x00 0x190 0x320 0x4b0 0x640 0x7d0 0x960>;
  5262. phandle = <0x51>;
  5263. };
  5264. };
  5265. };
  5266. };
  5267.  
  5268. fragment@44 {
  5269. target = <0xffffffff>;
  5270.  
  5271. __overlay__ {
  5272.  
  5273. batt-fan {
  5274. polling-delay-passive = <0x00>;
  5275. polling-delay = <0x00>;
  5276. thermal-sensors = <0x37 0x4a>;
  5277. thermal-governor = "step_wise";
  5278. wake-capable-sensor;
  5279.  
  5280. trips {
  5281.  
  5282. batt_fan_trip0 {
  5283. temperature = <0x190>;
  5284. hysteresis = <0x14>;
  5285. type = "active";
  5286. phandle = <0x4e>;
  5287. };
  5288.  
  5289. batt_fan_trip1 {
  5290. temperature = <0x1e0>;
  5291. hysteresis = <0x14>;
  5292. type = "active";
  5293. phandle = <0x50>;
  5294. };
  5295. };
  5296.  
  5297. cooling-maps {
  5298.  
  5299. batt_fan_0_map0 {
  5300. trip = <0x4e>;
  5301. cooling-device = <0x4f 0x00 0x03>;
  5302. phandle = <0x13d>;
  5303. };
  5304.  
  5305. batt_fan_0_map1 {
  5306. trip = <0x50>;
  5307. cooling-device = <0x4f 0x03 0x06>;
  5308. phandle = <0x13e>;
  5309. };
  5310.  
  5311. batt_fan_1_map0 {
  5312. trip = <0x4e>;
  5313. cooling-device = <0x51 0x00 0x03>;
  5314. phandle = <0x13f>;
  5315. };
  5316.  
  5317. batt_fan_1_map1 {
  5318. trip = <0x50>;
  5319. cooling-device = <0x51 0x03 0x06>;
  5320. phandle = <0x140>;
  5321. };
  5322. };
  5323. };
  5324.  
  5325. cpu-0-0-fan {
  5326. polling-delay-passive = <0x00>;
  5327. polling-delay = <0x00>;
  5328. thermal-sensors = <0xffffffff 0x01>;
  5329. thermal-governor = "step_wise";
  5330. wake-capable-sensor;
  5331.  
  5332. trips {
  5333.  
  5334. cpu_0_0_fan_trip0 {
  5335. temperature = <0xafc8>;
  5336. hysteresis = <0x3e8>;
  5337. type = "active";
  5338. phandle = <0x52>;
  5339. };
  5340.  
  5341. cpu_0_0_fan_trip1 {
  5342. temperature = <0x14c08>;
  5343. hysteresis = <0x3e8>;
  5344. type = "active";
  5345. phandle = <0x53>;
  5346. };
  5347. };
  5348.  
  5349. cooling-maps {
  5350.  
  5351. cpu_0_0_fan_map0 {
  5352. trip = <0x52>;
  5353. cooling-device = <0x4f 0x00 0x03>;
  5354. phandle = <0x141>;
  5355. };
  5356.  
  5357. cpu_0_0_fan_map1 {
  5358. trip = <0x53>;
  5359. cooling-device = <0x4f 0x03 0x06>;
  5360. phandle = <0x142>;
  5361. };
  5362.  
  5363. cpu_0_0_fan_1_map0 {
  5364. trip = <0x52>;
  5365. cooling-device = <0x51 0x00 0x03>;
  5366. phandle = <0x143>;
  5367. };
  5368.  
  5369. cpu_0_0_fan_1_map1 {
  5370. trip = <0x53>;
  5371. cooling-device = <0x51 0x03 0x06>;
  5372. phandle = <0x144>;
  5373. };
  5374. };
  5375. };
  5376.  
  5377. cpu-0-1-fan {
  5378. polling-delay-passive = <0x00>;
  5379. polling-delay = <0x00>;
  5380. thermal-sensors = <0xffffffff 0x02>;
  5381. thermal-governor = "step_wise";
  5382. wake-capable-sensor;
  5383.  
  5384. trips {
  5385.  
  5386. cpu_0_1_fan_trip0 {
  5387. temperature = <0xafc8>;
  5388. hysteresis = <0x3e8>;
  5389. type = "active";
  5390. phandle = <0x54>;
  5391. };
  5392.  
  5393. cpu_0_1_fan_trip1 {
  5394. temperature = <0x14c08>;
  5395. hysteresis = <0x3e8>;
  5396. type = "active";
  5397. phandle = <0x55>;
  5398. };
  5399. };
  5400.  
  5401. cooling-maps {
  5402.  
  5403. cpu_0_1_fan_map0 {
  5404. trip = <0x54>;
  5405. cooling-device = <0x4f 0x00 0x03>;
  5406. phandle = <0x145>;
  5407. };
  5408.  
  5409. cpu_0_1_fan_map1 {
  5410. trip = <0x55>;
  5411. cooling-device = <0x4f 0x03 0x06>;
  5412. phandle = <0x146>;
  5413. };
  5414.  
  5415. cpu_0_1_fan_1_map0 {
  5416. trip = <0x54>;
  5417. cooling-device = <0x51 0x00 0x03>;
  5418. phandle = <0x147>;
  5419. };
  5420.  
  5421. cpu_0_1_fan_1_map1 {
  5422. trip = <0x55>;
  5423. cooling-device = <0x51 0x03 0x06>;
  5424. phandle = <0x148>;
  5425. };
  5426. };
  5427. };
  5428.  
  5429. cpu-0-2-fan {
  5430. polling-delay-passive = <0x00>;
  5431. polling-delay = <0x00>;
  5432. thermal-sensors = <0xffffffff 0x03>;
  5433. thermal-governor = "step_wise";
  5434. wake-capable-sensor;
  5435.  
  5436. trips {
  5437.  
  5438. cpu_0_2_fan_trip0 {
  5439. temperature = <0xafc8>;
  5440. hysteresis = <0x3e8>;
  5441. type = "active";
  5442. phandle = <0x56>;
  5443. };
  5444.  
  5445. cpu_0_2_fan_trip1 {
  5446. temperature = <0x14c08>;
  5447. hysteresis = <0x3e8>;
  5448. type = "active";
  5449. phandle = <0x57>;
  5450. };
  5451. };
  5452.  
  5453. cooling-maps {
  5454.  
  5455. cpu_0_2_fan_map0 {
  5456. trip = <0x56>;
  5457. cooling-device = <0x4f 0x00 0x03>;
  5458. phandle = <0x149>;
  5459. };
  5460.  
  5461. cpu_0_2_fan_map1 {
  5462. trip = <0x57>;
  5463. cooling-device = <0x4f 0x03 0x06>;
  5464. phandle = <0x14a>;
  5465. };
  5466.  
  5467. cpu_0_2_fan_1_map0 {
  5468. trip = <0x56>;
  5469. cooling-device = <0x51 0x00 0x03>;
  5470. phandle = <0x14b>;
  5471. };
  5472.  
  5473. cpu_0_2_fan_1_map1 {
  5474. trip = <0x57>;
  5475. cooling-device = <0x51 0x03 0x06>;
  5476. phandle = <0x14c>;
  5477. };
  5478. };
  5479. };
  5480.  
  5481. cpu-0-3-fan {
  5482. polling-delay-passive = <0x00>;
  5483. polling-delay = <0x00>;
  5484. thermal-sensors = <0xffffffff 0x04>;
  5485. thermal-governor = "step_wise";
  5486. wake-capable-sensor;
  5487.  
  5488. trips {
  5489.  
  5490. cpu_0_3_fan_trip0 {
  5491. temperature = <0xafc8>;
  5492. hysteresis = <0x3e8>;
  5493. type = "active";
  5494. phandle = <0x58>;
  5495. };
  5496.  
  5497. cpu_0_3_fan_trip1 {
  5498. temperature = <0x14c08>;
  5499. hysteresis = <0x3e8>;
  5500. type = "active";
  5501. phandle = <0x59>;
  5502. };
  5503. };
  5504.  
  5505. cooling-maps {
  5506.  
  5507. cpu_0_3_fan_map0 {
  5508. trip = <0x58>;
  5509. cooling-device = <0x4f 0x00 0x03>;
  5510. phandle = <0x14d>;
  5511. };
  5512.  
  5513. cpu_0_3_fan_map1 {
  5514. trip = <0x59>;
  5515. cooling-device = <0x4f 0x03 0x06>;
  5516. phandle = <0x14e>;
  5517. };
  5518.  
  5519. cpu_0_3_fan_1_map0 {
  5520. trip = <0x58>;
  5521. cooling-device = <0x51 0x00 0x03>;
  5522. phandle = <0x14f>;
  5523. };
  5524.  
  5525. cpu_0_3_fan_1_map1 {
  5526. trip = <0x59>;
  5527. cooling-device = <0x51 0x03 0x06>;
  5528. phandle = <0x150>;
  5529. };
  5530. };
  5531. };
  5532.  
  5533. cpu-1-0-fan {
  5534. polling-delay-passive = <0x00>;
  5535. polling-delay = <0x00>;
  5536. thermal-sensors = <0xffffffff 0x07>;
  5537. thermal-governor = "step_wise";
  5538. wake-capable-sensor;
  5539.  
  5540. trips {
  5541.  
  5542. cpu_1_0_fan_trip0 {
  5543. temperature = <0xafc8>;
  5544. hysteresis = <0x3e8>;
  5545. type = "active";
  5546. phandle = <0x5a>;
  5547. };
  5548.  
  5549. cpu_1_0_fan_trip1 {
  5550. temperature = <0x14c08>;
  5551. hysteresis = <0x3e8>;
  5552. type = "active";
  5553. phandle = <0x5b>;
  5554. };
  5555. };
  5556.  
  5557. cooling-maps {
  5558.  
  5559. cpu_1_0_fan_0_map0 {
  5560. trip = <0x5a>;
  5561. cooling-device = <0x4f 0x00 0x03>;
  5562. phandle = <0x151>;
  5563. };
  5564.  
  5565. cpu_1_0_fan_0_map1 {
  5566. trip = <0x5b>;
  5567. cooling-device = <0x4f 0x03 0x06>;
  5568. phandle = <0x152>;
  5569. };
  5570.  
  5571. cpu_1_0_fan_1_map0 {
  5572. trip = <0x5a>;
  5573. cooling-device = <0x4f 0x00 0x03>;
  5574. phandle = <0x153>;
  5575. };
  5576.  
  5577. cpu_1_0_fan_map1 {
  5578. trip = <0x5b>;
  5579. cooling-device = <0x4f 0x03 0x06>;
  5580. phandle = <0x154>;
  5581. };
  5582. };
  5583. };
  5584.  
  5585. cpu-1-1-fan {
  5586. polling-delay-passive = <0x00>;
  5587. polling-delay = <0x00>;
  5588. thermal-sensors = <0xffffffff 0x08>;
  5589. thermal-governor = "step_wise";
  5590. wake-capable-sensor;
  5591.  
  5592. trips {
  5593.  
  5594. cpu_1_1_fan_trip0 {
  5595. temperature = <0xafc8>;
  5596. hysteresis = <0x3e8>;
  5597. type = "active";
  5598. phandle = <0x5c>;
  5599. };
  5600.  
  5601. cpu_1_1_fan_trip1 {
  5602. temperature = <0x14c08>;
  5603. hysteresis = <0x3e8>;
  5604. type = "active";
  5605. phandle = <0x5d>;
  5606. };
  5607. };
  5608.  
  5609. cooling-maps {
  5610.  
  5611. cpu_1_1_fan_0_map0 {
  5612. trip = <0x5c>;
  5613. cooling-device = <0x4f 0x00 0x03>;
  5614. phandle = <0x155>;
  5615. };
  5616.  
  5617. cpu_1_1_fan_0_map1 {
  5618. trip = <0x5d>;
  5619. cooling-device = <0x4f 0x03 0x06>;
  5620. phandle = <0x156>;
  5621. };
  5622.  
  5623. cpu_1_1_fan_1_map0 {
  5624. trip = <0x5c>;
  5625. cooling-device = <0x4f 0x00 0x03>;
  5626. phandle = <0x157>;
  5627. };
  5628.  
  5629. cpu_1_1_fan_map1 {
  5630. trip = <0x5d>;
  5631. cooling-device = <0x4f 0x03 0x06>;
  5632. phandle = <0x158>;
  5633. };
  5634. };
  5635. };
  5636.  
  5637. cpu-1-2-fan {
  5638. polling-delay-passive = <0x00>;
  5639. polling-delay = <0x00>;
  5640. thermal-sensors = <0xffffffff 0x09>;
  5641. thermal-governor = "step_wise";
  5642. wake-capable-sensor;
  5643.  
  5644. trips {
  5645.  
  5646. cpu_1_2_fan_trip0 {
  5647. temperature = <0xafc8>;
  5648. hysteresis = <0x3e8>;
  5649. type = "active";
  5650. phandle = <0x5e>;
  5651. };
  5652.  
  5653. cpu_1_2_fan_trip1 {
  5654. temperature = <0x14c08>;
  5655. hysteresis = <0x3e8>;
  5656. type = "active";
  5657. phandle = <0x5f>;
  5658. };
  5659. };
  5660.  
  5661. cooling-maps {
  5662.  
  5663. cpu_1_2_fan_0_map0 {
  5664. trip = <0x5e>;
  5665. cooling-device = <0x4f 0x00 0x03>;
  5666. phandle = <0x159>;
  5667. };
  5668.  
  5669. cpu_1_2_fan_0_map1 {
  5670. trip = <0x5f>;
  5671. cooling-device = <0x4f 0x03 0x06>;
  5672. phandle = <0x15a>;
  5673. };
  5674.  
  5675. cpu_1_2_fan_1_map0 {
  5676. trip = <0x5e>;
  5677. cooling-device = <0x4f 0x00 0x03>;
  5678. phandle = <0x15b>;
  5679. };
  5680.  
  5681. cpu_1_2_fan_map1 {
  5682. trip = <0x5f>;
  5683. cooling-device = <0x4f 0x03 0x06>;
  5684. phandle = <0x15c>;
  5685. };
  5686. };
  5687. };
  5688.  
  5689. cpu-1-3-fan {
  5690. polling-delay-passive = <0x00>;
  5691. polling-delay = <0x00>;
  5692. thermal-sensors = <0xffffffff 0x0a>;
  5693. thermal-governor = "step_wise";
  5694. wake-capable-sensor;
  5695.  
  5696. trips {
  5697.  
  5698. cpu_1_3_fan_trip0 {
  5699. temperature = <0xafc8>;
  5700. hysteresis = <0x3e8>;
  5701. type = "active";
  5702. phandle = <0x60>;
  5703. };
  5704.  
  5705. cpu_1_3_fan_trip1 {
  5706. temperature = <0x14c08>;
  5707. hysteresis = <0x3e8>;
  5708. type = "active";
  5709. phandle = <0x61>;
  5710. };
  5711. };
  5712.  
  5713. cooling-maps {
  5714.  
  5715. cpu_1_3_fan_0_map0 {
  5716. trip = <0x60>;
  5717. cooling-device = <0x4f 0x00 0x03>;
  5718. phandle = <0x15d>;
  5719. };
  5720.  
  5721. cpu_1_3_fan_0_map1 {
  5722. trip = <0x61>;
  5723. cooling-device = <0x4f 0x03 0x06>;
  5724. phandle = <0x15e>;
  5725. };
  5726.  
  5727. cpu_1_3_fan_1_map0 {
  5728. trip = <0x60>;
  5729. cooling-device = <0x4f 0x00 0x03>;
  5730. phandle = <0x15f>;
  5731. };
  5732.  
  5733. cpu_1_3_fan_1_map1 {
  5734. trip = <0x61>;
  5735. cooling-device = <0x4f 0x03 0x06>;
  5736. phandle = <0x160>;
  5737. };
  5738. };
  5739. };
  5740.  
  5741. cpu-1-4-fan {
  5742. polling-delay-passive = <0x00>;
  5743. polling-delay = <0x00>;
  5744. thermal-sensors = <0xffffffff 0x0b>;
  5745. thermal-governor = "step_wise";
  5746. wake-capable-sensor;
  5747.  
  5748. trips {
  5749.  
  5750. cpu_1_4_fan_trip0 {
  5751. temperature = <0xafc8>;
  5752. hysteresis = <0x3e8>;
  5753. type = "active";
  5754. phandle = <0x62>;
  5755. };
  5756.  
  5757. cpu_1_4_fan_trip1 {
  5758. temperature = <0x14c08>;
  5759. hysteresis = <0x3e8>;
  5760. type = "active";
  5761. phandle = <0x63>;
  5762. };
  5763. };
  5764.  
  5765. cooling-maps {
  5766.  
  5767. cpu_1_4_fan_0_map0 {
  5768. trip = <0x62>;
  5769. cooling-device = <0x4f 0x00 0x03>;
  5770. phandle = <0x161>;
  5771. };
  5772.  
  5773. cpu_1_4_fan_0_map1 {
  5774. trip = <0x63>;
  5775. cooling-device = <0x4f 0x03 0x06>;
  5776. phandle = <0x162>;
  5777. };
  5778.  
  5779. cpu_1_4_fan_1_map0 {
  5780. trip = <0x62>;
  5781. cooling-device = <0x4f 0x00 0x03>;
  5782. phandle = <0x163>;
  5783. };
  5784.  
  5785. cpu_1_4_fan_1_map1 {
  5786. trip = <0x63>;
  5787. cooling-device = <0x4f 0x03 0x06>;
  5788. phandle = <0x164>;
  5789. };
  5790. };
  5791. };
  5792.  
  5793. cpu-1-5-fan {
  5794. polling-delay-passive = <0x00>;
  5795. polling-delay = <0x00>;
  5796. thermal-sensors = <0xffffffff 0x0c>;
  5797. thermal-governor = "step_wise";
  5798. wake-capable-sensor;
  5799.  
  5800. trips {
  5801.  
  5802. cpu_1_5_fan_trip0 {
  5803. temperature = <0xafc8>;
  5804. hysteresis = <0x3e8>;
  5805. type = "active";
  5806. phandle = <0x64>;
  5807. };
  5808.  
  5809. cpu_1_5_fan_trip1 {
  5810. temperature = <0x14c08>;
  5811. hysteresis = <0x3e8>;
  5812. type = "active";
  5813. phandle = <0x65>;
  5814. };
  5815. };
  5816.  
  5817. cooling-maps {
  5818.  
  5819. cpu_1_5_fan_0_map0 {
  5820. trip = <0x64>;
  5821. cooling-device = <0x4f 0x00 0x03>;
  5822. phandle = <0x165>;
  5823. };
  5824.  
  5825. cpu_1_5_fan_0_map1 {
  5826. trip = <0x65>;
  5827. cooling-device = <0x4f 0x03 0x06>;
  5828. phandle = <0x166>;
  5829. };
  5830.  
  5831. cpu_1_5_fan_1_map0 {
  5832. trip = <0x64>;
  5833. cooling-device = <0x4f 0x00 0x03>;
  5834. phandle = <0x167>;
  5835. };
  5836.  
  5837. cpu_1_5_fan_1_map1 {
  5838. trip = <0x65>;
  5839. cooling-device = <0x4f 0x03 0x06>;
  5840. phandle = <0x168>;
  5841. };
  5842. };
  5843. };
  5844.  
  5845. cpu-1-6-fan {
  5846. polling-delay-passive = <0x00>;
  5847. polling-delay = <0x00>;
  5848. thermal-sensors = <0xffffffff 0x0d>;
  5849. thermal-governor = "step_wise";
  5850. wake-capable-sensor;
  5851.  
  5852. trips {
  5853.  
  5854. cpu_1_6_fan_trip0 {
  5855. temperature = <0xafc8>;
  5856. hysteresis = <0x3e8>;
  5857. type = "active";
  5858. phandle = <0x66>;
  5859. };
  5860.  
  5861. cpu_1_6_fan_trip1 {
  5862. temperature = <0x14c08>;
  5863. hysteresis = <0x3e8>;
  5864. type = "active";
  5865. phandle = <0x67>;
  5866. };
  5867. };
  5868.  
  5869. cooling-maps {
  5870.  
  5871. cpu_1_6_fan_0_map0 {
  5872. trip = <0x66>;
  5873. cooling-device = <0x4f 0x00 0x03>;
  5874. phandle = <0x169>;
  5875. };
  5876.  
  5877. cpu_1_6_fan_0_map1 {
  5878. trip = <0x67>;
  5879. cooling-device = <0x4f 0x03 0x06>;
  5880. phandle = <0x16a>;
  5881. };
  5882.  
  5883. cpu_1_6_fan_1_map0 {
  5884. trip = <0x66>;
  5885. cooling-device = <0x4f 0x00 0x03>;
  5886. phandle = <0x16b>;
  5887. };
  5888.  
  5889. cpu_1_6_fan_1_map1 {
  5890. trip = <0x67>;
  5891. cooling-device = <0x4f 0x03 0x06>;
  5892. phandle = <0x16c>;
  5893. };
  5894. };
  5895. };
  5896.  
  5897. cpu-1-7-fan {
  5898. polling-delay-passive = <0x00>;
  5899. polling-delay = <0x00>;
  5900. thermal-sensors = <0xffffffff 0x0e>;
  5901. thermal-governor = "step_wise";
  5902. wake-capable-sensor;
  5903.  
  5904. trips {
  5905.  
  5906. cpu_1_7_fan_trip0 {
  5907. temperature = <0xafc8>;
  5908. hysteresis = <0x3e8>;
  5909. type = "active";
  5910. phandle = <0x68>;
  5911. };
  5912.  
  5913. cpu_1_7_fan_trip1 {
  5914. temperature = <0x14c08>;
  5915. hysteresis = <0x3e8>;
  5916. type = "active";
  5917. phandle = <0x69>;
  5918. };
  5919. };
  5920.  
  5921. cooling-maps {
  5922.  
  5923. cpu_1_7_fan_0_map0 {
  5924. trip = <0x68>;
  5925. cooling-device = <0x4f 0x00 0x03>;
  5926. phandle = <0x16d>;
  5927. };
  5928.  
  5929. cpu_1_7_fan_0_map1 {
  5930. trip = <0x69>;
  5931. cooling-device = <0x4f 0x03 0x06>;
  5932. phandle = <0x16e>;
  5933. };
  5934.  
  5935. cpu_1_7_fan_1_map0 {
  5936. trip = <0x68>;
  5937. cooling-device = <0x4f 0x00 0x03>;
  5938. phandle = <0x16f>;
  5939. };
  5940.  
  5941. cpu_1_7_fan_1_map1 {
  5942. trip = <0x69>;
  5943. cooling-device = <0x4f 0x03 0x06>;
  5944. phandle = <0x170>;
  5945. };
  5946. };
  5947. };
  5948.  
  5949. cpuss-0-fan {
  5950. polling-delay-passive = <0x00>;
  5951. polling-delay = <0x00>;
  5952. thermal-sensors = <0xffffffff 0x05>;
  5953. thermal-governor = "step_wise";
  5954. wake-capable-sensor;
  5955.  
  5956. trips {
  5957.  
  5958. cpuss_0_fan_trip0 {
  5959. temperature = <0xafc8>;
  5960. hysteresis = <0x3e8>;
  5961. type = "active";
  5962. phandle = <0x6a>;
  5963. };
  5964.  
  5965. cpuss_0_fan_trip1 {
  5966. temperature = <0x14c08>;
  5967. hysteresis = <0x3e8>;
  5968. type = "active";
  5969. phandle = <0x6b>;
  5970. };
  5971. };
  5972.  
  5973. cooling-maps {
  5974.  
  5975. cpuss_0_fan_0_map0 {
  5976. trip = <0x6a>;
  5977. cooling-device = <0x4f 0x00 0x03>;
  5978. phandle = <0x171>;
  5979. };
  5980.  
  5981. cpuss_0_fan_0_map1 {
  5982. trip = <0x6b>;
  5983. cooling-device = <0x4f 0x03 0x06>;
  5984. phandle = <0x172>;
  5985. };
  5986.  
  5987. cpuss_0_fan_1_map0 {
  5988. trip = <0x6a>;
  5989. cooling-device = <0x51 0x00 0x03>;
  5990. phandle = <0x173>;
  5991. };
  5992.  
  5993. cpuss_0_fan_1_map1 {
  5994. trip = <0x6b>;
  5995. cooling-device = <0x51 0x03 0x06>;
  5996. phandle = <0x174>;
  5997. };
  5998. };
  5999. };
  6000.  
  6001. cpuss-1-fan {
  6002. polling-delay-passive = <0x00>;
  6003. polling-delay = <0x00>;
  6004. thermal-sensors = <0xffffffff 0x06>;
  6005. thermal-governor = "step_wise";
  6006. wake-capable-sensor;
  6007.  
  6008. trips {
  6009.  
  6010. cpuss_1_fan_trip0 {
  6011. temperature = <0xafc8>;
  6012. hysteresis = <0x3e8>;
  6013. type = "active";
  6014. phandle = <0x6c>;
  6015. };
  6016.  
  6017. cpuss_1_fan_trip1 {
  6018. temperature = <0x14c08>;
  6019. hysteresis = <0x3e8>;
  6020. type = "active";
  6021. phandle = <0x6d>;
  6022. };
  6023. };
  6024.  
  6025. cooling-maps {
  6026.  
  6027. cpuss_1_fan_0_map0 {
  6028. trip = <0x6c>;
  6029. cooling-device = <0x4f 0x00 0x03>;
  6030. phandle = <0x175>;
  6031. };
  6032.  
  6033. cpuss_1_fan_0_map1 {
  6034. trip = <0x6d>;
  6035. cooling-device = <0x4f 0x03 0x06>;
  6036. phandle = <0x176>;
  6037. };
  6038.  
  6039. cpuss_1_fan_1_map0 {
  6040. trip = <0x6c>;
  6041. cooling-device = <0x51 0x00 0x03>;
  6042. phandle = <0x177>;
  6043. };
  6044.  
  6045. cpuss_1_fan_1_map1 {
  6046. trip = <0x6d>;
  6047. cooling-device = <0x51 0x03 0x06>;
  6048. phandle = <0x178>;
  6049. };
  6050. };
  6051. };
  6052.  
  6053. gpuss-0-fan {
  6054. polling-delay-passive = <0x00>;
  6055. polling-delay = <0x00>;
  6056. thermal-sensors = <0xffffffff 0x0f>;
  6057. thermal-governor = "step_wise";
  6058. wake-capable-sensor;
  6059.  
  6060. trips {
  6061.  
  6062. gpuss_0_fan_trip0 {
  6063. temperature = <0xafc8>;
  6064. hysteresis = <0x3e8>;
  6065. type = "active";
  6066. phandle = <0x6e>;
  6067. };
  6068.  
  6069. gpuss_0_fan_trip1 {
  6070. temperature = <0x14c08>;
  6071. hysteresis = <0x3e8>;
  6072. type = "active";
  6073. phandle = <0x6f>;
  6074. };
  6075. };
  6076.  
  6077. cooling-maps {
  6078.  
  6079. gpuss_0_fan_0_map0 {
  6080. trip = <0x6e>;
  6081. cooling-device = <0x4f 0x00 0x03>;
  6082. phandle = <0x179>;
  6083. };
  6084.  
  6085. gpuss_0_fan_0_map1 {
  6086. trip = <0x6f>;
  6087. cooling-device = <0x4f 0x03 0x06>;
  6088. phandle = <0x17a>;
  6089. };
  6090.  
  6091. gpuss_0_fan_1_map0 {
  6092. trip = <0x6e>;
  6093. cooling-device = <0x51 0x00 0x03>;
  6094. phandle = <0x17b>;
  6095. };
  6096.  
  6097. gpuss_0_fan_1_map1 {
  6098. trip = <0x6f>;
  6099. cooling-device = <0x51 0x03 0x06>;
  6100. phandle = <0x17c>;
  6101. };
  6102. };
  6103. };
  6104.  
  6105. gpuss-1-fan {
  6106. polling-delay-passive = <0x00>;
  6107. polling-delay = <0x00>;
  6108. thermal-sensors = <0xffffffff 0x08>;
  6109. thermal-governor = "step_wise";
  6110. wake-capable-sensor;
  6111.  
  6112. trips {
  6113.  
  6114. gpuss_1_fan_trip0 {
  6115. temperature = <0xafc8>;
  6116. hysteresis = <0x3e8>;
  6117. type = "active";
  6118. phandle = <0x70>;
  6119. };
  6120.  
  6121. gpuss_1_fan_trip1 {
  6122. temperature = <0x14c08>;
  6123. hysteresis = <0x3e8>;
  6124. type = "active";
  6125. phandle = <0x71>;
  6126. };
  6127. };
  6128.  
  6129. cooling-maps {
  6130.  
  6131. gpuss_1_fan_0_map0 {
  6132. trip = <0x70>;
  6133. cooling-device = <0x4f 0x00 0x03>;
  6134. phandle = <0x17d>;
  6135. };
  6136.  
  6137. gpuss_1_fan_0_map1 {
  6138. trip = <0x71>;
  6139. cooling-device = <0x4f 0x03 0x06>;
  6140. phandle = <0x17e>;
  6141. };
  6142.  
  6143. gpuss_1_fan_1_map0 {
  6144. trip = <0x70>;
  6145. cooling-device = <0x51 0x00 0x03>;
  6146. phandle = <0x17f>;
  6147. };
  6148.  
  6149. gpuss_1_fan_1_map1 {
  6150. trip = <0x71>;
  6151. cooling-device = <0x51 0x03 0x06>;
  6152. phandle = <0x180>;
  6153. };
  6154. };
  6155. };
  6156. };
  6157. };
  6158.  
  6159. fragment@45 {
  6160. target = <0xffffffff>;
  6161.  
  6162. __overlay__ {
  6163.  
  6164. projector_clk_pin {
  6165. phandle = <0x72>;
  6166.  
  6167. mux {
  6168. pins = "gpio108";
  6169. function = "gcc_gp3";
  6170. };
  6171.  
  6172. config {
  6173. pins = "gpio108";
  6174. drive-strength = <0x02>;
  6175. bias-disable;
  6176. };
  6177. };
  6178. };
  6179. };
  6180.  
  6181. fragment@46 {
  6182. target = <0xffffffff>;
  6183.  
  6184. __overlay__ {
  6185.  
  6186. oculus,nautilus_clk {
  6187. status = "ok";
  6188. compatible = "oculus,nautilus_clk";
  6189. pinctrl-names = "nautilus-mclk";
  6190. pinctrl-0 = <0x72>;
  6191. clocks = <0xffffffff 0x20>;
  6192. clock-names = "nautilus-clock";
  6193. phandle = <0x181>;
  6194. };
  6195. };
  6196. };
  6197.  
  6198. fragment@47 {
  6199. target = <0xffffffff>;
  6200.  
  6201. __overlay__ {
  6202.  
  6203. qcom,mdss_dsi_dual_boe_lcd_dsc_video {
  6204. qcom,mdss-dsi-panel-name = "BOE dual video mode dsi panel with dsc";
  6205. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  6206. qcom,dsi-ctrl-num = <0x00 0x01>;
  6207. qcom,dsi-phy-num = <0x00 0x01>;
  6208. qcom,mdss-dsi-bpp = <0x18>;
  6209. com,mdss-dsi-virtual-channel-id = <0x00>;
  6210. qcom,mdss-dsi-stream = <0x00>;
  6211. qcom,mdss-dsi-border-color = <0x00>;
  6212. qcom,mdss-dsi-traffic-mode = "burst_mode";
  6213. qcom,mdss-dsi-bllp-eof-power-mode;
  6214. qcom,mdss-dsi-bllp-power-mode;
  6215. qcom,mdss-dsi-lane-0-state;
  6216. qcom,mdss-dsi-lane-1-state;
  6217. qcom,mdss-dsi-lane-2-state;
  6218. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  6219. qcom,mdss-dsi-mdp-trigger = "none";
  6220. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  6221. qcom,adjust-timer-wakeup-ms = <0x01>;
  6222. qcom,mdss-dsi-lp11-init;
  6223. qcom,mdss-dsi-tx-eot-append;
  6224. qcom,cmd-sync-wait-broadcast;
  6225. qcom,panel-cphy-mode;
  6226. qcom,dsi-supported-dfps-list = <0x5a 0x59 0x58 0x57 0x56 0x55 0x54 0x53 0x52 0x51 0x50 0x4f 0x4e 0x4d 0x4c 0x4b 0x4a 0x49 0x48 0x47 0x46 0x45 0x44 0x43 0x42 0x41 0x40 0x3f 0x3e 0x3d 0x3c>;
  6227. qcom,mdss-dsi-pan-enable-dynamic-fps;
  6228. qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
  6229. qcom,mdss-dsi-min-refresh-rate = <0x3c>;
  6230. qcom,mdss-dsi-max-refresh-rate = <0x5a>;
  6231. qcom,panel-supply-entries = <0x73>;
  6232. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_jdi";
  6233. qcom,mdss-dsi-bl-min-level = <0x320>;
  6234. qcom,mdss-dsi-bl-max-level = <0x4b0>;
  6235. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  6236. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  6237. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  6238. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  6239. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  6240. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  6241. phandle = <0x26>;
  6242.  
  6243. qcom,mdss-dsi-display-timings {
  6244.  
  6245. timing@0 {
  6246. qcom,mdss-dsi-panel-width = <0x720>;
  6247. qcom,mdss-dsi-panel-height = <0x780>;
  6248. qcom,mdss-dsi-h-front-porch = <0x20>;
  6249. qcom,mdss-dsi-h-back-porch = <0x14>;
  6250. qcom,mdss-dsi-h-pulse-width = <0x14>;
  6251. qcom,mdss-dsi-h-sync-skew = <0x00>;
  6252. qcom,mdss-dsi-v-front-porch = <0x6c4>;
  6253. qcom,mdss-dsi-v-back-porch = <0x0e>;
  6254. qcom,mdss-dsi-v-pulse-width = <0x01>;
  6255. qcom,mdss-dsi-h-sync-pulse = <0x00>;
  6256. qcom,mdss-dsi-panel-framerate = <0x5a>;
  6257. qcom,mdss-dsi-bpp = <0x18>;
  6258. qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 b0 04 29 01 00 00 00 00 02 b1 00 29 01 00 00 00 00 08 b2 00 00 00 00 00 01 00 29 01 00 00 00 00 02 b3 00 29 01 00 00 00 00 04 b4 00 00 0a 29 01 00 00 00 00 17 b5 00 00 00 00 00 00 00 03 02 26 66 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a b6 20 6b 80 06 33 92 00 1a 7a 29 01 00 00 00 00 05 b7 54 00 00 00 29 01 00 00 00 00 94 b8 18 58 22 00 01 29 01 18 20 3e ff 8f f0 20 00 5c 1b 07 3a 38 f8 08 20 00 40 00 1b 1b 0a 0a 1b 1b 0a 2c 0a 00 28 18 08 30 08 00 20 20 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 ff 00 00 00 00 03 00 0b 2e 16 25 2e 81 5e 75 94 a5 d6 ce fa d8 ff ed d0 18 57 ff 02 00 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 ff 00 00 00 00 03 71 4c 92 71 4c 92 11 41 44 11 41 44 88 28 22 dd 7d 77 88 78 77 22 d2 dd 06 00 01 05 01 00 00 03 10 00 00 00 00 29 01 00 00 00 00 06 ba 08 07 80 07 00 29 01 00 00 00 00 13 bb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0c bc 20 00 00 00 00 00 00 00 00 ff ff 29 01 00 00 00 00 03 bd 00 00 29 01 00 00 00 00 24 be 00 00 00 00 00 00 69 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 00 29 01 00 00 00 00 4d bf 02 3c 34 55 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 12 c0 43 43 14 00 07 80 00 08 00 00 08 3b 00 00 14 00 08 29 01 00 00 00 00 19 c1 30 00 00 10 11 00 00 00 22 00 00 05 20 fa 00 08 00 00 00 00 00 00 00 00 29 01 00 00 00 00 6d c2 01 3d 81 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3d 02 02 01 01 c1 00 05 00 01 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3d 02 02 01 01 00 07 96 07 99 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 55 c3 00 00 01 00 10 00 0a 00 00 00 80 00 00 00 01 00 01 00 02 00 00 00 80 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7b c4 00 00 00 a3 a3 a3 8e a1 a2 8d 9f 93 92 9c 9a 9b 9a 9b 00 00 00 00 00 00 00 00 9b 9a 9b 9a 9c 92 93 9f 8d a2 a1 8e a3 a3 a3 00 00 00 ff ff ff ff ff 0f df ff ff ff bf 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 00 00 00 00 00 29 01 00 00 00 00 06 c5 08 00 00 00 00 29 01 00 00 00 00 38 c6 0b 08 07 48 00 00 13 01 ff 00 02 06 16 16 00 00 00 01 40 0c 00 00 00 00 00 00 00 40 00 00 08 07 60 02 1c 7f 07 00 00 00 00 00 00 00 00 18 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 4d c7 00 00 00 71 01 22 01 9e 01 17 01 a2 02 19 01 6e 01 8f 01 b6 02 1b 01 90 01 e8 02 72 02 00 02 cd 03 5a 03 9d 03 a4 00 00 00 71 01 22 01 9e 01 17 01 a2 02 19 01 6e 01 8f 01 b6 02 1b 01 90 01 e8 02 72 02 00 02 cd 03 5a 03 9d 03 a4 29 01 00 00 00 00 32 c8 80 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 29 01 00 00 00 00 13 c9 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 00 ff 00 29 01 00 00 00 00 09 cb 00 f0 00 00 01 00 ff 00 29 01 00 00 00 00 02 cd 00 29 01 00 00 00 00 44 ce 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 cf 8b 00 80 46 61 00 8b 29 01 00 00 00 00 11 d0 f1 32 03 94 c7 04 b1 32 03 00 a4 c7 0a f2 55 05 29 01 00 00 00 00 27 d1 cb cb 33 33 07 03 3b 77 37 77 37 35 33 33 f7 33 03 03 03 36 36 66 6d 0d 0a 30 13 0a 0b 00 c4 c4 28 28 28 28 00 00 29 01 00 00 00 00 02 d2 00 29 01 00 00 00 00 04 d4 00 00 00 29 01 00 00 00 00 06 e5 03 00 00 00 00 29 01 00 00 00 00 07 d5 02 bf 02 36 02 00 29 01 00 00 00 00 02 d6 00 29 01 00 00 00 00 79 d7 01 32 01 38 c0 12 12 7a 00 08 0a 00 07 50 00 0c 0c 0c 0c 10 00 02 0c 0e 02 05 04 07 02 00 02 05 03 00 00 00 04 07 05 06 06 05 05 08 0a 0c 0a 0a 0a 0c 0a 06 08 07 09 08 0a 09 0b 00 00 00 00 00 00 00 0a 0a 0a 08 08 0a 0a 0a 3c 3c 3c 0a 08 08 08 08 04 04 08 08 08 04 04 08 08 08 08 00 00 00 02 02 05 04 07 02 00 02 05 03 04 07 05 00 00 00 00 00 02 02 02 02 00 00 29 01 00 00 00 00 0f d8 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 29 01 00 00 00 00 0f d9 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 39 01 00 00 00 00 02 da 02 39 01 00 00 00 00 02 db 00 39 01 00 00 00 00 02 dc 00 29 01 00 00 00 00 05 dd 32 06 18 52 29 01 00 00 00 00 19 de 00 00 0f ff 10 20 20 10 b4 b4 03 e4 ff ff ff 7f 20 10 08 01 00 00 00 00 29 01 00 00 00 00 02 df 00 29 01 00 00 00 00 09 e0 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 09 e1 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 0d e2 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 e3 ff 29 01 00 00 00 00 81 e6 11 00 00 89 30 80 07 80 07 20 00 08 01 c8 01 c8 02 00 01 e4 00 20 00 ac 00 06 00 0c 0d b7 0f 0e 18 00 10 f0 03 0c 20 00 06 0b 0b 33 0e 1c 2a 38 46 54 62 69 70 77 79 7b 7d 7e 01 02 01 00 09 40 09 be 19 fc 19 fa 19 f8 1a 38 1a 78 1a b6 2a f6 2b 34 2b 74 3b 74 6b f4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0b e7 50 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 03 e8 09 28 29 01 00 00 00 00 0d e9 04 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a ea 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 49 eb 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 29 01 00 00 00 00 06 ec 02 a0 00 00 00 29 01 00 00 00 00 14 ed 04 02 ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7c ee 0c 00 00 0c 00 13 01 00 00 00 00 00 00 0c 00 33 01 00 0d 00 13 01 00 0d 00 33 01 00 0d 00 33 01 00 0c 00 03 00 00 0c 00 13 11 00 0d 00 13 01 00 0c 00 11 01 00 0c 00 11 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30 00 00 00 11 01 00 00 00 00 00 00 00 30 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0c 00 13 01 00 02 29 01 00 00 00 00 4a ef 03 21 38 00 17 17 00 00 01 1e 36 00 03 03 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 33 00 00 00 05 02 00 01 00 01 0a 0a 00 00 00 03 11 00 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 71 00 29 01 00 00 00 00 02 72 00 29 01 00 00 00 00 02 73 00 29 01 00 00 00 00 02 74 00 29 01 00 00 00 00 02 75 00 29 01 00 00 00 00 02 76 00 29 01 00 00 00 00 02 77 00 29 01 00 00 00 00 02 78 00 29 01 00 00 00 00 02 79 00 29 01 00 00 00 00 02 7a 00 29 01 00 00 00 00 02 7b 00 29 01 00 00 00 00 02 7c 00 29 01 00 00 00 00 02 7d 00 29 01 00 00 00 00 02 7e 00 29 01 00 00 00 00 12 a1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 29 01 00 00 00 00 04 f0 00 00 00 29 01 00 00 00 00 02 f1 00 29 01 00 00 00 00 06 f2 00 00 00 00 00 29 01 00 00 00 00 0c f3 48 08 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 1a f4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 02 f5 00 29 01 00 00 00 00 1f fa 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0b fb 00 00 00 00 00 ff ff ff ff ff 29 01 00 00 00 00 24 fc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 fd 00 00 00 00 00 00 00 29 01 00 00 00 00 0b fe 00 00 00 60 00 00 01 08 00 00 39 01 00 00 00 00 02 03 01 05 01 00 00 78 00 01 11 05 01 00 00 78 00 01 29];
  6259. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  6260. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  6261. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  6262. qcom,mdss-dsi-jdi-brightness-commands = <0x29010000 0x11b9 0x1386022b 0x00 0x5dc00c8 0x00>;
  6263. qcom,compression-mode = "dsc";
  6264. qcom,mdss-dsc-slice-height = <0x08>;
  6265. qcom,mdss-dsc-slice-width = <0x1c8>;
  6266. qcom,mdss-dsc-slice-per-pkt = <0x02>;
  6267. qcom,mdss-dsc-bit-per-component = <0x08>;
  6268. qcom,mdss-dsc-bit-per-pixel = <0x08>;
  6269. qcom,mdss-dsc-block-prediction-enable;
  6270. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  6271. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  6272. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 23 1a 0a 13 05 02 04 00 1e 1a];
  6273. qcom,display-topology = <0x04 0x04 0x02>;
  6274. qcom,default-topology-index = <0x00>;
  6275. };
  6276. };
  6277. };
  6278. };
  6279. };
  6280.  
  6281. fragment@48 {
  6282. target = <0xffffffff>;
  6283.  
  6284. __overlay__ {
  6285.  
  6286. qcom,mdss_dsi_dual_boe_lcd_video {
  6287. qcom,mdss-dsi-panel-name = "BOE dual lcd video mode dsi panel";
  6288. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  6289. qcom,dsi-ctrl-num = <0x00 0x01>;
  6290. qcom,dsi-phy-num = <0x00 0x01>;
  6291. qcom,mdss-dsi-virtual-channel-id = <0x00>;
  6292. qcom,mdss-dsi-stream = <0x00>;
  6293. qcom,mdss-dsi-bpp = <0x18>;
  6294. qcom,mdss-dsi-border-color = <0x00>;
  6295. qcom,mdss-dsi-traffic-mode = "burst_mode";
  6296. qcom,mdss-dsi-bllp-eof-power-mode;
  6297. qcom,mdss-dsi-bllp-power-mode;
  6298. qcom,mdss-dsi-lane-0-state;
  6299. qcom,mdss-dsi-lane-1-state;
  6300. qcom,mdss-dsi-lane-2-state;
  6301. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  6302. qcom,mdss-dsi-mdp-trigger = "none";
  6303. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  6304. qcom,adjust-timer-wakeup-ms = <0x01>;
  6305. qcom,mdss-dsi-lp11-init;
  6306. qcom,mdss-dsi-tx-eot-append;
  6307. qcom,cmd-sync-wait-broadcast;
  6308. qcom,panel-cphy-mode;
  6309. qcom,panel-supply-entries = <0x73>;
  6310. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_jdi";
  6311. qcom,mdss-dsi-bl-min-level = <0x320>;
  6312. qcom,mdss-dsi-bl-max-level = <0x4b0>;
  6313. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  6314. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  6315. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  6316. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  6317. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  6318. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  6319. phandle = <0x47>;
  6320.  
  6321. qcom,mdss-dsi-display-timings {
  6322.  
  6323. timing@0 {
  6324. qcom,mdss-dsi-panel-width = <0x4b0>;
  6325. qcom,mdss-dsi-panel-height = <0x500>;
  6326. qcom,mdss-dsi-panel-framerate = <0x48>;
  6327. qcom,mdss-dsi-h-front-porch = <0x1e>;
  6328. qcom,mdss-dsi-h-back-porch = <0x14>;
  6329. qcom,mdss-dsi-h-pulse-width = <0x01>;
  6330. qcom,mdss-dsi-h-sync-skew = <0x00>;
  6331. qcom,mdss-dsi-v-front-porch = <0x2e2>;
  6332. qcom,mdss-dsi-v-back-porch = <0x0e>;
  6333. qcom,mdss-dsi-v-pulse-width = <0x01>;
  6334. qcom,mdss-dsi-bpp = <0x18>;
  6335. qcom,mdss-dsi-h-sync-pulse = <0x01>;
  6336. qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 b0 04 29 01 00 00 00 00 02 b1 00 29 01 00 00 00 00 08 b2 00 00 00 00 00 01 00 29 01 00 00 00 00 02 b3 00 29 01 00 00 00 00 04 b4 00 00 0a 29 01 00 00 00 00 17 b5 00 00 00 00 00 00 00 03 02 26 66 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a b6 20 6b 80 06 33 96 00 1a 7a 29 01 00 00 00 00 05 b7 54 00 00 00 29 01 00 00 00 00 94 b8 18 58 22 00 01 29 01 18 20 3e ff 8f f0 20 00 5c 1b 07 3a 38 f8 08 20 00 40 00 1b 1b 0a 0a 1b 1b 0a 2c 0a 00 28 18 08 30 08 00 20 20 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 ff 00 00 00 00 03 00 0b 2e 16 25 2e 81 5e 75 94 a5 d6 ce fa d8 ff ed d0 18 57 ff 02 00 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 ff 00 00 00 00 03 71 4c 92 71 4c 92 11 41 44 11 41 44 88 28 22 dd 7d 77 88 78 77 22 d2 dd 06 00 01 05 01 00 00 03 10 00 00 00 00 29 01 00 00 00 00 06 ba 08 07 80 07 00 29 01 00 00 00 00 13 bb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0c bc 20 00 00 00 00 00 00 00 00 ff ff 29 01 00 00 00 00 03 bd 00 00 29 01 00 00 00 00 24 be 00 00 00 00 00 00 69 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 00 29 01 00 00 00 00 4d bf 02 3c 34 55 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 12 c0 40 40 14 00 07 80 00 08 00 00 08 41 00 00 14 00 08 29 01 00 00 00 00 19 c1 30 00 00 10 11 00 00 00 22 00 00 05 20 fa 00 08 00 00 00 00 00 00 00 00 29 01 00 00 00 00 6d c2 01 3b 81 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3b 02 02 01 01 c1 00 05 00 01 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3b 02 02 01 01 00 07 95 07 98 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 55 c3 00 00 01 00 10 00 0a 00 00 00 80 00 00 00 01 00 01 00 02 00 00 00 80 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7b c4 00 00 00 a3 a3 a3 8e a1 a2 8d 9f 93 92 9c 9a 9b 9a 9b 00 00 00 00 00 00 00 00 9b 9a 9b 9a 9c 92 93 9f 8d a2 a1 8e a3 a3 a3 00 00 00 ff ff ff ff ff 0f df ff ff ff bf 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 00 00 00 00 00 29 01 00 00 00 00 06 c5 08 00 00 00 00 29 01 00 00 00 00 38 c6 0b 08 07 48 00 00 13 01 ff 00 02 06 16 16 00 00 00 01 40 0c 00 00 00 00 00 00 00 40 00 00 b0 04 b0 04 38 7f 07 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 4d c7 00 00 00 ca 01 8f 02 0e 01 85 02 0f 02 81 01 d4 01 f3 02 15 02 74 01 da 02 2a 02 a3 02 28 02 d4 03 69 03 af 03 ff 00 00 00 ca 01 8f 02 0e 01 85 02 0f 02 81 01 d4 01 f3 02 15 02 74 01 da 02 2a 02 a3 02 28 02 d4 03 69 03 af 03 ff 29 01 00 00 00 00 32 c8 81 00 03 03 01 ff 00 00 01 fe 02 8d 00 00 ff fe 04 b9 00 00 03 03 01 ff 00 01 fe 02 8d 00 ff fe 04 b9 00 03 03 01 ff 00 01 fe 02 8d 00 ff fe 04 b9 29 01 00 00 00 00 13 c9 00 03 03 01 ff 00 00 01 fe 02 8d 00 00 ff fe 04 b9 00 29 01 00 00 00 00 09 cb 00 f0 00 00 01 00 ff 00 29 01 00 00 00 00 02 cd 11 29 01 00 00 00 00 44 ce 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 cf 00 00 80 46 61 00 00 29 01 00 00 00 00 11 d0 f1 32 03 94 c7 04 b1 32 03 00 a4 c7 0a f2 55 05 29 01 00 00 00 00 27 d1 ef ef 33 33 07 03 3b 77 37 77 37 35 33 33 f7 33 03 03 03 36 36 66 6d 0d 0a 30 13 0a 0b 00 c4 c4 28 28 28 28 00 00 29 01 00 00 00 00 02 d2 00 29 01 00 00 00 00 04 d4 00 00 00 29 01 00 00 00 00 06 e5 03 00 02 00 00 29 01 00 00 00 00 07 d5 02 a7 02 36 02 00 29 01 00 00 00 00 02 d6 00 29 01 00 00 00 00 79 d7 01 32 01 38 c0 12 12 7a 00 08 0a 00 07 50 00 0c 0c 0c 0c 10 00 02 0c 0e 02 05 04 07 02 00 02 05 03 00 00 00 04 07 05 06 06 05 05 08 0a 0c 0a 0a 0a 0c 0a 06 08 07 09 08 0a 09 0b 00 00 00 00 00 00 00 0a 0a 0a 08 08 0a 0a 0a 3c 3c 3c 0a 08 08 08 08 04 04 08 08 08 04 04 08 08 08 08 00 00 00 02 02 05 04 07 02 00 02 05 03 04 07 05 00 00 00 00 00 02 02 02 02 00 00 29 01 00 00 00 00 0f d8 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 29 01 00 00 00 00 0f d9 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 29 01 00 00 00 00 02 da 00 29 01 00 00 00 00 02 db 00 29 01 00 00 00 00 02 dc 00 29 01 00 00 00 00 05 dd 32 06 18 52 29 01 00 00 00 00 19 de 00 00 0f ff 10 20 20 10 b4 b4 03 e4 ff ff ff 7f 20 10 08 01 00 00 00 00 29 01 00 00 00 00 02 df 00 29 01 00 00 00 00 09 e0 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 09 e1 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 0d e2 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 e3 ff 29 01 00 00 00 00 bd e6 12 00 00 89 10 80 07 80 07 20 00 10 01 c8 01 c8 02 00 01 e4 00 20 01 63 00 06 00 0c 06 67 07 87 18 00 10 f0 03 0c 20 00 06 0b 0b 33 0e 1c 2a 38 46 54 62 69 70 77 79 7b 7d 7e 01 02 01 00 09 40 09 be 19 fc 19 fa 19 f8 1a 38 1a 78 1a b6 2a b6 2a f4 2a f4 4b 34 63 74 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 0c 07 10 20 00 06 0f 0f 33 0e 1c 2a 38 46 54 62 69 70 77 79 7b 7d 7e 01 c2 22 00 2a 40 2a be 3a fc 3a fa 3a f8 3b 38 3b 78 3b 76 4b b6 4b b6 4b f4 63 f4 7c 00 00 00 00 00 00 29 01 00 00 00 00 0b e7 50 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 03 e8 09 28 29 01 00 00 00 00 0d e9 04 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a ea 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 49 eb 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 29 01 00 00 00 00 06 ec 03 00 00 00 00 29 01 00 00 00 00 14 ed 04 02 ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7c ee 0c 00 00 0c 00 13 01 00 00 00 00 00 00 0c 00 33 01 00 0d 00 13 01 00 0d 00 33 01 00 0d 00 33 01 00 0c 00 03 00 00 0c 00 13 11 00 0d 00 13 01 00 0c 00 11 01 00 0c 00 11 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30 00 00 00 11 01 00 00 00 00 00 00 00 30 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0c 00 13 01 00 02 29 01 00 00 00 00 4a ef 03 21 38 00 17 17 00 00 01 1e 36 00 03 03 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 33 00 00 00 00 02 00 01 00 01 0a 0a 00 00 00 03 11 00 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 70 00 29 01 00 00 00 00 02 71 00 29 01 00 00 00 00 02 72 00 29 01 00 00 00 00 02 73 00 29 01 00 00 00 00 02 74 00 29 01 00 00 00 00 02 75 00 29 01 00 00 00 00 02 76 00 29 01 00 00 00 00 02 77 00 29 01 00 00 00 00 02 78 00 29 01 00 00 00 00 02 79 00 29 01 00 00 00 00 02 7a 00 29 01 00 00 00 00 02 7b 00 29 01 00 00 00 00 02 7c 00 29 01 00 00 00 00 02 7d 00 29 01 00 00 00 00 02 7e 00 29 01 00 00 00 00 12 a1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 29 01 00 00 00 00 04 f0 00 00 00 29 01 00 00 00 00 02 f1 00 29 01 00 00 00 00 06 f2 00 00 00 00 00 29 01 00 00 00 00 0c f3 48 08 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 1a f4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 02 f5 00 29 01 00 00 00 00 1f fa 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0b fb 00 00 00 00 00 ff ff ff ff ff 29 01 00 00 00 00 24 fc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 fd 00 00 00 00 00 00 00 29 01 00 00 0a 00 0b fe 00 00 00 60 00 00 01 08 00 00 05 01 00 00 78 00 01 11 05 01 00 00 78 00 01 29];
  6337. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  6338. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  6339. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  6340. qcom,mdss-dsi-jdi-brightness-commands = <0x29010000 0x11b9 0x17bf02ad 0x00 0x5dc00c8 0x00>;
  6341. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  6342. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  6343. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 22 1a 08 13 04 02 04 00 1e 1a];
  6344. qcom,display-topology = <0x02 0x00 0x02>;
  6345. qcom,default-topology-index = <0x00>;
  6346. };
  6347. };
  6348. };
  6349. };
  6350. };
  6351.  
  6352. fragment@49 {
  6353. target = <0xffffffff>;
  6354.  
  6355. __overlay__ {
  6356.  
  6357. qcom,mdss_dsi_dual_boe_spi_blu_dsc_video {
  6358. qcom,mdss-dsi-panel-name = "BOE with spi blu dual video mode dsi panel with dsc";
  6359. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  6360. qcom,dsi-ctrl-num = <0x00 0x01>;
  6361. qcom,dsi-phy-num = <0x00 0x01>;
  6362. qcom,mdss-dsi-bpp = <0x18>;
  6363. com,mdss-dsi-virtual-channel-id = <0x00>;
  6364. qcom,mdss-dsi-stream = <0x00>;
  6365. qcom,mdss-dsi-border-color = <0x00>;
  6366. qcom,mdss-dsi-traffic-mode = "burst_mode";
  6367. qcom,mdss-dsi-bllp-eof-power-mode;
  6368. qcom,mdss-dsi-bllp-power-mode;
  6369. qcom,mdss-dsi-lane-0-state;
  6370. qcom,mdss-dsi-lane-1-state;
  6371. qcom,mdss-dsi-lane-2-state;
  6372. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  6373. qcom,mdss-dsi-mdp-trigger = "none";
  6374. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  6375. qcom,adjust-timer-wakeup-ms = <0x01>;
  6376. qcom,mdss-dsi-lp11-init;
  6377. qcom,mdss-dsi-tx-eot-append;
  6378. qcom,cmd-sync-wait-broadcast;
  6379. qcom,panel-cphy-mode;
  6380. qcom,dsi-supported-dfps-list = <0x5a 0x59 0x58 0x57 0x56 0x55 0x54 0x53 0x52 0x51 0x50 0x4f 0x4e 0x4d 0x4c 0x4b 0x4a 0x49 0x48 0x47 0x46 0x45 0x44 0x43 0x42 0x41 0x40 0x3f 0x3e 0x3d 0x3c>;
  6381. qcom,mdss-dsi-pan-enable-dynamic-fps;
  6382. qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
  6383. qcom,mdss-dsi-min-refresh-rate = <0x3c>;
  6384. qcom,mdss-dsi-max-refresh-rate = <0x5a>;
  6385. qcom,panel-supply-entries = <0x73>;
  6386. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_local_dimming";
  6387. qcom,mdss-dsi-bl-min-level = <0x00>;
  6388. qcom,mdss-dsi-bl-max-level = <0xff>;
  6389. qcom,mdss-brightness-max-level = <0xff>;
  6390. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  6391. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  6392. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  6393. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  6394. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  6395. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  6396. oculus,backlight = <0x74 0x75>;
  6397. phandle = <0x48>;
  6398.  
  6399. qcom,mdss-dsi-display-timings {
  6400.  
  6401. timing@0 {
  6402. qcom,mdss-dsi-panel-width = <0x720>;
  6403. qcom,mdss-dsi-panel-height = <0x780>;
  6404. qcom,mdss-dsi-h-front-porch = <0x20>;
  6405. qcom,mdss-dsi-h-back-porch = <0x1a>;
  6406. qcom,mdss-dsi-h-pulse-width = <0x02>;
  6407. qcom,mdss-dsi-h-sync-skew = <0x00>;
  6408. qcom,mdss-dsi-v-front-porch = <0x818>;
  6409. qcom,mdss-dsi-v-back-porch = <0x0e>;
  6410. qcom,mdss-dsi-v-pulse-width = <0x01>;
  6411. qcom,mdss-dsi-h-sync-pulse = <0x00>;
  6412. qcom,mdss-dsi-panel-framerate = <0x5a>;
  6413. qcom,mdss-dsi-panel-padding = <0x18>;
  6414. qcom,mdss-dsi-bpp = <0x18>;
  6415. qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x4290100 0x02 0xb1002901 0x00 0x41b90b9a 0x640000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x2901 0x00 0x2d60029 0x1000000 0x6ec02 0x4e000000 0x29010000 0x81e6 0x11000089 0x30800780 0x7200008 0x1c801c8 0x20001e4 0x2000ac 0x6000c 0xdb70f0e 0x180010f0 0x30c2000 0x60b0b33 0xe1c2a38 0x46546269 0x7077797b 0x7d7e0102 0x1000940 0x9be19fc 0x19fa19f8 0x1a381a78 0x1ab62af6 0x2b342b74 0x3b746bf4 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x5010000 0x78000111 0x5010000 0x78000129>;
  6416. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  6417. qcom,mdss-dsi-local-dimming-pwm-commands = <0x29010000 0x3b9 0xe8b2901 0x00 0x3b90fa0 0x29010000 0x3b9 0x10bc2901 0x00 0x3b912e2>;
  6418. qcom,mdss-dsi-local-dimming-fifo-commands = <0x29010000 0x3ec 0x45d2901 0x00 0x3ec04e9 0x29010000 0x3ec 0x5752901 0x00 0x3ec068c>;
  6419. qcom,mdss-dsi-local-dimming-blu-timing = <0x114e 0x14eb 0x1243 0x1654 0x1339 0x17bd 0x1647 0x1bb2>;
  6420. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  6421. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  6422. qcom,compression-mode = "dsc";
  6423. qcom,mdss-dsc-slice-height = <0x08>;
  6424. qcom,mdss-dsc-slice-width = <0x1c8>;
  6425. qcom,mdss-dsc-slice-per-pkt = <0x02>;
  6426. qcom,mdss-dsc-bit-per-component = <0x08>;
  6427. qcom,mdss-dsc-bit-per-pixel = <0x08>;
  6428. qcom,mdss-dsc-block-prediction-enable;
  6429. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  6430. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  6431. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 25 1a 0b 13 06 02 04 00 1e 1a];
  6432. qcom,display-topology = <0x04 0x04 0x02>;
  6433. qcom,default-topology-index = <0x00>;
  6434. };
  6435. };
  6436. };
  6437. };
  6438. };
  6439.  
  6440. fragment@50 {
  6441. target = <0xffffffff>;
  6442.  
  6443. __overlay__ {
  6444. qcom,init-voltage = <0x325aa0>;
  6445. };
  6446. };
  6447.  
  6448. fragment@51 {
  6449. target = <0xffffffff>;
  6450.  
  6451. __overlay__ {
  6452. regulator-max-microvolt = <0x1cfde0>;
  6453. qcom,init-mode = <0x04>;
  6454. qcom,init-voltage = <0x1cfde0>;
  6455. };
  6456. };
  6457.  
  6458. fragment@52 {
  6459. target = <0xffffffff>;
  6460.  
  6461. __overlay__ {
  6462. clock-rate = <0x00 0x00 0x00 0x00 0x1b6b0b00 0x124f800 0x1b6b0b00 0x124f800>;
  6463. connectors = <0x29 0x2a 0x2b 0xffffffff>;
  6464. qcom,sde-has-dest-scaler;
  6465. qcom,sde-wb-rtprio = <0x63>;
  6466. qcom,sde-wb-cpumask = "80";
  6467. qcom,sde-lineptr-scanline-advance = <0x567>;
  6468. qcom,sde-wb-mild-tear-threshold = <0x2bc>;
  6469. qcom,sde-wb-severe-tear-threshold = <0x1f4>;
  6470. qcom,sde-wb-passes = <0x01>;
  6471. };
  6472. };
  6473.  
  6474. fragment@53 {
  6475. target = <0xffffffff>;
  6476.  
  6477. __overlay__ {
  6478. qcom,uart-mux-en-gpio = <0xffffffff 0x21 0x01>;
  6479. };
  6480. };
  6481.  
  6482. fragment@54 {
  6483. target = <0xffffffff>;
  6484.  
  6485. __overlay__ {
  6486.  
  6487. depth_swdio_default@0 {
  6488. pins = "gpio152\0gpio153";
  6489. function = "gpio";
  6490. input-enable;
  6491. phandle = <0x76>;
  6492. };
  6493.  
  6494. depth_swdio_default@1 {
  6495. pins = "gpio154";
  6496. function = "gpio";
  6497. output-high;
  6498. phandle = <0x77>;
  6499. };
  6500. };
  6501. };
  6502.  
  6503. fragment@55 {
  6504. target = <0xffffffff>;
  6505.  
  6506. __overlay__ {
  6507.  
  6508. oculus,projector {
  6509. status = "ok";
  6510. compatible = "oculus,projector";
  6511. pinctrl-names = "default";
  6512. pinctrl-0 = <0x76 0x77>;
  6513. phandle = <0x182>;
  6514. };
  6515. };
  6516. };
  6517.  
  6518. fragment@56 {
  6519. target = <0xffffffff>;
  6520.  
  6521. __overlay__ {
  6522.  
  6523. display_virtual_sensor {
  6524. compatible = "oculus,display-virtual-sensor";
  6525. status = "ok";
  6526. #thermal-sensor-cells = <0x00>;
  6527. io-channels = <0x17 0x4e>;
  6528. io-channel-names = "soc_therm";
  6529. thermal-zones = "pcb1-usr";
  6530. thermal-zone-coefficients = <0x01>;
  6531. thermal-zone-slope-coefficients = <0x01>;
  6532. io-coefficients = <0x01>;
  6533. io-slope-coefficients = <0x01>;
  6534. intercept-charging = <0x01>;
  6535. intercept-discharging = <0x01>;
  6536. intercept-constant = <0x01>;
  6537. phandle = <0x78>;
  6538. };
  6539.  
  6540. vrapi_front_panel_sensor {
  6541. compatible = "oculus,front-panel-sensor";
  6542. status = "ok";
  6543. #thermal-sensor-cells = <0x00>;
  6544. io-channels = <0x17 0x4e>;
  6545. io-channel-names = "soc_therm";
  6546. thermal-zones = "pcb1-usr";
  6547. thermal-zone-coefficients = <0x01>;
  6548. thermal-zone-slope-coefficients = <0x01>;
  6549. io-coefficients = <0x01>;
  6550. io-slope-coefficients = <0x01>;
  6551. intercept-charging = <0x01>;
  6552. intercept-discharging = <0x01>;
  6553. phandle = <0x79>;
  6554. };
  6555.  
  6556. vrapi_top_panel_sensor {
  6557. compatible = "oculus,top-panel-sensor";
  6558. status = "ok";
  6559. #thermal-sensor-cells = <0x00>;
  6560. io-channels = <0x17 0x4e>;
  6561. io-channel-names = "soc_therm";
  6562. thermal-zones = "pcb1-usr";
  6563. thermal-zone-coefficients = <0x01 0x01>;
  6564. thermal-zone-slope-coefficients = <0x01 0x01>;
  6565. io-coefficients = <0x01>;
  6566. io-slope-coefficients = <0x01>;
  6567. intercept-charging = <0x01>;
  6568. intercept-discharging = <0x01>;
  6569. phandle = <0x7a>;
  6570. };
  6571. };
  6572. };
  6573.  
  6574. fragment@57 {
  6575. target = <0xffffffff>;
  6576.  
  6577. __overlay__ {
  6578.  
  6579. display-virt {
  6580. polling-delay-passive = <0x64>;
  6581. polling-delay = <0x3e8>;
  6582. thermal-governor = "user_space";
  6583. thermal-sensors = <0x78>;
  6584. wake-capable-sensor;
  6585.  
  6586. trips {
  6587.  
  6588. active-config0 {
  6589. temperature = <0x1e848>;
  6590. hysteresis = <0x3e8>;
  6591. type = "passive";
  6592. };
  6593. };
  6594. };
  6595.  
  6596. soc {
  6597. status = "disabled";
  6598. };
  6599.  
  6600. vrapi-front-panel {
  6601. polling-delay-passive = <0x64>;
  6602. polling-delay = <0x3e8>;
  6603. thermal-governor = "user_space";
  6604. thermal-sensors = <0x79>;
  6605. wake-capable-sensor;
  6606.  
  6607. trips {
  6608.  
  6609. virt-top-trip0 {
  6610. temperature = <0x14c08>;
  6611. hysteresis = <0x3e8>;
  6612. type = "passive";
  6613. phandle = <0x183>;
  6614. };
  6615.  
  6616. virt-top-trip1 {
  6617. temperature = <0x17318>;
  6618. hysteresis = <0x3e8>;
  6619. type = "passive";
  6620. phandle = <0x184>;
  6621. };
  6622.  
  6623. virt-top-trip2 {
  6624. temperature = <0x1c138>;
  6625. hysteresis = <0x3e8>;
  6626. type = "passive";
  6627. phandle = <0x185>;
  6628. };
  6629. };
  6630. };
  6631.  
  6632. vrapi-top-panel {
  6633. polling-delay-passive = <0x64>;
  6634. polling-delay = <0x3e8>;
  6635. thermal-governor = "user_space";
  6636. thermal-sensors = <0x7a>;
  6637. wake-capable-sensor;
  6638.  
  6639. trips {
  6640.  
  6641. virt-front-trip0 {
  6642. temperature = <0x14c08>;
  6643. hysteresis = <0x3e8>;
  6644. type = "passive";
  6645. phandle = <0x186>;
  6646. };
  6647.  
  6648. virt-front-trip1 {
  6649. temperature = <0x17318>;
  6650. hysteresis = <0x3e8>;
  6651. type = "passive";
  6652. phandle = <0x187>;
  6653. };
  6654.  
  6655. virt-front-trip2 {
  6656. temperature = <0x1c138>;
  6657. hysteresis = <0x3e8>;
  6658. type = "passive";
  6659. phandle = <0x188>;
  6660. };
  6661. };
  6662. };
  6663. };
  6664. };
  6665.  
  6666. fragment@58 {
  6667. target = <0xffffffff>;
  6668.  
  6669. __overlay__ {
  6670. vdd-supply = <0xffffffff>;
  6671. qcom,vdd-voltage-level = <0x2d0370 0x2d2a80>;
  6672. qcom,vdd-current-level = <0xc8 0xc3500>;
  6673. vdd-io-supply = <0xffffffff>;
  6674. qcom,vdd-io-voltage-level = <0x1b9680 0x2d2a80>;
  6675. qcom,vdd-io-current-level = <0xc8 0x55f0>;
  6676. pinctrl-names = "active\0sleep";
  6677. pinctrl-0 = <0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  6678. pinctrl-1 = <0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  6679. cd-gpios = <0xffffffff 0x4d 0x01>;
  6680. status = "ok";
  6681. };
  6682. };
  6683.  
  6684. fragment@59 {
  6685. target = <0xffffffff>;
  6686.  
  6687. __overlay__ {
  6688. vdd-hba-supply = <0xffffffff>;
  6689. vdd-hba-fixed-regulator;
  6690. vcc-supply = <0xffffffff>;
  6691. vcc-voltage-level = <0x263540 0x2d0370>;
  6692. vcc-low-voltage-sup;
  6693. vccq-supply = <0xffffffff>;
  6694. vccq2-supply = <0xffffffff>;
  6695. vcc-max-microamp = <0xc3500>;
  6696. vccq-max-microamp = <0xc3500>;
  6697. vccq2-max-microamp = <0xc3500>;
  6698. qcom,vddp-ref-clk-supply = <0xffffffff>;
  6699. qcom,vddp-ref-clk-max-microamp = <0x64>;
  6700. status = "ok";
  6701. };
  6702. };
  6703.  
  6704. fragment@60 {
  6705. target = <0xffffffff>;
  6706.  
  6707. __overlay__ {
  6708. compatible = "qcom,ufs-phy-qmp-v4";
  6709. vdda-phy-supply = <0xffffffff>;
  6710. vdda-phy-always-on;
  6711. vdda-pll-supply = <0xffffffff>;
  6712. vdda-phy-max-microamp = <0x15f2c>;
  6713. vdda-pll-max-microamp = <0x4970>;
  6714. status = "ok";
  6715. };
  6716. };
  6717.  
  6718. fragment@61 {
  6719. target = <0xffffffff>;
  6720.  
  6721. __overlay__ {
  6722. regulator-always-on;
  6723. };
  6724. };
  6725.  
  6726. fragment@62 {
  6727. target = <0xffffffff>;
  6728.  
  6729. __overlay__ {
  6730. regulator-always-on;
  6731. };
  6732. };
  6733.  
  6734. fragment@63 {
  6735. target = <0xffffffff>;
  6736.  
  6737. __overlay__ {
  6738. regulator-always-on;
  6739. };
  6740. };
  6741.  
  6742. fragment@64 {
  6743. target = <0xffffffff>;
  6744.  
  6745. __overlay__ {
  6746. regulator-always-on;
  6747. };
  6748. };
  6749.  
  6750. fragment@65 {
  6751. target = <0xffffffff>;
  6752.  
  6753. __overlay__ {
  6754. regulator-always-on;
  6755. };
  6756. };
  6757.  
  6758. fragment@66 {
  6759. target = <0xffffffff>;
  6760.  
  6761. __overlay__ {
  6762. status = "disabled";
  6763. };
  6764. };
  6765.  
  6766. fragment@67 {
  6767. target = <0xffffffff>;
  6768.  
  6769. __overlay__ {
  6770. status = "disabled";
  6771. };
  6772. };
  6773.  
  6774. fragment@68 {
  6775. target = <0xffffffff>;
  6776.  
  6777. __overlay__ {
  6778. regulator-always-on;
  6779. };
  6780. };
  6781.  
  6782. fragment@69 {
  6783. target = <0xffffffff>;
  6784.  
  6785. __overlay__ {
  6786. regulator-always-on;
  6787. };
  6788. };
  6789.  
  6790. fragment@70 {
  6791. target = <0xffffffff>;
  6792.  
  6793. __overlay__ {
  6794. status = "ok";
  6795. };
  6796. };
  6797.  
  6798. fragment@71 {
  6799. target = <0xffffffff>;
  6800.  
  6801. __overlay__ {
  6802. status = "ok";
  6803. qcom,clk-freq-out = <0x186a0>;
  6804.  
  6805. fuel-gauge@55 {
  6806. compatible = "ti,bq27z561";
  6807. reg = <0x55>;
  6808. status = "okay";
  6809. phandle = <0x189>;
  6810. };
  6811. };
  6812. };
  6813.  
  6814. fragment@72 {
  6815. target = <0xffffffff>;
  6816.  
  6817. __overlay__ {
  6818. status = "ok";
  6819. };
  6820. };
  6821.  
  6822. fragment@73 {
  6823. target = <0xffffffff>;
  6824.  
  6825. __overlay__ {
  6826. status = "ok";
  6827. };
  6828. };
  6829.  
  6830. fragment@74 {
  6831. target = <0xffffffff>;
  6832.  
  6833. __overlay__ {
  6834. status = "ok";
  6835. };
  6836. };
  6837.  
  6838. fragment@75 {
  6839. target = <0xffffffff>;
  6840.  
  6841. __overlay__ {
  6842. status = "ok";
  6843. };
  6844. };
  6845.  
  6846. fragment@76 {
  6847. target = <0xffffffff>;
  6848.  
  6849. __overlay__ {
  6850. status = "ok";
  6851. };
  6852. };
  6853.  
  6854. fragment@77 {
  6855. target = <0xffffffff>;
  6856.  
  6857. __overlay__ {
  6858. status = "ok";
  6859. };
  6860. };
  6861.  
  6862. fragment@78 {
  6863. target = <0xffffffff>;
  6864.  
  6865. __overlay__ {
  6866.  
  6867. qcom,smb1355@c {
  6868. compatible = "qcom,i2c-pmic";
  6869. reg = <0x0c>;
  6870. #address-cells = <0x01>;
  6871. #size-cells = <0x00>;
  6872. interrupt-parent = <0xffffffff>;
  6873. interrupts = <0x02 0xc5 0x00 0x08>;
  6874. interrupt_names = "smb1355";
  6875. interrupt-controller;
  6876. #interrupt-cells = <0x03>;
  6877. qcom,periph-map = <0x10 0x12 0x13 0x16>;
  6878. status = "ok";
  6879. pinctrl-names = "default";
  6880. pinctrl-0 = <0x7b>;
  6881. phandle = <0x7d>;
  6882.  
  6883. qcom,revid@100 {
  6884. compatible = "qcom,qpnp-revid";
  6885. reg = <0x100 0x100>;
  6886. phandle = <0x7c>;
  6887. };
  6888.  
  6889. qcom,smb1355-charger@1000 {
  6890. compatible = "qcom,smb1355";
  6891. qcom,pmic-revid = <0x7c>;
  6892. reg = <0x1000 0x700>;
  6893. #address-cells = <0x01>;
  6894. #size-cells = <0x01>;
  6895. interrupt-parent = <0x7d>;
  6896. status = "ok";
  6897. phandle = <0x18a>;
  6898.  
  6899. qcom,chgr@1000 {
  6900. reg = <0x1000 0x100>;
  6901. interrupts = <0x10 0x01 0x01>;
  6902. interrupt-names = "chg-state-change";
  6903. };
  6904.  
  6905. qcom,chgr-misc@1600 {
  6906. reg = <0x1600 0x100>;
  6907. interrupts = <0x16 0x01 0x01 0x16 0x06 0x01>;
  6908. interrupt-names = "wdog-bark\0temperature-change";
  6909. };
  6910. };
  6911. };
  6912. };
  6913. };
  6914.  
  6915. fragment@79 {
  6916. target = <0xffffffff>;
  6917.  
  6918. __overlay__ {
  6919. status = "ok";
  6920. pinctrl-0 = <0x7e>;
  6921. pinctrl-1 = <0x7f 0x80>;
  6922. };
  6923. };
  6924.  
  6925. fragment@80 {
  6926. target = <0xffffffff>;
  6927.  
  6928. __overlay__ {
  6929. status = "ok";
  6930. qcom,rt;
  6931.  
  6932. oculusnrf@0 {
  6933. status = "okay";
  6934. compatible = "oculus,syncboss";
  6935. reg = <0x00>;
  6936. spi-max-frequency = <0x7a1200>;
  6937. spi-cpol;
  6938. spi-cpha;
  6939. pinctrl-names = "syncboss_default";
  6940. pinctrl-0 = <0x81 0x82>;
  6941. oculus,swdflavor = "nrf52832";
  6942. oculus,syncboss-reset = <0xffffffff 0x05 0x00>;
  6943. oculus,syncboss-timesync = <0xffffffff 0x44 0x00>;
  6944. oculus,syncboss-wakeup = <0xffffffff 0x04 0x00>;
  6945. oculus,syncboss-has-prox;
  6946. oculus,syncboss-use-fastpath;
  6947. oculus,syncboss-use-streaming-wakelock;
  6948. oculus,transaction-length = <0xf8>;
  6949. oculus,syncboss-has-no-prox-cal;
  6950. phandle = <0x18b>;
  6951.  
  6952. swd@0 {
  6953. compatible = "oculus,swd";
  6954. pinctrl-names = "swd_default";
  6955. pinctrl-0 = <0x83>;
  6956. oculus,swd-clk = <0xffffffff 0x34 0x00>;
  6957. oculus,swd-io = <0xffffffff 0x35 0x00>;
  6958. oculus,swd-flavor = "nrf52832";
  6959. oculus,fw-path = "syncboss-ipl-spl.bin";
  6960. oculus,flash-block-size = <0x200>;
  6961. oculus,flash-page-size = <0x1000>;
  6962. oculus,flash-page-count = <0x80>;
  6963. oculus,flash-page-retained-count = <0x03>;
  6964. };
  6965. };
  6966. };
  6967. };
  6968.  
  6969. fragment@81 {
  6970. target = <0xffffffff>;
  6971.  
  6972. __overlay__ {
  6973.  
  6974. syncboss_float_swd {
  6975. phandle = <0x83>;
  6976.  
  6977. mux {
  6978. pins = "gpio52\0gpio53";
  6979. function = "gpio";
  6980. };
  6981.  
  6982. config {
  6983. pins = "gpio52\0gpio53";
  6984. drive-strength = <0x06>;
  6985. bias-disable;
  6986. input-enable;
  6987. };
  6988. };
  6989.  
  6990. syncboss_wakeup {
  6991. phandle = <0x82>;
  6992.  
  6993. mux {
  6994. pins = "gpio4";
  6995. function = "gpio";
  6996. };
  6997.  
  6998. config {
  6999. pins = "gpio4";
  7000. bias-pull-down;
  7001. input-enable;
  7002. };
  7003. };
  7004.  
  7005. syncboss_reset_default {
  7006. phandle = <0x81>;
  7007.  
  7008. mux {
  7009. pins = "gpio5";
  7010. function = "gpio";
  7011. };
  7012.  
  7013. config {
  7014. pins = "gpio5";
  7015. drive-strength = <0x06>;
  7016. output-high;
  7017. };
  7018. };
  7019.  
  7020. syncboss_uart_active {
  7021. phandle = <0x7e>;
  7022.  
  7023. mux {
  7024. pins = "gpio54\0gpio55";
  7025. function = "qup17";
  7026. };
  7027.  
  7028. config {
  7029. pins = "gpio54\0gpio55";
  7030. drive-strength = <0x02>;
  7031. bias-disable;
  7032. };
  7033. };
  7034.  
  7035. syncboss_uart_sleep_tx {
  7036. phandle = <0x7f>;
  7037.  
  7038. mux {
  7039. pins = "gpio54";
  7040. function = "gpio";
  7041. };
  7042.  
  7043. config {
  7044. pins = "gpio54";
  7045. drive-strength = <0x02>;
  7046. bias-pull-up;
  7047. };
  7048. };
  7049.  
  7050. syncboss_uart_sleep_rx {
  7051. phandle = <0x80>;
  7052.  
  7053. mux {
  7054. pins = "gpio55";
  7055. function = "gpio";
  7056. };
  7057.  
  7058. config {
  7059. pins = "gpio55";
  7060. drive-strength = <0x02>;
  7061. bias-disable;
  7062. };
  7063. };
  7064. };
  7065. };
  7066.  
  7067. fragment@82 {
  7068. target = <0xffffffff>;
  7069.  
  7070. __overlay__ {
  7071.  
  7072. qcom,battery-data {
  7073. qcom,batt-id-range-pct = <0x0f>;
  7074. phandle = <0x08>;
  7075.  
  7076. qcom,4081226_goertek_hollywood_15k_3636mah_aug26th2019 {
  7077. qcom,profile-revision = <0x18>;
  7078. qcom,max-voltage-uv = <0x432380>;
  7079. qcom,fastchg-current-ma = <0x7d0>;
  7080. qcom,jeita-fcc-ranges-0 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  7081. qcom,jeita-fcc-ranges-1 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  7082. qcom,jeita-fv-ranges-0 = <0x32 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  7083. qcom,jeita-fv-ranges-1 = <0x32 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  7084. qcom,cycle-fcc-ranges-0 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  7085. qcom,cycle-fcc-ranges-1 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  7086. qcom,cycle-fv-ranges-0 = <0x00 0x12c 0x432380 0x12d 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  7087. qcom,cycle-fv-ranges-1 = <0x00 0x12c 0x3e8fa0 0x12d 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  7088. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  7089. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  7090. qcom,step-chg-ranges-0 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  7091. qcom,step-chg-ranges-1 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  7092. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  7093. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  7094. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  7095. qcom,jeita-soft-fcc-ua = <0xafc80 0xafc80>;
  7096. qcom,jeita-soft-fv-uv = <0x419ce0 0x419ce0>;
  7097. qcom,ocv-based-step-chg;
  7098. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  7099. qcom,nom-batt-capacity-mah = <0xe34>;
  7100. qcom,batt-id-kohm = <0x0f>;
  7101. qcom,battery-beta = <0x109a>;
  7102. qcom,therm-room-temp = <0x186a0>;
  7103. qcom,battery-type = "4081226_goertek_hollywood_15k_3636mah_aug26th2019";
  7104. qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
  7105. qcom,therm-center-offset = <0x70>;
  7106. qcom,therm-pull-up = <0x64>;
  7107. qcom,rslow-normal-coeffs = <0xdd 0x05 0x51 0x12>;
  7108. qcom,rslow-low-coeffs = <0x41 0x15 0xe7 0x05>;
  7109. qcom,checksum = <0xef51>;
  7110. qcom,gui-version = "PM855GUI - 1.0.0.13";
  7111. qcom,fg-profile-data = <0x90017ea 0xb5e515ea 0xabe50000 0x2dbd7b8a 0xfc87e993 0x884f187 0x2300dd05 0x5112c604 0x502ce07 0x3200deeb 0x63ed85dc 0xf10b0add 0x4bc4c30c 0xb30135da 0x60003c00 0x3e003f00 0x37003000 0x36003d00 0x3f004700 0x4b006000 0x2e003600 0x3d003800 0x35006300 0x53644100 0x3f004308 0x60f85200 0x5d008010 0x6f105f00 0xb0288650 0x6b605f0b 0x6700d800 0xc11f6e0d 0x60fa5705 0x781c760b 0x7e0db02a 0x5d17e54a 0xf75def03 0x680f3d1f 0x11060b02 0x9f05e41c 0x102a405 0xb00ad317 0x1722d545 0x145b7211 0x971ec8e6 0x26cb2fc7 0xdc1cb1c1 0x9d040aba 0xb117c18b 0x8e8429a2 0x72a00980 0xe6fb9004 0xbc02b502 0xf8d8dc 0x9fe3f407 0x4e286c5 0x421818f8 0x27d59e02 0xad057c01 0xce073200 0xf902dc03 0x43042601 0x8c056503 0xce022102 0xa7044f00 0x3a004000 0x43644600 0x46004600 0x4be84700 0x48004910 0x43103c00 0x4c284d48 0x5658630d 0x43004e00 0x55085bf8 0x4c004600 0x4d106310 0x5d007028 0x8b485860 0x660d6e00 0x69004908 0xd800491f 0xaa06a80a 0x7b0ced1c 0xc23f545 0x205a8f18 0xa02af05 0xa4036710 0x3f0ae71f 0x6d058b02 0x9504be1c 0x2803d005 0x5c026f18 0x17028a05 0x3026a00 0x551f0006 0x2f029606 0xd81c5902 0x20053803 0x97185603 0xcb042102 0x6e002501 0xc000fa00 0x9b0e0000>;
  7112. };
  7113.  
  7114. qcom,4203348_goertek_hollywood_100k_3636mah_oct21st2019 {
  7115. qcom,profile-revision = <0x18>;
  7116. qcom,max-voltage-uv = <0x432380>;
  7117. qcom,fastchg-current-ma = <0x7d0>;
  7118. qcom,jeita-fcc-ranges-0 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  7119. qcom,jeita-fcc-ranges-1 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  7120. qcom,jeita-fv-ranges-0 = <0x32 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  7121. qcom,jeita-fv-ranges-1 = <0x32 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  7122. qcom,cycle-fcc-ranges-0 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  7123. qcom,cycle-fcc-ranges-1 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  7124. qcom,cycle-fv-ranges-0 = <0x00 0x12c 0x432380 0x12d 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  7125. qcom,cycle-fv-ranges-1 = <0x00 0x12c 0x3e8fa0 0x12d 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  7126. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  7127. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  7128. qcom,step-chg-ranges-0 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  7129. qcom,step-chg-ranges-1 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  7130. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  7131. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  7132. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  7133. qcom,jeita-soft-fcc-ua = <0xafc80 0xafc80>;
  7134. qcom,jeita-soft-fv-uv = <0x419ce0 0x419ce0>;
  7135. qcom,ocv-based-step-chg;
  7136. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  7137. qcom,nom-batt-capacity-mah = <0xe34>;
  7138. qcom,batt-id-kohm = <0x64>;
  7139. qcom,battery-beta = <0x109a>;
  7140. qcom,therm-room-temp = <0x186a0>;
  7141. qcom,battery-type = "4203348_goertek_hollywood_3636mah_oct21st2019";
  7142. qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
  7143. qcom,therm-center-offset = <0x70>;
  7144. qcom,therm-pull-up = <0x64>;
  7145. qcom,rslow-normal-coeffs = <0xed 0xe4 0x0e 0x12>;
  7146. qcom,rslow-low-coeffs = <0xfb 0x02 0x2e 0x13>;
  7147. qcom,checksum = <0xb758>;
  7148. qcom,gui-version = "PM855GUI - 1.0.0.13";
  7149. qcom,fg-profile-data = <0x900f5e3 0x6cdc79e3 0x18dc0000 0xfdbc6b8b 0xf687138c 0xfa9d6d80 0x1c00ede4 0xe12a7fc 0x99f3ce07 0x32005fea 0xe1edd2db 0xba0b2ae5 0x8ec45513 0x29010700 0x60004a00 0x48004000 0x30003200 0x39004500 0x40003f00 0x3d006000 0x34004000 0x59004c00 0x41008b00 0x65644d00 0x42f84300 0x60004500 0x49006a10 0x59104d00 0x8d286948 0x5458480e 0x4d00d800 0xfe1e9d04 0xaef30c07 0x611c810b 0x7a0dcf22 0x74173942 0x925daf03 0x6010931e 0xef06c602 0xaaf5e01c 0xa029a05 0xc902cb17 0xd3236644 0x52526911 0x8c1effe6 0xaecacecd 0xda1cada9 0x8056bbb 0xc717968b 0xcf84e2a3 0x79a00980 0xa5035a04 0x1403b7fd 0xf812dd 0xc7e3f207 0xada87c4 0x68181600 0xfbdefb02 0x2c068f02 0xce073200 0xc902d902 0x7a058600 0x7f049903 0x3f028301 0xfc045200 0x35004100 0x44644800 0x47004600 0x46f04500 0x48004908 0x3d103e00 0x53285348 0x6058700e 0x4e005b00 0x63006af8 0x4a004300 0x49105a10 0x52006d20 0x7f485258 0x630e6c00 0x68004508 0xd8006d1f 0x6506470b 0xc60cdb1c 0x9231044 0x9526818 0x102cf05 0x53036a11 0x3f0a551f 0x3606e003 0xb705c51c 0x1703e105 0x54028818 0xd303e905 0x2b036500 0xbc1fbb05 0x4e028406 0xf41cf801 0xff052d02 0xad182503 0x25059203 0x7e002001 0xc000fa00 0x800e0000>;
  7150. };
  7151.  
  7152. qcom,4759214_facebook_seacliff_5348mah_averaged_masterslave_feb17th2021 {
  7153. qcom,profile-revision = <0x18>;
  7154. qcom,max-voltage-uv = <0x432380>;
  7155. qcom,fastchg-current-ma = <0x12cd>;
  7156. qcom,jeita-fcc-ranges-0 = <0x0a 0x64 0x104fc8 0x65 0xc8 0x28cd50 0xc9 0x1c2 0x4970c8 0x1c3 0x226 0x104fc8>;
  7157. qcom,jeita-fcc-ranges-1 = <0x0a 0x64 0x104fc8 0x65 0xc8 0x28cd50 0xc9 0x1c2 0x4970c8 0x1c3 0x226 0x104fc8>;
  7158. qcom,jeita-fv-ranges-0 = <0x0a 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  7159. qcom,jeita-fv-ranges-1 = <0x0a 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  7160. qcom,cycle-fcc-ranges-0 = <0x00 0x1f4 0x4970c8 0x1f5 0x320 0x4970c8>;
  7161. qcom,cycle-fcc-ranges-1 = <0x00 0x1f4 0x28cd50 0x1f5 0x320 0x28cd50>;
  7162. qcom,cycle-fv-ranges-0 = <0x00 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  7163. qcom,cycle-fv-ranges-1 = <0x00 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  7164. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  7165. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  7166. qcom,rblt-ranges = <0x00 0x11a08 0x3b8260 0x11a6c 0x20e90 0x401640 0x20ef4 0x23924 0x432380 0x23988 0x2bcc8 0x401640>;
  7167. qcom,rblt-limited-check;
  7168. qcom,step-chg-ranges-0 = <0x2dc6c0 0x401640 0x4970c8 0x401a28 0x432380 0x28cd50>;
  7169. qcom,step-chg-ranges-1 = <0x2dc6c0 0x3d0900 0x28cd50 0x3d0ce8 0x432380 0x28cd50>;
  7170. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  7171. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  7172. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  7173. qcom,jeita-soft-fcc-ua = <0x104fc8 0x104fc8>;
  7174. qcom,jeita-soft-fv-uv = <0x401640 0x401640>;
  7175. qcom,vnow-based-step-chg;
  7176. qcom,taper-fcc;
  7177. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  7178. qcom,nom-batt-capacity-mah = <0x14e4>;
  7179. qcom,batt-id-kohm = <0x96>;
  7180. qcom,battery-beta = <0x109a>;
  7181. qcom,therm-room-temp = <0x186a0>;
  7182. qcom,battery-type = "4759214_facebook_seacliff_5348mah_averaged_masterslave_feb17th2021";
  7183. qcom,therm-coefficients = <0x2319 0xcb5 0xdb70 0xc48e 0x856b>;
  7184. qcom,therm-center-offset = <0x70>;
  7185. qcom,therm-pull-up = <0x64>;
  7186. qcom,rslow-normal-coeffs = <0x68 0x02 0x41 0x12>;
  7187. qcom,rslow-low-coeffs = <0x6c 0x0c 0xaf 0xdc>;
  7188. qcom,checksum = <0xf260>;
  7189. qcom,gui-version = "PM855GUI - 1.0.0.14";
  7190. qcom,fg-profile-data = <0x9005de3 0x6edd5fe2 0x62dd0000 0xdcbd9086 0x1480ff95 0xfc8c4e80 0x27006802 0x4112bffb 0xe10dce07 0x3200d4ea 0xbf0756c2 0xc90a5d07 0xedcde00b 0x4e0af8db 0x60006200 0x52004600 0x37003700 0x3c004000 0x46004400 0x3e006000 0x36004700 0x49004500 0x3f007500 0x68645200 0x46004008 0x60f85e00 0x59007d10 0x73105d00 0xb9208940 0x6f585d10 0x5d00d800 0xa31f910d 0x35facbfd 0x931cfd0a 0xe80d3e22 0x72184943 0xdf541202 0x6c12991f 0xabfd4602 0x4bf5e11c 0xdb03d30d 0x6d0a9318 0xfe226f3d 0x7537a14 0x961e69e5 0x4ecb67bc 0xba1c07c2 0xb205b2ba 0x9c18998a 0x4841d92 0x6ba00980 0x12eb440d 0x650394eb 0xf83eed 0xb5eaf9cf 0xe0e587cc 0x1a111cf8 0xcde42a02 0x93067a03 0xce073200 0xb7026a02 0xbf040b05 0x4805f802 0x62024d03 0xe5054500 0x3c004800 0x4a644d00 0x4f084c10 0x52084c00 0x50004d08 0x47083900 0x54285c48 0x6a60770d 0x5b006d00 0x76088600 0x68005900 0x4c107010 0x6e008828 0x9e486658 0x7a0d8900 0x8e005e08 0xd800af25 0x804d60a 0xee15041d 0x80224b45 0x695a7918 0x2d026905 0x1f029f0f 0x3f0a0720 0x3d05ae02 0x2c06b71c 0x3d03b805 0x76027b18 0xf029405 0xf4036a00 0x1c1f2f06 0x1302ae06 0xbb1cc502 0x2c043402 0x9c185e03 0xad044602 0x6300ca00 0xc000fa00 0xef150000>;
  7191. };
  7192.  
  7193. qcom,5133886_facebook_sealiff_5348mah_averaged_masterslave_apr23rd2021 {
  7194. qcom,profile-revision = <0x18>;
  7195. qcom,max-voltage-uv = <0x432380>;
  7196. qcom,fastchg-current-ma = <0x12cd>;
  7197. qcom,jeita-fcc-ranges-0 = <0x0a 0x64 0x104fc8 0x65 0xc8 0x28cd50 0xc9 0x1c2 0x4970c8 0x1c3 0x226 0x104fc8>;
  7198. qcom,jeita-fcc-ranges-1 = <0x0a 0x64 0x104fc8 0x65 0xc8 0x28cd50 0xc9 0x1c2 0x4970c8 0x1c3 0x226 0x104fc8>;
  7199. qcom,jeita-fv-ranges-0 = <0x0a 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  7200. qcom,jeita-fv-ranges-1 = <0x0a 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  7201. qcom,cycle-fcc-ranges-0 = <0x00 0x1f4 0x4970c8 0x1f5 0x320 0x4970c8>;
  7202. qcom,cycle-fcc-ranges-1 = <0x00 0x1f4 0x28cd50 0x1f5 0x320 0x28cd50>;
  7203. qcom,cycle-fv-ranges-0 = <0x00 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  7204. qcom,cycle-fv-ranges-1 = <0x00 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  7205. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  7206. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  7207. qcom,rblt-ranges = <0x00 0x11a08 0x3b8260 0x11a6c 0x20e90 0x401640 0x20ef4 0x23924 0x432380 0x23988 0x2bcc8 0x401640>;
  7208. qcom,rblt-limited-check;
  7209. qcom,step-chg-ranges-0 = <0x2dc6c0 0x401640 0x4970c8 0x401a28 0x432380 0x28cd50>;
  7210. qcom,step-chg-ranges-1 = <0x2dc6c0 0x3d0900 0x28cd50 0x3d0ce8 0x432380 0x28cd50>;
  7211. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  7212. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  7213. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  7214. qcom,jeita-soft-fcc-ua = <0x104fc8 0x104fc8>;
  7215. qcom,jeita-soft-fv-uv = <0x401640 0x401640>;
  7216. qcom,vnow-based-step-chg;
  7217. qcom,taper-fcc;
  7218. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  7219. qcom,nom-batt-capacity-mah = <0x14e4>;
  7220. qcom,batt-id-kohm = <0xc8>;
  7221. qcom,battery-beta = <0x109a>;
  7222. qcom,therm-room-temp = <0x186a0>;
  7223. qcom,battery-type = "5133886_facebook_sealiff_5348mah_averaged_masterslave_apr23rd2021";
  7224. qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
  7225. qcom,therm-center-offset = <0x70>;
  7226. qcom,therm-pull-up = <0x64>;
  7227. qcom,rslow-normal-coeffs = <0x5d 0x02 0x35 0x13>;
  7228. qcom,rslow-low-coeffs = <0x48 0x0c 0x31 0x01>;
  7229. qcom,checksum = <0x6647>;
  7230. qcom,gui-version = "PM855GUI - 1.0.0.14";
  7231. qcom,fg-profile-data = <0x90069e3 0x74dc4fe3 0x52dc0000 0x67bd9883 0xa282 0x55953a80 0x2c005d02 0x35136605 0x5401ce07 0x3200f9eb 0x61eddfdc 0xa60b04e4 0xc9cdc6ea 0x7038dda 0x60004800 0x47004400 0x3a002e00 0x34003500 0x3f004100 0x40006000 0x31003700 0x3c003800 0x34005d00 0x4e644400 0x3df83d00 0x60f05500 0x54007308 0x66105600 0xae207c40 0x6258540f 0x5700d800 0xf21e0d05 0x53ebcb04 0xc01cb30a 0x600c0922 0x94186743 0xa4544d02 0x6511b41e 0xcc06a902 0xfef4cc1c 0x3b023505 0x1e033418 0x6223ee44 0xd6536a14 0xaa1ec1e6 0xf4ca89cd 0xd31cb0b1 0xb904ccbb 0x4518d78a 0xce85569a 0x78a00980 0x1203cf04 0x8cfadef2 0xf86ded 0x4602fcef 0xfcdd5b84 0x3b111df8 0x9fde3403 0xf04ed03 0xce073200 0xd3023d02 0x8207ce04 0x5d03bd07 0xa8025b02 0xac054800 0x3c004400 0x46644800 0x4d104b10 0x4b084a00 0x4c004408 0x3f083900 0x4e285348 0x5c58660d 0x4c005f00 0x68087a00 0x69005000 0x4b106810 0x69007b28 0x92485e60 0x750c7d00 0x81f86e00 0xd8f02026 0xe605000b 0xc8150c1d 0x8e222d45 0x855a8d18 0x1402a005 0xbf039f0f 0x3f0ac11f 0xb1053902 0xb406ab1c 0x79038005 0xaf026f18 0x24026205 0x39026600 0xf21e0d05 0x5303cb04 0xc01cb302 0x60040902 0x94186703 0xa4044d02 0x6500d300 0xc000fa00 0x9160000>;
  7232. };
  7233. };
  7234. };
  7235. };
  7236.  
  7237. fragment@83 {
  7238. target = <0xffffffff>;
  7239.  
  7240. __overlay__ {
  7241. vdd-wlan-dig-supply = <0xffffffff>;
  7242. };
  7243. };
  7244.  
  7245. fragment@84 {
  7246. target = <0xffffffff>;
  7247.  
  7248. __overlay__ {
  7249.  
  7250. bcm_bt_en_default {
  7251. phandle = <0x84>;
  7252.  
  7253. mux {
  7254. pins = "gpio21";
  7255. function = "gpio";
  7256. };
  7257.  
  7258. config {
  7259. pins = "gpio21";
  7260. drive-strength = <0x02>;
  7261. bias-pull-down;
  7262. };
  7263. };
  7264.  
  7265. bcm_bt_wake_default {
  7266. phandle = <0x85>;
  7267.  
  7268. mux {
  7269. pins = "gpio30";
  7270. function = "gpio";
  7271. };
  7272.  
  7273. config {
  7274. pins = "gpio30";
  7275. drive-strength = <0x02>;
  7276. bias-pull-down;
  7277. };
  7278. };
  7279.  
  7280. bcm_bt_hostwake_default {
  7281. phandle = <0x86>;
  7282.  
  7283. mux {
  7284. pins = "gpio31";
  7285. function = "gpio";
  7286. };
  7287.  
  7288. config {
  7289. pins = "gpio31";
  7290. drive-strength = <0x02>;
  7291. bias-pull-down;
  7292. };
  7293. };
  7294.  
  7295. bcmdhd_wlan_en {
  7296. phandle = <0x87>;
  7297.  
  7298. mux {
  7299. pins = "gpio20";
  7300. function = "gpio";
  7301. };
  7302.  
  7303. config {
  7304. pins = "gpio20";
  7305. drive-strength = <0x02>;
  7306. bias-pull-down;
  7307. };
  7308. };
  7309.  
  7310. bcmdhd_wlan_hostwake_default {
  7311. phandle = <0x88>;
  7312.  
  7313. mux {
  7314. pins = "gpio124";
  7315. function = "gpio";
  7316. };
  7317.  
  7318. config {
  7319. pins = "gpio124";
  7320. drive-strength = <0x02>;
  7321. bias-pull-down;
  7322. };
  7323. };
  7324. };
  7325. };
  7326.  
  7327. fragment@85 {
  7328. target = <0xffffffff>;
  7329.  
  7330. __overlay__ {
  7331. wake-gpio;
  7332. pinctrl-0 = <0xffffffff 0xffffffff>;
  7333. pinctrl-1 = <0xffffffff 0xffffffff>;
  7334. };
  7335. };
  7336.  
  7337. fragment@86 {
  7338. target = <0xffffffff>;
  7339.  
  7340. __overlay__ {
  7341. status = "disabled";
  7342. };
  7343. };
  7344.  
  7345. fragment@87 {
  7346. target = <0xffffffff>;
  7347.  
  7348. __overlay__ {
  7349.  
  7350. qcom,cnss-qca6390@b0000000 {
  7351. status = "disabled";
  7352. };
  7353. };
  7354. };
  7355.  
  7356. fragment@88 {
  7357. target = <0xffffffff>;
  7358.  
  7359. __overlay__ {
  7360.  
  7361. bt_qca6390 {
  7362. status = "disabled";
  7363. };
  7364.  
  7365. bt_driver {
  7366. compatible = "brcm,btdriver";
  7367. pinctrl-names = "default";
  7368. pinctrl-0 = <0x84>;
  7369. brcm,bt-reset-gpio = <0xffffffff 0x15 0x00>;
  7370. status = "ok";
  7371. };
  7372.  
  7373. bt_bluesleep {
  7374. compatible = "brcm,bluesleep";
  7375. brcm,bt-wake-gpio = <0xffffffff 0x1e 0x00>;
  7376. brcm,bt-host-wake-gpio = <0xffffffff 0x1f 0x00>;
  7377. pinctrl-names = "default";
  7378. pinctrl-0 = <0x85 0x86>;
  7379. status = "ok";
  7380. phandle = <0x18c>;
  7381. };
  7382.  
  7383. bcmdhd_wlan {
  7384. compatible = "android,bcmdhd_wlan";
  7385. wlan-en-gpio = <0xffffffff 0x14 0x00>;
  7386. wlan-host-wake-gpio = <0xffffffff 0x7c 0x00>;
  7387. pinctrl-names = "default";
  7388. pinctrl-0 = <0x87 0x88>;
  7389. status = "ok";
  7390. };
  7391. };
  7392. };
  7393.  
  7394. fragment@89 {
  7395. target = <0xffffffff>;
  7396.  
  7397. __overlay__ {
  7398.  
  7399. eye_face_led_default {
  7400. phandle = <0x89>;
  7401.  
  7402. mux {
  7403. pins = "gpio12\0gpio13";
  7404. function = "gpio";
  7405. };
  7406.  
  7407. config {
  7408. pins = "gpio12\0gpio13";
  7409. drive-strength = <0x02>;
  7410. input-enable;
  7411. bias-disable;
  7412. };
  7413. };
  7414. };
  7415. };
  7416.  
  7417. fragment@90 {
  7418. target = <0xffffffff>;
  7419.  
  7420. __overlay__ {
  7421.  
  7422. oculus,eye_face_led {
  7423. status = "ok";
  7424. compatible = "oculus,eye_face_led";
  7425. pinctrl-names = "default";
  7426. pinctrl-0 = <0x89>;
  7427. phandle = <0x18d>;
  7428. };
  7429. };
  7430. };
  7431.  
  7432. fragment@91 {
  7433. target = <0xffffffff>;
  7434.  
  7435. __overlay__ {
  7436.  
  7437. oculus,safetyboss-swd {
  7438. compatible = "oculus,swd";
  7439. pinctrl-names = "swd_default";
  7440. pinctrl-0 = <0x8a 0x8b>;
  7441. oculus,swd-flavor = "stm32g0";
  7442. oculus,fw-path = "safetyboss.bin";
  7443. oculus,swd-clk = <0xffffffff 0x0f 0x00>;
  7444. oculus,swd-io = <0xffffffff 0x0e 0x00>;
  7445. oculus,swd-core-voltage-level = <0x1b9680 0x1b9680>;
  7446. oculus,flash-block-size = <0x08>;
  7447. oculus,flash-page-size = <0x800>;
  7448. oculus,flash-page-count = <0x40>;
  7449. oculus,flash-page-retained-count = <0x06>;
  7450. };
  7451. };
  7452. };
  7453.  
  7454. fragment@92 {
  7455. target = <0xffffffff>;
  7456.  
  7457. __overlay__ {
  7458.  
  7459. safetyboss_float_swd {
  7460. phandle = <0x8b>;
  7461.  
  7462. mux {
  7463. pins = "gpio14\0gpio15";
  7464. function = "gpio";
  7465. };
  7466.  
  7467. config {
  7468. pins = "gpio14\0gpio15";
  7469. drive-strength = <0x06>;
  7470. bias-disable;
  7471. input-enable;
  7472. };
  7473. };
  7474.  
  7475. safetyboss_reset_default {
  7476. phandle = <0x8a>;
  7477.  
  7478. mux {
  7479. pins = "gpio11";
  7480. function = "gpio";
  7481. };
  7482.  
  7483. config {
  7484. pins = "gpio11";
  7485. bias-pull-up;
  7486. };
  7487. };
  7488. };
  7489. };
  7490.  
  7491. fragment@93 {
  7492. target = <0xffffffff>;
  7493.  
  7494. __overlay__ {
  7495.  
  7496. qcom,cam-sensor0 {
  7497. csiphy-sd-index = <0x02>;
  7498. };
  7499.  
  7500. qcom,cam-sensor1 {
  7501. csiphy-sd-index = <0x04>;
  7502. };
  7503.  
  7504. qcom,cam-sensor2 {
  7505. csiphy-sd-index = <0x01>;
  7506. };
  7507.  
  7508. qcom,cam-sensor3 {
  7509. csiphy-sd-index = <0x05>;
  7510. };
  7511.  
  7512. qcom,cam-sensor4 {
  7513. csiphy-sd-index = <0x00>;
  7514. };
  7515.  
  7516. qcom,cam-sensor5 {
  7517. csiphy-sd-index = <0x03>;
  7518. };
  7519. };
  7520. };
  7521.  
  7522. fragment@94 {
  7523. target = <0xffffffff>;
  7524.  
  7525. __overlay__ {
  7526. qcom,platform-phy-drive-strength = <0xf4 0x1f 0xf8 0x1f 0xfc 0x1f 0x20 0x50 0x110 0x55>;
  7527. };
  7528. };
  7529.  
  7530. fragment@95 {
  7531. target = <0xffffffff>;
  7532.  
  7533. __overlay__ {
  7534. qcom,platform-phy-drive-strength = <0xf4 0x1f 0xf8 0x1f 0xfc 0x1f 0x20 0x50 0x110 0x55>;
  7535. };
  7536. };
  7537.  
  7538. fragment@96 {
  7539. target = <0xffffffff>;
  7540.  
  7541. __overlay__ {
  7542. qcom,init-voltage = <0x1b7740>;
  7543. qcom,init-mode = <0x04>;
  7544. };
  7545. };
  7546.  
  7547. fragment@97 {
  7548. target = <0xffffffff>;
  7549.  
  7550. __overlay__ {
  7551. status = "disabled";
  7552. };
  7553. };
  7554.  
  7555. fragment@98 {
  7556. target = <0xffffffff>;
  7557.  
  7558. __overlay__ {
  7559. status = "disabled";
  7560. };
  7561. };
  7562.  
  7563. fragment@99 {
  7564. target = <0xffffffff>;
  7565.  
  7566. __overlay__ {
  7567. regulator-max-microvolt = <0x2dc6c0>;
  7568. qcom,init-voltage = <0x2dc6c0>;
  7569. qcom,init-mode = <0x04>;
  7570. };
  7571. };
  7572.  
  7573. fragment@100 {
  7574. target = <0xffffffff>;
  7575.  
  7576. __overlay__ {
  7577. qcom,init-mode = <0x04>;
  7578. qcom,init-voltage = <0x2f9b80>;
  7579. };
  7580. };
  7581.  
  7582. fragment@101 {
  7583. target = <0xffffffff>;
  7584.  
  7585. __overlay__ {
  7586.  
  7587. quin_mi2s_gpios {
  7588. compatible = "qcom,msm-cdc-pinctrl";
  7589. pinctrl-names = "aud_active\0aud_sleep";
  7590. pinctrl-0 = <0x8c 0x8d 0x8e 0x8f>;
  7591. pinctrl-1 = <0x90 0x91 0x92 0x93>;
  7592. qcom,lpi-gpios;
  7593. phandle = <0x46>;
  7594. };
  7595. };
  7596. };
  7597.  
  7598. fragment@102 {
  7599. target = <0xffffffff>;
  7600.  
  7601. __overlay__ {
  7602. status = "disabled";
  7603. };
  7604. };
  7605.  
  7606. fragment@103 {
  7607. target = <0xffffffff>;
  7608.  
  7609. __overlay__ {
  7610. status = "disabled";
  7611. };
  7612. };
  7613.  
  7614. fragment@104 {
  7615. target = <0xffffffff>;
  7616.  
  7617. __overlay__ {
  7618. status = "ok";
  7619. qcom,rt;
  7620.  
  7621. blu_left@0 {
  7622. compatible = "oculus,seacliff-blu-spi";
  7623. reg = <0x00>;
  7624. spi-max-frequency = <0xe4e1c0>;
  7625. oculus,blu-init-matrix = [21 04 80 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 00 00 00 00 1f fe 1f fe 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1f fe 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 00 00 1f fe 1f fe 1f fe 00 00 00 00 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f ff 1f fe 1f fe 1f fe 1f fe 00 00 00 00 00 00 1f fe 1f fe 1f fe 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 00 00 1f fe 00 00 00 00 00 00 00 00 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 01];
  7626. oculus,blu-irq-gpio = <0xffffffff 0x6f 0x00>;
  7627. oculus,blu-name = "seacliff-left-blu";
  7628. oculus,continuous-splash;
  7629. phandle = <0x74>;
  7630. };
  7631. };
  7632. };
  7633.  
  7634. fragment@105 {
  7635. target = <0xffffffff>;
  7636.  
  7637. __overlay__ {
  7638. status = "ok";
  7639. qcom,rt;
  7640.  
  7641. blu_right@0 {
  7642. compatible = "oculus,seacliff-blu-spi";
  7643. reg = <0x00>;
  7644. spi-max-frequency = <0xe4e1c0>;
  7645. oculus,blu-init-matrix = [21 04 80 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 00 00 00 00 1f fe 1f fe 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1f fe 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 00 00 1f fe 1f fe 1f fe 00 00 00 00 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f ff 1f fe 1f fe 1f fe 1f fe 00 00 00 00 00 00 1f fe 1f fe 1f fe 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 00 00 1f fe 00 00 00 00 00 00 00 00 00 00 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 1f fe 01];
  7646. oculus,blu-irq-gpio = <0xffffffff 0x70 0x00>;
  7647. oculus,blu-name = "seacliff-right-blu";
  7648. oculus,continuous-splash;
  7649. phandle = <0x75>;
  7650. };
  7651. };
  7652. };
  7653.  
  7654. fragment@106 {
  7655. target = <0xffffffff>;
  7656.  
  7657. __overlay__ {
  7658.  
  7659. cypd3177@08 {
  7660. compatible = "cy,cypd3177";
  7661. reg = <0x08>;
  7662. status = "disabled";
  7663. cy,hpi-gpio = <0xffffffff 0x16 0x00>;
  7664. cy,fault-gpio = <0xffffffff 0x17 0x01>;
  7665. interrupt-parent = <0xffffffff>;
  7666. interrupts = <0x0d 0x02 0x0e 0x01>;
  7667. interrupt-names = "cypd3177_hpi_irq\0cypd3177_fault_irq";
  7668. pinctrl-names = "default";
  7669. pinctrl-0 = <0x94>;
  7670. phandle = <0x96>;
  7671. };
  7672. };
  7673. };
  7674.  
  7675. fragment@107 {
  7676. target = <0xffffffff>;
  7677.  
  7678. __overlay__ {
  7679.  
  7680. blu_gpio_regulator@1 {
  7681. compatible = "regulator-fixed";
  7682. regulator-name = "display_panel_blu_en";
  7683. regulator-min-microvolt = <0x1b7740>;
  7684. regulator-max-microvolt = <0x1b7740>;
  7685. regulator-enable-ramp-delay = <0xe9>;
  7686. gpio = <0xffffffff 0x59 0x00>;
  7687. enable-active-high;
  7688. regulator-boot-on;
  7689. pinctrl-names = "default";
  7690. pinctrl-0 = <0x95>;
  7691. phandle = <0x27>;
  7692. };
  7693. };
  7694. };
  7695.  
  7696. fragment@108 {
  7697. target = <0xffffffff>;
  7698.  
  7699. __overlay__ {
  7700. qcom,msm-cpudai-tdm-lane-mask = [00 01];
  7701. qcom,msm-cpudai-tdm-sync-mode = <0x00>;
  7702. qcom,msm-cpudai-tdm-invert-sync = <0x00>;
  7703. qcom,msm-cpudai-tdm-data-delay = <0x00>;
  7704. };
  7705. };
  7706.  
  7707. fragment@109 {
  7708. target = <0xffffffff>;
  7709.  
  7710. __overlay__ {
  7711. qcom,msm-cpudai-tdm-lane-mask = [00 02];
  7712. qcom,msm-cpudai-tdm-sync-mode = <0x00>;
  7713. qcom,msm-cpudai-tdm-invert-sync = <0x00>;
  7714. qcom,msm-cpudai-tdm-data-delay = <0x00>;
  7715. };
  7716. };
  7717.  
  7718. fragment@110 {
  7719. target = <0xffffffff>;
  7720.  
  7721. __overlay__ {
  7722.  
  7723. imu-usr {
  7724. polling-delay-passive = <0x00>;
  7725. polling-delay = <0x00>;
  7726. thermal-governor = "user_space";
  7727. thermal-sensors = <0x35 0x4d>;
  7728.  
  7729. trips {
  7730.  
  7731. active-config0 {
  7732. temperature = <0x1e848>;
  7733. hysteresis = <0x3e8>;
  7734. type = "passive";
  7735. };
  7736. };
  7737. };
  7738.  
  7739. pogo-usr {
  7740. polling-delay-passive = <0x00>;
  7741. polling-delay = <0x00>;
  7742. thermal-governor = "user_space";
  7743. thermal-sensors = <0x37 0x53>;
  7744.  
  7745. trips {
  7746.  
  7747. active-config0 {
  7748. temperature = <0x1e848>;
  7749. hysteresis = <0x3e8>;
  7750. type = "passive";
  7751. };
  7752. };
  7753. };
  7754.  
  7755. soc-usr {
  7756. polling-delay-passive = <0x00>;
  7757. polling-delay = <0x00>;
  7758. thermal-governor = "user_space";
  7759. thermal-sensors = <0x36 0x4e>;
  7760.  
  7761. trips {
  7762.  
  7763. active-config0 {
  7764. temperature = <0x1e848>;
  7765. hysteresis = <0x3e8>;
  7766. type = "passive";
  7767. };
  7768. };
  7769. };
  7770. };
  7771. };
  7772.  
  7773. fragment@111 {
  7774. target = <0xffffffff>;
  7775.  
  7776. __overlay__ {
  7777.  
  7778. cm7120_headphone_det_default {
  7779. phandle = <0x3d>;
  7780.  
  7781. mux {
  7782. pins = "gpio113\0gpio121";
  7783. function = "gpio";
  7784. };
  7785.  
  7786. config {
  7787. pins = "gpio113\0gpio121";
  7788. drive-strength = <0x02>;
  7789. input-enable;
  7790. bias-disable;
  7791. };
  7792. };
  7793.  
  7794. cypd3177_irq_default {
  7795. phandle = <0x94>;
  7796.  
  7797. mux {
  7798. pins = "gpio22\0gpio23";
  7799. function = "gpio";
  7800. };
  7801.  
  7802. config {
  7803. pins = "gpio22\0gpio23";
  7804. drive-strength = <0x02>;
  7805. input-enable;
  7806. };
  7807. };
  7808.  
  7809. display_panel_blu_en_default {
  7810. phandle = <0x95>;
  7811.  
  7812. mux {
  7813. pins = "gpio89";
  7814. function = "gpio";
  7815. };
  7816.  
  7817. config {
  7818. pins = "gpio89";
  7819. drive-strength = <0x08>;
  7820. bias-disable = <0x00>;
  7821. output-high;
  7822. };
  7823. };
  7824.  
  7825. seacliff_blu_en_active {
  7826. phandle = <0x22>;
  7827.  
  7828. mux {
  7829. pins = "gpio88";
  7830. function = "gpio";
  7831. };
  7832.  
  7833. config {
  7834. pins = "gpio88";
  7835. drive-strength = <0x08>;
  7836. output-high;
  7837. bias-pull-up;
  7838. };
  7839. };
  7840.  
  7841. seacliff_blu_en_suspend {
  7842. phandle = <0x23>;
  7843.  
  7844. mux {
  7845. pins = "gpio88";
  7846. function = "gpio";
  7847. };
  7848.  
  7849. config {
  7850. pins = "gpio88";
  7851. drive-strength = <0x08>;
  7852. output-low;
  7853. bias-pull-down;
  7854. };
  7855. };
  7856. };
  7857. };
  7858.  
  7859. fragment@112 {
  7860. target = <0xffffffff>;
  7861.  
  7862. __overlay__ {
  7863.  
  7864. oculus,charging_dock {
  7865. status = "ok";
  7866. compatible = "oculus,charging-dock";
  7867. svid = <0x28330000>;
  7868. charger-cypd = <0x96>;
  7869. phandle = <0x18e>;
  7870. };
  7871. };
  7872. };
  7873.  
  7874. fragment@113 {
  7875. target = <0xffffffff>;
  7876.  
  7877. __overlay__ {
  7878.  
  7879. qcom,cam-sensor4 {
  7880. status = "disabled";
  7881. };
  7882.  
  7883. qcom,cam-sensor6 {
  7884. cell-index = <0x06>;
  7885. compatible = "qcom,cam-sensor";
  7886. csiphy-sd-index = <0x00>;
  7887. cam_avdd-supply = <0xffffffff>;
  7888. cam_dovdd-supply = <0xffffffff>;
  7889. cam_dvdd-supply = <0xffffffff>;
  7890. cam_clk-supply = <0xffffffff>;
  7891. regulator-names = "cam_avdd\0cam_dovdd\0cam_dvdd\0cam_clk";
  7892. rgltr-cntrl-support;
  7893. pwm-switch;
  7894. rgltr-min-voltage = <0x2d2a80 0x1b7740 0x100590 0x00>;
  7895. rgltr-max-voltage = <0x2d2a80 0x1b7740 0x100590 0x00>;
  7896. rgltr-load-current = <0x13880 0x1d4c0 0x100590 0x00>;
  7897. gpio-no-mux = <0x00>;
  7898. pinctrl-names = "cam_default\0cam_suspend";
  7899. pinctrl-0 = <0xffffffff>;
  7900. pinctrl-1 = <0xffffffff>;
  7901. gpios = <0xffffffff 0x5e 0x00>;
  7902. gpio-req-tbl-num = <0x00>;
  7903. gpio-req-tbl-flags = <0x01>;
  7904. gpio-req-tbl-label = "CAMIF_MCLK0";
  7905. sensor-mode = <0x00>;
  7906. cci-master = <0x01>;
  7907. clocks = <0xffffffff 0x49>;
  7908. clock-names = "cam_clk";
  7909. clock-cntl-level = "turbo";
  7910. clock-rates = <0x124f800>;
  7911. oculus,cam-mclk-no-power-down;
  7912. };
  7913. };
  7914. };
  7915.  
  7916. fragment@114 {
  7917. target = <0xffffffff>;
  7918.  
  7919. __overlay__ {
  7920.  
  7921. oculusnrf@0 {
  7922.  
  7923. swd@0 {
  7924. oculus,fw-path = "syncboss-ipl-spl.bin";
  7925. };
  7926. };
  7927. };
  7928. };
  7929.  
  7930. fragment@115 {
  7931. target = <0xffffffff>;
  7932.  
  7933. __overlay__ {
  7934.  
  7935. oculusnrf@0 {
  7936.  
  7937. swd@0 {
  7938. oculus,fw-path = "syncboss-ipl-spl.bin";
  7939. };
  7940. };
  7941. };
  7942. };
  7943.  
  7944. __symbols__ {
  7945. pm8150_tz = "/fragment@0/__overlay__/qcom,pm8150@0/qcom,temp-alarm@2400";
  7946. pm8150_clkdiv = "/fragment@0/__overlay__/qcom,pm8150@0/clock-controller@5b00";
  7947. pm8150_sdam_2 = "/fragment@0/__overlay__/qcom,pm8150@0/sdam@b100";
  7948. pm8150_gpios = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000";
  7949. key_home_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/key_home/key_home_default";
  7950. imu_clkin_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/imu_clkin/imu_clkin_default";
  7951. imu_clkin_sleep = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/imu_clkin/imu_clkin_sleep";
  7952. key_vol_up_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/key_vol_up/key_vol_up_default";
  7953. key_confirm_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/key_confirm/key_confirm_default";
  7954. usb2_vbus_boost_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/usb2_vbus_boost/usb2_vbus_boost_default";
  7955. usb2_vbus_det_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/usb2_vbus_det/usb2_vbus_det_default";
  7956. pm_gpio_adc_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/pm8150_adc_therm/pm_gpio_adc_default";
  7957. pm8150_rtc = "/fragment@0/__overlay__/qcom,pm8150@0/qcom,pm8150_rtc";
  7958. pm8150_vadc = "/fragment@0/__overlay__/qcom,pm8150@0/vadc@3100";
  7959. pm8150_adc_tm = "/fragment@0/__overlay__/qcom,pm8150@0/adc_tm@3500";
  7960. pm8150_temp_alarm = "/fragment@1/__overlay__/pm8150_tz";
  7961. pm8150_trip0 = "/fragment@1/__overlay__/pm8150_tz/trips/trip0";
  7962. pm8150_trip1 = "/fragment@1/__overlay__/pm8150_tz/trips/trip1";
  7963. pm8150b_revid = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,revid@100";
  7964. pm8150b_tz = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,temp-alarm@2400";
  7965. pm8150b_clkdiv = "/fragment@2/__overlay__/qcom,pm8150b@2/clock-controller@6000";
  7966. pm8150b_pbs1 = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,pbs@7200";
  7967. pm8150b_qnovo = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,sdam-qnovo@b000";
  7968. pm8150b_gpios = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000";
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  7978. pm8150b_charger = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5";
  7979. smb5_vconn = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5/qcom,smb5-vconn";
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  7981. smb5_otg_boost = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5/qcom,smb5-otg_boost";
  7982. pm8150b_pdphy = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,usb-pdphy@1700";
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  7985. pm8150b_fg = "/fragment@2/__overlay__/qcom,pm8150b@2/qpnp,fg";
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  7987. pm8150b_adc_tm = "/fragment@2/__overlay__/qcom,pm8150b@2/adc_tm@3500";
  7988. pm8150b_pwm = "/fragment@2/__overlay__/qcom,pm8150b@3/qcom,pwms@b100";
  7989. pm8150b_hr_led = "/fragment@2/__overlay__/qcom,pm8150b@3/qcom,leds@d000";
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  8005. pm8150l_clkdiv = "/fragment@4/__overlay__/qcom,pm8150l@4/clock-controller@5b00";
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  8030. wled_torch = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,wled@d800/qcom,wled-torch";
  8031. wled_switch = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,wled@d800/qcom,wled-switch";
  8032. pm8150l_lpg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,pwms@b100";
  8033. pm8150l_pwm = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,pwms@bc00";
  8034. pm8150l_rgb_led = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d000";
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  8046. pm8009_gpios = "/fragment@6/__overlay__/qcom,pm8009@a/pinctrl@c000";
  8047. vreg_tof = "/fragment@8/__overlay__/regulator-dbb1";
  8048. vreg_hap_boost = "/fragment@8/__overlay__/regulator-haptics-boost";
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  8051. ext_disp_audio_codec = "/fragment@12/__overlay__/qcom,msm-ext-disp/qcom,msm-ext-disp-audio-codec-rx";
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  8053. dsi_panel_pwr_supply_lab_ibb = "/fragment@12/__overlay__/dsi_panel_pwr_supply_lab_ibb";
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  8055. display_panel_avdd = "/fragment@12/__overlay__/display_gpio_regulator@1";
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  8057. sde_dsi1 = "/fragment@12/__overlay__/qcom,dsi-display-secondary";
  8058. sde_wb = "/fragment@12/__overlay__/qcom,wb-display@0";
  8059. msm_notifier = "/fragment@12/__overlay__/qcom,msm_notifier@0";
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  8111. lpi_tdm2_sck_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_tdm2_sck/lpi_tdm2_sck_active";
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  8124. quat_aux_sd1_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/quat_aux_sd1/quat_aux_sd1_sleep";
  8125. quat_aux_sd1_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/quat_aux_sd1/quat_aux_sd1_active";
  8126. quat_aux_sd2_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/quat_aux_sd2/quat_aux_sd2_sleep";
  8127. quat_aux_sd2_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/quat_aux_sd2/quat_aux_sd2_active";
  8128. quat_aux_sd3_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/quat_aux_sd3/quat_aux_sd3_sleep";
  8129. quat_aux_sd3_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/quat_aux_sd3/quat_aux_sd3_active";
  8130. lpi_aux1_sck_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_sck/lpi_aux1_sck_sleep";
  8131. lpi_aux1_sck_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_sck/lpi_aux1_sck_active";
  8132. lpi_aux1_ws_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_ws/lpi_aux1_ws_sleep";
  8133. lpi_aux1_ws_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_ws/lpi_aux1_ws_active";
  8134. lpi_aux1_sd0_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_sd0/lpi_aux1_sd0_sleep";
  8135. lpi_aux1_sd0_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_sd0/lpi_aux1_sd0_active";
  8136. lpi_aux1_sd1_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_sd1/lpi_aux1_sd1_sleep";
  8137. lpi_aux1_sd1_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux1_sd1/lpi_aux1_sd1_active";
  8138. lpi_aux2_sck_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_sck/lpi_aux2_sck_sleep";
  8139. lpi_aux2_sck_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_sck/lpi_aux2_sck_active";
  8140. lpi_aux2_ws_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_ws/lpi_aux2_ws_sleep";
  8141. lpi_aux2_ws_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_ws/lpi_aux2_ws_active";
  8142. lpi_aux2_sd0_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_sd0/lpi_aux2_sd0_sleep";
  8143. lpi_aux2_sd0_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_sd0/lpi_aux2_sd0_active";
  8144. lpi_aux2_sd1_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_sd1/lpi_aux2_sd1_sleep";
  8145. lpi_aux2_sd1_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/lpi_aux2_sd1/lpi_aux2_sd1_active";
  8146. wsa_swr_clk_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/wsa_swr_clk_pin/wsa_swr_clk_sleep";
  8147. wsa_swr_clk_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/wsa_swr_clk_pin/wsa_swr_clk_active";
  8148. wsa_swr_data_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/wsa_swr_data_pin/wsa_swr_data_sleep";
  8149. wsa_swr_data_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/wsa_swr_data_pin/wsa_swr_data_active";
  8150. tx_swr_clk_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/tx_swr_clk_sleep";
  8151. tx_swr_clk_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/tx_swr_clk_active";
  8152. tx_swr_data1_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/tx_swr_data1_sleep";
  8153. tx_swr_data1_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/tx_swr_data1_active";
  8154. tx_swr_data2_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/tx_swr_data2_sleep";
  8155. tx_swr_data2_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/tx_swr_data2_active";
  8156. rx_swr_clk_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/rx_swr_clk_sleep";
  8157. rx_swr_clk_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/rx_swr_clk_active";
  8158. rx_swr_data_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/rx_swr_data_sleep";
  8159. rx_swr_data_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/rx_swr_data_active";
  8160. rx_swr_data1_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/rx_swr_data1_sleep";
  8161. rx_swr_data1_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/rx_swr_data1_active";
  8162. cdc_dmic01_clk_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic01_clk_active";
  8163. cdc_dmic01_clk_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic01_clk_sleep";
  8164. cdc_dmic01_data_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic01_data_active";
  8165. cdc_dmic01_data_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic01_data_sleep";
  8166. cdc_dmic23_clk_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic23_clk_active";
  8167. cdc_dmic23_clk_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic23_clk_sleep";
  8168. cdc_dmic23_data_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic23_data_active";
  8169. cdc_dmic23_data_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic23_data_sleep";
  8170. cdc_dmic45_clk_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic45_clk_active";
  8171. cdc_dmic45_clk_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic45_clk_sleep";
  8172. cdc_dmic45_data_active = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic45_data_active";
  8173. cdc_dmic45_data_sleep = "/fragment@23/__overlay__/lpi_pinctrl@33c0000/dmic45_data_sleep";
  8174. pri_mi2s_sleep = "/fragment@26/__overlay__/pri_mi2s/pri_mi2s_sleep";
  8175. pri_mi2s_active = "/fragment@26/__overlay__/pri_mi2s/pri_mi2s_active";
  8176. cm7120_speaker_en_default = "/fragment@26/__overlay__/cm7120_speaker_en_pins/cm7120_speaker_en_default";
  8177. cm7120_speaker_en_suspend = "/fragment@26/__overlay__/cm7120_speaker_en_pins/cm7120_speaker_en_suspend";
  8178. cm7120_codec_ldo_en_default = "/fragment@26/__overlay__/cm7120_codec_ldo_en_pins/cm7120_codec_ldo_en_default";
  8179. cm7120_codec_ldo_en_suspend = "/fragment@26/__overlay__/cm7120_codec_ldo_en_pins/cm7120_ldo_en_suspend";
  8180. cm7120_codec_reset_default = "/fragment@26/__overlay__/cm7120_codec_reset_pins/cm7120_codec_reset_default";
  8181. cm7120_codec_reset_suspend = "/fragment@26/__overlay__/cm7120_codec_reset_pins/cm7120_reset_suspend";
  8182. clock_audio_va_1 = "/fragment@27/__overlay__/va_core_clk";
  8183. pcm_noirq = "/fragment@27/__overlay__/qcom,msm-pcm-dsp-noirq";
  8184. cm7120 = "/fragment@29/__overlay__/cm7120@2d";
  8185. cm7120_snd = "/fragment@31/__overlay__/cm7120_snd";
  8186. pri_mi2s_gpios = "/fragment@31/__overlay__/pri_mi2s_gpios";
  8187. fan_tach_default_0 = "/fragment@42/__overlay__/fan_tach_default@0";
  8188. fan_tach_default_1 = "/fragment@42/__overlay__/fan_tach_default@1";
  8189. fan_0 = "/fragment@43/__overlay__/qcom,pm8150l@5/pwm-tach-fan@0";
  8190. fan_1 = "/fragment@43/__overlay__/qcom,pm8150l@5/pwm-tach-fan@1";
  8191. batt_fan_trip0 = "/fragment@44/__overlay__/batt-fan/trips/batt_fan_trip0";
  8192. batt_fan_trip1 = "/fragment@44/__overlay__/batt-fan/trips/batt_fan_trip1";
  8193. batt_fan_0_map0 = "/fragment@44/__overlay__/batt-fan/cooling-maps/batt_fan_0_map0";
  8194. batt_fan_0_map1 = "/fragment@44/__overlay__/batt-fan/cooling-maps/batt_fan_0_map1";
  8195. batt_fan_1_map0 = "/fragment@44/__overlay__/batt-fan/cooling-maps/batt_fan_1_map0";
  8196. batt_fan_1_map1 = "/fragment@44/__overlay__/batt-fan/cooling-maps/batt_fan_1_map1";
  8197. cpu_0_0_fan_trip0 = "/fragment@44/__overlay__/cpu-0-0-fan/trips/cpu_0_0_fan_trip0";
  8198. cpu_0_0_fan_trip1 = "/fragment@44/__overlay__/cpu-0-0-fan/trips/cpu_0_0_fan_trip1";
  8199. cpu_0_0_fan_map0 = "/fragment@44/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_map0";
  8200. cpu_0_0_fan_map1 = "/fragment@44/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_map1";
  8201. cpu_0_0_fan_1_map0 = "/fragment@44/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_1_map0";
  8202. cpu_0_0_fan_1_map1 = "/fragment@44/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_1_map1";
  8203. cpu_0_1_fan_trip0 = "/fragment@44/__overlay__/cpu-0-1-fan/trips/cpu_0_1_fan_trip0";
  8204. cpu_0_1_fan_trip1 = "/fragment@44/__overlay__/cpu-0-1-fan/trips/cpu_0_1_fan_trip1";
  8205. cpu_0_1_fan_map0 = "/fragment@44/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_map0";
  8206. cpu_0_1_fan_map1 = "/fragment@44/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_map1";
  8207. cpu_0_1_fan_1_map0 = "/fragment@44/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_1_map0";
  8208. cpu_0_1_fan_1_map1 = "/fragment@44/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_1_map1";
  8209. cpu_0_2_fan_trip0 = "/fragment@44/__overlay__/cpu-0-2-fan/trips/cpu_0_2_fan_trip0";
  8210. cpu_0_2_fan_trip1 = "/fragment@44/__overlay__/cpu-0-2-fan/trips/cpu_0_2_fan_trip1";
  8211. cpu_0_2_fan_map0 = "/fragment@44/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_map0";
  8212. cpu_0_2_fan_map1 = "/fragment@44/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_map1";
  8213. cpu_0_2_fan_1_map0 = "/fragment@44/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_1_map0";
  8214. cpu_0_2_fan_1_map1 = "/fragment@44/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_1_map1";
  8215. cpu_0_3_fan_trip0 = "/fragment@44/__overlay__/cpu-0-3-fan/trips/cpu_0_3_fan_trip0";
  8216. cpu_0_3_fan_trip1 = "/fragment@44/__overlay__/cpu-0-3-fan/trips/cpu_0_3_fan_trip1";
  8217. cpu_0_3_fan_map0 = "/fragment@44/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_map0";
  8218. cpu_0_3_fan_map1 = "/fragment@44/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_map1";
  8219. cpu_0_3_fan_1_map0 = "/fragment@44/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_1_map0";
  8220. cpu_0_3_fan_1_map1 = "/fragment@44/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_1_map1";
  8221. cpu_1_0_fan_trip0 = "/fragment@44/__overlay__/cpu-1-0-fan/trips/cpu_1_0_fan_trip0";
  8222. cpu_1_0_fan_trip1 = "/fragment@44/__overlay__/cpu-1-0-fan/trips/cpu_1_0_fan_trip1";
  8223. cpu_1_0_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_0_map0";
  8224. cpu_1_0_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_0_map1";
  8225. cpu_1_0_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_1_map0";
  8226. cpu_1_0_fan_map1 = "/fragment@44/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_map1";
  8227. cpu_1_1_fan_trip0 = "/fragment@44/__overlay__/cpu-1-1-fan/trips/cpu_1_1_fan_trip0";
  8228. cpu_1_1_fan_trip1 = "/fragment@44/__overlay__/cpu-1-1-fan/trips/cpu_1_1_fan_trip1";
  8229. cpu_1_1_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_0_map0";
  8230. cpu_1_1_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_0_map1";
  8231. cpu_1_1_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_1_map0";
  8232. cpu_1_1_fan_map1 = "/fragment@44/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_map1";
  8233. cpu_1_2_fan_trip0 = "/fragment@44/__overlay__/cpu-1-2-fan/trips/cpu_1_2_fan_trip0";
  8234. cpu_1_2_fan_trip1 = "/fragment@44/__overlay__/cpu-1-2-fan/trips/cpu_1_2_fan_trip1";
  8235. cpu_1_2_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_0_map0";
  8236. cpu_1_2_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_0_map1";
  8237. cpu_1_2_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_1_map0";
  8238. cpu_1_2_fan_map1 = "/fragment@44/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_map1";
  8239. cpu_1_3_fan_trip0 = "/fragment@44/__overlay__/cpu-1-3-fan/trips/cpu_1_3_fan_trip0";
  8240. cpu_1_3_fan_trip1 = "/fragment@44/__overlay__/cpu-1-3-fan/trips/cpu_1_3_fan_trip1";
  8241. cpu_1_3_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_0_map0";
  8242. cpu_1_3_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_0_map1";
  8243. cpu_1_3_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_1_map0";
  8244. cpu_1_3_fan_1_map1 = "/fragment@44/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_1_map1";
  8245. cpu_1_4_fan_trip0 = "/fragment@44/__overlay__/cpu-1-4-fan/trips/cpu_1_4_fan_trip0";
  8246. cpu_1_4_fan_trip1 = "/fragment@44/__overlay__/cpu-1-4-fan/trips/cpu_1_4_fan_trip1";
  8247. cpu_1_4_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_0_map0";
  8248. cpu_1_4_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_0_map1";
  8249. cpu_1_4_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_1_map0";
  8250. cpu_1_4_fan_1_map1 = "/fragment@44/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_1_map1";
  8251. cpu_1_5_fan_trip0 = "/fragment@44/__overlay__/cpu-1-5-fan/trips/cpu_1_5_fan_trip0";
  8252. cpu_1_5_fan_trip1 = "/fragment@44/__overlay__/cpu-1-5-fan/trips/cpu_1_5_fan_trip1";
  8253. cpu_1_5_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_0_map0";
  8254. cpu_1_5_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_0_map1";
  8255. cpu_1_5_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_1_map0";
  8256. cpu_1_5_fan_1_map1 = "/fragment@44/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_1_map1";
  8257. cpu_1_6_fan_trip0 = "/fragment@44/__overlay__/cpu-1-6-fan/trips/cpu_1_6_fan_trip0";
  8258. cpu_1_6_fan_trip1 = "/fragment@44/__overlay__/cpu-1-6-fan/trips/cpu_1_6_fan_trip1";
  8259. cpu_1_6_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_0_map0";
  8260. cpu_1_6_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_0_map1";
  8261. cpu_1_6_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_1_map0";
  8262. cpu_1_6_fan_1_map1 = "/fragment@44/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_1_map1";
  8263. cpu_1_7_fan_trip0 = "/fragment@44/__overlay__/cpu-1-7-fan/trips/cpu_1_7_fan_trip0";
  8264. cpu_1_7_fan_trip1 = "/fragment@44/__overlay__/cpu-1-7-fan/trips/cpu_1_7_fan_trip1";
  8265. cpu_1_7_fan_0_map0 = "/fragment@44/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_0_map0";
  8266. cpu_1_7_fan_0_map1 = "/fragment@44/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_0_map1";
  8267. cpu_1_7_fan_1_map0 = "/fragment@44/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_1_map0";
  8268. cpu_1_7_fan_1_map1 = "/fragment@44/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_1_map1";
  8269. cpuss_0_fan_trip0 = "/fragment@44/__overlay__/cpuss-0-fan/trips/cpuss_0_fan_trip0";
  8270. cpuss_0_fan_trip1 = "/fragment@44/__overlay__/cpuss-0-fan/trips/cpuss_0_fan_trip1";
  8271. cpuss_0_fan_0_map0 = "/fragment@44/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_0_map0";
  8272. cpuss_0_fan_0_map1 = "/fragment@44/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_0_map1";
  8273. cpuss_0_fan_1_map0 = "/fragment@44/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_1_map0";
  8274. cpuss_0_fan_1_map1 = "/fragment@44/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_1_map1";
  8275. cpuss_1_fan_trip0 = "/fragment@44/__overlay__/cpuss-1-fan/trips/cpuss_1_fan_trip0";
  8276. cpuss_1_fan_trip1 = "/fragment@44/__overlay__/cpuss-1-fan/trips/cpuss_1_fan_trip1";
  8277. cpuss_1_fan_0_map0 = "/fragment@44/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_0_map0";
  8278. cpuss_1_fan_0_map1 = "/fragment@44/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_0_map1";
  8279. cpuss_1_fan_1_map0 = "/fragment@44/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_1_map0";
  8280. cpuss_1_fan_1_map1 = "/fragment@44/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_1_map1";
  8281. gpuss_0_fan_trip0 = "/fragment@44/__overlay__/gpuss-0-fan/trips/gpuss_0_fan_trip0";
  8282. gpuss_0_fan_trip1 = "/fragment@44/__overlay__/gpuss-0-fan/trips/gpuss_0_fan_trip1";
  8283. gpuss_0_fan_0_map0 = "/fragment@44/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_0_map0";
  8284. gpuss_0_fan_0_map1 = "/fragment@44/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_0_map1";
  8285. gpuss_0_fan_1_map0 = "/fragment@44/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_1_map0";
  8286. gpuss_0_fan_1_map1 = "/fragment@44/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_1_map1";
  8287. gpuss_1_fan_trip0 = "/fragment@44/__overlay__/gpuss-1-fan/trips/gpuss_1_fan_trip0";
  8288. gpuss_1_fan_trip1 = "/fragment@44/__overlay__/gpuss-1-fan/trips/gpuss_1_fan_trip1";
  8289. gpuss_1_fan_0_map0 = "/fragment@44/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_0_map0";
  8290. gpuss_1_fan_0_map1 = "/fragment@44/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_0_map1";
  8291. gpuss_1_fan_1_map0 = "/fragment@44/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_1_map0";
  8292. gpuss_1_fan_1_map1 = "/fragment@44/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_1_map1";
  8293. nautilus_clk_pin = "/fragment@45/__overlay__/projector_clk_pin";
  8294. nautilus_clk = "/fragment@46/__overlay__/oculus,nautilus_clk";
  8295. dsi_dual_boe_lcd_dsc_video = "/fragment@47/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video";
  8296. dsi_dual_boe_lcd_video = "/fragment@48/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video";
  8297. dsi_dual_boe_spi_blu_dsc_video = "/fragment@49/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video";
  8298. depth_swd_default_0 = "/fragment@54/__overlay__/depth_swdio_default@0";
  8299. depth_swd_default_1 = "/fragment@54/__overlay__/depth_swdio_default@1";
  8300. projector = "/fragment@55/__overlay__/oculus,projector";
  8301. display_virtual_sensor = "/fragment@56/__overlay__/display_virtual_sensor";
  8302. vrapi_front_panel_sensor = "/fragment@56/__overlay__/vrapi_front_panel_sensor";
  8303. vrapi_top_panel_sensor = "/fragment@56/__overlay__/vrapi_top_panel_sensor";
  8304. virt_top_trip0 = "/fragment@57/__overlay__/vrapi-front-panel/trips/virt-top-trip0";
  8305. virt_top_trip1 = "/fragment@57/__overlay__/vrapi-front-panel/trips/virt-top-trip1";
  8306. virt_top_trip2 = "/fragment@57/__overlay__/vrapi-front-panel/trips/virt-top-trip2";
  8307. virt_front_trip0 = "/fragment@57/__overlay__/vrapi-top-panel/trips/virt-front-trip0";
  8308. virt_front_trip1 = "/fragment@57/__overlay__/vrapi-top-panel/trips/virt-front-trip1";
  8309. virt_front_trip2 = "/fragment@57/__overlay__/vrapi-top-panel/trips/virt-front-trip2";
  8310. bq27z561 = "/fragment@71/__overlay__/fuel-gauge@55";
  8311. smb1355 = "/fragment@78/__overlay__/qcom,smb1355@c";
  8312. smb1355_revid = "/fragment@78/__overlay__/qcom,smb1355@c/qcom,revid@100";
  8313. smb1355_charger = "/fragment@78/__overlay__/qcom,smb1355@c/qcom,smb1355-charger@1000";
  8314. oculusnrf = "/fragment@80/__overlay__/oculusnrf@0";
  8315. syncboss_float_swd = "/fragment@81/__overlay__/syncboss_float_swd";
  8316. syncboss_wakeup = "/fragment@81/__overlay__/syncboss_wakeup";
  8317. syncboss_reset_default = "/fragment@81/__overlay__/syncboss_reset_default";
  8318. syncboss_uart_active = "/fragment@81/__overlay__/syncboss_uart_active";
  8319. syncboss_uart_sleep_tx = "/fragment@81/__overlay__/syncboss_uart_sleep_tx";
  8320. syncboss_uart_sleep_rx = "/fragment@81/__overlay__/syncboss_uart_sleep_rx";
  8321. kona_mtp_batterydata = "/fragment@82/__overlay__/qcom,battery-data";
  8322. bcm_bt_en_default = "/fragment@84/__overlay__/bcm_bt_en_default";
  8323. bcm_bt_wake_default = "/fragment@84/__overlay__/bcm_bt_wake_default";
  8324. bcm_bt_hostwake_default = "/fragment@84/__overlay__/bcm_bt_hostwake_default";
  8325. bcmdhd_wlan_en = "/fragment@84/__overlay__/bcmdhd_wlan_en";
  8326. bcmdhd_wlan_hostwake_default = "/fragment@84/__overlay__/bcmdhd_wlan_hostwake_default";
  8327. bt_bluesleep = "/fragment@88/__overlay__/bt_bluesleep";
  8328. eye_face_led_default = "/fragment@89/__overlay__/eye_face_led_default";
  8329. eye_face_led = "/fragment@90/__overlay__/oculus,eye_face_led";
  8330. safetyboss_float_swd = "/fragment@92/__overlay__/safetyboss_float_swd";
  8331. safetyboss_reset_default = "/fragment@92/__overlay__/safetyboss_reset_default";
  8332. quin_mi2s_gpios = "/fragment@101/__overlay__/quin_mi2s_gpios";
  8333. blu_left = "/fragment@104/__overlay__/blu_left@0";
  8334. blu_right = "/fragment@105/__overlay__/blu_right@0";
  8335. cypd3177 = "/fragment@106/__overlay__/cypd3177@08";
  8336. display_panel_blu_en = "/fragment@107/__overlay__/blu_gpio_regulator@1";
  8337. cm7120_headphone_det_default = "/fragment@111/__overlay__/cm7120_headphone_det_default";
  8338. cypd3177_irq_default = "/fragment@111/__overlay__/cypd3177_irq_default";
  8339. display_panel_blu_en_default = "/fragment@111/__overlay__/display_panel_blu_en_default";
  8340. seacliff_blu_en_active = "/fragment@111/__overlay__/seacliff_blu_en_active";
  8341. seacliff_blu_en_suspend = "/fragment@111/__overlay__/seacliff_blu_en_suspend";
  8342. charging_dock = "/fragment@112/__overlay__/oculus,charging_dock";
  8343. };
  8344.  
  8345. __fixups__ {
  8346. spmi_bus = "/fragment@0:target:0\0/fragment@2:target:0\0/fragment@4:target:0\0/fragment@6:target:0\0/fragment@7:target:0\0/fragment@43:target:0\0/fragment@78/__overlay__/qcom,smb1355@c:interrupt-parent:0";
  8347. clock_rpmh = "/fragment@0/__overlay__/qcom,pm8150@0/clock-controller@5b00:clocks:0\0/fragment@2/__overlay__/qcom,pm8150b@2/clock-controller@6000:clocks:0\0/fragment@4/__overlay__/qcom,pm8150l@4/clock-controller@5b00:clocks:0";
  8348. thermal_zones = "/fragment@1:target:0\0/fragment@3:target:0\0/fragment@5:target:0\0/fragment@16:target:0\0/fragment@22:target:0\0/fragment@44:target:0\0/fragment@57:target:0\0/fragment@110:target:0";
  8349. usb2_phy0 = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5:dpdm-supply:0";
  8350. pm8150_l2 = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,usb-pdphy@1700:vdd-pdphy-supply:0";
  8351. soc = "/fragment@8:target:0\0/fragment@12:target:0\0/fragment@20:target:0\0/fragment@27:target:0\0/fragment@40:target:0\0/fragment@87:target:0\0/fragment@91:target:0\0/fragment@107:target:0";
  8352. usb0 = "/fragment@9:target:0";
  8353. eud = "/fragment@9/__overlay__:extcon:4";
  8354. sde_dp = "/fragment@10:target:0\0/fragment@13:target:0\0/fragment@14/__overlay__:connectors:0\0/fragment@53:target:0";
  8355. tlmm = "/fragment@11:target:0\0/fragment@12/__overlay__/display_gpio_regulator@1:gpio:0\0/fragment@13/__overlay__:qcom,usbplug-cc-gpio:0\0/fragment@26:target:0\0/fragment@29/__overlay__/cm7120@2d:cm7120,headphone-det-gpios:0\0/fragment@29/__overlay__/cm7120@2d:cm7120,headphone-det-gpios:12\0/fragment@41/__overlay__/qcom,cam-sensor0:gpios:0\0/fragment@41/__overlay__/qcom,cam-sensor1:gpios:0\0/fragment@41/__overlay__/qcom,cam-sensor2:gpios:0\0/fragment@41/__overlay__/qcom,cam-sensor3:gpios:0\0/fragment@41/__overlay__/qcom,cam-sensor4:gpios:0\0/fragment@41/__overlay__/qcom,cam-sensor5:gpios:0\0/fragment@42:target:0\0/fragment@43/__overlay__/qcom,pm8150l@5/pwm-tach-fan@0:fan,tach-gpio:0\0/fragment@43/__overlay__/qcom,pm8150l@5/pwm-tach-fan@0:interrupt-parent:0\0/fragment@43/__overlay__/qcom,pm8150l@5/pwm-tach-fan@1:fan,tach-gpio:0\0/fragment@43/__overlay__/qcom,pm8150l@5/pwm-tach-fan@1:interrupt-parent:0\0/fragment@45:target:0\0/fragment@47/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video:qcom,platform-en-gpio:0\0/fragment@47/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video:qcom,platform-reset-gpio:0\0/fragment@47/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video:qcom,panel-sec-reset-gpio:0\0/fragment@48/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video:qcom,platform-en-gpio:0\0/fragment@48/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video:qcom,platform-reset-gpio:0\0/fragment@48/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video:qcom,panel-sec-reset-gpio:0\0/fragment@49/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video:qcom,platform-en-gpio:0\0/fragment@49/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video:qcom,platform-reset-gpio:0\0/fragment@49/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video:qcom,panel-sec-reset-gpio:0\0/fragment@53/__overlay__:qcom,uart-mux-en-gpio:0\0/fragment@54:target:0\0/fragment@58/__overlay__:cd-gpios:0\0/fragment@80/__overlay__/oculusnrf@0:oculus,syncboss-reset:0\0/fragment@80/__overlay__/oculusnrf@0:oculus,syncboss-timesync:0\0/fragment@80/__overlay__/oculusnrf@0:oculus,syncboss-wakeup:0\0/fragment@80/__overlay__/oculusnrf@0/swd@0:oculus,swd-clk:0\0/fragment@80/__overlay__/oculusnrf@0/swd@0:oculus,swd-io:0\0/fragment@81:target:0\0/fragment@84:target:0\0/fragment@88/__overlay__/bt_driver:brcm,bt-reset-gpio:0\0/fragment@88/__overlay__/bt_bluesleep:brcm,bt-wake-gpio:0\0/fragment@88/__overlay__/bt_bluesleep:brcm,bt-host-wake-gpio:0\0/fragment@88/__overlay__/bcmdhd_wlan:wlan-en-gpio:0\0/fragment@88/__overlay__/bcmdhd_wlan:wlan-host-wake-gpio:0\0/fragment@89:target:0\0/fragment@91/__overlay__/oculus,safetyboss-swd:oculus,swd-clk:0\0/fragment@91/__overlay__/oculus,safetyboss-swd:oculus,swd-io:0\0/fragment@92:target:0\0/fragment@104/__overlay__/blu_left@0:oculus,blu-irq-gpio:0\0/fragment@105/__overlay__/blu_right@0:oculus,blu-irq-gpio:0\0/fragment@106/__overlay__/cypd3177@08:cy,hpi-gpio:0\0/fragment@106/__overlay__/cypd3177@08:cy,fault-gpio:0\0/fragment@106/__overlay__/cypd3177@08:interrupt-parent:0\0/fragment@107/__overlay__/blu_gpio_regulator@1:gpio:0\0/fragment@111:target:0\0/fragment@113/__overlay__/qcom,cam-sensor6:gpios:0";
  8356. mdss_dsi0 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-ctrl:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-ctrl:0";
  8357. mdss_dsi1 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-ctrl:4\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-ctrl:4";
  8358. mdss_dsi_phy0 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-phy:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-phy:0\0/fragment@94:target:0";
  8359. mdss_dsi_phy1 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-phy:4\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-phy:4\0/fragment@95:target:0";
  8360. mdss_dsi0_pll = "/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:0\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:8\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:16\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:24\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:32\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:40\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:48\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:56\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:8\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:16\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:24";
  8361. mdss_dsi1_pll = "/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:64\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:72\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:80\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:88\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:96\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:104\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:112\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:120\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:32\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:40\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:48\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:56";
  8362. pm8150_l14 = "/fragment@12/__overlay__/qcom,dsi-display-primary:vddio-supply:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:vddio-supply:0\0/fragment@51:target:0";
  8363. pm8150a_l11 = "/fragment@12/__overlay__/qcom,dsi-display-primary:vdd-supply:0\0/fragment@12/__overlay__/qcom,dsi-display-primary:blu-mcu-supply:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:vdd-supply:0\0/fragment@50:target:0\0/fragment@100:target:0";
  8364. mdss_mdp = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,mdp:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,mdp:0\0/fragment@14:target:0\0/fragment@15:target:0\0/fragment@47:target:0\0/fragment@48:target:0\0/fragment@49:target:0\0/fragment@52:target:0";
  8365. fsa4480 = "/fragment@13/__overlay__:qcom,dp-aux-switch:0";
  8366. sde_dp_usbplug_cc_active = "/fragment@13/__overlay__:pinctrl-0:0";
  8367. sde_dp_usbplug_cc_suspend = "/fragment@13/__overlay__:pinctrl-1:0";
  8368. sde_rscc = "/fragment@14/__overlay__:connectors:16\0/fragment@52/__overlay__:connectors:12";
  8369. cpu4_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu4:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl0/cooling-maps/vbat_cpu4:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl0/cooling-maps/vph_cpu4:cooling-device:0";
  8370. cpu5_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu5:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl0/cooling-maps/vbat_cpu5:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl0/cooling-maps/vph_cpu5:cooling-device:0";
  8371. cpu6_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu6:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl1/cooling-maps/vbat_cpu6:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl1/cooling-maps/vph_cpu6:cooling-device:0";
  8372. cpu7_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu7:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl1/cooling-maps/vbat_cpu7:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl1/cooling-maps/vph_cpu7:cooling-device:0";
  8373. msm_gpu = "/fragment@16/__overlay__/pm8150b-bcl-lvl0/cooling-maps/vbat_gpu0:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl1/cooling-maps/vbat_gpu1:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl2/cooling-maps/vbat_gpu2:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl0/cooling-maps/vph_gpu0:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl1/cooling-maps/vph_gpu1:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl2/cooling-maps/vph_gpu2:cooling-device:0";
  8374. qcom_seecom = "/fragment@17:target:0";
  8375. removed_mem = "/fragment@18:target:0";
  8376. reserved_memory = "/fragment@19:target:0";
  8377. wlan = "/fragment@21:target:0\0/fragment@83:target:0";
  8378. q6core = "/fragment@23:target:0\0/fragment@31:target:0\0/fragment@31/__overlay__/cm7120_snd:qcom,msm_audio_ssr_devs:4\0/fragment@101:target:0";
  8379. lpass_core_hw_vote = "/fragment@23/__overlay__/lpi_pinctrl@33c0000:clocks:0";
  8380. lpass_audio_hw_vote = "/fragment@23/__overlay__/lpi_pinctrl@33c0000:clocks:8";
  8381. pm8150a_l4 = "/fragment@24:target:0\0/fragment@97:target:0";
  8382. pm8150_l16 = "/fragment@25:target:0\0/fragment@29/__overlay__/cm7120@2d:cm7120,codec_3v3-supply:0";
  8383. qupv3_se2_spi = "/fragment@28:target:0";
  8384. qupv3_se8_i2c = "/fragment@29:target:0\0/fragment@73:target:0";
  8385. pm8150_l7 = "/fragment@29/__overlay__/cm7120@2d:cm7120,codec_1v8-supply:0\0/fragment@96:target:0";
  8386. dai_mi2s0 = "/fragment@30:target:0\0/fragment@31/__overlay__/cm7120_snd:asoc-cpu:8";
  8387. audio_apr = "/fragment@31/__overlay__/cm7120_snd:qcom,msm_audio_ssr_devs:0";
  8388. stub_codec = "/fragment@31/__overlay__/cm7120_snd:asoc-codec:0";
  8389. pcm0 = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:0";
  8390. pcm1 = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:4";
  8391. pcm2 = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:8";
  8392. voip = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:12";
  8393. voice = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:16";
  8394. loopback = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:20";
  8395. compress = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:24";
  8396. hostless = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:28";
  8397. afe = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:32";
  8398. lsm = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:36";
  8399. routing = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:40";
  8400. compr = "/fragment@31/__overlay__/cm7120_snd:asoc-platform:44";
  8401. dai_dp = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:0";
  8402. dai_dp1 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:4";
  8403. dai_mi2s1 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:12";
  8404. dai_mi2s2 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:16";
  8405. dai_mi2s3 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:20";
  8406. dai_mi2s4 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:24";
  8407. dai_mi2s5 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:28";
  8408. dai_pri_auxpcm = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:32";
  8409. dai_sec_auxpcm = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:36";
  8410. dai_tert_auxpcm = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:40";
  8411. dai_quat_auxpcm = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:44";
  8412. dai_quin_auxpcm = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:48";
  8413. dai_sen_auxpcm = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:52";
  8414. afe_pcm_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:56";
  8415. afe_pcm_tx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:60";
  8416. afe_proxy_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:64";
  8417. afe_proxy_tx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:68";
  8418. incall_record_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:72";
  8419. incall_record_tx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:76";
  8420. incall_music_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:80";
  8421. incall_music_2_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:84";
  8422. usb_audio_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:88";
  8423. usb_audio_tx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:92";
  8424. sb_7_rx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:96";
  8425. sb_7_tx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:100";
  8426. dai_pri_tdm_rx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:104";
  8427. dai_pri_tdm_tx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:108";
  8428. dai_sec_tdm_rx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:112";
  8429. dai_sec_tdm_tx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:116";
  8430. dai_tert_tdm_rx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:120";
  8431. dai_tert_tdm_tx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:124";
  8432. dai_quat_tdm_rx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:128";
  8433. dai_quat_tdm_tx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:132";
  8434. dai_quin_tdm_rx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:136";
  8435. dai_quin_tdm_tx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:140";
  8436. dai_sen_tdm_rx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:144";
  8437. dai_sen_tdm_tx_0 = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:148";
  8438. afe_loopback_tx = "/fragment@31/__overlay__/cm7120_snd:asoc-cpu:152";
  8439. pri_tdm_clk_active = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-0:0";
  8440. pri_tdm_din_active = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-0:4";
  8441. pri_tdm_dout_active = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-0:8";
  8442. pri_tdm_sync_active = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-0:12";
  8443. pri_tdm_clk_sleep = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-1:0";
  8444. pri_tdm_din_sleep = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-1:4";
  8445. pri_tdm_dout_sleep = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-1:8";
  8446. pri_tdm_sync_sleep = "/fragment@31/__overlay__/pri_mi2s_gpios:pinctrl-1:12";
  8447. cam_sensor_mclk5_active = "/fragment@32:target:0\0/fragment@41/__overlay__/qcom,cam-sensor3:pinctrl-0:0";
  8448. cam_sensor_mclk5_suspend = "/fragment@33:target:0\0/fragment@41/__overlay__/qcom,cam-sensor3:pinctrl-1:0";
  8449. pm8150a_l2 = "/fragment@34:target:0\0/fragment@41/__overlay__/qcom,cam-sensor4:cam_dvdd-supply:0\0/fragment@64:target:0\0/fragment@113/__overlay__/qcom,cam-sensor6:cam_dvdd-supply:0";
  8450. pm8150a_l3 = "/fragment@35:target:0\0/fragment@41/__overlay__/qcom,cam-sensor0:cam_dvdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor1:cam_dvdd-supply:0\0/fragment@65:target:0";
  8451. pm8150a_l10 = "/fragment@36:target:0\0/fragment@41/__overlay__/qcom,cam-sensor0:cam_avdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor1:cam_avdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor2:cam_avdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor3:cam_avdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor4:cam_avdd-supply:0\0/fragment@69:target:0\0/fragment@113/__overlay__/qcom,cam-sensor6:cam_avdd-supply:0";
  8452. pm8150_l10 = "/fragment@37:target:0\0/fragment@41/__overlay__/qcom,cam-sensor5:cam_avdd-supply:0\0/fragment@61:target:0";
  8453. pm8150_l13 = "/fragment@38:target:0";
  8454. pm8150_l15 = "/fragment@39:target:0\0/fragment@41/__overlay__/qcom,cam-sensor0:cam_dovdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor1:cam_dovdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor2:cam_dovdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor3:cam_dovdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor4:cam_dovdd-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor5:cam_dovdd-supply:0\0/fragment@62:target:0\0/fragment@113/__overlay__/qcom,cam-sensor6:cam_dovdd-supply:0";
  8455. cam_cci0 = "/fragment@41:target:0\0/fragment@93:target:0\0/fragment@113:target:0";
  8456. titan_top_gdsc = "/fragment@41/__overlay__/qcom,cam-sensor0:cam_clk-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor1:cam_clk-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor2:cam_clk-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor3:cam_clk-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor4:cam_clk-supply:0\0/fragment@41/__overlay__/qcom,cam-sensor5:cam_clk-supply:0\0/fragment@113/__overlay__/qcom,cam-sensor6:cam_clk-supply:0";
  8457. cam_sensor_mclk1_active = "/fragment@41/__overlay__/qcom,cam-sensor0:pinctrl-0:0";
  8458. cam_sensor_mclk1_suspend = "/fragment@41/__overlay__/qcom,cam-sensor0:pinctrl-1:0";
  8459. clock_camcc = "/fragment@41/__overlay__/qcom,cam-sensor0:clocks:0\0/fragment@41/__overlay__/qcom,cam-sensor1:clocks:0\0/fragment@41/__overlay__/qcom,cam-sensor2:clocks:0\0/fragment@41/__overlay__/qcom,cam-sensor3:clocks:0\0/fragment@41/__overlay__/qcom,cam-sensor4:clocks:0\0/fragment@41/__overlay__/qcom,cam-sensor5:clocks:0\0/fragment@113/__overlay__/qcom,cam-sensor6:clocks:0";
  8460. cam_sensor_mclk2_active = "/fragment@41/__overlay__/qcom,cam-sensor1:pinctrl-0:0";
  8461. cam_sensor_mclk2_suspend = "/fragment@41/__overlay__/qcom,cam-sensor1:pinctrl-1:0";
  8462. cam_sensor_mclk3_active = "/fragment@41/__overlay__/qcom,cam-sensor2:pinctrl-0:0";
  8463. cam_sensor_mclk3_suspend = "/fragment@41/__overlay__/qcom,cam-sensor2:pinctrl-1:0";
  8464. cam_sensor_mclk0_active = "/fragment@41/__overlay__/qcom,cam-sensor4:pinctrl-0:0\0/fragment@113/__overlay__/qcom,cam-sensor6:pinctrl-0:0";
  8465. cam_sensor_mclk0_suspend = "/fragment@41/__overlay__/qcom,cam-sensor4:pinctrl-1:0\0/fragment@113/__overlay__/qcom,cam-sensor6:pinctrl-1:0";
  8466. cam_sensor_mclk6_active = "/fragment@41/__overlay__/qcom,cam-sensor5:pinctrl-0:0";
  8467. cam_sensor_mclk6_suspend = "/fragment@41/__overlay__/qcom,cam-sensor5:pinctrl-1:0";
  8468. tsens0 = "/fragment@44/__overlay__/cpu-0-0-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-0-1-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-0-2-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-0-3-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-0-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-1-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-2-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-3-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-4-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-5-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-6-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpu-1-7-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpuss-0-fan:thermal-sensors:0\0/fragment@44/__overlay__/cpuss-1-fan:thermal-sensors:0\0/fragment@44/__overlay__/gpuss-0-fan:thermal-sensors:0";
  8469. tsens1 = "/fragment@44/__overlay__/gpuss-1-fan:thermal-sensors:0";
  8470. vendor = "/fragment@46:target:0\0/fragment@55:target:0\0/fragment@56:target:0\0/fragment@82:target:0\0/fragment@88:target:0\0/fragment@90:target:0\0/fragment@112:target:0";
  8471. clock_gcc = "/fragment@46/__overlay__/oculus,nautilus_clk:clocks:0";
  8472. sdhc_2 = "/fragment@58:target:0";
  8473. pm8150a_l9 = "/fragment@58/__overlay__:vdd-supply:0\0/fragment@99:target:0";
  8474. pm8150a_l6 = "/fragment@58/__overlay__:vdd-io-supply:0\0/fragment@98:target:0";
  8475. sdc2_clk_on = "/fragment@58/__overlay__:pinctrl-0:0";
  8476. sdc2_cmd_on = "/fragment@58/__overlay__:pinctrl-0:4";
  8477. sdc2_data_on = "/fragment@58/__overlay__:pinctrl-0:8";
  8478. storage_cd = "/fragment@58/__overlay__:pinctrl-0:12\0/fragment@58/__overlay__:pinctrl-1:12";
  8479. sdc2_clk_off = "/fragment@58/__overlay__:pinctrl-1:0";
  8480. sdc2_cmd_off = "/fragment@58/__overlay__:pinctrl-1:4";
  8481. sdc2_data_off = "/fragment@58/__overlay__:pinctrl-1:8";
  8482. ufshc_mem = "/fragment@59:target:0";
  8483. ufs_phy_gdsc = "/fragment@59/__overlay__:vdd-hba-supply:0";
  8484. pm8150_l17 = "/fragment@59/__overlay__:vcc-supply:0";
  8485. pm8150_l6 = "/fragment@59/__overlay__:vccq-supply:0\0/fragment@59/__overlay__:qcom,vddp-ref-clk-supply:0";
  8486. pm8150_s4 = "/fragment@59/__overlay__:vccq2-supply:0";
  8487. ufsphy_mem = "/fragment@60:target:0";
  8488. pm8150_l5 = "/fragment@60/__overlay__:vdda-phy-supply:0";
  8489. pm8150_l9 = "/fragment@60/__overlay__:vdda-pll-supply:0";
  8490. pm8150a_l1 = "/fragment@63:target:0";
  8491. pm8150a_l5 = "/fragment@66:target:0";
  8492. pm8150a_l7 = "/fragment@67:target:0";
  8493. pm8150a_l8 = "/fragment@68:target:0";
  8494. qupv3_se0_spi = "/fragment@70:target:0\0/fragment@86:target:0\0/fragment@102:target:0";
  8495. qupv3_se4_i2c = "/fragment@71:target:0";
  8496. qupv3_se6_4uart = "/fragment@72:target:0";
  8497. qupv3_se9_i2c = "/fragment@74:target:0";
  8498. qupv3_se12_2uart = "/fragment@75:target:0";
  8499. qupv3_se13_spi = "/fragment@76:target:0\0/fragment@104:target:0";
  8500. qupv3_se14_spi = "/fragment@77:target:0\0/fragment@105:target:0";
  8501. qupv3_se15_i2c = "/fragment@78:target:0\0/fragment@106:target:0";
  8502. qupv3_se17_4uart = "/fragment@79:target:0";
  8503. qupv3_se19_spi = "/fragment@80:target:0\0/fragment@114:target:0\0/fragment@115:target:0";
  8504. pm8150_s6 = "/fragment@83/__overlay__:vdd-wlan-dig-supply:0";
  8505. pcie0 = "/fragment@85:target:0";
  8506. pcie0_clkreq_default = "/fragment@85/__overlay__:pinctrl-0:0";
  8507. pcie0_perst_default = "/fragment@85/__overlay__:pinctrl-0:4\0/fragment@85/__overlay__:pinctrl-1:4";
  8508. pcie0_clkreq_sleep = "/fragment@85/__overlay__:pinctrl-1:0";
  8509. qupv3_se5_2uart = "/fragment@103:target:0";
  8510. tdm_pri_rx = "/fragment@108:target:0";
  8511. tdm_pri_tx = "/fragment@109:target:0";
  8512. };
  8513.  
  8514. __local_fixups__ {
  8515.  
  8516. fragment@0 {
  8517.  
  8518. __overlay__ {
  8519.  
  8520. qcom,pm8150@0 {
  8521.  
  8522. qcom,temp-alarm@2400 {
  8523. io-channels = <0x00>;
  8524. };
  8525.  
  8526. adc_tm@3500 {
  8527. io-channels = <0x00 0x08 0x10 0x18>;
  8528. pinctrl-0 = <0x00>;
  8529. };
  8530. };
  8531. };
  8532. };
  8533.  
  8534. fragment@1 {
  8535.  
  8536. __overlay__ {
  8537.  
  8538. pm8150_tz {
  8539. thermal-sensors = <0x00>;
  8540. };
  8541. };
  8542. };
  8543.  
  8544. fragment@2 {
  8545.  
  8546. __overlay__ {
  8547.  
  8548. qcom,pm8150b@2 {
  8549.  
  8550. qcom,temp-alarm@2400 {
  8551. io-channels = <0x00>;
  8552. };
  8553.  
  8554. qcom,sdam-qnovo@b000 {
  8555. pinctrl-0 = <0x00>;
  8556. pinctrl-1 = <0x00>;
  8557. };
  8558.  
  8559. qcom,qpnp-smb5 {
  8560. qcom,pmic-revid = <0x00>;
  8561. io-channels = <0x00 0x08 0x10 0x18 0x20 0x28 0x30 0x38>;
  8562. qcom,battery-data = <0x00>;
  8563. pinctrl-0 = <0x00>;
  8564. pinctrl-1 = <0x00>;
  8565. pinctrl-2 = <0x00>;
  8566. pinctrl-3 = <0x00>;
  8567. };
  8568.  
  8569. qcom,usb-pdphy@1700 {
  8570. vbus-supply = <0x00>;
  8571. vconn-supply = <0x00>;
  8572. otg_boost-supply = <0x00>;
  8573. };
  8574.  
  8575. qpnp,fg {
  8576. qcom,pmic-revid = <0x00>;
  8577. qcom,pmic-pbs = <0x00>;
  8578. nvmem = <0x00>;
  8579. qcom,battery-data = <0x00>;
  8580. };
  8581.  
  8582. adc_tm@3500 {
  8583. qcom,pmic-revid = <0x00>;
  8584. io-channels = <0x00 0x08 0x10 0x18>;
  8585. pinctrl-0 = <0x00>;
  8586. };
  8587. };
  8588.  
  8589. qcom,pm8150b@3 {
  8590.  
  8591. qcom,leds@d000 {
  8592. nvmem = <0x00>;
  8593.  
  8594. hr_led1 {
  8595. pwms = <0x00>;
  8596. };
  8597.  
  8598. hr_led2 {
  8599. pwms = <0x00>;
  8600. };
  8601. };
  8602. };
  8603. };
  8604. };
  8605.  
  8606. fragment@3 {
  8607.  
  8608. __overlay__ {
  8609.  
  8610. pm8150b_tz {
  8611. thermal-sensors = <0x00>;
  8612. };
  8613.  
  8614. pm8150b-ibat-lvl0 {
  8615. thermal-sensors = <0x00>;
  8616. };
  8617.  
  8618. pm8150b-ibat-lvl1 {
  8619. thermal-sensors = <0x00>;
  8620. };
  8621.  
  8622. pm8150b-vbat-lvl0 {
  8623. thermal-sensors = <0x00>;
  8624. };
  8625.  
  8626. pm8150b-vbat-lvl1 {
  8627. thermal-sensors = <0x00>;
  8628. };
  8629.  
  8630. pm8150b-vbat-lvl2 {
  8631. thermal-sensors = <0x00>;
  8632. };
  8633.  
  8634. pm8150b-bcl-lvl0 {
  8635. thermal-sensors = <0x00>;
  8636. };
  8637.  
  8638. pm8150b-bcl-lvl1 {
  8639. thermal-sensors = <0x00>;
  8640. };
  8641.  
  8642. pm8150b-bcl-lvl2 {
  8643. thermal-sensors = <0x00>;
  8644. };
  8645.  
  8646. soc {
  8647. thermal-sensors = <0x00>;
  8648. };
  8649. };
  8650. };
  8651.  
  8652. fragment@4 {
  8653.  
  8654. __overlay__ {
  8655.  
  8656. qcom,pm8150l@4 {
  8657.  
  8658. qcom,temp-alarm@2400 {
  8659. io-channels = <0x00>;
  8660. };
  8661.  
  8662. adc_tm@3500 {
  8663. io-channels = <0x00 0x08 0x10 0x18>;
  8664. pinctrl-0 = <0x00>;
  8665. };
  8666. };
  8667.  
  8668. qcom,pm8150l@5 {
  8669.  
  8670. qcom,lcdb@ec00 {
  8671. qcom,pmic-revid = <0x00>;
  8672. };
  8673.  
  8674. qcom,leds@d300 {
  8675. qcom,pmic-revid = <0x00>;
  8676. };
  8677.  
  8678. qcom,wled@d800 {
  8679. qcom,pmic-revid = <0x00>;
  8680. };
  8681.  
  8682. qcom,leds@d000 {
  8683.  
  8684. red {
  8685. pwms = <0x00>;
  8686. };
  8687.  
  8688. green {
  8689. pwms = <0x00>;
  8690. };
  8691.  
  8692. blue {
  8693. pwms = <0x00>;
  8694. };
  8695. };
  8696. };
  8697. };
  8698. };
  8699.  
  8700. fragment@5 {
  8701.  
  8702. __overlay__ {
  8703.  
  8704. pm8150l_tz {
  8705. thermal-sensors = <0x00>;
  8706. };
  8707.  
  8708. pm8150l-vph-lvl0 {
  8709. thermal-sensors = <0x00>;
  8710. };
  8711.  
  8712. pm8150l-vph-lvl1 {
  8713. thermal-sensors = <0x00>;
  8714. };
  8715.  
  8716. pm8150l-vph-lvl2 {
  8717. thermal-sensors = <0x00>;
  8718. };
  8719.  
  8720. pm8150l-bcl-lvl0 {
  8721. thermal-sensors = <0x00>;
  8722. };
  8723.  
  8724. pm8150l-bcl-lvl1 {
  8725. thermal-sensors = <0x00>;
  8726. };
  8727.  
  8728. pm8150l-bcl-lvl2 {
  8729. thermal-sensors = <0x00>;
  8730. };
  8731. };
  8732. };
  8733.  
  8734. fragment@8 {
  8735.  
  8736. __overlay__ {
  8737.  
  8738. regulator-dbb1 {
  8739. gpio = <0x00>;
  8740. };
  8741.  
  8742. regulator-haptics-boost {
  8743. gpio = <0x00>;
  8744. pinctrl-0 = <0x00>;
  8745. };
  8746. };
  8747. };
  8748.  
  8749. fragment@9 {
  8750.  
  8751. __overlay__ {
  8752. extcon = <0x00>;
  8753. };
  8754. };
  8755.  
  8756. fragment@10 {
  8757.  
  8758. __overlay__ {
  8759. extcon = <0x00>;
  8760. };
  8761. };
  8762.  
  8763. fragment@12 {
  8764.  
  8765. __overlay__ {
  8766.  
  8767. display_gpio_regulator@1 {
  8768. pinctrl-0 = <0x00>;
  8769. };
  8770.  
  8771. qcom,dsi-display-primary {
  8772. pinctrl-0 = <0x00>;
  8773. pinctrl-1 = <0x00>;
  8774. lab-supply = <0x00>;
  8775. ibb-supply = <0x00>;
  8776. qcom,dsi-default-panel = <0x00>;
  8777. blu-spi-supply = <0x00>;
  8778. };
  8779. };
  8780. };
  8781.  
  8782. fragment@13 {
  8783.  
  8784. __overlay__ {
  8785. qcom,dp-usbpd-detection = <0x00>;
  8786. qcom,ext-disp = <0x00>;
  8787. };
  8788. };
  8789.  
  8790. fragment@14 {
  8791.  
  8792. __overlay__ {
  8793. connectors = <0x04 0x08 0x0c>;
  8794. };
  8795. };
  8796.  
  8797. fragment@16 {
  8798.  
  8799. __overlay__ {
  8800.  
  8801. soc {
  8802.  
  8803. cooling-maps {
  8804.  
  8805. soc_cpu4 {
  8806. trip = <0x00>;
  8807. };
  8808.  
  8809. soc_cpu5 {
  8810. trip = <0x00>;
  8811. };
  8812.  
  8813. soc_cpu6 {
  8814. trip = <0x00>;
  8815. };
  8816.  
  8817. soc_cpu7 {
  8818. trip = <0x00>;
  8819. };
  8820. };
  8821. };
  8822.  
  8823. pm8150b-bcl-lvl0 {
  8824.  
  8825. cooling-maps {
  8826.  
  8827. vbat_cpu4 {
  8828. trip = <0x00>;
  8829. };
  8830.  
  8831. vbat_cpu5 {
  8832. trip = <0x00>;
  8833. };
  8834.  
  8835. vbat_gpu0 {
  8836. trip = <0x00>;
  8837. };
  8838. };
  8839. };
  8840.  
  8841. pm8150b-bcl-lvl1 {
  8842.  
  8843. cooling-maps {
  8844.  
  8845. vbat_cpu6 {
  8846. trip = <0x00>;
  8847. };
  8848.  
  8849. vbat_cpu7 {
  8850. trip = <0x00>;
  8851. };
  8852.  
  8853. vbat_gpu1 {
  8854. trip = <0x00>;
  8855. };
  8856. };
  8857. };
  8858.  
  8859. pm8150b-bcl-lvl2 {
  8860.  
  8861. cooling-maps {
  8862.  
  8863. vbat_gpu2 {
  8864. trip = <0x00>;
  8865. };
  8866. };
  8867. };
  8868.  
  8869. pm8150l-bcl-lvl0 {
  8870.  
  8871. cooling-maps {
  8872.  
  8873. vph_cpu4 {
  8874. trip = <0x00>;
  8875. };
  8876.  
  8877. vph_cpu5 {
  8878. trip = <0x00>;
  8879. };
  8880.  
  8881. vph_gpu0 {
  8882. trip = <0x00>;
  8883. };
  8884. };
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  9228. cpu_1_2_fan_0_map1 {
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  9238. cpu_1_2_fan_map1 {
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  9264. cpu_1_3_fan_1_map1 {
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  9285. cpu_1_4_fan_1_map0 {
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  9290. cpu_1_4_fan_1_map1 {
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  9311. cpu_1_5_fan_1_map0 {
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  9316. cpu_1_5_fan_1_map1 {
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  9640. fragment@91 {
  9641.  
  9642. __overlay__ {
  9643.  
  9644. oculus,safetyboss-swd {
  9645. pinctrl-0 = <0x00 0x04>;
  9646. };
  9647. };
  9648. };
  9649.  
  9650. fragment@101 {
  9651.  
  9652. __overlay__ {
  9653.  
  9654. quin_mi2s_gpios {
  9655. pinctrl-0 = <0x00 0x04 0x08 0x0c>;
  9656. pinctrl-1 = <0x00 0x04 0x08 0x0c>;
  9657. };
  9658. };
  9659. };
  9660.  
  9661. fragment@106 {
  9662.  
  9663. __overlay__ {
  9664.  
  9665. cypd3177@08 {
  9666. pinctrl-0 = <0x00>;
  9667. };
  9668. };
  9669. };
  9670.  
  9671. fragment@107 {
  9672.  
  9673. __overlay__ {
  9674.  
  9675. blu_gpio_regulator@1 {
  9676. pinctrl-0 = <0x00>;
  9677. };
  9678. };
  9679. };
  9680.  
  9681. fragment@110 {
  9682.  
  9683. __overlay__ {
  9684.  
  9685. imu-usr {
  9686. thermal-sensors = <0x00>;
  9687. };
  9688.  
  9689. pogo-usr {
  9690. thermal-sensors = <0x00>;
  9691. };
  9692.  
  9693. soc-usr {
  9694. thermal-sensors = <0x00>;
  9695. };
  9696. };
  9697. };
  9698.  
  9699. fragment@112 {
  9700.  
  9701. __overlay__ {
  9702.  
  9703. oculus,charging_dock {
  9704. charger-cypd = <0x00>;
  9705. };
  9706. };
  9707. };
  9708. };
  9709. };
  9710.  
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