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- BANK2_VOLTAGE 3.3
- BANK4_VOLTAGE 3.3
- BANK5_VOLTAGE 3.3
- CAN_0 FABRIC
- CAN_0_TX_EBL_N FABRIC
- CAN_1 MSSIO_B2_B
- CAN_1_TX_EBL_N MSSIO_B2_B
- CAN_CLK_FREQ 8
- CAN_CLK_SOURCE MSS_PLL
- CORE_UP UNUSED
- CRYPTO UNUSED
- CRYPTO_DLL_JITTER_TOLERANCE MEDIUM_LOW
- CRYPTO_ENABLE_ALARM false
- CRYPTO_ENABLE_BUSERROR false
- CRYPTO_ENABLE_BUSY true
- CRYPTO_ENABLE_COMPLETE false
- CRYPTO_ENABLE_DLL_LOCK true
- CRYPTO_ENABLE_MESH false
- CRYPTO_ENABLE_STREAMING false
- CRYPTO_MSS_CLK_FREQ 200
- CRYPTO_USE_EMBEDDED_DLL true
- DDR3_ADDRESS_MIRROR false
- DDR3_ADDRESS_ORDERING CHIP_ROW_BANK_COL
- DDR3_BANK_ADDR_WIDTH 3
- DDR3_BURST_LENGTH 0
- DDR3_CAS_ADDITIVE_LATENCY 0
- DDR3_CAS_LATENCY 5
- DDR3_CAS_WRITE_LATENCY 5
- DDR3_CLOCK_DDR 666
- DDR3_COL_ADDR_WIDTH 11
- DDR3_CONTROLLER_ADD_CMD_DRIVE 34
- DDR3_CONTROLLER_CLK_DRIVE 34
- DDR3_CONTROLLER_DQS_DRIVE 34
- DDR3_CONTROLLER_DQS_ODT 60
- DDR3_CONTROLLER_DQ_DRIVE 34
- DDR3_CONTROLLER_DQ_ODT 120
- DDR3_DM_MODE DM
- DDR3_ENABLE_ECC false
- DDR3_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE false
- DDR3_MEMORY_FORMAT COMPONENT
- DDR3_NB_CLKS 1
- DDR3_NB_RANKS 1
- DDR3_ODT_ENABLE_RD_RNK0_ODT0 false
- DDR3_ODT_ENABLE_RD_RNK0_ODT1 false
- DDR3_ODT_ENABLE_RD_RNK1_ODT0 false
- DDR3_ODT_ENABLE_RD_RNK1_ODT1 false
- DDR3_ODT_ENABLE_WR_RNK0_ODT0 false
- DDR3_ODT_ENABLE_WR_RNK0_ODT1 false
- DDR3_ODT_ENABLE_WR_RNK1_ODT0 false
- DDR3_ODT_ENABLE_WR_RNK1_ODT1 false
- DDR3_OUTPUT_DRIVE_STRENGTH RZQ6
- DDR3_PARTIAL_ARRAY_SELF_REFRESH FULL
- DDR3_READ_BURST_TYPE SEQUENTIAL
- DDR3_ROW_ADDR_WIDTH 13
- DDR3_RTT_NOM DISABLED
- DDR3_RTT_WR OFF
- DDR3_SELF_REFRESH_TEMPERATURE NORMAL
- DDR3_TIMING_FAW 40
- DDR3_TIMING_RAS 35
- DDR3_TIMING_RC 47.5
- DDR3_TIMING_RCD 12.5
- DDR3_TIMING_REFI 7.8
- DDR3_TIMING_RFC 110
- DDR3_TIMING_RP 12.5
- DDR3_TIMING_RRD 6.25
- DDR3_TIMING_RTP 8
- DDR3_TIMING_WR 18
- DDR3_TIMING_WTR 4
- DDR3_WIDTH 32
- DDR3_ZQ_CALIB_PERIOD 200
- DDR3_ZQ_CALIB_TYPE 0
- DDR3_ZQ_CAL_INIT_TIME 512
- DDR3_ZQ_CAL_L_TIME 256
- DDR3_ZQ_CAL_S_TIME 64
- DDR4_ADDRESS_MIRROR false
- DDR4_ADDRESS_ORDERING CHIP_ROW_BG_BANK_COL
- DDR4_AUTO_SELF_REFRESH 3
- DDR4_BANK_ADDR_WIDTH 2
- DDR4_BANK_GROUP_ADDRESS_WIDTH 1
- DDR4_BURST_LENGTH 0
- DDR4_CAS_ADDITIVE_LATENCY 0
- DDR4_CAS_LATENCY 12
- DDR4_CAS_WRITE_LATENCY 11
- DDR4_CA_PARITY_LATENCY_MODE 0
- DDR4_CLOCK_DDR 800
- DDR4_COL_ADDR_WIDTH 10
- DDR4_CONTROLLER_ADD_CMD_DRIVE 34
- DDR4_CONTROLLER_CLK_DRIVE 48
- DDR4_CONTROLLER_DQS_DRIVE 48
- DDR4_CONTROLLER_DQS_ODT 120
- DDR4_CONTROLLER_DQ_DRIVE 48
- DDR4_CONTROLLER_DQ_ODT 120
- DDR4_DM_MODE DM
- DDR4_ENABLE_ECC false
- DDR4_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE false
- DDR4_ENABLE_PAR_ALERT false
- DDR4_GRANULARITY_MODE 0
- DDR4_INTERNAL_VREF_MONITER 0
- DDR4_MEMORY_FORMAT COMPONENT
- DDR4_NB_CLKS 1
- DDR4_NB_RANKS 1
- DDR4_ODT_ENABLE_RD_RNK0_ODT0 false
- DDR4_ODT_ENABLE_RD_RNK0_ODT1 false
- DDR4_ODT_ENABLE_RD_RNK1_ODT0 false
- DDR4_ODT_ENABLE_RD_RNK1_ODT1 false
- DDR4_ODT_ENABLE_WR_RNK0_ODT0 false
- DDR4_ODT_ENABLE_WR_RNK0_ODT1 false
- DDR4_ODT_ENABLE_WR_RNK1_ODT0 false
- DDR4_ODT_ENABLE_WR_RNK1_ODT1 false
- DDR4_OUTPUT_DRIVE_STRENGTH RZQ7
- DDR4_POWERDOWN_INPUT_BUFFER 1
- DDR4_READ_BURST_TYPE SEQUENTIAL
- DDR4_READ_PREAMBLE 0
- DDR4_ROW_ADDR_WIDTH 15
- DDR4_RTT_NOM RZQ4
- DDR4_RTT_PARK 0
- DDR4_RTT_WR OFF
- DDR4_SELF_REFRESH_ABORT_MODE 0
- DDR4_TEMPERATURE_REFRESH_MODE 0
- DDR4_TEMPERATURE_REFRESH_RANGE NORMAL
- DDR4_TIMING_CCD_L 5
- DDR4_TIMING_CCD_S 4
- DDR4_TIMING_FAW 25
- DDR4_TIMING_RAS 35
- DDR4_TIMING_RC 50
- DDR4_TIMING_RCD 15
- DDR4_TIMING_REFI 7.8
- DDR4_TIMING_RFC 160
- DDR4_TIMING_RP 15
- DDR4_TIMING_RRD_L 5
- DDR4_TIMING_RRD_S 4
- DDR4_TIMING_RTP 7.5
- DDR4_TIMING_WR 15
- DDR4_TIMING_WTR_L 6
- DDR4_TIMING_WTR_S 2
- DDR4_VREF_CALIB_ENABLE 1
- DDR4_VREF_CALIB_RANGE 1
- DDR4_VREF_CALIB_VALUE 64.5
- DDR4_WIDTH 32
- DDR4_WRITE_PREAMBLE 0
- DDR4_ZQ_CALIB_PERIOD 200
- DDR4_ZQ_CALIB_TYPE 0
- DDR4_ZQ_CAL_INIT_TIME 1024
- DDR4_ZQ_CAL_L_TIME 512
- DDR4_ZQ_CAL_S_TIME 128
- DDR_CACHED_32BIT_MEM_SIZE 1
- DDR_CACHED_32BIT_MEM_UNIT GB
- DDR_CACHED_64BIT_MEM_SIZE 0
- DDR_CACHED_64BIT_MEM_UNIT GB
- DDR_NON_CACHED_32BIT_MEM_SIZE 256
- DDR_NON_CACHED_32BIT_MEM_UNIT MB
- DDR_NON_CACHED_64BIT_MEM_SIZE 0
- DDR_NON_CACHED_64BIT_MEM_UNIT GB
- DDR_REFCLK DEDICATED_IO
- DDR_SDRAM_TYPE LPDDR4
- DIE MPFS250T_ES
- EMMC MSSIO_B4
- EMMC_DATA_7_4 MSSIO_B4
- EMMC_SD_CLK_SOURCE MSS_PLL
- EMMC_SD_SDIO_FREQ 200
- EMMC_SD_SWITCHING DISABLED
- ENABLE_FEEDBACK_PORTS false
- FF_IN_PROGRESS UNUSED
- FIC_0_AXI4_INITIATOR_USED true
- FIC_0_AXI4_TARGET_USED true
- FIC_0_EMBEDDED_DLL_USED true
- FIC_1_AXI4_INITIATOR_USED true
- FIC_1_AXI4_TARGET_USED false
- FIC_1_EMBEDDED_DLL_USED true
- FIC_2_AXI4_TARGET_USED false
- FIC_2_EMBEDDED_DLL_USED true
- FIC_3_APB_INITIATOR_USED true
- FIC_3_EMBEDDED_DLL_USED false
- FLASH_VALID UNUSED
- FREQOUT UNUSED
- G5C_IOOUT UNUSED
- GPIO_0_0 UNUSED
- GPIO_0_0_7_RESET_SOURCE MSS
- GPIO_0_0_DIR IN
- GPIO_0_1 UNUSED
- GPIO_0_10 UNUSED
- GPIO_0_10_DIR IN
- GPIO_0_11 UNUSED
- GPIO_0_11_DIR IN
- GPIO_0_12 UNUSED
- GPIO_0_12_DIR IN
- GPIO_0_13 UNUSED
- GPIO_0_13_DIR IN
- GPIO_0_1_DIR IN
- GPIO_0_2 UNUSED
- GPIO_0_2_DIR IN
- GPIO_0_3 UNUSED
- GPIO_0_3_DIR IN
- GPIO_0_4 UNUSED
- GPIO_0_4_DIR IN
- GPIO_0_5 UNUSED
- GPIO_0_5_DIR IN
- GPIO_0_6 UNUSED
- GPIO_0_6_DIR IN
- GPIO_0_7 UNUSED
- GPIO_0_7_DIR IN
- GPIO_0_8 UNUSED
- GPIO_0_8_13_RESET_SOURCE MSS
- GPIO_0_8_DIR IN
- GPIO_0_9 UNUSED
- GPIO_0_9_DIR IN
- GPIO_1_0 UNUSED
- GPIO_1_0_7_RESET_SOURCE MSS
- GPIO_1_0_DIR IN
- GPIO_1_1 UNUSED
- GPIO_1_10 UNUSED
- GPIO_1_10_DIR IN
- GPIO_1_11 UNUSED
- GPIO_1_11_DIR IN
- GPIO_1_12 UNUSED
- GPIO_1_12_DIR IN
- GPIO_1_13 UNUSED
- GPIO_1_13_DIR IN
- GPIO_1_14 UNUSED
- GPIO_1_14_DIR IN
- GPIO_1_15 UNUSED
- GPIO_1_15_DIR IN
- GPIO_1_16 UNUSED
- GPIO_1_16_23_RESET_SOURCE MSS
- GPIO_1_16_DIR IN
- GPIO_1_17 UNUSED
- GPIO_1_17_DIR IN
- GPIO_1_18 UNUSED
- GPIO_1_18_DIR IN
- GPIO_1_19 UNUSED
- GPIO_1_19_DIR IN
- GPIO_1_1_DIR IN
- GPIO_1_2 UNUSED
- GPIO_1_20 UNUSED
- GPIO_1_20_DIR IN
- GPIO_1_21 UNUSED
- GPIO_1_21_DIR IN
- GPIO_1_22 UNUSED
- GPIO_1_22_DIR IN
- GPIO_1_23 UNUSED
- GPIO_1_23_DIR IN
- GPIO_1_2_DIR IN
- GPIO_1_3 UNUSED
- GPIO_1_3_DIR IN
- GPIO_1_4 UNUSED
- GPIO_1_4_DIR IN
- GPIO_1_5 UNUSED
- GPIO_1_5_DIR IN
- GPIO_1_6 UNUSED
- GPIO_1_6_DIR IN
- GPIO_1_7 UNUSED
- GPIO_1_7_DIR IN
- GPIO_1_8 UNUSED
- GPIO_1_8_15_RESET_SOURCE MSS
- GPIO_1_8_DIR IN
- GPIO_1_9 UNUSED
- GPIO_1_9_DIR IN
- GPIO_2_0 UNUSED
- GPIO_2_0_7_RESET_SOURCE MSS
- GPIO_2_0_DIR IN
- GPIO_2_1 UNUSED
- GPIO_2_10 UNUSED
- GPIO_2_10_DIR IN
- GPIO_2_11 UNUSED
- GPIO_2_11_DIR IN
- GPIO_2_12 UNUSED
- GPIO_2_12_DIR IN
- GPIO_2_13 UNUSED
- GPIO_2_13_DIR IN
- GPIO_2_14 UNUSED
- GPIO_2_14_DIR IN
- GPIO_2_15 UNUSED
- GPIO_2_15_DIR IN
- GPIO_2_16 FABRIC
- GPIO_2_16_23_RESET_SOURCE MSS
- GPIO_2_16_DIR OUT
- GPIO_2_17 FABRIC
- GPIO_2_17_DIR OUT
- GPIO_2_18 FABRIC
- GPIO_2_18_DIR OUT
- GPIO_2_19 FABRIC
- GPIO_2_19_DIR OUT
- GPIO_2_1_DIR IN
- GPIO_2_2 UNUSED
- GPIO_2_20 UNUSED
- GPIO_2_20_DIR IN
- GPIO_2_21 UNUSED
- GPIO_2_21_DIR IN
- GPIO_2_22 UNUSED
- GPIO_2_22_DIR IN
- GPIO_2_23 UNUSED
- GPIO_2_23_DIR IN
- GPIO_2_24 UNUSED
- GPIO_2_24_31_RESET_SOURCE MSS
- GPIO_2_24_DIR IN
- GPIO_2_25 UNUSED
- GPIO_2_25_DIR IN
- GPIO_2_26 FABRIC
- GPIO_2_26_DIR OUT
- GPIO_2_27 FABRIC
- GPIO_2_27_DIR OUT
- GPIO_2_28 FABRIC
- GPIO_2_28_DIR OUT
- GPIO_2_29 UNUSED
- GPIO_2_29_DIR IN
- GPIO_2_2_DIR IN
- GPIO_2_3 UNUSED
- GPIO_2_30 FABRIC
- GPIO_2_30_DIR IN
- GPIO_2_31 FABRIC
- GPIO_2_31_DIR IN
- GPIO_2_3_DIR IN
- GPIO_2_4 UNUSED
- GPIO_2_4_DIR IN
- GPIO_2_5 UNUSED
- GPIO_2_5_DIR IN
- GPIO_2_6 UNUSED
- GPIO_2_6_DIR IN
- GPIO_2_7 UNUSED
- GPIO_2_7_DIR IN
- GPIO_2_8 UNUSED
- GPIO_2_8_15_RESET_SOURCE MSS
- GPIO_2_8_DIR IN
- GPIO_2_9 UNUSED
- GPIO_2_9_DIR IN
- I2C_0 UNUSED
- I2C_0_BAUD_RATE_CLOCK UNUSED
- I2C_0_SMBUS UNUSED
- I2C_1 MSSIO_B2_B
- I2C_1_BAUD_RATE_CLOCK UNUSED
- I2C_1_SMBUS UNUSED
- INTERNAL_DEBUG false
- INTERRUPT true
- IO_REFCLK_FREQ 125
- JTAG_TRACE false
- JTAG_TRACE_CONTROL_VIA_FABRIC false
- L2CACHE_DMA_WAY0 true
- L2CACHE_DMA_WAY1 true
- L2CACHE_DMA_WAY10 true
- L2CACHE_DMA_WAY11 true
- L2CACHE_DMA_WAY12 true
- L2CACHE_DMA_WAY13 true
- L2CACHE_DMA_WAY14 true
- L2CACHE_DMA_WAY15 true
- L2CACHE_DMA_WAY2 true
- L2CACHE_DMA_WAY3 true
- L2CACHE_DMA_WAY4 true
- L2CACHE_DMA_WAY5 true
- L2CACHE_DMA_WAY6 true
- L2CACHE_DMA_WAY7 true
- L2CACHE_DMA_WAY8 true
- L2CACHE_DMA_WAY9 true
- L2CACHE_E51_D_WAY0 true
- L2CACHE_E51_D_WAY1 true
- L2CACHE_E51_D_WAY10 true
- L2CACHE_E51_D_WAY11 true
- L2CACHE_E51_D_WAY12 true
- L2CACHE_E51_D_WAY13 true
- L2CACHE_E51_D_WAY14 true
- L2CACHE_E51_D_WAY15 true
- L2CACHE_E51_D_WAY2 true
- L2CACHE_E51_D_WAY3 true
- L2CACHE_E51_D_WAY4 true
- L2CACHE_E51_D_WAY5 true
- L2CACHE_E51_D_WAY6 true
- L2CACHE_E51_D_WAY7 true
- L2CACHE_E51_D_WAY8 true
- L2CACHE_E51_D_WAY9 true
- L2CACHE_E51_I_WAY0 true
- L2CACHE_E51_I_WAY1 true
- L2CACHE_E51_I_WAY10 true
- L2CACHE_E51_I_WAY11 true
- L2CACHE_E51_I_WAY12 true
- L2CACHE_E51_I_WAY13 true
- L2CACHE_E51_I_WAY14 true
- L2CACHE_E51_I_WAY15 true
- L2CACHE_E51_I_WAY2 true
- L2CACHE_E51_I_WAY3 true
- L2CACHE_E51_I_WAY4 true
- L2CACHE_E51_I_WAY5 true
- L2CACHE_E51_I_WAY6 true
- L2CACHE_E51_I_WAY7 true
- L2CACHE_E51_I_WAY8 true
- L2CACHE_E51_I_WAY9 true
- L2CACHE_LIM_SIZE 15
- L2CACHE_PORT_0_WAY0 true
- L2CACHE_PORT_0_WAY1 true
- L2CACHE_PORT_0_WAY10 true
- L2CACHE_PORT_0_WAY11 true
- L2CACHE_PORT_0_WAY12 true
- L2CACHE_PORT_0_WAY13 true
- L2CACHE_PORT_0_WAY14 true
- L2CACHE_PORT_0_WAY15 true
- L2CACHE_PORT_0_WAY2 true
- L2CACHE_PORT_0_WAY3 true
- L2CACHE_PORT_0_WAY4 true
- L2CACHE_PORT_0_WAY5 true
- L2CACHE_PORT_0_WAY6 true
- L2CACHE_PORT_0_WAY7 true
- L2CACHE_PORT_0_WAY8 true
- L2CACHE_PORT_0_WAY9 true
- L2CACHE_PORT_1_WAY0 true
- L2CACHE_PORT_1_WAY1 true
- L2CACHE_PORT_1_WAY10 true
- L2CACHE_PORT_1_WAY11 true
- L2CACHE_PORT_1_WAY12 true
- L2CACHE_PORT_1_WAY13 true
- L2CACHE_PORT_1_WAY14 true
- L2CACHE_PORT_1_WAY15 true
- L2CACHE_PORT_1_WAY2 true
- L2CACHE_PORT_1_WAY3 true
- L2CACHE_PORT_1_WAY4 true
- L2CACHE_PORT_1_WAY5 true
- L2CACHE_PORT_1_WAY6 true
- L2CACHE_PORT_1_WAY7 true
- L2CACHE_PORT_1_WAY8 true
- L2CACHE_PORT_1_WAY9 true
- L2CACHE_PORT_2_WAY0 true
- L2CACHE_PORT_2_WAY1 true
- L2CACHE_PORT_2_WAY10 true
- L2CACHE_PORT_2_WAY11 true
- L2CACHE_PORT_2_WAY12 true
- L2CACHE_PORT_2_WAY13 true
- L2CACHE_PORT_2_WAY14 true
- L2CACHE_PORT_2_WAY15 true
- L2CACHE_PORT_2_WAY2 true
- L2CACHE_PORT_2_WAY3 true
- L2CACHE_PORT_2_WAY4 true
- L2CACHE_PORT_2_WAY5 true
- L2CACHE_PORT_2_WAY6 true
- L2CACHE_PORT_2_WAY7 true
- L2CACHE_PORT_2_WAY8 true
- L2CACHE_PORT_2_WAY9 true
- L2CACHE_PORT_3_WAY0 true
- L2CACHE_PORT_3_WAY1 true
- L2CACHE_PORT_3_WAY10 true
- L2CACHE_PORT_3_WAY11 true
- L2CACHE_PORT_3_WAY12 true
- L2CACHE_PORT_3_WAY13 true
- L2CACHE_PORT_3_WAY14 true
- L2CACHE_PORT_3_WAY15 true
- L2CACHE_PORT_3_WAY2 true
- L2CACHE_PORT_3_WAY3 true
- L2CACHE_PORT_3_WAY4 true
- L2CACHE_PORT_3_WAY5 true
- L2CACHE_PORT_3_WAY6 true
- L2CACHE_PORT_3_WAY7 true
- L2CACHE_PORT_3_WAY8 true
- L2CACHE_PORT_3_WAY9 true
- L2CACHE_SCRATCH_SIZE 0
- L2CACHE_U54_1_D_WAY0 true
- L2CACHE_U54_1_D_WAY1 true
- L2CACHE_U54_1_D_WAY10 true
- L2CACHE_U54_1_D_WAY11 true
- L2CACHE_U54_1_D_WAY12 true
- L2CACHE_U54_1_D_WAY13 true
- L2CACHE_U54_1_D_WAY14 true
- L2CACHE_U54_1_D_WAY15 true
- L2CACHE_U54_1_D_WAY2 true
- L2CACHE_U54_1_D_WAY3 true
- L2CACHE_U54_1_D_WAY4 true
- L2CACHE_U54_1_D_WAY5 true
- L2CACHE_U54_1_D_WAY6 true
- L2CACHE_U54_1_D_WAY7 true
- L2CACHE_U54_1_D_WAY8 true
- L2CACHE_U54_1_D_WAY9 true
- L2CACHE_U54_1_I_WAY0 true
- L2CACHE_U54_1_I_WAY1 true
- L2CACHE_U54_1_I_WAY10 true
- L2CACHE_U54_1_I_WAY11 true
- L2CACHE_U54_1_I_WAY12 true
- L2CACHE_U54_1_I_WAY13 true
- L2CACHE_U54_1_I_WAY14 true
- L2CACHE_U54_1_I_WAY15 true
- L2CACHE_U54_1_I_WAY2 true
- L2CACHE_U54_1_I_WAY3 true
- L2CACHE_U54_1_I_WAY4 true
- L2CACHE_U54_1_I_WAY5 true
- L2CACHE_U54_1_I_WAY6 true
- L2CACHE_U54_1_I_WAY7 true
- L2CACHE_U54_1_I_WAY8 true
- L2CACHE_U54_1_I_WAY9 true
- L2CACHE_U54_2_D_WAY0 true
- L2CACHE_U54_2_D_WAY1 true
- L2CACHE_U54_2_D_WAY10 true
- L2CACHE_U54_2_D_WAY11 true
- L2CACHE_U54_2_D_WAY12 true
- L2CACHE_U54_2_D_WAY13 true
- L2CACHE_U54_2_D_WAY14 true
- L2CACHE_U54_2_D_WAY15 true
- L2CACHE_U54_2_D_WAY2 true
- L2CACHE_U54_2_D_WAY3 true
- L2CACHE_U54_2_D_WAY4 true
- L2CACHE_U54_2_D_WAY5 true
- L2CACHE_U54_2_D_WAY6 true
- L2CACHE_U54_2_D_WAY7 true
- L2CACHE_U54_2_D_WAY8 true
- L2CACHE_U54_2_D_WAY9 true
- L2CACHE_U54_2_I_WAY0 true
- L2CACHE_U54_2_I_WAY1 true
- L2CACHE_U54_2_I_WAY10 true
- L2CACHE_U54_2_I_WAY11 true
- L2CACHE_U54_2_I_WAY12 true
- L2CACHE_U54_2_I_WAY13 true
- L2CACHE_U54_2_I_WAY14 true
- L2CACHE_U54_2_I_WAY15 true
- L2CACHE_U54_2_I_WAY2 true
- L2CACHE_U54_2_I_WAY3 true
- L2CACHE_U54_2_I_WAY4 true
- L2CACHE_U54_2_I_WAY5 true
- L2CACHE_U54_2_I_WAY6 true
- L2CACHE_U54_2_I_WAY7 true
- L2CACHE_U54_2_I_WAY8 true
- L2CACHE_U54_2_I_WAY9 true
- L2CACHE_U54_3_D_WAY0 true
- L2CACHE_U54_3_D_WAY1 true
- L2CACHE_U54_3_D_WAY10 true
- L2CACHE_U54_3_D_WAY11 true
- L2CACHE_U54_3_D_WAY12 true
- L2CACHE_U54_3_D_WAY13 true
- L2CACHE_U54_3_D_WAY14 true
- L2CACHE_U54_3_D_WAY15 true
- L2CACHE_U54_3_D_WAY2 true
- L2CACHE_U54_3_D_WAY3 true
- L2CACHE_U54_3_D_WAY4 true
- L2CACHE_U54_3_D_WAY5 true
- L2CACHE_U54_3_D_WAY6 true
- L2CACHE_U54_3_D_WAY7 true
- L2CACHE_U54_3_D_WAY8 true
- L2CACHE_U54_3_D_WAY9 true
- L2CACHE_U54_3_I_WAY0 true
- L2CACHE_U54_3_I_WAY1 true
- L2CACHE_U54_3_I_WAY10 true
- L2CACHE_U54_3_I_WAY11 true
- L2CACHE_U54_3_I_WAY12 true
- L2CACHE_U54_3_I_WAY13 true
- L2CACHE_U54_3_I_WAY14 true
- L2CACHE_U54_3_I_WAY15 true
- L2CACHE_U54_3_I_WAY2 true
- L2CACHE_U54_3_I_WAY3 true
- L2CACHE_U54_3_I_WAY4 true
- L2CACHE_U54_3_I_WAY5 true
- L2CACHE_U54_3_I_WAY6 true
- L2CACHE_U54_3_I_WAY7 true
- L2CACHE_U54_3_I_WAY8 true
- L2CACHE_U54_3_I_WAY9 true
- L2CACHE_U54_4_D_WAY0 true
- L2CACHE_U54_4_D_WAY1 true
- L2CACHE_U54_4_D_WAY10 true
- L2CACHE_U54_4_D_WAY11 true
- L2CACHE_U54_4_D_WAY12 true
- L2CACHE_U54_4_D_WAY13 true
- L2CACHE_U54_4_D_WAY14 true
- L2CACHE_U54_4_D_WAY15 true
- L2CACHE_U54_4_D_WAY2 true
- L2CACHE_U54_4_D_WAY3 true
- L2CACHE_U54_4_D_WAY4 true
- L2CACHE_U54_4_D_WAY5 true
- L2CACHE_U54_4_D_WAY6 true
- L2CACHE_U54_4_D_WAY7 true
- L2CACHE_U54_4_D_WAY8 true
- L2CACHE_U54_4_D_WAY9 true
- L2CACHE_U54_4_I_WAY0 true
- L2CACHE_U54_4_I_WAY1 true
- L2CACHE_U54_4_I_WAY10 true
- L2CACHE_U54_4_I_WAY11 true
- L2CACHE_U54_4_I_WAY12 true
- L2CACHE_U54_4_I_WAY13 true
- L2CACHE_U54_4_I_WAY14 true
- L2CACHE_U54_4_I_WAY15 true
- L2CACHE_U54_4_I_WAY2 true
- L2CACHE_U54_4_I_WAY3 true
- L2CACHE_U54_4_I_WAY4 true
- L2CACHE_U54_4_I_WAY5 true
- L2CACHE_U54_4_I_WAY6 true
- L2CACHE_U54_4_I_WAY7 true
- L2CACHE_U54_4_I_WAY8 true
- L2CACHE_U54_4_I_WAY9 true
- LOCK_DOWN_B2_IOS false
- LOCK_DOWN_B4_IOS false
- LOCK_DOWN_DDR_IOS false
- LOCK_DOWN_SGMII_IOS false
- LPDDR3_ADDRESS_ORDERING CHIP_ROW_BANK_COL
- LPDDR3_BANK_ADDR_WIDTH 3
- LPDDR3_CLOCK_DDR 666
- LPDDR3_COL_ADDR_WIDTH 11
- LPDDR3_CONTROLLER_ADD_CMD_DRIVE 40
- LPDDR3_CONTROLLER_CLK_DRIVE 48
- LPDDR3_CONTROLLER_DQS_DRIVE 48
- LPDDR3_CONTROLLER_DQS_ODT 120
- LPDDR3_CONTROLLER_DQ_DRIVE 48
- LPDDR3_CONTROLLER_DQ_ODT 120
- LPDDR3_DATA_LATENCY RL10WL6
- LPDDR3_DM_MODE DM
- LPDDR3_DQ_ODT DISABLE
- LPDDR3_ENABLE_ECC false
- LPDDR3_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE false
- LPDDR3_MEMORY_FORMAT COMPONENT
- LPDDR3_ODT_ENABLE_RD_RNK0_ODT0 false
- LPDDR3_ODT_ENABLE_WR_RNK0_ODT0 false
- LPDDR3_OUTPUT_DRIVE_STRENGTH PDPU34P3
- LPDDR3_POWERDOWN_ODT 0
- LPDDR3_ROW_ADDR_WIDTH 14
- LPDDR3_TIMING_FAW 50
- LPDDR3_TIMING_MRR 4
- LPDDR3_TIMING_MRW 10
- LPDDR3_TIMING_RAS 42
- LPDDR3_TIMING_RC 57
- LPDDR3_TIMING_RCD 15
- LPDDR3_TIMING_REFI 3.9
- LPDDR3_TIMING_RFC 130
- LPDDR3_TIMING_RP 15
- LPDDR3_TIMING_RRD 10
- LPDDR3_TIMING_RTP 8
- LPDDR3_TIMING_WR 18
- LPDDR3_TIMING_WTR 4
- LPDDR3_WIDTH 32
- LPDDR3_ZQ_CALIB_PERIOD 200
- LPDDR3_ZQ_CALIB_TYPE 0
- LPDDR3_ZQ_CAL_INIT_TIME 1
- LPDDR3_ZQ_CAL_L_TIME 360
- LPDDR3_ZQ_CAL_R_TIME 50
- LPDDR3_ZQ_CAL_S_TIME 90
- LPDDR4_ADDRESS_ORDERING CHIP_ROW_BANK_COL
- LPDDR4_BANK_ADDR_WIDTH 3
- LPDDR4_CA_ODT RZQ4
- LPDDR4_CLOCK_DDR 800.0
- LPDDR4_COL_ADDR_WIDTH 10
- LPDDR4_CONTROLLER_ADD_CMD_DRIVE 34
- LPDDR4_CONTROLLER_CLK_DRIVE 34
- LPDDR4_CONTROLLER_DQS_DRIVE 40
- LPDDR4_CONTROLLER_DQS_ODT 40
- LPDDR4_CONTROLLER_DQ_DRIVE 40
- LPDDR4_CONTROLLER_DQ_ODT 40
- LPDDR4_DM_MODE DM
- LPDDR4_DQ_ODT RZQ2
- LPDDR4_DRIVE_STRENGTH RZQ6
- LPDDR4_ENABLE_ECC false
- LPDDR4_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE false
- LPDDR4_MEMORY_FORMAT COMPONENT
- LPDDR4_ODTE_CA 0
- LPDDR4_ODTE_CK 0
- LPDDR4_ODTE_CS 0
- LPDDR4_PULLUP_CAL VDDQ3
- LPDDR4_RD_POSTAMBLE CK0P5
- LPDDR4_RD_PREAMBLE STATIC
- LPDDR4_READ_LATENCY RL14
- LPDDR4_ROW_ADDR_WIDTH 16
- LPDDR4_SELF_REFRESH_ABORT_MODE 0
- LPDDR4_SOC_ODT RZQ6
- LPDDR4_TIMING_FAW 40
- LPDDR4_TIMING_MRR 8
- LPDDR4_TIMING_MRW 10
- LPDDR4_TIMING_RAS 42
- LPDDR4_TIMING_RC 63
- LPDDR4_TIMING_RCD 18
- LPDDR4_TIMING_REFI 3.905
- LPDDR4_TIMING_RFC 380
- LPDDR4_TIMING_RP 21
- LPDDR4_TIMING_RRD 10
- LPDDR4_TIMING_RTP 10
- LPDDR4_TIMING_WR 18
- LPDDR4_TIMING_WTR 8
- LPDDR4_WIDTH 32
- LPDDR4_WRITE_LATENCY WL8
- LPDDR4_WR_POSTAMBLE CK0P5
- LPDDR4_ZQ_CALIB_PERIOD 200
- LPDDR4_ZQ_CAL_LATCH_TIME 30
- LPDDR4_ZQ_CAL_R_TIME 50
- LPDDR4_ZQ_CAL_TIME 1
- LP_STATE UNUSED
- M2F_MONITOR UNUSED
- MAC_0 SGMII_IO_B5
- MAC_0_MANAGEMENT UNUSED
- MAC_0_OTHER UNUSED
- MAC_0_TSU INCREMENT_MODE
- MAC_1 SGMII_IO_B5
- MAC_1_MANAGEMENT MSSIO_B2_B
- MAC_1_OTHER UNUSED
- MAC_1_TSU INCREMENT_MODE
- MAC_SGMII_REFCLK DEDICATED_IO
- MAC_TSU_REFCLK DEDICATED_IO
- MMUART_0 FABRIC
- MMUART_0_MODE ASYNCHRONOUS
- MMUART_0_MODEM UNUSED
- MMUART_0_OTHER UNUSED
- MMUART_1 FABRIC
- MMUART_1_MODE ASYNCHRONOUS
- MMUART_1_MODEM UNUSED
- MMUART_1_OTHER UNUSED
- MMUART_2 FABRIC
- MMUART_3 FABRIC
- MMUART_4 UNUSED
- MODULE_NAME D-Orbit_ICICLE
- MSSIO_0_ATP_EN false
- MSSIO_0_CLAMP_DIODE false
- MSSIO_0_LOCK_DOWN false
- MSSIO_0_LPMD_IBUF false
- MSSIO_0_LPMD_OBUF false
- MSSIO_0_LP_PERSIST false
- MSSIO_0_MD_IBUF true
- MSSIO_0_OUT_DRIVE 8
- MSSIO_0_RES_PULL UP
- MSSIO_0_SCHMITT_TRIGGER false
- MSSIO_10_ATP_EN false
- MSSIO_10_CLAMP_DIODE false
- MSSIO_10_LOCK_DOWN false
- MSSIO_10_LPMD_IBUF false
- MSSIO_10_LPMD_OBUF false
- MSSIO_10_LP_PERSIST false
- MSSIO_10_MD_IBUF true
- MSSIO_10_OUT_DRIVE 8
- MSSIO_10_RES_PULL UP
- MSSIO_10_SCHMITT_TRIGGER false
- MSSIO_11_ATP_EN false
- MSSIO_11_CLAMP_DIODE false
- MSSIO_11_LOCK_DOWN false
- MSSIO_11_LPMD_IBUF false
- MSSIO_11_LPMD_OBUF false
- MSSIO_11_LP_PERSIST false
- MSSIO_11_MD_IBUF true
- MSSIO_11_OUT_DRIVE 8
- MSSIO_11_RES_PULL UP
- MSSIO_11_SCHMITT_TRIGGER false
- MSSIO_12_ATP_EN false
- MSSIO_12_CLAMP_DIODE false
- MSSIO_12_LOCK_DOWN false
- MSSIO_12_LPMD_IBUF false
- MSSIO_12_LPMD_OBUF false
- MSSIO_12_LP_PERSIST false
- MSSIO_12_MD_IBUF true
- MSSIO_12_OUT_DRIVE 8
- MSSIO_12_RES_PULL UP
- MSSIO_12_SCHMITT_TRIGGER false
- MSSIO_13_ATP_EN false
- MSSIO_13_CLAMP_DIODE false
- MSSIO_13_LOCK_DOWN false
- MSSIO_13_LPMD_IBUF false
- MSSIO_13_LPMD_OBUF false
- MSSIO_13_LP_PERSIST false
- MSSIO_13_MD_IBUF true
- MSSIO_13_OUT_DRIVE 8
- MSSIO_13_RES_PULL UP
- MSSIO_13_SCHMITT_TRIGGER false
- MSSIO_14_ATP_EN false
- MSSIO_14_CLAMP_DIODE false
- MSSIO_14_LOCK_DOWN false
- MSSIO_14_LPMD_IBUF false
- MSSIO_14_LPMD_OBUF false
- MSSIO_14_LP_PERSIST false
- MSSIO_14_MD_IBUF true
- MSSIO_14_OUT_DRIVE 8
- MSSIO_14_RES_PULL UP
- MSSIO_14_SCHMITT_TRIGGER false
- MSSIO_15_ATP_EN false
- MSSIO_15_CLAMP_DIODE false
- MSSIO_15_LOCK_DOWN false
- MSSIO_15_LPMD_IBUF false
- MSSIO_15_LPMD_OBUF false
- MSSIO_15_LP_PERSIST false
- MSSIO_15_MD_IBUF true
- MSSIO_15_OUT_DRIVE 8
- MSSIO_15_RES_PULL UP
- MSSIO_15_SCHMITT_TRIGGER false
- MSSIO_16_ATP_EN false
- MSSIO_16_CLAMP_DIODE false
- MSSIO_16_LOCK_DOWN false
- MSSIO_16_LPMD_IBUF false
- MSSIO_16_LPMD_OBUF false
- MSSIO_16_LP_PERSIST false
- MSSIO_16_MD_IBUF true
- MSSIO_16_OUT_DRIVE 8
- MSSIO_16_RES_PULL UP
- MSSIO_16_SCHMITT_TRIGGER false
- MSSIO_17_ATP_EN false
- MSSIO_17_CLAMP_DIODE false
- MSSIO_17_LOCK_DOWN false
- MSSIO_17_LPMD_IBUF false
- MSSIO_17_LPMD_OBUF false
- MSSIO_17_LP_PERSIST false
- MSSIO_17_MD_IBUF true
- MSSIO_17_OUT_DRIVE 8
- MSSIO_17_RES_PULL UP
- MSSIO_17_SCHMITT_TRIGGER false
- MSSIO_18_ATP_EN false
- MSSIO_18_CLAMP_DIODE false
- MSSIO_18_LOCK_DOWN false
- MSSIO_18_LPMD_IBUF false
- MSSIO_18_LPMD_OBUF false
- MSSIO_18_LP_PERSIST false
- MSSIO_18_MD_IBUF true
- MSSIO_18_OUT_DRIVE 8
- MSSIO_18_RES_PULL UP
- MSSIO_18_SCHMITT_TRIGGER false
- MSSIO_19_ATP_EN false
- MSSIO_19_CLAMP_DIODE false
- MSSIO_19_LOCK_DOWN false
- MSSIO_19_LPMD_IBUF false
- MSSIO_19_LPMD_OBUF false
- MSSIO_19_LP_PERSIST false
- MSSIO_19_MD_IBUF true
- MSSIO_19_OUT_DRIVE 8
- MSSIO_19_RES_PULL UP
- MSSIO_19_SCHMITT_TRIGGER false
- MSSIO_1_ATP_EN false
- MSSIO_1_CLAMP_DIODE false
- MSSIO_1_LOCK_DOWN false
- MSSIO_1_LPMD_IBUF false
- MSSIO_1_LPMD_OBUF false
- MSSIO_1_LP_PERSIST false
- MSSIO_1_MD_IBUF true
- MSSIO_1_OUT_DRIVE 8
- MSSIO_1_RES_PULL UP
- MSSIO_1_SCHMITT_TRIGGER false
- MSSIO_20_ATP_EN false
- MSSIO_20_CLAMP_DIODE false
- MSSIO_20_LOCK_DOWN false
- MSSIO_20_LPMD_IBUF false
- MSSIO_20_LPMD_OBUF false
- MSSIO_20_LP_PERSIST false
- MSSIO_20_MD_IBUF true
- MSSIO_20_OUT_DRIVE 8
- MSSIO_20_RES_PULL UP
- MSSIO_20_SCHMITT_TRIGGER false
- MSSIO_21_ATP_EN false
- MSSIO_21_CLAMP_DIODE false
- MSSIO_21_LOCK_DOWN false
- MSSIO_21_LPMD_IBUF false
- MSSIO_21_LPMD_OBUF false
- MSSIO_21_LP_PERSIST false
- MSSIO_21_MD_IBUF true
- MSSIO_21_OUT_DRIVE 8
- MSSIO_21_RES_PULL UP
- MSSIO_21_SCHMITT_TRIGGER false
- MSSIO_22_ATP_EN false
- MSSIO_22_CLAMP_DIODE false
- MSSIO_22_LOCK_DOWN false
- MSSIO_22_LPMD_IBUF false
- MSSIO_22_LPMD_OBUF false
- MSSIO_22_LP_PERSIST false
- MSSIO_22_MD_IBUF true
- MSSIO_22_OUT_DRIVE 8
- MSSIO_22_RES_PULL UP
- MSSIO_22_SCHMITT_TRIGGER false
- MSSIO_23_ATP_EN false
- MSSIO_23_CLAMP_DIODE false
- MSSIO_23_LOCK_DOWN false
- MSSIO_23_LPMD_IBUF false
- MSSIO_23_LPMD_OBUF false
- MSSIO_23_LP_PERSIST false
- MSSIO_23_MD_IBUF true
- MSSIO_23_OUT_DRIVE 8
- MSSIO_23_RES_PULL UP
- MSSIO_23_SCHMITT_TRIGGER false
- MSSIO_24_ATP_EN false
- MSSIO_24_CLAMP_DIODE false
- MSSIO_24_LOCK_DOWN false
- MSSIO_24_LPMD_IBUF false
- MSSIO_24_LPMD_OBUF false
- MSSIO_24_LP_PERSIST false
- MSSIO_24_MD_IBUF true
- MSSIO_24_OUT_DRIVE 8
- MSSIO_24_RES_PULL UP
- MSSIO_24_SCHMITT_TRIGGER false
- MSSIO_25_ATP_EN false
- MSSIO_25_CLAMP_DIODE false
- MSSIO_25_LOCK_DOWN false
- MSSIO_25_LPMD_IBUF false
- MSSIO_25_LPMD_OBUF false
- MSSIO_25_LP_PERSIST false
- MSSIO_25_MD_IBUF true
- MSSIO_25_OUT_DRIVE 8
- MSSIO_25_RES_PULL UP
- MSSIO_25_SCHMITT_TRIGGER false
- MSSIO_26_ATP_EN false
- MSSIO_26_CLAMP_DIODE false
- MSSIO_26_LOCK_DOWN false
- MSSIO_26_LPMD_IBUF false
- MSSIO_26_LPMD_OBUF false
- MSSIO_26_LP_PERSIST false
- MSSIO_26_MD_IBUF true
- MSSIO_26_OUT_DRIVE 8
- MSSIO_26_RES_PULL UP
- MSSIO_26_SCHMITT_TRIGGER false
- MSSIO_27_ATP_EN false
- MSSIO_27_CLAMP_DIODE false
- MSSIO_27_LOCK_DOWN false
- MSSIO_27_LPMD_IBUF false
- MSSIO_27_LPMD_OBUF false
- MSSIO_27_LP_PERSIST false
- MSSIO_27_MD_IBUF true
- MSSIO_27_OUT_DRIVE 8
- MSSIO_27_RES_PULL UP
- MSSIO_27_SCHMITT_TRIGGER false
- MSSIO_28_ATP_EN false
- MSSIO_28_CLAMP_DIODE false
- MSSIO_28_LOCK_DOWN false
- MSSIO_28_LPMD_IBUF false
- MSSIO_28_LPMD_OBUF false
- MSSIO_28_LP_PERSIST false
- MSSIO_28_MD_IBUF true
- MSSIO_28_OUT_DRIVE 8
- MSSIO_28_RES_PULL UP
- MSSIO_28_SCHMITT_TRIGGER false
- MSSIO_29_ATP_EN false
- MSSIO_29_CLAMP_DIODE false
- MSSIO_29_LOCK_DOWN false
- MSSIO_29_LPMD_IBUF false
- MSSIO_29_LPMD_OBUF false
- MSSIO_29_LP_PERSIST false
- MSSIO_29_MD_IBUF true
- MSSIO_29_OUT_DRIVE 8
- MSSIO_29_RES_PULL UP
- MSSIO_29_SCHMITT_TRIGGER false
- MSSIO_2_ATP_EN false
- MSSIO_2_CLAMP_DIODE false
- MSSIO_2_LOCK_DOWN false
- MSSIO_2_LPMD_IBUF false
- MSSIO_2_LPMD_OBUF false
- MSSIO_2_LP_PERSIST false
- MSSIO_2_MD_IBUF true
- MSSIO_2_OUT_DRIVE 8
- MSSIO_2_RES_PULL UP
- MSSIO_2_SCHMITT_TRIGGER false
- MSSIO_30_ATP_EN false
- MSSIO_30_CLAMP_DIODE false
- MSSIO_30_LOCK_DOWN false
- MSSIO_30_LPMD_IBUF false
- MSSIO_30_LPMD_OBUF false
- MSSIO_30_LP_PERSIST false
- MSSIO_30_MD_IBUF true
- MSSIO_30_OUT_DRIVE 8
- MSSIO_30_RES_PULL UP
- MSSIO_30_SCHMITT_TRIGGER false
- MSSIO_31_ATP_EN false
- MSSIO_31_CLAMP_DIODE false
- MSSIO_31_LOCK_DOWN false
- MSSIO_31_LPMD_IBUF false
- MSSIO_31_LPMD_OBUF false
- MSSIO_31_LP_PERSIST false
- MSSIO_31_MD_IBUF true
- MSSIO_31_OUT_DRIVE 8
- MSSIO_31_RES_PULL UP
- MSSIO_31_SCHMITT_TRIGGER false
- MSSIO_32_ATP_EN false
- MSSIO_32_CLAMP_DIODE false
- MSSIO_32_LOCK_DOWN false
- MSSIO_32_LPMD_IBUF false
- MSSIO_32_LPMD_OBUF false
- MSSIO_32_LP_PERSIST false
- MSSIO_32_MD_IBUF true
- MSSIO_32_OUT_DRIVE 8
- MSSIO_32_RES_PULL UP
- MSSIO_32_SCHMITT_TRIGGER false
- MSSIO_33_ATP_EN false
- MSSIO_33_CLAMP_DIODE false
- MSSIO_33_LOCK_DOWN false
- MSSIO_33_LPMD_IBUF false
- MSSIO_33_LPMD_OBUF false
- MSSIO_33_LP_PERSIST false
- MSSIO_33_MD_IBUF true
- MSSIO_33_OUT_DRIVE 8
- MSSIO_33_RES_PULL UP
- MSSIO_33_SCHMITT_TRIGGER false
- MSSIO_34_ATP_EN false
- MSSIO_34_CLAMP_DIODE false
- MSSIO_34_LOCK_DOWN false
- MSSIO_34_LPMD_IBUF false
- MSSIO_34_LPMD_OBUF false
- MSSIO_34_LP_PERSIST false
- MSSIO_34_MD_IBUF true
- MSSIO_34_OUT_DRIVE 8
- MSSIO_34_RES_PULL UP
- MSSIO_34_SCHMITT_TRIGGER false
- MSSIO_35_ATP_EN false
- MSSIO_35_CLAMP_DIODE false
- MSSIO_35_LOCK_DOWN false
- MSSIO_35_LPMD_IBUF false
- MSSIO_35_LPMD_OBUF false
- MSSIO_35_LP_PERSIST false
- MSSIO_35_MD_IBUF true
- MSSIO_35_OUT_DRIVE 8
- MSSIO_35_RES_PULL UP
- MSSIO_35_SCHMITT_TRIGGER false
- MSSIO_36_ATP_EN false
- MSSIO_36_CLAMP_DIODE false
- MSSIO_36_LOCK_DOWN false
- MSSIO_36_LPMD_IBUF false
- MSSIO_36_LPMD_OBUF false
- MSSIO_36_LP_PERSIST false
- MSSIO_36_MD_IBUF true
- MSSIO_36_OUT_DRIVE 8
- MSSIO_36_RES_PULL UP
- MSSIO_36_SCHMITT_TRIGGER false
- MSSIO_37_ATP_EN false
- MSSIO_37_CLAMP_DIODE false
- MSSIO_37_LOCK_DOWN false
- MSSIO_37_LPMD_IBUF false
- MSSIO_37_LPMD_OBUF false
- MSSIO_37_LP_PERSIST false
- MSSIO_37_MD_IBUF true
- MSSIO_37_OUT_DRIVE 8
- MSSIO_37_RES_PULL UP
- MSSIO_37_SCHMITT_TRIGGER false
- MSSIO_3_ATP_EN false
- MSSIO_3_CLAMP_DIODE false
- MSSIO_3_LOCK_DOWN false
- MSSIO_3_LPMD_IBUF false
- MSSIO_3_LPMD_OBUF false
- MSSIO_3_LP_PERSIST false
- MSSIO_3_MD_IBUF true
- MSSIO_3_OUT_DRIVE 8
- MSSIO_3_RES_PULL UP
- MSSIO_3_SCHMITT_TRIGGER false
- MSSIO_4_ATP_EN false
- MSSIO_4_CLAMP_DIODE false
- MSSIO_4_LOCK_DOWN false
- MSSIO_4_LPMD_IBUF false
- MSSIO_4_LPMD_OBUF false
- MSSIO_4_LP_PERSIST false
- MSSIO_4_MD_IBUF true
- MSSIO_4_OUT_DRIVE 8
- MSSIO_4_RES_PULL UP
- MSSIO_4_SCHMITT_TRIGGER false
- MSSIO_5_ATP_EN false
- MSSIO_5_CLAMP_DIODE false
- MSSIO_5_LOCK_DOWN false
- MSSIO_5_LPMD_IBUF false
- MSSIO_5_LPMD_OBUF false
- MSSIO_5_LP_PERSIST false
- MSSIO_5_MD_IBUF true
- MSSIO_5_OUT_DRIVE 8
- MSSIO_5_RES_PULL UP
- MSSIO_5_SCHMITT_TRIGGER false
- MSSIO_6_ATP_EN false
- MSSIO_6_CLAMP_DIODE false
- MSSIO_6_LOCK_DOWN false
- MSSIO_6_LPMD_IBUF false
- MSSIO_6_LPMD_OBUF false
- MSSIO_6_LP_PERSIST false
- MSSIO_6_MD_IBUF true
- MSSIO_6_OUT_DRIVE 8
- MSSIO_6_RES_PULL UP
- MSSIO_6_SCHMITT_TRIGGER false
- MSSIO_7_ATP_EN false
- MSSIO_7_CLAMP_DIODE false
- MSSIO_7_LOCK_DOWN false
- MSSIO_7_LPMD_IBUF false
- MSSIO_7_LPMD_OBUF false
- MSSIO_7_LP_PERSIST false
- MSSIO_7_MD_IBUF true
- MSSIO_7_OUT_DRIVE 8
- MSSIO_7_RES_PULL UP
- MSSIO_7_SCHMITT_TRIGGER false
- MSSIO_8_ATP_EN false
- MSSIO_8_CLAMP_DIODE false
- MSSIO_8_LOCK_DOWN false
- MSSIO_8_LPMD_IBUF false
- MSSIO_8_LPMD_OBUF false
- MSSIO_8_LP_PERSIST false
- MSSIO_8_MD_IBUF true
- MSSIO_8_OUT_DRIVE 8
- MSSIO_8_RES_PULL UP
- MSSIO_8_SCHMITT_TRIGGER false
- MSSIO_9_ATP_EN false
- MSSIO_9_CLAMP_DIODE false
- MSSIO_9_LOCK_DOWN false
- MSSIO_9_LPMD_IBUF false
- MSSIO_9_LPMD_OBUF false
- MSSIO_9_LP_PERSIST false
- MSSIO_9_MD_IBUF true
- MSSIO_9_OUT_DRIVE 8
- MSSIO_9_RES_PULL UP
- MSSIO_9_SCHMITT_TRIGGER false
- MSSIO_REFCLK_IOSTD LVDS25
- MSSIO_REFCLK_ODT 100
- MSSIO_REFCLK_PULL_UP false
- MSSIO_REFCLK_SCHMITT_TRIGGER false
- MSSIO_REFCLK_THEVENIN OFF
- MSS_AHB_APB_CLK_DIV 4
- MSS_AXI_CLK_DIV 2
- MSS_CLK_DIV 1
- MSS_PLLOUT_FREQ 600.000
- MSS_PMP_ENABLE false
- MSS_REFCLK DEDICATED_IO
- PACKAGE FCVG484
- PFSOC_MSS_VERSION 2021.3
- PLL_NW_REFCLK0_FREQ 100
- PLL_NW_REFCLK1_FREQ 125
- PMP_CAN0_CONTEXT_A_EN true
- PMP_CAN0_CONTEXT_B_EN false
- PMP_CAN1_CONTEXT_A_EN false
- PMP_CAN1_CONTEXT_B_EN true
- PMP_CRYPTO_CFG_CONTEXT_A_EN true
- PMP_CRYPTO_CFG_CONTEXT_B_EN false
- PMP_CRYPTO_MEM_CONTEXT_A_EN true
- PMP_CRYPTO_MEM_CONTEXT_B_EN false
- PMP_EMMC_CONTEXT_A_EN true
- PMP_EMMC_CONTEXT_B_EN false
- PMP_GEM0_CONTEXT_A_EN true
- PMP_GEM0_CONTEXT_B_EN false
- PMP_GEM1_CONTEXT_A_EN false
- PMP_GEM1_CONTEXT_B_EN true
- PMP_GPIO0_CONTEXT_A_EN true
- PMP_GPIO0_CONTEXT_B_EN false
- PMP_GPIO1_CONTEXT_A_EN false
- PMP_GPIO1_CONTEXT_B_EN true
- PMP_GPIO2_CONTEXT_A_EN true
- PMP_GPIO2_CONTEXT_B_EN false
- PMP_I2C0_CONTEXT_A_EN true
- PMP_I2C0_CONTEXT_B_EN false
- PMP_I2C1_CONTEXT_A_EN false
- PMP_I2C1_CONTEXT_B_EN true
- PMP_INITIATOR_U54_1_CONTEXT_A_EN true
- PMP_INITIATOR_U54_1_CONTEXT_B_EN false
- PMP_INITIATOR_U54_2_CONTEXT_A_EN true
- PMP_INITIATOR_U54_2_CONTEXT_B_EN false
- PMP_INITIATOR_U54_3_CONTEXT_A_EN false
- PMP_INITIATOR_U54_3_CONTEXT_B_EN true
- PMP_INITIATOR_U54_4_CONTEXT_A_EN false
- PMP_INITIATOR_U54_4_CONTEXT_B_EN true
- PMP_MMUART1_CONTEXT_A_EN true
- PMP_MMUART1_CONTEXT_B_EN false
- PMP_MMUART2_CONTEXT_A_EN true
- PMP_MMUART2_CONTEXT_B_EN false
- PMP_MMUART3_CONTEXT_A_EN false
- PMP_MMUART3_CONTEXT_B_EN true
- PMP_MMUART4_CONTEXT_A_EN false
- PMP_MMUART4_CONTEXT_B_EN true
- PMP_QSPI_CONTEXT_A_EN true
- PMP_QSPI_CONTEXT_B_EN false
- PMP_RTC_CONTEXT_A_EN true
- PMP_RTC_CONTEXT_B_EN false
- PMP_SPI0_CONTEXT_A_EN true
- PMP_SPI0_CONTEXT_B_EN false
- PMP_SPI1_CONTEXT_A_EN false
- PMP_SPI1_CONTEXT_B_EN true
- PMP_USB_CONTEXT_A_EN true
- PMP_USB_CONTEXT_B_EN false
- QSPI FABRIC
- QSPI_CLK FABRIC
- QSPI_DATA_3_2 UNUSED
- SD UNUSED
- SD_CLE UNUSED
- SD_LED UNUSED
- SD_LED_IS_INVERTED false
- SD_PORTS_DISABLE false
- SD_VOLT_0 UNUSED
- SD_VOLT_0_IS_INVERTED false
- SD_VOLT_1 UNUSED
- SD_VOLT_1_IS_INVERTED false
- SD_VOLT_2 UNUSED
- SD_VOLT_2_IS_INVERTED false
- SD_VOLT_CMD_DIR_IS_INVERTED false
- SD_VOLT_DIR_0_IS_INVERTED false
- SD_VOLT_DIR_1_3_IS_INVERTED false
- SD_VOLT_EN_IS_INVERTED false
- SD_VOLT_PORTS UNUSED
- SD_VOLT_SEL_IS_INVERTED false
- SGMII_RX0_IOSTD LVDS33
- SGMII_RX0_ODT 100
- SGMII_RX0_PULLMODE NONE
- SGMII_RX0_VCM_RANGE MID
- SGMII_RX1_IOSTD LVDS33
- SGMII_RX1_ODT 100
- SGMII_RX1_PULLMODE NONE
- SGMII_RX1_VCM_RANGE MID
- SGMII_TX0_IOSTD LVDS33
- SGMII_TX0_OUT_DRIVE 6
- SGMII_TX0_PULLMODE NONE
- SGMII_TX0_SOURCE_TERM 100
- SGMII_TX1_IOSTD LVDS33
- SGMII_TX1_OUT_DRIVE 6
- SGMII_TX1_PULLMODE NONE
- SGMII_TX1_SOURCE_TERM 100
- SPEED STD
- SPI_0 FABRIC
- SPI_0_SS1 UNUSED
- SPI_1 MSSIO_B2_B
- SPI_1_SS1 UNUSED
- USB UNUSED
- USOC_DEBUG_TRACE false
- WD_RESETN UNUSED
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