library ieee;
	use ieee.std_logic_1164.all;
	use ieee.std_logic_unsigned.all;

entity kombimreze is
	port(
		iSW: in std_logic_vector(7 downto 0);
		iINV: in std_logic;
		oLED: out std_logic_vector(7 downto 0);
		oSIGN: out std_logic;
		oGREAT: out std_logic
	);
end entity;

architecture Behavioral of kombimreze is
	signal sZBIR : std_logic_vector(3 downto 0);
	signal sIND: std_logic_vector(2 downto 0);
	signal sLED: std_logic_vector(7 downto 0);
	signal sA: std_logic_vector(1 downto 0);
	signal sB: std_logic_vector(1 downto 0);
begin

	process(iINV, iSW) begin
		if(iSW(6) = '1' and iSW(2) = '0') then
			sZBIR <= (not("00" & iSW(5 downto 4)) + '1') + ('0' & iSW(2 downto 0));

		elsif (iSW(6) = '0' and iSW(2) = '1') then
			sZBIR <= ('0' & iSW(6 downto 4)) + (not("00" & iSW(1 downto 0)) + '1');

		elsif(iSW(6) = '1' and iSW(2) = '1') then
			sZBIR <= (not("00" & iSW(5 downto 4)) + '1') + (not("00" & iSW(1 downto 0)) + '1');

		else
			sZBIR <= ('0' & iSW(6 downto 4)) + ('0' & iSW(2 downto 0));

		end if;
	end process;

	sIND <= "000" when iSW(0) = '1' else
			  "001" when iSW(1) = '1' else
			  "010" when iSW(2) = '1' else
			  "011" when iSW(3) = '1' else
			  "100" when iSW(4) = '1' else
			  "101" when iSW(5) = '1' else
			  "110" when iSW(6) = '1' else
			  "111" when iSW(7) = '1' else
			  "000";

	sLED <= sIND & '1' & sZBIR;

	oSIGN <= sLED(3) when iINV = '0' else
				'0';

	sA <= iSW(5 downto 4);
	sB <= iSW(1 downto 0);

	process(sA, sB, iSW) begin

	if (iSW(6) = '0') and (iSW(2) = '1') then
		oGREAT <= '1';

	elsif (iSW(6) = '0') and (iSW(2) = '0') and (sA > sB) then
		oGREAT <= '1';

	elsif (iSW(6) = '1') and (iSW(2) = '1') and (sA < sB) then
		oGREAT <= '1';

	else
		oGREAT <= '0';

	end if;

	end process;

	oLED <= sLED when iINV = '0' else
			  not(iSW);

end architecture;