system-user.dtsi

/include/ "system-conf.dtsi"
/ {
};

&gem3 {
	status = "okay";
	local-mac-address = [00 0a 35 00 02 90];
	phy-mode = "rgmii-id";
	phy-handle = <&phy0>;
	phy0: phy@9 {
		reg = <0x9>;
		ti,rx-internal-delay = <0x5>;
		ti,tx-internal-delay = <0x5>;
		ti,fifo-depth = <0x1>;
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;

	i2cswitch@70 { /* U7 on UZ3EG SOM */
		compatible = "nxp,pca9542";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x70>;
		i2c@0 { /* i2c mw 70 0 1 */
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
			/* IIC_EEPROM */
			eeprom@52 { /* U5 on UZ3EG IO Carrier*/
				compatible = "at,24c08";
				reg = <0x52>;
			};
		};
	};
};

&qspi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	flash0: flash@0 {
		compatible = "micron,n25q256a"; /* 32MB */
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
		spi-max-frequency = <108000000>; /* Based on DC1 spec */
		partition@qspi-boot {
			label = "qspi-boot";
			reg = <0x0 0x780000>;
		};
		partition@qspi-bootenv {
			label = "qspi-bootenv";
			reg = <0x780000 0x80000>;
		};
		partition@qspi-linux {
			label = "qspi-linux";
			reg = <0x800000 0x3800000>;
		};
	};
};

/* SD0 eMMC, 8-bit wide data bus */
&sdhci0 {
	status = "okay";
	bus-width = <8>;
	max-frequency = <50000000>;
	disable-wp;
};

/* SD1 with level shifter */
&sdhci1 {
	status = "okay";
	max-frequency = <50000000>;
	no-1-8-v;	/* for 1.0 silicon */
	disable-wp;
};

/* ULPI SMSC USB3320 */
&usb0 {
	status = "okay";
};

&dwc3_0 {
	status = "okay";
	dr_mode = "host";
	phy-names = "usb3-phy";
};