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Apr 22nd, 2018
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  1.  
  2. void iplc_sim_LRU_replace_on_miss( int index, int tag )
  3. {
  4. int i=0, j=0;
  5. int temp;
  6.  
  7. /* Note: item 0 is the least recently used cache slot -- so replace it */
  8. cache[index].assoc[cache[index].replacement[0]].tag = tag;
  9. /* percolate everything up */
  10. for (i = 0, j = 1; j < cache_assoc; i++, j++)
  11. {
  12. temp = cache[index].replacement[i];
  13. cache[index].replacement[i] = cache[index].replacement[j];
  14. cache[index].replacement[j] = temp;
  15. }
  16. }
  17.  
  18. void iplc_sim_LRU_update_on_hit( int index, int assoc )
  19. {
  20. int i=0, j=0;
  21. int temp;
  22.  
  23. for (i = 0; i < cache_assoc; i++)
  24. {
  25. if (cache[index].replacement[i] == assoc)
  26. {
  27. if (i == cache_assoc - 1) return;
  28. for (j = i + 1; j < cache_assoc; i++, j++)
  29. {
  30. temp = cache[index].replacement[i];
  31. cache[index].replacement[i] = cache[index].replacement[j];
  32. cache[index].replacement[j] = temp;
  33. }
  34. return;
  35. }
  36. }
  37. }
  38.  
  39. int iplc_sim_trap_address( unsigned int address )
  40. {
  41. int i=0, index=0;
  42. int tag=0;
  43. int hit=0;
  44.  
  45. index = (address >> cache_blockoffsetbits ) % (1 << cache_index);
  46. tag = (address >> (cache_index + cache_blockoffsetbits));
  47.  
  48. for( i = 0; i < cache_assoc; i++ )
  49. {
  50. if(cache[index].assoc[i].tag == tag && cache[index].assoc[i].vb)
  51. {
  52. hit = 1;
  53. break;
  54. }
  55. }
  56.  
  57. if(hit)
  58. iplc_sim_LRU_update_on_hit(index, i);
  59. else
  60. iplc_sim_LRU_replace_on_miss(index, tag);
  61. /* expects you to return 1 for hit, 0 for miss */
  62. return(hit);
  63. }
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