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  1. // arith_machine: execute a series of arithmetic instructions from an instruction cache
  2. //
  3. // except (output) - set to 1 when an unrecognized instruction is to be executed.
  4. // clock  (input)  - the clock signal
  5. // reset  (input)  - set to 1 to set all registers to zero, set to 0 for normal execution.
  6.  
  7. module arith_machine(except, clock, reset);
  8.     output      except;
  9.     input       clock, reset;
  10.  
  11.     wire [31:0] inst;  
  12.     wire [31:0] PC;  
  13.     wire [31:0] nextPC = 32'b00;  
  14.  
  15.     // DO NOT comment out or rename this module
  16.     // or the test bench will break
  17.     register #(32) PC_reg(PC, nextPC, clock, 1'b1, reset);
  18.     alu32 pcplus4(nextPC, , , , PC, 32’h4,`ALU_ADD);
  19.  
  20.     // DO NOT comment out or rename this module
  21.     // or the test bench will break
  22.     instruction_memory im(inst, PC[31:2]);
  23.  
  24.     wire alu_src2, rd_src, writeenable, [2:0] alu_op;  
  25.     mips_decode decode(alu_src2, rd_src, writeenable, alu_op, except, inst[31:26], inst[5:0]);
  26.  
  27.     // DO NOT comment out or rename this module
  28.     // or the test bench will break
  29.     wire [31:0] A_Data, [31:0] B_Data, [31:0] B;
  30.     mux2v m(out[31:16], zeroes, ones, negative);
  31.     regfile rf (  );
  32.  
  33.     /* add other modules */
  34.    
  35. endmodule // arith_machine
  36.  
  37. module sign_extender(out, in);
  38.     output      [31:0] out;
  39.     input       [15:0] in;
  40.     wire [15:0] ones = 16'b1;
  41.     wire [15:0] zeroes = 16'b0;
  42.  
  43.     assign negative = (in[15] == 1);
  44.     mux2v m(out[31:16], zeroes, ones, negative);
  45.     assign out[15:0] = in[15:0];
  46. endmodule
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