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  1. SerialICE: Open connection to target hardware...
  2. SerialICE: Waiting for handshake with target... target alive!
  3. SerialICE: Version.....: SerialICE v1.5 (Oct 24 2010)
  4. SerialICE: Mainboard...: ASUS P2B
  5. SerialICE: LUA init...
  6. SerialICE: Starting LUA script
  7. SerialICE: Registering physical memory areas for Cache-As-Ram:
  8. Registering physical memory at 0xffd80000 (0x00080000 bytes)
  9. Registering physical memory at 0xffbc0000 (0x00040000 bytes)
  10. SerialICE: LUA script initialized.
  11. VNC server running on `127.0.0.1:5900'
  12. IO: outb 0080 <= 10
  13. CPU: rdmsr 0000001b => 00000000.fee00900
  14. IO: outl 0cf8 <= 80000000
  15. IO: inl 0cfc => 71908086
  16. PCI16 0:00.0 R.00
  17. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x0), 0x00), 0x71908086)
  18. IO: outl 0cf8 <= 80000100
  19. IO: inl 0cfc => ffffffff
  20. PCI16 0:00.1 R.00
  21. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x1), 0x00), 0xffffffff)
  22. IO: outl 0cf8 <= 80000200
  23. IO: inl 0cfc => ffffffff
  24. PCI16 0:00.2 R.00
  25. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x2), 0x00), 0xffffffff)
  26. IO: outl 0cf8 <= 80000300
  27. IO: inl 0cfc => ffffffff
  28. PCI16 0:00.3 R.00
  29. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x3), 0x00), 0xffffffff)
  30. IO: outl 0cf8 <= 80000400
  31. IO: inl 0cfc => ffffffff
  32. PCI16 0:00.4 R.00
  33. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x4), 0x00), 0xffffffff)
  34. IO: outl 0cf8 <= 80000500
  35. IO: inl 0cfc => ffffffff
  36. PCI16 0:00.5 R.00
  37. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x5), 0x00), 0xffffffff)
  38. IO: outl 0cf8 <= 80000600
  39. IO: inl 0cfc => ffffffff
  40. PCI16 0:00.6 R.00
  41. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x6), 0x00), 0xffffffff)
  42. IO: outl 0cf8 <= 80000700
  43. IO: inl 0cfc => ffffffff
  44. PCI16 0:00.7 R.00
  45. pci_read_config32(PCI_ADDR(0x0, 0x00, 0x7), 0x00), 0xffffffff)
  46. IO: outl 0cf8 <= 80000800
  47. IO: inl 0cfc => 71918086
  48. PCI16 0:01.0 R.00
  49. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x0), 0x00), 0x71918086)
  50. IO: outl 0cf8 <= 80000900
  51. IO: inl 0cfc => ffffffff
  52. PCI16 0:01.1 R.00
  53. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x1), 0x00), 0xffffffff)
  54. IO: outl 0cf8 <= 80000a00
  55. IO: inl 0cfc => ffffffff
  56. PCI16 0:01.2 R.00
  57. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x2), 0x00), 0xffffffff)
  58. IO: outl 0cf8 <= 80000b00
  59. IO: inl 0cfc => ffffffff
  60. PCI16 0:01.3 R.00
  61. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x3), 0x00), 0xffffffff)
  62. IO: outl 0cf8 <= 80000c00
  63. IO: inl 0cfc => ffffffff
  64. PCI16 0:01.4 R.00
  65. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x4), 0x00), 0xffffffff)
  66. IO: outl 0cf8 <= 80000d00
  67. IO: inl 0cfc => ffffffff
  68. PCI16 0:01.5 R.00
  69. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x5), 0x00), 0xffffffff)
  70. IO: outl 0cf8 <= 80000e00
  71. IO: inl 0cfc => ffffffff
  72. PCI16 0:01.6 R.00
  73. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x6), 0x00), 0xffffffff)
  74. IO: outl 0cf8 <= 80000f00
  75. IO: inl 0cfc => ffffffff
  76. PCI16 0:01.7 R.00
  77. pci_read_config32(PCI_ADDR(0x0, 0x01, 0x7), 0x00), 0xffffffff)
  78. IO: outl 0cf8 <= 80001000
  79. IO: inl 0cfc => ffffffff
  80. PCI16 0:02.0 R.00
  81. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x0), 0x00), 0xffffffff)
  82. IO: outl 0cf8 <= 80001100
  83. IO: inl 0cfc => ffffffff
  84. PCI16 0:02.1 R.00
  85. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x1), 0x00), 0xffffffff)
  86. IO: outl 0cf8 <= 80001200
  87. IO: inl 0cfc => ffffffff
  88. PCI16 0:02.2 R.00
  89. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x2), 0x00), 0xffffffff)
  90. IO: outl 0cf8 <= 80001300
  91. IO: inl 0cfc => ffffffff
  92. PCI16 0:02.3 R.00
  93. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x3), 0x00), 0xffffffff)
  94. IO: outl 0cf8 <= 80001400
  95. IO: inl 0cfc => ffffffff
  96. PCI16 0:02.4 R.00
  97. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x4), 0x00), 0xffffffff)
  98. IO: outl 0cf8 <= 80001500
  99. IO: inl 0cfc => ffffffff
  100. PCI16 0:02.5 R.00
  101. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x5), 0x00), 0xffffffff)
  102. IO: outl 0cf8 <= 80001600
  103. IO: inl 0cfc => ffffffff
  104. PCI16 0:02.6 R.00
  105. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x6), 0x00), 0xffffffff)
  106. IO: outl 0cf8 <= 80001700
  107. IO: inl 0cfc => ffffffff
  108. PCI16 0:02.7 R.00
  109. pci_read_config32(PCI_ADDR(0x0, 0x02, 0x7), 0x00), 0xffffffff)
  110. IO: outl 0cf8 <= 80001800
  111. IO: inl 0cfc => ffffffff
  112. PCI16 0:03.0 R.00
  113. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x0), 0x00), 0xffffffff)
  114. IO: outl 0cf8 <= 80001900
  115. IO: inl 0cfc => ffffffff
  116. PCI16 0:03.1 R.00
  117. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x1), 0x00), 0xffffffff)
  118. IO: outl 0cf8 <= 80001a00
  119. IO: inl 0cfc => ffffffff
  120. PCI16 0:03.2 R.00
  121. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x2), 0x00), 0xffffffff)
  122. IO: outl 0cf8 <= 80001b00
  123. IO: inl 0cfc => ffffffff
  124. PCI16 0:03.3 R.00
  125. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x3), 0x00), 0xffffffff)
  126. IO: outl 0cf8 <= 80001c00
  127. IO: inl 0cfc => ffffffff
  128. PCI16 0:03.4 R.00
  129. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x4), 0x00), 0xffffffff)
  130. IO: outl 0cf8 <= 80001d00
  131. IO: inl 0cfc => ffffffff
  132. PCI16 0:03.5 R.00
  133. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x5), 0x00), 0xffffffff)
  134. IO: outl 0cf8 <= 80001e00
  135. IO: inl 0cfc => ffffffff
  136. PCI16 0:03.6 R.00
  137. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x6), 0x00), 0xffffffff)
  138. IO: outl 0cf8 <= 80001f00
  139. IO: inl 0cfc => ffffffff
  140. PCI16 0:03.7 R.00
  141. pci_read_config32(PCI_ADDR(0x0, 0x03, 0x7), 0x00), 0xffffffff)
  142. IO: outl 0cf8 <= 80002000
  143. IO: inl 0cfc => 71108086
  144. PCI16 0:04.0 R.00
  145. pci_read_config32(PCI_ADDR(0x0, 0x04, 0x0), 0x00), 0x71108086)
  146. IO: outl 0cf8 <= 8000204c
  147. IO: inw 0cfe => 0003
  148. pci_read_config16(PCI_ADDR(0x0, 0x04, 0x0), 0x4e), 0x0003)
  149. IO: outl 0cf8 <= 8000204c
  150. IO: outw 0cfe <= 02c3
  151. pci_write_config16(PCI_ADDR(0x0, 0x04, 0x0), 0x4e), 0x02c3)
  152. IO: outb 0080 <= 10
  153. CPU: CPUID eax: 00000001; ecx: 00000000 => 00000673.00010000.00000000.0387fbff
  154. CPU: wrmsr 000002ff <= 00000000.00000c00
  155. CPU: wrmsr 00000250 <= 00000000.00000000
  156. CPU: wrmsr 00000258 <= 00000000.00000000
  157. CPU: wrmsr 00000259 <= 00000000.00000000
  158. CPU: wrmsr 00000268 <= 00000000.00000000
  159. CPU: wrmsr 00000269 <= 00000000.00000000
  160. CPU: wrmsr 0000026a <= 00000000.00000000
  161. CPU: wrmsr 0000026b <= 00000000.00000000
  162. CPU: wrmsr 0000026c <= 00000000.00000000
  163. CPU: wrmsr 0000026d <= 00000000.00000000
  164. CPU: wrmsr 0000026e <= 00000000.00000000
  165. CPU: wrmsr 0000026f <= 00000000.00000000
  166. CPU: wrmsr 00000200 <= 00000000.00000000
  167. CPU: wrmsr 00000201 <= 00000000.00000000
  168. CPU: wrmsr 00000202 <= 00000000.00000000
  169. CPU: wrmsr 00000203 <= 00000000.00000000
  170. CPU: wrmsr 00000204 <= 00000000.00000000
  171. CPU: wrmsr 00000205 <= 00000000.00000000
  172. CPU: wrmsr 00000206 <= 00000000.00000000
  173. CPU: wrmsr 00000207 <= 00000000.00000000
  174. CPU: wrmsr 00000208 <= 00000000.00000000
  175. CPU: wrmsr 00000209 <= 00000000.00000000
  176. CPU: wrmsr 0000020a <= 00000000.00000000
  177. CPU: wrmsr 0000020b <= 00000000.00000000
  178. CPU: wrmsr 0000020c <= 00000000.00000000
  179. CPU: wrmsr 0000020d <= 00000000.00000000
  180. CPU: wrmsr 0000020e <= 00000000.00000000
  181. CPU: wrmsr 0000020f <= 00000000.00000000
  182. CPU: wrmsr 00000269 <= 06000000.00000000
  183. CPU: wrmsr 00000202 <= 00000000.fffc0006
  184. CPU: wrmsr 00000203 <= 0000000f.ffff0800
  185. MEM: readl 000cf000 => ffffffff *
  186. MEM: readl 000cf004 => ffffffff *
  187. MEM: readl 000cf008 => ffffffff *
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