API tools faq
paste
bickman2k

cbmem.log with -1

bickman2k
Feb 1st, 2025
34
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 37.21 KB | None | 0 0
raw download clone embed print report
  1.  
  2. [NOTE ] coreboot-24.08-90-g866f516a478b-MrChromebox-2408.1 Sat Sep 14 20:28:13 UTC 2024 x86_32 bootblock starting (log level: 7)...
  3. [DEBUG] FMAP: Found "FLASH" version 1.1 at 0x554000.
  4. [DEBUG] FMAP: base = 0xff800000 size = 0x800000 #areas = 6
  5. [DEBUG] FMAP: area COREBOOT found @ 554200 (2801152 bytes)
  6. [INFO ] CBFS: mcache @0xff7c2e00 built for 15 files, used 0x330 of 0x4000 bytes
  7. [INFO ] CBFS: Found 'fallback/romstage' @0x5980 size 0xcb00 in mcache @0xff7c2e8c
  8. [DEBUG] BS: bootblock times (exec / console): total (unknown) / 1 ms
  9.  
  10.  
  11. [NOTE ] coreboot-24.08-90-g866f516a478b-MrChromebox-2408.1 Sat Sep 14 20:28:13 UTC 2024 x86_32 romstage starting (log level: 7)...
  12. [DEBUG] Disabling Watchdog reboot... done.
  13. [DEBUG] SMBus controller enabled
  14. [DEBUG] Setting up static northbridge registers... done.
  15. [DEBUG] Initializing IGD...
  16. [DEBUG] Back from haswell_early_initialization()
  17. [DEBUG] CPU id(40651) ucode:00000026 Intel(R) Celeron(R) 2955U @ 1.40GHz
  18. [DEBUG] AES NOT supported, TXT NOT supported, VT supported
  19. [DEBUG] PCH type: LP Mainstream, device id: 9c45, rev id 4
  20. [DEBUG] Starting UEFI PEI System Agent
  21. [DEBUG] FMAP: area RW_MRC_CACHE found @ 500000 (65536 bytes)
  22. [DEBUG] prepare_mrc_cache: at 0xffd03004, size fd4
  23. [DEBUG] FMAP: area COREBOOT found @ 554200 (2801152 bytes)
  24. [INFO ] CBFS: Found 'mrc.bin' @0x24bdc0 size 0x2eb04 in mcache @0xff7c30ac
  25. System Agent: Starting up...
  26. System Agent: Initializing PCH
  27. install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
  28. install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
  29. System Agent: Initializing PCH (SMBUS)
  30. System Agent: Initializing PCH (USB)
  31. System Agent: Initializing PCH (SA Init)
  32. System Agent: Initializing PCH (Me UMA)
  33. System Agent: Initializing Memory
  34. System Agent: Done.
  35. Sanity checking heap.
  36. [DEBUG] MRC Version 1.6.1 Build 2
  37. [DEBUG] memcfg DDR3 clock 1600 MHz
  38. [DEBUG] memcfg channel assignment: A: 0, B 1, C 2
  39. [DEBUG] memcfg channel[0] config (00600008):
  40. [DEBUG] ECC inactive
  41. [DEBUG] enhanced interleave mode on
  42. [DEBUG] rank interleave on
  43. [DEBUG] DIMMA 2048 MB width x8 or x32 single rank, selected
  44. [DEBUG] DIMMB 0 MB width x8 or x32 single rank
  45. [DEBUG] memcfg channel[1] config (00600000):
  46. [DEBUG] ECC inactive
  47. [DEBUG] enhanced interleave mode on
  48. [DEBUG] rank interleave on
  49. [DEBUG] DIMMA 0 MB width x8 or x32 single rank, selected
  50. [DEBUG] DIMMB 0 MB width x8 or x32 single rank
  51. [DEBUG] ME: FW Partition Table : OK
  52. [DEBUG] ME: Bringup Loader Failure : NO
  53. [DEBUG] ME: Firmware Init Complete : NO
  54. [DEBUG] ME: Manufacturing Mode : NO
  55. [DEBUG] ME: Boot Options Present : NO
  56. [DEBUG] ME: Update In Progress : NO
  57. [DEBUG] ME: Current Working State : Normal
  58. [DEBUG] ME: Current Operation State : M0 with UMA
  59. [DEBUG] ME: Current Operation Mode : Normal
  60. [DEBUG] ME: Error Code : No Error
  61. [DEBUG] ME: Progress Phase : BUP Phase
  62. [DEBUG] ME: Power Management Event : Clean Moff->Mx wake
  63. [DEBUG] ME: Progress Phase State : M0 kernel load
  64. [DEBUG] CBMEM:
  65. [DEBUG] IMD: root @ 0x77fff000 254 entries.
  66. [DEBUG] IMD: root @ 0x77ffec00 62 entries.
  67. [DEBUG] FMAP: area RO_VPD found @ 550000 (16384 bytes)
  68. [WARN ] init_vpd_rdev: No RW_VPD FMAP section.
  69. [DEBUG] External stage cache:
  70. [DEBUG] IMD: root @ 0x783ff000 254 entries.
  71. [DEBUG] IMD: root @ 0x783fec00 62 entries.
  72. [DEBUG] FMAP: area RW_MRC_CACHE found @ 500000 (65536 bytes)
  73. [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
  74. [INFO ] Manufacturer: ef
  75. [INFO ] SF: Detected ef 4017 with sector size 0x1000, total 0x800000
  76. [DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.
  77. [DEBUG] MRC: updated 'RW_MRC_CACHE'.
  78. [DEBUG] SMM Memory Map
  79. [DEBUG] SMRAM : 0x78000000 0x800000
  80. [DEBUG] Subregion 0: 0x78000000 0x300000
  81. [DEBUG] Subregion 1: 0x78300000 0x100000
  82. [DEBUG] Subregion 2: 0x78400000 0x400000
  83. [DEBUG] Normal boot
  84. [INFO ] CBFS: Found 'fallback/postcar' @0x31100 size 0x5b40 in mcache @0xff7c303c
  85. [DEBUG] Loading module at 0x77fcf000 with entry 0x77fcf031. filesize: 0x5788 memsize: 0xbad8
  86. [DEBUG] Processing 222 relocs. Offset value of 0x75fcf000
  87. [DEBUG] BS: romstage times (exec / console): total (unknown) / 6 ms
  88.  
  89.  
  90. [NOTE ] coreboot-24.08-90-g866f516a478b-MrChromebox-2408.1 Sat Sep 14 20:28:13 UTC 2024 x86_32 postcar starting (log level: 7)...
  91. [DEBUG] Normal boot
  92. [DEBUG] FMAP: area COREBOOT found @ 554200 (2801152 bytes)
  93. [INFO ] CBFS: Found 'fallback/ramstage' @0x12500 size 0x19c10 in mcache @0x77fdd0ec
  94. [DEBUG] Loading module at 0x77e8b000 with entry 0x77e8b000. filesize: 0x337d8 memsize: 0x142410
  95. [DEBUG] Processing 3615 relocs. Offset value of 0x73e8b000
  96. [DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms
  97.  
  98.  
  99. [NOTE ] coreboot-24.08-90-g866f516a478b-MrChromebox-2408.1 Sat Sep 14 20:28:13 UTC 2024 x86_32 ramstage starting (log level: 7)...
  100. [DEBUG] Normal boot
  101. [INFO ] Enumerating buses...
  102. [DEBUG] Root Device scanning...
  103. [DEBUG] CPU_CLUSTER: 0 enabled
  104. [DEBUG] DOMAIN: 00000000 enabled
  105. [DEBUG] DOMAIN: 00000000 scanning...
  106. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
  107. [DEBUG] PCI: 00:00:00.0 [8086/0a04] enabled
  108. [DEBUG] PCI: 00:00:02.0 [8086/0a06] enabled
  109. [DEBUG] PCI: 00:00:03.0 [8086/0a0c] enabled
  110. [DEBUG] PCI: 00:00:04.0 [8086/0a03] enabled
  111. [DEBUG] PCI: 00:00:13.0: Disabling device
  112. [DEBUG] PCI: 00:00:13.0 [8086/9c36] disabled No operations
  113. [DEBUG] PCI: 00:00:14.0 [8086/9c31] enabled
  114. [DEBUG] PCI: 00:00:15.0: Disabling device
  115. [DEBUG] PCI: 00:00:15.1: Disabling device
  116. [DEBUG] PCI: 00:00:15.2: Disabling device
  117. [DEBUG] PCI: 00:00:15.3: Disabling device
  118. [DEBUG] PCI: 00:00:15.4: Disabling device
  119. [DEBUG] PCI: 00:00:15.5: Disabling device
  120. [DEBUG] PCI: 00:00:15.6: Disabling device
  121. [DEBUG] PCI: 00:00:16.0 [8086/9c3a] enabled
  122. [DEBUG] PCI: 00:00:16.1: Disabling device
  123. [DEBUG] PCI: 00:00:16.1 [8086/9c3b] disabled No operations
  124. [DEBUG] PCI: 00:00:16.2: Disabling device
  125. [DEBUG] PCI: 00:00:16.3: Disabling device
  126. [DEBUG] PCI: 00:00:17.0: Disabling device
  127. [DEBUG] PCI: 00:00:19.0: Disabling device
  128. [DEBUG] PCI: 00:00:1b.0 [8086/9c20] enabled
  129. [DEBUG] PCI: 00:00:1c.0 [8086/9c10] disabled
  130. [DEBUG] PCI: 00:00:1c.1 [8086/9c12] disabled
  131. [DEBUG] PCIe Root Port 3 ASPM is disabled
  132. [DEBUG] PCI: 00:00:1c.2 [8086/9c14] enabled
  133. [DEBUG] PCIe Root Port 4 ASPM is disabled
  134. [DEBUG] PCI: 00:00:1c.3 [8086/9c16] enabled
  135. [DEBUG] PCIe Root Port 5 ASPM is enabled
  136. [DEBUG] PCI: 00:00:1c.4 [8086/9c18] enabled
  137. [DEBUG] PCI: 00:00:1c.0: Disabling device
  138. [DEBUG] PCI: 00:00:1c.1: Disabling device
  139. [DEBUG] PCI: 00:00:1c.5: Disabling device
  140. [DEBUG] PCH: PCIe map 1c.2 -> 1c.0
  141. [DEBUG] PCH: PCIe map 1c.3 -> 1c.1
  142. [DEBUG] PCH: PCIe map 1c.4 -> 1c.2
  143. [DEBUG] PCH: PCIe map 1c.0 -> 1c.3
  144. [DEBUG] PCH: PCIe map 1c.1 -> 1c.4
  145. [DEBUG] PCI: 00:00:1c.5 [8086/9c1a] disabled
  146. [DEBUG] PCI: 00:00:1d.0 [8086/9c26] enabled
  147. [DEBUG] PCI: 00:00:1e.0: Disabling device
  148. [DEBUG] PCI: 00:00:1f.0 [8086/9c45] enabled
  149. [DEBUG] PCI: 00:00:1f.2 [8086/9c03] enabled
  150. [DEBUG] PCI: 00:00:1f.3 [8086/9c22] enabled
  151. [DEBUG] PCI: 00:00:1f.6 [8086/9c24] enabled
  152. [WARN ] PCI: Leftover static devices:
  153. [WARN ] PCI: 00:00:15.0
  154. [WARN ] PCI: 00:00:15.1
  155. [WARN ] PCI: 00:00:15.2
  156. [WARN ] PCI: 00:00:15.3
  157. [WARN ] PCI: 00:00:15.4
  158. [WARN ] PCI: 00:00:15.5
  159. [WARN ] PCI: 00:00:15.6
  160. [WARN ] PCI: 00:00:16.2
  161. [WARN ] PCI: 00:00:16.3
  162. [WARN ] PCI: 00:00:17.0
  163. [WARN ] PCI: 00:00:19.0
  164. [WARN ] PCI: 00:00:1e.0
  165. [WARN ] PCI: Check your devicetree.cb.
  166. [DEBUG] PCI: 00:00:1c.0 scanning...
  167. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
  168. [INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
  169. [DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs
  170. [DEBUG] PCI: 00:00:1c.1 scanning...
  171. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
  172. [DEBUG] PCI: 00:02:00.0 [168c/0034] enabled
  173. [INFO ] Enabling Common Clock Configuration
  174. [INFO ] PCIE CLK PM is not supported by endpoint
  175. [INFO ] ASPM: Enabled L0s and L1
  176. [DEBUG] PCI: 00:02:00.0: No LTR support
  177. [INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port
  178. [DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 0 msecs
  179. [DEBUG] PCI: 00:00:1c.2 scanning...
  180. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
  181. [INFO ] PCI: 00:00:1c.2: Setting Max_Payload_Size to 128 for devices under this root port
  182. [DEBUG] scan_bus: bus PCI: 00:00:1c.2 finished in 0 msecs
  183. [DEBUG] PCI: 00:00:1f.0 scanning...
  184. [INFO ] Found TPM 1.2 SLB9635 TT 1.2 (0x000b) by Infineon (0x15d1)
  185. [DEBUG] PNP: 0c31.0 enabled
  186. [DEBUG] PNP: 002e.0 disabled
  187. [DEBUG] PNP: 002e.1 enabled
  188. [DEBUG] PNP: 002e.4 enabled
  189. [DEBUG] PNP: 002e.7 enabled
  190. [DEBUG] PNP: 002e.5 disabled
  191. [DEBUG] PNP: 002e.6 disabled
  192. [DEBUG] PNP: 002e.a disabled
  193. [DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 0 msecs
  194. [DEBUG] PCI: 00:00:1f.3 scanning...
  195. [DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
  196. [DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 1 msecs
  197. [DEBUG] scan_bus: bus Root Device finished in 1 msecs
  198. [INFO ] done
  199. [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 0 ms
  200. [DEBUG] found VGA at PCI: 00:00:02.0
  201. [DEBUG] Setting up VGA for PCI: 00:00:02.0
  202. [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
  203. [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  204. [INFO ] Allocating resources...
  205. [INFO ] Reading resources...
  206. [DEBUG] mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
  207. [DEBUG] mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
  208. [DEBUG] mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
  209. [DEBUG] mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
  210. [DEBUG] mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
  211. [DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
  212. [DEBUG] MC MAP: TOM: 0x80000000
  213. [DEBUG] MC MAP: TOUUD: 0x100600000
  214. [DEBUG] MC MAP: MESEG_BASE: 0x7f000000
  215. [DEBUG] MC MAP: MESEG_LIMIT: 0x7fff0fffff
  216. [DEBUG] MC MAP: REMAP_BASE: 0x100000000
  217. [DEBUG] MC MAP: REMAP_LIMIT: 0x1005fffff
  218. [DEBUG] MC MAP: TOLUD: 0x7ea00000
  219. [DEBUG] MC MAP: BGSM: 0x78800000
  220. [DEBUG] MC MAP: BDSM: 0x78a00000
  221. [DEBUG] MC MAP: TSEGMB: 0x78000000
  222. [DEBUG] MC MAP: GGC: 0x219
  223. [DEBUG] MC MAP: DPR: 0x78000001
  224. [INFO ] Available memory above 4GB: 6M
  225. [INFO ] Done reading resources.
  226. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
  227. [DEBUG] PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
  228. [DEBUG] PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
  229. [DEBUG] PCI: 00:00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  230. [DEBUG] PCI: 00:02:00.0 10 * [0x0 - 0x7ffff] mem
  231. [DEBUG] PCI: 00:02:00.0 30 * [0x80000 - 0x8ffff] mem
  232. [DEBUG] PCI: 00:00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  233. [DEBUG] PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  234. [DEBUG] PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  235. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
  236. [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
  237. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)
  238. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 48 base 00001400 limit 000017ff io (fixed)
  239. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 40 base 00001000 limit 000010ff io (fixed)
  240. [DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 000003f8 limit 000003ff io (fixed)
  241. [DEBUG] avoid_fixed_resources: PNP: 002e.4 60 base 00000700 limit 00000707 io (fixed)
  242. [DEBUG] avoid_fixed_resources: PNP: 002e.4 62 base 00000710 limit 00000713 io (fixed)
  243. [DEBUG] avoid_fixed_resources: PNP: 002e.7 60 base 00000720 limit 00000720 io (fixed)
  244. [DEBUG] avoid_fixed_resources: PNP: 002e.7 62 base 00000730 limit 00000737 io (fixed)
  245. [DEBUG] avoid_fixed_resources: PNP: 002e.5 60 base 00000060 limit 00000060 io (fixed)
  246. [DEBUG] avoid_fixed_resources: PNP: 002e.5 62 base 00000064 limit 00000064 io (fixed)
  247. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
  248. [INFO ] DOMAIN: 00000000: Resource ranges:
  249. [INFO ] * Base: 1100, Size: 300, Tag: 100
  250. [INFO ] * Base: 1800, Size: e800, Tag: 100
  251. [DEBUG] PCI: 00:00:02.0 20 * [0x1100 - 0x113f] limit: 113f io
  252. [DEBUG] PCI: 00:00:1f.2 20 * [0x1140 - 0x115f] limit: 115f io
  253. [DEBUG] PCI: 00:00:1f.2 10 * [0x1160 - 0x1167] limit: 1167 io
  254. [DEBUG] PCI: 00:00:1f.2 18 * [0x1168 - 0x116f] limit: 116f io
  255. [DEBUG] PCI: 00:00:1f.2 14 * [0x1170 - 0x1173] limit: 1173 io
  256. [DEBUG] PCI: 00:00:1f.2 1c * [0x1174 - 0x1177] limit: 1177 io
  257. [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
  258. [DEBUG] DOMAIN: 00000000 mem: base: 78000000 size: 0 align: 0 gran: 0 limit: efffffff
  259. [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
  260. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 48 base fed10000 limit fed17fff mem (fixed)
  261. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 68 base fed18000 limit fed18fff mem (fixed)
  262. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 40 base fed19000 limit fed19fff mem (fixed)
  263. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 5420 base fed84000 limit fed84fff mem (fixed)
  264. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 5408 base fed80000 limit fed83fff mem (fixed)
  265. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
  266. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
  267. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base 000a0000 limit 000bffff mem (fixed)
  268. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base 000c0000 limit 000fffff mem (fixed)
  269. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base 00100000 limit 77ffffff mem (fixed)
  270. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base 78000000 limit 787fffff mem (fixed)
  271. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base 78800000 limit 7e9fffff mem (fixed)
  272. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 100000000 limit 1005fffff mem (fixed)
  273. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)
  274. [DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
  275. [INFO ] DOMAIN: 00000000: Resource ranges:
  276. [INFO ] * Base: 7ea00000, Size: 71600000, Tag: 200
  277. [INFO ] * Base: 100600000, Size: 7effa00000, Tag: 200
  278. [DEBUG] PCI: 00:00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
  279. [DEBUG] PCI: 00:00:02.0 10 * [0x7ec00000 - 0x7effffff] limit: 7effffff mem
  280. [DEBUG] PCI: 00:00:1c.1 20 * [0x7ea00000 - 0x7eafffff] limit: 7eafffff mem
  281. [DEBUG] PCI: 00:00:14.0 10 * [0x7eb00000 - 0x7eb0ffff] limit: 7eb0ffff mem
  282. [DEBUG] PCI: 00:00:04.0 10 * [0x7eb10000 - 0x7eb17fff] limit: 7eb17fff mem
  283. [DEBUG] PCI: 00:00:03.0 10 * [0x7eb18000 - 0x7eb1bfff] limit: 7eb1bfff mem
  284. [DEBUG] PCI: 00:00:1b.0 10 * [0x7eb1c000 - 0x7eb1ffff] limit: 7eb1ffff mem
  285. [DEBUG] PCI: 00:00:1f.6 10 * [0x7eb20000 - 0x7eb20fff] limit: 7eb20fff mem
  286. [DEBUG] PCI: 00:00:1f.2 24 * [0x7eb21000 - 0x7eb217ff] limit: 7eb217ff mem
  287. [DEBUG] PCI: 00:00:1d.0 10 * [0x7eb22000 - 0x7eb223ff] limit: 7eb223ff mem
  288. [DEBUG] PCI: 00:00:1f.3 10 * [0x7eb23000 - 0x7eb230ff] limit: 7eb230ff mem
  289. [DEBUG] PCI: 00:00:16.0 10 * [0x7eb24000 - 0x7eb2401f] limit: 7eb2401f mem
  290. [DEBUG] DOMAIN: 00000000 mem: base: 78000000 size: 0 align: 0 gran: 0 limit: efffffff done
  291. [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
  292. [DEBUG] PCI: 00:02:00.0 10 * [0x7ea00000 - 0x7ea7ffff] limit: 7ea7ffff mem
  293. [DEBUG] PCI: 00:02:00.0 30 * [0x7ea80000 - 0x7ea8ffff] limit: 7ea8ffff mem
  294. [INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
  295. [DEBUG] PCI: 00:00:02.0 10 <- [0x000000007ec00000 - 0x000000007effffff] size 0x00400000 gran 0x16 mem64
  296. [DEBUG] PCI: 00:00:02.0 18 <- [0x0000000080000000 - 0x000000008fffffff] size 0x10000000 gran 0x1c prefmem64
  297. [DEBUG] PCI: 00:00:02.0 20 <- [0x0000000000001100 - 0x000000000000113f] size 0x00000040 gran 0x06 io
  298. [DEBUG] PCI: 00:00:03.0 10 <- [0x000000007eb18000 - 0x000000007eb1bfff] size 0x00004000 gran 0x0e mem64
  299. [DEBUG] PCI: 00:00:04.0 10 <- [0x000000007eb10000 - 0x000000007eb17fff] size 0x00008000 gran 0x0f mem64
  300. [DEBUG] PCI: 00:00:14.0 10 <- [0x000000007eb00000 - 0x000000007eb0ffff] size 0x00010000 gran 0x10 mem64
  301. [DEBUG] PCI: 00:00:16.0 10 <- [0x000000007eb24000 - 0x000000007eb2401f] size 0x00000020 gran 0x05 mem64
  302. [DEBUG] PCI: 00:00:1b.0 10 <- [0x000000007eb1c000 - 0x000000007eb1ffff] size 0x00004000 gran 0x0e mem64
  303. [DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
  304. [DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
  305. [DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
  306. [DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
  307. [DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
  308. [DEBUG] PCI: 00:00:1c.1 20 <- [0x000000007ea00000 - 0x000000007eafffff] size 0x00100000 gran 0x14 seg 00 bumem
  309. [DEBUG] PCI: 00:02:00.0 10 <- [0x000000007ea00000 - 0x000000007ea7ffff] size 0x00080000 gran 0x13 mem64
  310. [DEBUG] PCI: 00:02:00.0 30 <- [0x000000007ea80000 - 0x000000007ea8ffff] size 0x00010000 gran 0x10 romem
  311. [DEBUG] PCI: 00:00:1c.2 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
  312. [DEBUG] PCI: 00:00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
  313. [DEBUG] PCI: 00:00:1c.2 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
  314. [DEBUG] PCI: 00:00:1d.0 10 <- [0x000000007eb22000 - 0x000000007eb223ff] size 0x00000400 gran 0x0a mem
  315. [DEBUG] PNP: 002e.1 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
  316. [DEBUG] PNP: 002e.1 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
  317. [DEBUG] PNP: 002e.4 60 <- [0x0000000000000700 - 0x0000000000000707] size 0x00000008 gran 0x03 io
  318. [DEBUG] PNP: 002e.4 62 <- [0x0000000000000710 - 0x0000000000000713] size 0x00000004 gran 0x02 io
  319. [DEBUG] PNP: 002e.4 70 <- [0x0000000000000009 - 0x0000000000000009] size 0x00000001 gran 0x00 irq
  320. [DEBUG] PNP: 002e.4 f2 <- [0x0000000000000020 - 0x000000000000001f] size 0x00000000 gran 0x00 irq
  321. [DEBUG] PNP: 002e.4 f4 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq
  322. [DEBUG] PNP: 002e.4 fa <- [0x0000000000000012 - 0x0000000000000012] size 0x00000001 gran 0x00 irq
  323. [DEBUG] PNP: 002e.7 60 <- [0x0000000000000720 - 0x0000000000000720] size 0x00000001 gran 0x00 io
  324. [DEBUG] PNP: 002e.7 62 <- [0x0000000000000730 - 0x0000000000000737] size 0x00000008 gran 0x03 io
  325. [DEBUG] PCI: 00:00:1f.2 10 <- [0x0000000000001160 - 0x0000000000001167] size 0x00000008 gran 0x03 io
  326. [DEBUG] PCI: 00:00:1f.2 14 <- [0x0000000000001170 - 0x0000000000001173] size 0x00000004 gran 0x02 io
  327. [DEBUG] PCI: 00:00:1f.2 18 <- [0x0000000000001168 - 0x000000000000116f] size 0x00000008 gran 0x03 io
  328. [DEBUG] PCI: 00:00:1f.2 1c <- [0x0000000000001174 - 0x0000000000001177] size 0x00000004 gran 0x02 io
  329. [DEBUG] PCI: 00:00:1f.2 20 <- [0x0000000000001140 - 0x000000000000115f] size 0x00000020 gran 0x05 io
  330. [DEBUG] PCI: 00:00:1f.2 24 <- [0x000000007eb21000 - 0x000000007eb217ff] size 0x00000800 gran 0x0b mem
  331. [DEBUG] PCI: 00:00:1f.3 10 <- [0x000000007eb23000 - 0x000000007eb230ff] size 0x00000100 gran 0x08 mem64
  332. [DEBUG] PCI: 00:00:1f.6 10 <- [0x000000007eb20000 - 0x000000007eb20fff] size 0x00001000 gran 0x0c mem64
  333. [INFO ] Done setting resources.
  334. [INFO ] Done allocating resources.
  335. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
  336. [INFO ] Enabling resources...
  337. [DEBUG] PCI: 00:00:00.0 subsystem <- 1ae0/c000
  338. [DEBUG] PCI: 00:00:00.0 cmd <- 06
  339. [DEBUG] PCI: 00:00:02.0 subsystem <- 1ae0/c000
  340. [DEBUG] PCI: 00:00:02.0 cmd <- 03
  341. [DEBUG] PCI: 00:00:03.0 subsystem <- 1ae0/c000
  342. [DEBUG] PCI: 00:00:03.0 cmd <- 02
  343. [DEBUG] PCI: 00:00:04.0 cmd <- 02
  344. [DEBUG] PCI: 00:00:14.0 subsystem <- 1ae0/c000
  345. [DEBUG] PCI: 00:00:14.0 cmd <- 102
  346. [DEBUG] PCI: 00:00:16.0 subsystem <- 1ae0/c000
  347. [DEBUG] PCI: 00:00:16.0 cmd <- 02
  348. [DEBUG] PCI: 00:00:1b.0 subsystem <- 1ae0/c000
  349. [DEBUG] PCI: 00:00:1b.0 cmd <- 102
  350. [DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
  351. [DEBUG] PCI: 00:00:1c.0 subsystem <- 1ae0/c000
  352. [DEBUG] PCI: 00:00:1c.0 cmd <- 00
  353. [DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013
  354. [DEBUG] PCI: 00:00:1c.1 subsystem <- 1ae0/c000
  355. [DEBUG] PCI: 00:00:1c.1 cmd <- 06
  356. [DEBUG] PCI: 00:00:1c.2 bridge ctrl <- 0013
  357. [DEBUG] PCI: 00:00:1c.2 subsystem <- 1ae0/c000
  358. [DEBUG] PCI: 00:00:1c.2 cmd <- 00
  359. [DEBUG] PCI: 00:00:1d.0 subsystem <- 1ae0/c000
  360. [DEBUG] PCI: 00:00:1d.0 cmd <- 102
  361. [DEBUG] PCI: 00:00:1f.0 subsystem <- 1ae0/c000
  362. [DEBUG] PCI: 00:00:1f.0 cmd <- 107
  363. [DEBUG] PCI: 00:00:1f.2 subsystem <- 1ae0/c000
  364. [DEBUG] PCI: 00:00:1f.2 cmd <- 103
  365. [DEBUG] PCI: 00:00:1f.3 subsystem <- 1ae0/c000
  366. [DEBUG] PCI: 00:00:1f.3 cmd <- 103
  367. [DEBUG] PCI: 00:00:1f.6 subsystem <- 1ae0/c000
  368. [DEBUG] PCI: 00:00:1f.6 cmd <- 102
  369. [DEBUG] PCI: 00:02:00.0 cmd <- 02
  370. [INFO ] done.
  371. [INFO ] Initializing devices...
  372. [DEBUG] Root Device init
  373. [DEBUG] Root Device init finished in 0 msecs
  374. [DEBUG] CPU_CLUSTER: 0 init
  375. [INFO ] LAPIC 0x0 in XAPIC mode.
  376. [DEBUG] MTRR: Physical address space:
  377. [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
  378. [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
  379. [DEBUG] 0x00000000000c0000 - 0x00000000787fffff size 0x78740000 type 6
  380. [DEBUG] 0x0000000078800000 - 0x000000007fffffff size 0x07800000 type 0
  381. [DEBUG] 0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 1
  382. [DEBUG] 0x0000000090000000 - 0x00000000ffffffff size 0x70000000 type 0
  383. [DEBUG] 0x0000000100000000 - 0x00000001005fffff size 0x00600000 type 6
  384. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
  385. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
  386. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
  387. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
  388. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
  389. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
  390. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
  391. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
  392. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
  393. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
  394. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
  395. [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
  396. [DEBUG] MTRR: default type WB/UC MTRR counts: 8/7.
  397. [DEBUG] MTRR: UC selected as default type.
  398. [DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6
  399. [DEBUG] MTRR: 1 base 0x0000000040000000 mask 0x0000007fe0000000 type 6
  400. [DEBUG] MTRR: 2 base 0x0000000060000000 mask 0x0000007ff0000000 type 6
  401. [DEBUG] MTRR: 3 base 0x0000000070000000 mask 0x0000007ff8000000 type 6
  402. [DEBUG] MTRR: 4 base 0x0000000078000000 mask 0x0000007fff800000 type 6
  403. [DEBUG] MTRR: 5 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
  404. [DEBUG] MTRR: 6 base 0x0000000100000000 mask 0x0000007fff800000 type 6
  405.  
  406. [DEBUG] MTRR check
  407. [DEBUG] Fixed MTRRs : Enabled
  408. [DEBUG] Variable MTRRs: Enabled
  409.  
  410. [DEBUG] Initializing VR config.
  411. [DEBUG] PCODE: 24MHz BCLK calibration response: 0
  412. [DEBUG] PCODE: 24MHz BCLK calibration value: 0x85000000
  413. [INFO ] PCH Power: PCODE Levels 0x3f1c50c2 0x004cd2c9
  414. [DEBUG] CPU has 2 cores, 2 threads enabled.
  415. [DEBUG] Setting up SMI for CPU
  416. [INFO ] Will perform SMM setup.
  417. [DEBUG] microcode: sig=0x40651 pf=0x40 revision=0x26
  418. [DEBUG] FMAP: area COREBOOT found @ 554200 (2801152 bytes)
  419. [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x5800 in mcache @0x77fdd02c
  420. [INFO ] CPU: Intel(R) Celeron(R) 2955U @ 1.40GHz.
  421. [INFO ] LAPIC 0x0 in XAPIC mode.
  422. [DEBUG] CPU: APIC: 00 enabled
  423. [DEBUG] CPU: APIC: 01 enabled
  424. [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
  425. [DEBUG] Processing 16 relocs. Offset value of 0x00030000
  426. [DEBUG] Attempting to start 1 APs
  427. [DEBUG] Waiting for 10ms after sending INIT.
  428. [DEBUG] Waiting for SIPI to complete...
  429. [DEBUG] done.
  430. [DEBUG] Waiting for SIPI to complete...
  431. [DEBUG] done.
  432. [INFO ] LAPIC 0x2 in XAPIC mode.
  433. [INFO ] AP: slot 1 apic_id 2, MCU rev: 0x00000026
  434. [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
  435. [DEBUG] Processing 9 relocs. Offset value of 0x00038000
  436. [DEBUG] smm_module_setup_stub: stack_top = 0x78000800
  437. [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
  438. [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
  439. [DEBUG] SMM Module: stub loaded at 38000. Will call 0x77ea4514
  440. [DEBUG] Installing permanent SMM handler to 0x78000000
  441. [DEBUG] HANDLER [0x782fc000-0x782fff2f]
  442.  
  443. [DEBUG] CPU 0
  444. [DEBUG] ss0 [0x782fbc00-0x782fbfff]
  445. [DEBUG] stub0 [0x782f4000-0x782f419f]
  446.  
  447. [DEBUG] CPU 1
  448. [DEBUG] ss1 [0x782fb800-0x782fbbff]
  449. [DEBUG] stub1 [0x782f3c00-0x782f3d9f]
  450.  
  451. [DEBUG] stacks [0x78000000-0x780007ff]
  452. [DEBUG] Loading module at 0x782fc000 with entry 0x782fcc11. filesize: 0x3e10 memsize: 0x3f30
  453. [DEBUG] Processing 250 relocs. Offset value of 0x782fc000
  454. [DEBUG] FMAP: area SMMSTORE found @ 510000 (262144 bytes)
  455. [INFO ] Manufacturer: ef
  456. [INFO ] SF: Detected ef 4017 with sector size 0x1000, total 0x800000
  457. [DEBUG] smm store: 4 # blocks with size 0x10000
  458. [DEBUG] Loading module at 0x782f4000 with entry 0x782f4000. filesize: 0x1a0 memsize: 0x1a0
  459. [DEBUG] Processing 9 relocs. Offset value of 0x782f4000
  460. [DEBUG] smm_module_setup_stub: stack_top = 0x78000800
  461. [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
  462. [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000
  463. [DEBUG] SMM Module: placing smm entry code at 782f3c00, cpu # 0x1
  464. [DEBUG] SMM Module: stub loaded at 782f4000. Will call 0x782fcc11
  465. [DEBUG] SMI_STS: PM1
  466. [DEBUG] TMROF smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x782ec000, cpu = 0
  467. [DEBUG] In relocation handler: CPU 0
  468. [DEBUG] New SMBASE=0x782ec000 IEDBASE=0x78400000
  469. [DEBUG] Writing SMRR. base = 0x78000006, mask=0xff800800
  470. [DEBUG] Relocation complete.
  471. [INFO ] microcode: Update skipped, already up-to-date
  472. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x782ebc00, cpu = 1
  473. [DEBUG] In relocation handler: CPU 1
  474. [DEBUG] New SMBASE=0x782ebc00 IEDBASE=0x78400000
  475. [DEBUG] Writing SMRR. base = 0x78000006, mask=0xff800800
  476. [DEBUG] Relocation complete.
  477. [INFO ] microcode: Update skipped, already up-to-date
  478. [INFO ] Initializing CPU #0
  479. [DEBUG] CPU: vendor Intel device 40651
  480. [DEBUG] CPU: family 06, model 45, stepping 01
  481. [DEBUG] VMX status: enabled
  482. [DEBUG] IA32_FEATURE_CONTROL status: locked
  483. [DEBUG] cpu: energy policy set to 6
  484. [INFO ] Turbo is unavailable
  485. [INFO ] CPU #0 initialized
  486. [INFO ] Initializing CPU #1
  487. [DEBUG] CPU: vendor Intel device 40651
  488. [DEBUG] CPU: family 06, model 45, stepping 01
  489. [DEBUG] VMX status: enabled
  490. [DEBUG] IA32_FEATURE_CONTROL status: locked
  491. [DEBUG] cpu: energy policy set to 6
  492. [INFO ] CPU #1 initialized
  493. [INFO ] bsp_do_flight_plan done after 1 msecs.
  494. [DEBUG] CPU: frequency set to 1400
  495. [DEBUG] Enabling SMIs.
  496. [DEBUG] Locking SMM.
  497. [DEBUG] CPU_CLUSTER: 0 init finished in 11 msecs
  498. [DEBUG] PCI: 00:00:00.0 init
  499. [DEBUG] Disabling PEG12.
  500. [DEBUG] Disabling PEG11.
  501. [DEBUG] Disabling PEG10.
  502. [DEBUG] Disabling "device 7".
  503. [DEBUG] Set BIOS_RESET_CPL
  504. [DEBUG] CPU TDP: 15 Watts
  505. [DEBUG] PCI: 00:00:00.0 init finished in 1 msecs
  506. [DEBUG] PCI: 00:00:02.0 init
  507. [INFO ] CBFS: Found 'vbt.bin' @0x30840 size 0x565 in mcache @0x77fdd1e4
  508. [INFO ] Found a VBT of 4608 bytes
  509. [INFO ] GMA: Found VBT in CBFS
  510. [INFO ] GMA: Found valid VBT in CBFS
  511. [DEBUG] GT Power Management Init
  512. [DEBUG] GT Power Management Init (post VBIOS)
  513. [DEBUG] PCI: 00:00:02.0 init finished in 0 msecs
  514. [DEBUG] PCI: 00:00:03.0 init
  515. [DEBUG] Mini-HD: base = 0x7eb18000
  516. [DEBUG] azalia_audio: initializing codec #0...
  517. [DEBUG] azalia_audio: - vendor/device id: 0x00000000
  518. [DEBUG] azalia_audio: - no verb!
  519. [DEBUG] PCI: 00:00:03.0 init finished in 3 msecs
  520. [DEBUG] PCI: 00:00:04.0 init
  521. [DEBUG] PCI: 00:00:04.0 init finished in 0 msecs
  522. [DEBUG] PCI: 00:00:14.0 init
  523. [DEBUG] apm_control: Unknown APMC 0xca.
  524. [DEBUG] APMC done.
  525. [DEBUG] PCI: 00:00:14.0 init finished in 1 msecs
  526. [DEBUG] PCI: 00:00:16.0 init
  527. [DEBUG] ME: FW Partition Table : OK
  528. [DEBUG] ME: Bringup Loader Failure : NO
  529. [DEBUG] ME: Firmware Init Complete : NO
  530. [DEBUG] ME: Manufacturing Mode : NO
  531. [DEBUG] ME: Boot Options Present : NO
  532. [DEBUG] ME: Update In Progress : NO
  533. [DEBUG] ME: Current Working State : Normal
  534. [DEBUG] ME: Current Operation State : M0 with UMA
  535. [DEBUG] ME: Current Operation Mode : Normal
  536. [DEBUG] ME: Error Code : No Error
  537. [DEBUG] ME: Progress Phase : uKernel Phase
  538. [DEBUG] ME: Power Management Event : Clean Moff->Mx wake
  539. [DEBUG] ME: Progress Phase State : Unknown phase: 0x02 state: 0x00
  540. [NOTE ] ME: BIOS path: Normal
  541. [DEBUG] ME: Extend SHA-256: 4822ca12b90cdd73e39caab8cdba777ac831451069f18f0be9b0340e9ad356e3
  542. [INFO ] ME MBP: Header: items: 9, size dw: 37
  543. [DEBUG] ME: found version 9.5.13.1706
  544. [DEBUG] ME: Wake Event to ME Reset: 0 ms
  545. [DEBUG] ME: ME Reset to Platform Reset: 0 ms
  546. [DEBUG] ME: Platform Reset to CPU Reset: 81 ms
  547. [INFO ] ME: ICC SET CLOCK ENABLES 0x01220000
  548. [DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
  549. [DEBUG] PCI: 00:00:1b.0 init
  550. [DEBUG] Azalia: base = 0x7eb1c000
  551. [DEBUG] Azalia: codec_mask = 01
  552. [DEBUG] azalia_audio: initializing codec #0...
  553. [DEBUG] azalia_audio: - vendor/device id: 0x10ec0283
  554. [DEBUG] azalia_audio: - verb size: 56
  555. [DEBUG] azalia_audio: - verb loaded
  556. [DEBUG] PCI: 00:00:1b.0 init finished in 4 msecs
  557. [DEBUG] PCI: 00:00:1c.0 init
  558. [DEBUG] Initializing PCH PCIe bridge.
  559. [DEBUG] PCI: 00:00:1c.0 init finished in 0 msecs
  560. [DEBUG] PCI: 00:00:1c.1 init
  561. [DEBUG] Initializing PCH PCIe bridge.
  562. [DEBUG] PCI: 00:00:1c.1 init finished in 0 msecs
  563. [DEBUG] PCI: 00:00:1c.2 init
  564. [DEBUG] Initializing PCH PCIe bridge.
  565. [DEBUG] PCI: 00:00:1c.2 init finished in 0 msecs
  566. [DEBUG] PCI: 00:00:1d.0 init
  567. [DEBUG] EHCI: Setting up controller.. done.
  568. [DEBUG] PCI: 00:00:1d.0 init finished in 0 msecs
  569. [DEBUG] PCI: 00:00:1f.0 init
  570. [DEBUG] pch: lpc_init
  571. [DEBUG] IOAPIC: Initializing IOAPIC at fec00000
  572. [DEBUG] IOAPIC: ID = 0x00
  573. [DEBUG] IOAPIC: 40 interrupts
  574. [DEBUG] IOAPIC: Clearing IOAPIC at fec00000
  575. [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
  576. [INFO ] Set power state keep after power failure.
  577. [INFO ] NMI sources disabled.
  578. [DEBUG] LynxPoint LP PM init
  579. [DEBUG] RTC: failed = 0x1
  580. [DEBUG] RTC Init
  581. [WARN ] RTC: Clear requested zeroing cmos
  582. [DEBUG] apm_control: Disabling ACPI.
  583. [DEBUG] APMC done.
  584. [DEBUG] PCI: 00:00:1f.0 init finished in 1 msecs
  585. [DEBUG] PCI: 00:00:1f.2 init
  586. [DEBUG] SATA: Initializing...
  587. [DEBUG] SATA: Controller in AHCI mode.
  588. [DEBUG] ABAR: 0x7eb21000
  589. [DEBUG] PCI: 00:00:1f.2 init finished in 0 msecs
  590. [DEBUG] PCI: 00:00:1f.3 init
  591. [DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
  592. [DEBUG] PCI: 00:00:1f.6 init
  593. [DEBUG] PCI: 00:00:1f.6 init finished in 0 msecs
  594. [DEBUG] PCI: 00:02:00.0 init
  595. [DEBUG] PCI: 00:02:00.0 init finished in 0 msecs
  596. [DEBUG] PNP: 002e.1 init
  597. [DEBUG] PNP: 002e.1 init finished in 0 msecs
  598. [DEBUG] PNP: 002e.4 init
  599. [DEBUG] PNP: 002e.4 init finished in 0 msecs
  600. [DEBUG] PNP: 002e.7 init
  601. [DEBUG] PNP: 002e.7 init finished in 0 msecs
  602. [INFO ] Devices initialized
  603. [DEBUG] BS: BS_DEV_INIT run times (exec / console): 24 / 0 ms
  604. [DEBUG] TPM: Startup
  605. [DEBUG] TPM: command 0x99 returned 0x0
  606. [DEBUG] TPM: Asserting physical presence
  607. [DEBUG] TPM: command 0x4000000a returned 0x0
  608. [INFO ] TPM: setup succeeded
  609. [DEBUG] BS: BS_DEV_INIT exit times (exec / console): 8 / 0 ms
  610. [INFO ] Finalize devices...
  611. [DEBUG] PCI: 00:00:00.0 final
  612. [DEBUG] PCI: 00:00:16.0 final
  613. [INFO ] ME: MBP cleared
  614. [NOTE ] ME: mkhi_end_of_post
  615. [INFO ] ME: END OF POST message successful (0)
  616. [DEBUG] PCI: 00:00:1b.0 final
  617. [DEBUG] PCI: 00:00:1f.0 final
  618. [DEBUG] apm_control: Finalizing SMM.
  619. [DEBUG] APMC done.
  620. [INFO ] Devices finalized
  621. [DEBUG] BS: BS_POST_DEVICE run times (exec / console): 260 / 0 ms
  622. [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x2d280 size 0x356a in mcache @0x77fdd1b8
  623. [WARN ] CBFS: 'fallback/slic' not found.
  624. [INFO ] ACPI: Writing ACPI tables at 77e3a000.
  625. [DEBUG] ACPI: * FACS
  626. [DEBUG] ACPI: * FACP
  627. [DEBUG] ACPI: added table 1/32, length now 44
  628. [DEBUG] Found 1 CPU(s) with 2 core(s) each.
  629. [DEBUG] PSS: 1400MHz power 15000 control 0xe00 status 0xe00
  630. [DEBUG] PSS: 1200MHz power 12559 control 0xc00 status 0xc00
  631. [DEBUG] PSS: 1000MHz power 10217 control 0xa00 status 0xa00
  632. [DEBUG] PSS: 800MHz power 7982 control 0x800 status 0x800
  633. [DEBUG] PSS: 1400MHz power 15000 control 0xe00 status 0xe00
  634. [DEBUG] PSS: 1200MHz power 12559 control 0xc00 status 0xc00
  635. [DEBUG] PSS: 1000MHz power 10217 control 0xa00 status 0xa00
  636. [DEBUG] PSS: 800MHz power 7982 control 0x800 status 0x800
  637. [DEBUG] Generating ACPI PIRQ entries
  638. [DEBUG] PPI: Pending OS request: 0x6482d96d (0x690fba75)
  639. [DEBUG] PPI: OS response: CMD 0x3b4f0aca = 0xa2eb251c
  640. [INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
  641. [DEBUG] ACPI: * SSDT
  642. [DEBUG] ACPI: added table 2/32, length now 52
  643. [DEBUG] ACPI: * MCFG
  644. [DEBUG] ACPI: added table 3/32, length now 60
  645. [DEBUG] TCPA log created at 0x77e2a000
  646. [DEBUG] ACPI: * TCPA
  647. [DEBUG] ACPI: added table 4/32, length now 68
  648. [DEBUG] IOAPIC: 40 interrupts
  649. [DEBUG] ACPI: * APIC
  650. [DEBUG] ACPI: added table 5/32, length now 76
  651. [DEBUG] current = 77e3e910
  652. [DEBUG] ACPI: * HPET
  653. [DEBUG] ACPI: added table 6/32, length now 84
  654. [DEBUG] ACPI: * SSDT2
  655. [DEBUG] ACPI: added table 7/32, length now 92
  656. [DEBUG] current = 77e3e9b0
  657. [INFO ] ACPI: done.
  658. [DEBUG] ACPI tables: 18864 bytes.
  659. [DEBUG] smbios_write_tables: 77e22000
  660. [DEBUG] BIOS version set to CONFIG_LOCALVERSION: 'MrChromebox-2408.1'
  661. [INFO ] Create SMBIOS type 16
  662. [INFO ] Create SMBIOS type 17
  663. [INFO ] Create SMBIOS type 20
  664. [DEBUG] SMBIOS tables: 816 bytes.
  665. [DEBUG] Writing table forward entry at 0x00000500
  666. [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum a7f8
  667. [DEBUG] Writing coreboot table at 0x77e5e000
  668. [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
  669. [DEBUG] 1. 0000000000001000-000000000009ffff: RAM
  670. [DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
  671. [DEBUG] 3. 0000000000100000-0000000077e21fff: RAM
  672. [DEBUG] 4. 0000000077e22000-0000000077e8afff: CONFIGURATION TABLES
  673. [DEBUG] 5. 0000000077e8b000-0000000077fcdfff: RAMSTAGE
  674. [DEBUG] 6. 0000000077fce000-0000000077ffffff: CONFIGURATION TABLES
  675. [DEBUG] 7. 0000000078000000-000000007e9fffff: RESERVED
  676. [DEBUG] 8. 00000000f0000000-00000000f3ffffff: RESERVED
  677. [DEBUG] 9. 00000000fed10000-00000000fed19fff: RESERVED
  678. [DEBUG] 10. 00000000fed40000-00000000fed44fff: RESERVED
  679. [DEBUG] 11. 00000000fed80000-00000000fed84fff: RESERVED
  680. [DEBUG] 12. 0000000100000000-00000001005fffff: RAM
  681. [DEBUG] FMAP: area SMMSTORE found @ 510000 (262144 bytes)
  682. [DEBUG] smm store: 4 # blocks with size 0x10000
  683. [DEBUG] Wrote coreboot table at: 0x77e5e000, 0x44c bytes, checksum 5fe0
  684. [DEBUG] coreboot table: 1124 bytes.
  685. [DEBUG] IMD ROOT 0. 0x77fff000 0x00001000
  686. [DEBUG] IMD SMALL 1. 0x77ffe000 0x00001000
  687. [DEBUG] CONSOLE 2. 0x77fde000 0x00020000
  688. [DEBUG] RO MCACHE 3. 0x77fdd000 0x00000330
  689. [DEBUG] TIME STAMP 4. 0x77fdc000 0x00000910
  690. [DEBUG] MEM INFO 5. 0x77fdb000 0x00000f48
  691. [DEBUG] AFTER CAR 6. 0x77fce000 0x0000d000
  692. [DEBUG] RAMSTAGE 7. 0x77e8a000 0x00144000
  693. [DEBUG] SMM BACKUP 8. 0x77e7a000 0x00010000
  694. [DEBUG] SMM COMBUFFER 9. 0x77e6a000 0x00010000
  695. [DEBUG] IGD OPREGION10. 0x77e66000 0x00003130
  696. [DEBUG] COREBOOT 11. 0x77e5e000 0x00008000
  697. [DEBUG] ACPI 12. 0x77e3a000 0x00024000
  698. [DEBUG] TCPA TCGLOG13. 0x77e2a000 0x00010000
  699. [DEBUG] SMBIOS 14. 0x77e22000 0x00008000
  700. [DEBUG] IMD small region:
  701. [DEBUG] IMD ROOT 0. 0x77ffec00 0x00000400
  702. [DEBUG] VPD 1. 0x77ffeae0 0x00000105
  703. [DEBUG] FMAP 2. 0x77ffe9a0 0x00000134
  704. [DEBUG] ROMSTAGE 3. 0x77ffe980 0x00000004
  705. [DEBUG] ROMSTG STCK 4. 0x77ffe8c0 0x000000a8
  706. [DEBUG] ACPI GNVS 5. 0x77ffe800 0x000000b0
  707. [DEBUG] TPM PPI 6. 0x77ffe6a0 0x0000015a
  708. [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 3 / 0 ms
  709. [INFO ] CBFS: Found 'fallback/payload' @0x36cc0 size 0x157087 in mcache @0x77fdd280
  710. [DEBUG] Checking segment from ROM address 0xffd8aeec
  711. [DEBUG] Checking segment from ROM address 0xffd8af08
  712. [DEBUG] Loading segment from ROM address 0xffd8aeec
  713. [DEBUG] code (compression=1)
  714. [DEBUG] New segment dstaddr 0x00800000 memsize 0x1000000 srcaddr 0xffd8af24 filesize 0x15704f
  715. [DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000001000000 filesz: 0x000000000015704f
  716. [DEBUG] using LZMA
  717. [DEBUG] Loading segment from ROM address 0xffd8af08
  718. [DEBUG] Entry Point 0x008016da
  719. [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 544 / 0 ms
  720. [DEBUG] ICH-NM10-PCH: watchdog disabled
  721. [DEBUG] Jumping to boot code at 0x008016da(0x77e5e000)
  722.  
Add Comment
Please, Sign In to add comment
Public Pastes
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!