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-- Company:
-- Engineer:
--
-- Create Date: 03/16/2019 06:41:44 PM
-- Design Name:
-- Module Name: ssd - Behavioral
-- Project Name:
-- Target Devices:
-- Tool Versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_SIGNED.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity ssd is
    Port( data : in  std_logic_vector (15 downto 0);
          clk  : in  std_logic;
          cat  : out std_logic_vector (6 downto 0);
          an   : out std_logic_vector (3 downto 0));
end ssd;

architecture Behavioral of ssd is

signal count : std_logic_vector (15 downto 0) := x"0000";
signal digit : std_logic_vector (3 downto 0) := x"0";

begin

    process (clk)
    begin
        if rising_edge(clk) then
            count <= count + 1;
        end if;
    end process;

    process (data, count(15 downto 14))
    begin
        case count(15 downto 14) is
            when "00"   => digit <= data(3 downto 0);   an <= "1110";
            when "01"   => digit <= data(7 downto 4);   an <= "1101";
            when "10"   => digit <= data(11 downto 8);  an <= "1011";
            when others => digit <= data(15 downto 12); an <= "0111";
        end case;
    end process;

    process (digit)
    begin
        case digit is
            when x"0"   => cat <= "1000000";
            when x"1"   => cat <= "1111001";
            when x"2"   => cat <= "0100100";
            when x"3"   => cat <= "0110000";
            when x"4"   => cat <= "0011001";
            when x"5"   => cat <= "0010010";
            when x"6"   => cat <= "0000010";
            when x"7"   => cat <= "1111000";
            when x"8"   => cat <= "0000000";
            when x"9"   => cat <= "0010000";
            when x"A"   => cat <= "0001000";
            when x"B"   => cat <= "0000011";
            when x"C"   => cat <= "0100111";
            when x"D"   => cat <= "0100001";
            when x"E"   => cat <= "0000110";
            when others => cat <= "0001110";
        end case;
    end process;

end Behavioral;