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bcm47189-tenda-ac9.dts

zyyhatcufe
Jun 17th, 2018
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  1. /dts$ cat bcm47189-tenda-ac9.dts
  2. /*
  3. * Copyright (C) 2016 Rafał Miłecki <[email protected]>
  4. *
  5. * Licensed under the ISC license.
  6. */
  7.  
  8. /dts-v1/;
  9.  
  10. #include "bcm53573.dtsi"
  11.  
  12. / {
  13. compatible = "tenda,ac9", "brcm,bcm47189", "brcm,bcm53573";
  14. model = "Tenda AC9";
  15.  
  16. chosen {
  17. bootargs = "console=ttyS0,115200 earlycon";
  18. };
  19.  
  20. memory {
  21. reg = <0x00000000 0x04000000>;
  22. };
  23.  
  24. leds {
  25. compatible = "gpio-leds";
  26.  
  27. usb {
  28. label = "bcm53xx:blue:usb";
  29. gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
  30. trigger-sources = <&ohci_port1>, <&ehci_port1>;
  31. linux,default-trigger = "usbport";
  32. };
  33.  
  34. wps {
  35. label = "bcm53xx:blue:wps";
  36. gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
  37. };
  38.  
  39. 5ghz {
  40. label = "bcm53xx:blue:5ghz";
  41. gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
  42. };
  43.  
  44. system {
  45. label = "bcm53xx:blue:system";
  46. gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
  47. linux,default-trigger = "timer";
  48. };
  49. };
  50.  
  51. pcie0_leds {
  52. compatible = "gpio-leds";
  53.  
  54. 2ghz {
  55. label = "bcm53xx:blue:2ghz";
  56. gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
  57. };
  58. };
  59.  
  60. gpio-keys {
  61. compatible = "gpio-keys";
  62. #address-cells = <1>;
  63. #size-cells = <0>;
  64.  
  65. rfkill {
  66. label = "WiFi";
  67. linux,code = <KEY_RFKILL>;
  68. gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
  69. };
  70.  
  71. restart {
  72. label = "Reset";
  73. linux,code = <KEY_RESTART>;
  74. gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
  75. };
  76.  
  77. wps {
  78. label = "WPS";
  79. linux,code = <KEY_WPS_BUTTON>;
  80. gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>;
  81. };
  82. };
  83. };
  84.  
  85. &pcie0 {
  86. ranges = <0x00000000 0 0 0 0 0x00100000>;
  87. #address-cells = <3>;
  88. #size-cells = <2>;
  89.  
  90. bridge@0,0,0 {
  91. reg = <0x0000 0 0 0 0>;
  92. ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
  93. #address-cells = <3>;
  94. #size-cells = <2>;
  95.  
  96. wifi@0,1,0 {
  97. reg = <0x0000 0 0 0 0>;
  98. ranges = <0x00000000 0 0 0 0x00100000>;
  99. #address-cells = <1>;
  100. #size-cells = <1>;
  101.  
  102. pcie0_chipcommon: chipcommon@0 {
  103. reg = <0 0x1000>;
  104.  
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. };
  108. };
  109. };
  110. };
  111.  
  112.  
  113. /dts$ cat bcm53573.dtsi
  114. /*
  115. * Copyright (C) 2016 Rafał Miłecki <[email protected]>
  116. *
  117. * Licensed under the ISC license.
  118. */
  119.  
  120. #include <dt-bindings/gpio/gpio.h>
  121. #include <dt-bindings/input/input.h>
  122. #include <dt-bindings/interrupt-controller/irq.h>
  123. #include <dt-bindings/interrupt-controller/arm-gic.h>
  124. #include "skeleton.dtsi"
  125.  
  126. / {
  127. interrupt-parent = <&gic>;
  128.  
  129. aliases {
  130. serial0 = &uart0;
  131. };
  132.  
  133. chosen {
  134. stdout-path = "serial0:115200n8";
  135. };
  136.  
  137. cpus {
  138. #address-cells = <1>;
  139. #size-cells = <0>;
  140.  
  141. cpu@0 {
  142. device_type = "cpu";
  143. compatible = "arm,cortex-a7";
  144. reg = <0x0>;
  145. };
  146. };
  147.  
  148. mpcore {
  149. compatible = "simple-bus";
  150. ranges = <0x00000000 0x18310000 0x00008000>;
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153.  
  154. gic: interrupt-controller@1000 {
  155. compatible = "arm,cortex-a7-gic";
  156. #interrupt-cells = <3>;
  157. #address-cells = <0>;
  158. interrupt-controller;
  159. reg = <0x1000 0x1000>,
  160. <0x2000 0x0100>;
  161. };
  162. };
  163.  
  164. timer {
  165. compatible = "arm,armv7-timer";
  166. interrupts = <GIC_PPI 13 0>,
  167. <GIC_PPI 14 0>,
  168. <GIC_PPI 11 0>,
  169. <GIC_PPI 10 0>;
  170. clocks = <&ilp>;
  171. };
  172.  
  173. clocks {
  174. #address-cells = <1>;
  175. #size-cells = <1>;
  176. ranges;
  177.  
  178. alp: oscillator {
  179. #clock-cells = <0>;
  180. compatible = "fixed-clock";
  181. clock-frequency = <40000000>;
  182. };
  183. };
  184.  
  185. axi@18000000 {
  186. compatible = "brcm,bus-axi";
  187. reg = <0x18000000 0x1000>;
  188. ranges = <0x00000000 0x18000000 0x00100000>;
  189. #address-cells = <1>;
  190. #size-cells = <1>;
  191.  
  192. #interrupt-cells = <1>;
  193. interrupt-map-mask = <0x000fffff 0xffff>;
  194. interrupt-map =
  195. /* ChipCommon */
  196. <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  197.  
  198. /* IEEE 802.11 0 */
  199. <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  200.  
  201. /* PCIe Controller 0 */
  202. <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  203. <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  204. <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  205. <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  206. <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  207. <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  208.  
  209. /* USB 2.0 Controller */
  210. <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
  211.  
  212. /* Ethernet Controller 0 */
  213. <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
  214.  
  215. /* IEEE 802.11 1 */
  216. <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
  217.  
  218. /* Ethernet Controller 1 */
  219. <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  220.  
  221. chipcommon: chipcommon@0 {
  222. compatible = "simple-bus";
  223. reg = <0x00000000 0x1000>;
  224. ranges;
  225.  
  226. #address-cells = <1>;
  227. #size-cells = <1>;
  228.  
  229. gpio-controller;
  230. #gpio-cells = <2>;
  231.  
  232. uart0: serial@0300 {
  233. compatible = "ns16550a";
  234. reg = <0x0300 0x100>;
  235. interrupt-parent = <&gic>;
  236. interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
  237. clocks = <&alp>;
  238. status = "okay";
  239. };
  240. };
  241.  
  242. pcie0: pcie@2000 {
  243. reg = <0x00002000 0x1000>;
  244. };
  245.  
  246. usb2: usb2@4000 {
  247. reg = <0x4000 0x1000>;
  248. ranges;
  249. #address-cells = <1>;
  250. #size-cells = <1>;
  251.  
  252. ehci: ehci@4000 {
  253. compatible = "generic-ehci";
  254. reg = <0x4000 0x1000>;
  255. interrupt-parent = <&gic>;
  256. interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  257.  
  258. #address-cells = <1>;
  259. #size-cells = <0>;
  260.  
  261. ehci_port1: port@1 {
  262. reg = <1>;
  263. #trigger-source-cells = <0>;
  264. };
  265.  
  266. ehci_port2: port@2 {
  267. reg = <2>;
  268. #trigger-source-cells = <0>;
  269. };
  270. };
  271.  
  272. ohci: ohci@d000 {
  273. #usb-cells = <0>;
  274.  
  275. compatible = "generic-ohci";
  276. reg = <0xd000 0x1000>;
  277. interrupt-parent = <&gic>;
  278. interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  279.  
  280. #address-cells = <1>;
  281. #size-cells = <0>;
  282.  
  283. ohci_port1: port@1 {
  284. reg = <1>;
  285. #trigger-source-cells = <0>;
  286. };
  287.  
  288. ohci_port2: port@2 {
  289. reg = <2>;
  290. #trigger-source-cells = <0>;
  291. };
  292. };
  293. };
  294.  
  295. gmac0: ethernet@5000 {
  296. reg = <0x5000 0x1000>;
  297. };
  298.  
  299. gmac1: ethernet@b000 {
  300. reg = <0xb000 0x1000>;
  301. };
  302.  
  303. pmu@12000 {
  304. compatible = "simple-mfd", "syscon";
  305. reg = <0x00012000 0x00001000>;
  306.  
  307. ilp: ilp {
  308. compatible = "brcm,bcm53573-ilp";
  309. clocks = <&alp>;
  310. #clock-cells = <0>;
  311. clock-output-names = "ilp";
  312. };
  313. };
  314. };
  315. };
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