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Feb 20th, 2019
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. compatible = "ti,moxa-uc8100", "ti,am33xx";
  7. interrupt-parent = <0x1>;
  8. model = "MOXA UC8100";
  9.  
  10. chosen {
  11. };
  12.  
  13. aliases {
  14. i2c0 = "/ocp/i2c@44e0b000";
  15. i2c1 = "/ocp/i2c@4802a000";
  16. i2c2 = "/ocp/i2c@4819c000";
  17. serial0 = "/ocp/serial@44e09000";
  18. serial1 = "/ocp/serial@48022000";
  19. serial2 = "/ocp/serial@48024000";
  20. serial3 = "/ocp/serial@481a6000";
  21. serial4 = "/ocp/serial@481a8000";
  22. serial5 = "/ocp/serial@481aa000";
  23. d_can0 = "/ocp/can@481cc000";
  24. d_can1 = "/ocp/can@481d0000";
  25. usb0 = "/ocp/usb@47400000/usb@47401000";
  26. usb1 = "/ocp/usb@47400000/usb@47401800";
  27. phy0 = "/ocp/usb@47400000/usb-phy@47401300";
  28. phy1 = "/ocp/usb@47400000/usb-phy@47401b00";
  29. ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200";
  30. ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300";
  31. };
  32.  
  33. memory {
  34. device_type = "memory";
  35. reg = <0x80000000 0x20000000>;
  36. };
  37.  
  38. cpus {
  39. #address-cells = <0x1>;
  40. #size-cells = <0x0>;
  41.  
  42. cpu@0 {
  43. compatible = "arm,cortex-a8";
  44. device_type = "cpu";
  45. reg = <0x0>;
  46. operating-points = <0xafc80 0x139b88 0x927c0 0x12b128 0x7a120 0x112a88 0x43238 0x112a88>;
  47. voltage-tolerance = <0x2>;
  48. clocks = <0x2>;
  49. clock-names = "cpu";
  50. clock-latency = <0x493e0>;
  51. cpu0-supply = <0x3>;
  52. };
  53. };
  54.  
  55. pmu {
  56. compatible = "arm,cortex-a8-pmu";
  57. interrupts = <0x3>;
  58. };
  59.  
  60. soc {
  61. compatible = "ti,omap-infra";
  62.  
  63. mpu {
  64. compatible = "ti,omap3-mpu";
  65. ti,hwmods = "mpu";
  66. };
  67. };
  68.  
  69. ocp {
  70. compatible = "simple-bus";
  71. #address-cells = <0x1>;
  72. #size-cells = <0x1>;
  73. ranges;
  74. ti,hwmods = "l3_main";
  75.  
  76. l4_wkup@44c00000 {
  77. compatible = "ti,am3-l4-wkup", "simple-bus";
  78. #address-cells = <0x1>;
  79. #size-cells = <0x1>;
  80. ranges = <0x0 0x44c00000 0x280000>;
  81.  
  82. prcm@200000 {
  83. compatible = "ti,am3-prcm";
  84. reg = <0x200000 0x4000>;
  85.  
  86. clocks {
  87. #address-cells = <0x1>;
  88. #size-cells = <0x0>;
  89.  
  90. clk_32768_ck {
  91. #clock-cells = <0x0>;
  92. compatible = "fixed-clock";
  93. clock-frequency = <0x8000>;
  94. linux,phandle = <0x14>;
  95. phandle = <0x14>;
  96. };
  97.  
  98. clk_rc32k_ck {
  99. #clock-cells = <0x0>;
  100. compatible = "fixed-clock";
  101. clock-frequency = <0x7d00>;
  102. linux,phandle = <0x13>;
  103. phandle = <0x13>;
  104. };
  105.  
  106. virt_19200000_ck {
  107. #clock-cells = <0x0>;
  108. compatible = "fixed-clock";
  109. clock-frequency = <0x124f800>;
  110. linux,phandle = <0x20>;
  111. phandle = <0x20>;
  112. };
  113.  
  114. virt_24000000_ck {
  115. #clock-cells = <0x0>;
  116. compatible = "fixed-clock";
  117. clock-frequency = <0x16e3600>;
  118. linux,phandle = <0x21>;
  119. phandle = <0x21>;
  120. };
  121.  
  122. virt_25000000_ck {
  123. #clock-cells = <0x0>;
  124. compatible = "fixed-clock";
  125. clock-frequency = <0x17d7840>;
  126. linux,phandle = <0x22>;
  127. phandle = <0x22>;
  128. };
  129.  
  130. virt_26000000_ck {
  131. #clock-cells = <0x0>;
  132. compatible = "fixed-clock";
  133. clock-frequency = <0x18cba80>;
  134. linux,phandle = <0x23>;
  135. phandle = <0x23>;
  136. };
  137.  
  138. tclkin_ck {
  139. #clock-cells = <0x0>;
  140. compatible = "fixed-clock";
  141. clock-frequency = <0xb71b00>;
  142. linux,phandle = <0x12>;
  143. phandle = <0x12>;
  144. };
  145.  
  146. dpll_core_ck {
  147. #clock-cells = <0x0>;
  148. compatible = "ti,am3-dpll-core-clock";
  149. clocks = <0x4 0x4>;
  150. reg = <0x490 0x45c 0x468>;
  151. linux,phandle = <0x5>;
  152. phandle = <0x5>;
  153. };
  154.  
  155. dpll_core_x2_ck {
  156. #clock-cells = <0x0>;
  157. compatible = "ti,am3-dpll-x2-clock";
  158. clocks = <0x5>;
  159. linux,phandle = <0x6>;
  160. phandle = <0x6>;
  161. };
  162.  
  163. dpll_core_m4_ck {
  164. #clock-cells = <0x0>;
  165. compatible = "ti,divider-clock";
  166. clocks = <0x6>;
  167. ti,max-div = <0x1f>;
  168. reg = <0x480>;
  169. ti,index-starts-at-one;
  170. linux,phandle = <0xe>;
  171. phandle = <0xe>;
  172. };
  173.  
  174. dpll_core_m5_ck {
  175. #clock-cells = <0x0>;
  176. compatible = "ti,divider-clock";
  177. clocks = <0x6>;
  178. ti,max-div = <0x1f>;
  179. reg = <0x484>;
  180. ti,index-starts-at-one;
  181. linux,phandle = <0x16>;
  182. phandle = <0x16>;
  183. };
  184.  
  185. dpll_core_m6_ck {
  186. #clock-cells = <0x0>;
  187. compatible = "ti,divider-clock";
  188. clocks = <0x6>;
  189. ti,max-div = <0x1f>;
  190. reg = <0x4d8>;
  191. ti,index-starts-at-one;
  192. };
  193.  
  194. dpll_mpu_ck {
  195. #clock-cells = <0x0>;
  196. compatible = "ti,am3-dpll-clock";
  197. clocks = <0x4 0x4>;
  198. reg = <0x488 0x420 0x42c>;
  199. linux,phandle = <0x2>;
  200. phandle = <0x2>;
  201. };
  202.  
  203. dpll_mpu_m2_ck {
  204. #clock-cells = <0x0>;
  205. compatible = "ti,divider-clock";
  206. clocks = <0x2>;
  207. ti,max-div = <0x1f>;
  208. reg = <0x4a8>;
  209. ti,index-starts-at-one;
  210. };
  211.  
  212. dpll_ddr_ck {
  213. #clock-cells = <0x0>;
  214. compatible = "ti,am3-dpll-no-gate-clock";
  215. clocks = <0x4 0x4>;
  216. reg = <0x494 0x434 0x440>;
  217. linux,phandle = <0x7>;
  218. phandle = <0x7>;
  219. };
  220.  
  221. dpll_ddr_m2_ck {
  222. #clock-cells = <0x0>;
  223. compatible = "ti,divider-clock";
  224. clocks = <0x7>;
  225. ti,max-div = <0x1f>;
  226. reg = <0x4a0>;
  227. ti,index-starts-at-one;
  228. linux,phandle = <0x8>;
  229. phandle = <0x8>;
  230. };
  231.  
  232. dpll_ddr_m2_div2_ck {
  233. #clock-cells = <0x0>;
  234. compatible = "fixed-factor-clock";
  235. clocks = <0x8>;
  236. clock-mult = <0x1>;
  237. clock-div = <0x2>;
  238. };
  239.  
  240. dpll_disp_ck {
  241. #clock-cells = <0x0>;
  242. compatible = "ti,am3-dpll-no-gate-clock";
  243. clocks = <0x4 0x4>;
  244. reg = <0x498 0x448 0x454>;
  245. linux,phandle = <0x9>;
  246. phandle = <0x9>;
  247. };
  248.  
  249. dpll_disp_m2_ck {
  250. #clock-cells = <0x0>;
  251. compatible = "ti,divider-clock";
  252. clocks = <0x9>;
  253. ti,max-div = <0x1f>;
  254. reg = <0x4a4>;
  255. ti,index-starts-at-one;
  256. ti,set-rate-parent;
  257. linux,phandle = <0x10>;
  258. phandle = <0x10>;
  259. };
  260.  
  261. dpll_per_ck {
  262. #clock-cells = <0x0>;
  263. compatible = "ti,am3-dpll-no-gate-j-type-clock";
  264. clocks = <0x4 0x4>;
  265. reg = <0x48c 0x470 0x49c>;
  266. linux,phandle = <0xa>;
  267. phandle = <0xa>;
  268. };
  269.  
  270. dpll_per_m2_ck {
  271. #clock-cells = <0x0>;
  272. compatible = "ti,divider-clock";
  273. clocks = <0xa>;
  274. ti,max-div = <0x1f>;
  275. reg = <0x4ac>;
  276. ti,index-starts-at-one;
  277. linux,phandle = <0xb>;
  278. phandle = <0xb>;
  279. };
  280.  
  281. dpll_per_m2_div4_wkupdm_ck {
  282. #clock-cells = <0x0>;
  283. compatible = "fixed-factor-clock";
  284. clocks = <0xb>;
  285. clock-mult = <0x1>;
  286. clock-div = <0x4>;
  287. };
  288.  
  289. dpll_per_m2_div4_ck {
  290. #clock-cells = <0x0>;
  291. compatible = "fixed-factor-clock";
  292. clocks = <0xb>;
  293. clock-mult = <0x1>;
  294. clock-div = <0x4>;
  295. };
  296.  
  297. cefuse_fck {
  298. #clock-cells = <0x0>;
  299. compatible = "ti,gate-clock";
  300. clocks = <0x4>;
  301. ti,bit-shift = <0x1>;
  302. reg = <0xa20>;
  303. };
  304.  
  305. clk_24mhz {
  306. #clock-cells = <0x0>;
  307. compatible = "fixed-factor-clock";
  308. clocks = <0xb>;
  309. clock-mult = <0x1>;
  310. clock-div = <0x8>;
  311. linux,phandle = <0xc>;
  312. phandle = <0xc>;
  313. };
  314.  
  315. clkdiv32k_ck {
  316. #clock-cells = <0x0>;
  317. compatible = "fixed-factor-clock";
  318. clocks = <0xc>;
  319. clock-mult = <0x1>;
  320. clock-div = <0x2dc>;
  321. linux,phandle = <0xd>;
  322. phandle = <0xd>;
  323. };
  324.  
  325. clkdiv32k_ick {
  326. #clock-cells = <0x0>;
  327. compatible = "ti,gate-clock";
  328. clocks = <0xd>;
  329. ti,bit-shift = <0x1>;
  330. reg = <0x14c>;
  331. linux,phandle = <0x11>;
  332. phandle = <0x11>;
  333. };
  334.  
  335. l3_gclk {
  336. #clock-cells = <0x0>;
  337. compatible = "fixed-factor-clock";
  338. clocks = <0xe>;
  339. clock-mult = <0x1>;
  340. clock-div = <0x1>;
  341. linux,phandle = <0xf>;
  342. phandle = <0xf>;
  343. };
  344.  
  345. pruss_ocp_gclk {
  346. #clock-cells = <0x0>;
  347. compatible = "ti,mux-clock";
  348. clocks = <0xf 0x10>;
  349. reg = <0x530>;
  350. };
  351.  
  352. mmu_fck {
  353. #clock-cells = <0x0>;
  354. compatible = "ti,gate-clock";
  355. clocks = <0xe>;
  356. ti,bit-shift = <0x1>;
  357. reg = <0x914>;
  358. };
  359.  
  360. timer1_fck {
  361. #clock-cells = <0x0>;
  362. compatible = "ti,mux-clock";
  363. clocks = <0x4 0x11 0x12 0x13 0x14>;
  364. reg = <0x528>;
  365. };
  366.  
  367. timer2_fck {
  368. #clock-cells = <0x0>;
  369. compatible = "ti,mux-clock";
  370. clocks = <0x12 0x4 0x11>;
  371. reg = <0x508>;
  372. };
  373.  
  374. timer3_fck {
  375. #clock-cells = <0x0>;
  376. compatible = "ti,mux-clock";
  377. clocks = <0x12 0x4 0x11>;
  378. reg = <0x50c>;
  379. };
  380.  
  381. timer4_fck {
  382. #clock-cells = <0x0>;
  383. compatible = "ti,mux-clock";
  384. clocks = <0x12 0x4 0x11>;
  385. reg = <0x510>;
  386. };
  387.  
  388. timer5_fck {
  389. #clock-cells = <0x0>;
  390. compatible = "ti,mux-clock";
  391. clocks = <0x12 0x4 0x11>;
  392. reg = <0x518>;
  393. };
  394.  
  395. timer6_fck {
  396. #clock-cells = <0x0>;
  397. compatible = "ti,mux-clock";
  398. clocks = <0x12 0x4 0x11>;
  399. reg = <0x51c>;
  400. };
  401.  
  402. timer7_fck {
  403. #clock-cells = <0x0>;
  404. compatible = "ti,mux-clock";
  405. clocks = <0x12 0x4 0x11>;
  406. reg = <0x504>;
  407. };
  408.  
  409. usbotg_fck {
  410. #clock-cells = <0x0>;
  411. compatible = "ti,gate-clock";
  412. clocks = <0xa>;
  413. ti,bit-shift = <0x8>;
  414. reg = <0x47c>;
  415. };
  416.  
  417. dpll_core_m4_div2_ck {
  418. #clock-cells = <0x0>;
  419. compatible = "fixed-factor-clock";
  420. clocks = <0xe>;
  421. clock-mult = <0x1>;
  422. clock-div = <0x2>;
  423. linux,phandle = <0x15>;
  424. phandle = <0x15>;
  425. };
  426.  
  427. ieee5000_fck {
  428. #clock-cells = <0x0>;
  429. compatible = "ti,gate-clock";
  430. clocks = <0x15>;
  431. ti,bit-shift = <0x1>;
  432. reg = <0xe4>;
  433. };
  434.  
  435. wdt1_fck {
  436. #clock-cells = <0x0>;
  437. compatible = "ti,mux-clock";
  438. clocks = <0x13 0x11>;
  439. reg = <0x538>;
  440. };
  441.  
  442. l4_rtc_gclk {
  443. #clock-cells = <0x0>;
  444. compatible = "fixed-factor-clock";
  445. clocks = <0xe>;
  446. clock-mult = <0x1>;
  447. clock-div = <0x2>;
  448. };
  449.  
  450. l4hs_gclk {
  451. #clock-cells = <0x0>;
  452. compatible = "fixed-factor-clock";
  453. clocks = <0xe>;
  454. clock-mult = <0x1>;
  455. clock-div = <0x1>;
  456. };
  457.  
  458. l3s_gclk {
  459. #clock-cells = <0x0>;
  460. compatible = "fixed-factor-clock";
  461. clocks = <0x15>;
  462. clock-mult = <0x1>;
  463. clock-div = <0x1>;
  464. };
  465.  
  466. l4fw_gclk {
  467. #clock-cells = <0x0>;
  468. compatible = "fixed-factor-clock";
  469. clocks = <0x15>;
  470. clock-mult = <0x1>;
  471. clock-div = <0x1>;
  472. };
  473.  
  474. l4ls_gclk {
  475. #clock-cells = <0x0>;
  476. compatible = "fixed-factor-clock";
  477. clocks = <0x15>;
  478. clock-mult = <0x1>;
  479. clock-div = <0x1>;
  480. linux,phandle = <0x24>;
  481. phandle = <0x24>;
  482. };
  483.  
  484. sysclk_div_ck {
  485. #clock-cells = <0x0>;
  486. compatible = "fixed-factor-clock";
  487. clocks = <0xe>;
  488. clock-mult = <0x1>;
  489. clock-div = <0x1>;
  490. };
  491.  
  492. cpsw_125mhz_gclk {
  493. #clock-cells = <0x0>;
  494. compatible = "fixed-factor-clock";
  495. clocks = <0x16>;
  496. clock-mult = <0x1>;
  497. clock-div = <0x2>;
  498. linux,phandle = <0x38>;
  499. phandle = <0x38>;
  500. };
  501.  
  502. cpsw_cpts_rft_clk {
  503. #clock-cells = <0x0>;
  504. compatible = "ti,mux-clock";
  505. clocks = <0x16 0xe>;
  506. reg = <0x520>;
  507. linux,phandle = <0x39>;
  508. phandle = <0x39>;
  509. };
  510.  
  511. gpio0_dbclk_mux_ck {
  512. #clock-cells = <0x0>;
  513. compatible = "ti,mux-clock";
  514. clocks = <0x13 0x14 0x11>;
  515. reg = <0x53c>;
  516. linux,phandle = <0x17>;
  517. phandle = <0x17>;
  518. };
  519.  
  520. gpio0_dbclk {
  521. #clock-cells = <0x0>;
  522. compatible = "ti,gate-clock";
  523. clocks = <0x17>;
  524. ti,bit-shift = <0x12>;
  525. reg = <0x408>;
  526. };
  527.  
  528. gpio1_dbclk {
  529. #clock-cells = <0x0>;
  530. compatible = "ti,gate-clock";
  531. clocks = <0x11>;
  532. ti,bit-shift = <0x12>;
  533. reg = <0xac>;
  534. };
  535.  
  536. gpio2_dbclk {
  537. #clock-cells = <0x0>;
  538. compatible = "ti,gate-clock";
  539. clocks = <0x11>;
  540. ti,bit-shift = <0x12>;
  541. reg = <0xb0>;
  542. };
  543.  
  544. gpio3_dbclk {
  545. #clock-cells = <0x0>;
  546. compatible = "ti,gate-clock";
  547. clocks = <0x11>;
  548. ti,bit-shift = <0x12>;
  549. reg = <0xb4>;
  550. };
  551.  
  552. lcd_gclk {
  553. #clock-cells = <0x0>;
  554. compatible = "ti,mux-clock";
  555. clocks = <0x10 0x16 0xb>;
  556. reg = <0x534>;
  557. ti,set-rate-parent;
  558. linux,phandle = <0x19>;
  559. phandle = <0x19>;
  560. };
  561.  
  562. mmc_clk {
  563. #clock-cells = <0x0>;
  564. compatible = "fixed-factor-clock";
  565. clocks = <0xb>;
  566. clock-mult = <0x1>;
  567. clock-div = <0x2>;
  568. };
  569.  
  570. gfx_fclk_clksel_ck {
  571. #clock-cells = <0x0>;
  572. compatible = "ti,mux-clock";
  573. clocks = <0xe 0xb>;
  574. ti,bit-shift = <0x1>;
  575. reg = <0x52c>;
  576. linux,phandle = <0x18>;
  577. phandle = <0x18>;
  578. };
  579.  
  580. gfx_fck_div_ck {
  581. #clock-cells = <0x0>;
  582. compatible = "ti,divider-clock";
  583. clocks = <0x18>;
  584. reg = <0x52c>;
  585. ti,max-div = <0x2>;
  586. };
  587.  
  588. sysclkout_pre_ck {
  589. #clock-cells = <0x0>;
  590. compatible = "ti,mux-clock";
  591. clocks = <0x14 0xf 0x8 0xb 0x19>;
  592. reg = <0x700>;
  593. linux,phandle = <0x1a>;
  594. phandle = <0x1a>;
  595. };
  596.  
  597. clkout2_div_ck {
  598. #clock-cells = <0x0>;
  599. compatible = "ti,divider-clock";
  600. clocks = <0x1a>;
  601. ti,bit-shift = <0x3>;
  602. ti,max-div = <0x8>;
  603. reg = <0x700>;
  604. linux,phandle = <0x1f>;
  605. phandle = <0x1f>;
  606. };
  607.  
  608. dbg_sysclk_ck {
  609. #clock-cells = <0x0>;
  610. compatible = "ti,gate-clock";
  611. clocks = <0x4>;
  612. ti,bit-shift = <0x13>;
  613. reg = <0x414>;
  614. linux,phandle = <0x1b>;
  615. phandle = <0x1b>;
  616. };
  617.  
  618. dbg_clka_ck {
  619. #clock-cells = <0x0>;
  620. compatible = "ti,gate-clock";
  621. clocks = <0xe>;
  622. ti,bit-shift = <0x1e>;
  623. reg = <0x414>;
  624. linux,phandle = <0x1c>;
  625. phandle = <0x1c>;
  626. };
  627.  
  628. stm_pmd_clock_mux_ck {
  629. #clock-cells = <0x0>;
  630. compatible = "ti,mux-clock";
  631. clocks = <0x1b 0x1c>;
  632. ti,bit-shift = <0x16>;
  633. reg = <0x414>;
  634. linux,phandle = <0x1d>;
  635. phandle = <0x1d>;
  636. };
  637.  
  638. trace_pmd_clk_mux_ck {
  639. #clock-cells = <0x0>;
  640. compatible = "ti,mux-clock";
  641. clocks = <0x1b 0x1c>;
  642. ti,bit-shift = <0x14>;
  643. reg = <0x414>;
  644. linux,phandle = <0x1e>;
  645. phandle = <0x1e>;
  646. };
  647.  
  648. stm_clk_div_ck {
  649. #clock-cells = <0x0>;
  650. compatible = "ti,divider-clock";
  651. clocks = <0x1d>;
  652. ti,bit-shift = <0x1b>;
  653. ti,max-div = <0x40>;
  654. reg = <0x414>;
  655. ti,index-power-of-two;
  656. };
  657.  
  658. trace_clk_div_ck {
  659. #clock-cells = <0x0>;
  660. compatible = "ti,divider-clock";
  661. clocks = <0x1e>;
  662. ti,bit-shift = <0x18>;
  663. ti,max-div = <0x40>;
  664. reg = <0x414>;
  665. ti,index-power-of-two;
  666. };
  667.  
  668. clkout2_ck {
  669. #clock-cells = <0x0>;
  670. compatible = "ti,gate-clock";
  671. clocks = <0x1f>;
  672. ti,bit-shift = <0x7>;
  673. reg = <0x700>;
  674. };
  675. };
  676.  
  677. clockdomains {
  678.  
  679. clk_24mhz_clkdm {
  680. compatible = "ti,clockdomain";
  681. clocks = <0x11>;
  682. };
  683. };
  684. };
  685.  
  686. scm@210000 {
  687. compatible = "ti,am3-scm", "simple-bus";
  688. reg = <0x210000 0x2000>;
  689. #address-cells = <0x1>;
  690. #size-cells = <0x1>;
  691. ranges = <0x0 0x210000 0x2000>;
  692.  
  693. pinmux@800 {
  694. compatible = "pinctrl-single";
  695. reg = <0x800 0x238>;
  696. #address-cells = <0x1>;
  697. #size-cells = <0x0>;
  698. pinctrl-single,register-width = <0x20>;
  699. pinctrl-single,function-mask = <0x7f>;
  700. pinctrl-names = "default";
  701.  
  702. user_leds_s0 {
  703. pinctrl-single,pins = <0x10 0x7 0x14 0x7 0x18 0x7 0x30 0x7 0x34 0x7 0x38 0x7 0x90 0x7 0x94 0x7 0x98 0x7>;
  704. linux,phandle = <0x3d>;
  705. phandle = <0x3d>;
  706. };
  707.  
  708. pinmux_push_button {
  709. pinctrl-single,pins = <0x8c 0x37>;
  710. linux,phandle = <0x40>;
  711. phandle = <0x40>;
  712. };
  713.  
  714. pinmux_i2c0_pins {
  715. pinctrl-single,pins = <0x188 0x30 0x18c 0x30>;
  716. linux,phandle = <0x29>;
  717. phandle = <0x29>;
  718. };
  719.  
  720. pinmux_i2c1_pins {
  721. pinctrl-single,pins = <0x158 0x32 0x15c 0x32>;
  722. linux,phandle = <0x2c>;
  723. phandle = <0x2c>;
  724. };
  725.  
  726. pinmux_uart0_pins {
  727. pinctrl-single,pins = <0x170 0x30 0x174 0x0>;
  728. linux,phandle = <0x26>;
  729. phandle = <0x26>;
  730. };
  731.  
  732. pinmux_uart1_pins {
  733. pinctrl-single,pins = <0x178 0x30 0x17c 0x0 0x180 0x30 0x184 0x0>;
  734. linux,phandle = <0x27>;
  735. phandle = <0x27>;
  736. };
  737.  
  738. pinmux_uart2_pins {
  739. pinctrl-single,pins = <0xd8 0x36 0xdc 0x6 0xc4 0x34 0xc0 0x4>;
  740. linux,phandle = <0x28>;
  741. phandle = <0x28>;
  742. };
  743.  
  744. pinmux_tps_pins {
  745. pinctrl-single,pins = <0x168 0x2f>;
  746. linux,phandle = <0x2a>;
  747. phandle = <0x2a>;
  748. };
  749.  
  750. cpsw_default {
  751. pinctrl-single,pins = <0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30 0x3c 0x31 0x40 0x1 0x44 0x31 0x48 0x1 0x4c 0x1 0x50 0x1 0x54 0x1 0x58 0x31 0x5c 0x31 0x60 0x31 0x64 0x31 0x68 0x31 0x6c 0x31>;
  752. linux,phandle = <0x3a>;
  753. phandle = <0x3a>;
  754. };
  755.  
  756. davinci_mdio_default {
  757. pinctrl-single,pins = <0x148 0x30 0x14c 0x10>;
  758. linux,phandle = <0x3b>;
  759. phandle = <0x3b>;
  760. };
  761.  
  762. pinmux_mmc0_pins {
  763. pinctrl-single,pins = <0xf0 0x30 0xf4 0x30 0xf8 0x30 0xfc 0x30 0x100 0x30 0x104 0x30>;
  764. linux,phandle = <0x2e>;
  765. phandle = <0x2e>;
  766. };
  767.  
  768. pinmux_mmc1_pins {
  769. pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc 0x31>;
  770. linux,phandle = <0x2f>;
  771. phandle = <0x2f>;
  772. };
  773. };
  774.  
  775. scm_conf@0 {
  776. compatible = "syscon";
  777. reg = <0x0 0x800>;
  778. #address-cells = <0x1>;
  779. #size-cells = <0x1>;
  780. linux,phandle = <0x32>;
  781. phandle = <0x32>;
  782.  
  783. clocks {
  784. #address-cells = <0x1>;
  785. #size-cells = <0x0>;
  786.  
  787. sys_clkin_ck {
  788. #clock-cells = <0x0>;
  789. compatible = "ti,mux-clock";
  790. clocks = <0x20 0x21 0x22 0x23>;
  791. ti,bit-shift = <0x16>;
  792. reg = <0x40>;
  793. linux,phandle = <0x4>;
  794. phandle = <0x4>;
  795. };
  796.  
  797. adc_tsc_fck {
  798. #clock-cells = <0x0>;
  799. compatible = "fixed-factor-clock";
  800. clocks = <0x4>;
  801. clock-mult = <0x1>;
  802. clock-div = <0x1>;
  803. };
  804.  
  805. dcan0_fck {
  806. #clock-cells = <0x0>;
  807. compatible = "fixed-factor-clock";
  808. clocks = <0x4>;
  809. clock-mult = <0x1>;
  810. clock-div = <0x1>;
  811. linux,phandle = <0x31>;
  812. phandle = <0x31>;
  813. };
  814.  
  815. dcan1_fck {
  816. #clock-cells = <0x0>;
  817. compatible = "fixed-factor-clock";
  818. clocks = <0x4>;
  819. clock-mult = <0x1>;
  820. clock-div = <0x1>;
  821. linux,phandle = <0x33>;
  822. phandle = <0x33>;
  823. };
  824.  
  825. mcasp0_fck {
  826. #clock-cells = <0x0>;
  827. compatible = "fixed-factor-clock";
  828. clocks = <0x4>;
  829. clock-mult = <0x1>;
  830. clock-div = <0x1>;
  831. };
  832.  
  833. mcasp1_fck {
  834. #clock-cells = <0x0>;
  835. compatible = "fixed-factor-clock";
  836. clocks = <0x4>;
  837. clock-mult = <0x1>;
  838. clock-div = <0x1>;
  839. };
  840.  
  841. smartreflex0_fck {
  842. #clock-cells = <0x0>;
  843. compatible = "fixed-factor-clock";
  844. clocks = <0x4>;
  845. clock-mult = <0x1>;
  846. clock-div = <0x1>;
  847. };
  848.  
  849. smartreflex1_fck {
  850. #clock-cells = <0x0>;
  851. compatible = "fixed-factor-clock";
  852. clocks = <0x4>;
  853. clock-mult = <0x1>;
  854. clock-div = <0x1>;
  855. };
  856.  
  857. sha0_fck {
  858. #clock-cells = <0x0>;
  859. compatible = "fixed-factor-clock";
  860. clocks = <0x4>;
  861. clock-mult = <0x1>;
  862. clock-div = <0x1>;
  863. };
  864.  
  865. aes0_fck {
  866. #clock-cells = <0x0>;
  867. compatible = "fixed-factor-clock";
  868. clocks = <0x4>;
  869. clock-mult = <0x1>;
  870. clock-div = <0x1>;
  871. };
  872.  
  873. rng_fck {
  874. #clock-cells = <0x0>;
  875. compatible = "fixed-factor-clock";
  876. clocks = <0x4>;
  877. clock-mult = <0x1>;
  878. clock-div = <0x1>;
  879. };
  880.  
  881. ehrpwm0_tbclk@44e10664 {
  882. #clock-cells = <0x0>;
  883. compatible = "ti,gate-clock";
  884. clocks = <0x24>;
  885. ti,bit-shift = <0x0>;
  886. reg = <0x664>;
  887. };
  888.  
  889. ehrpwm1_tbclk@44e10664 {
  890. #clock-cells = <0x0>;
  891. compatible = "ti,gate-clock";
  892. clocks = <0x24>;
  893. ti,bit-shift = <0x1>;
  894. reg = <0x664>;
  895. };
  896.  
  897. ehrpwm2_tbclk@44e10664 {
  898. #clock-cells = <0x0>;
  899. compatible = "ti,gate-clock";
  900. clocks = <0x24>;
  901. ti,bit-shift = <0x2>;
  902. reg = <0x664>;
  903. };
  904. };
  905. };
  906.  
  907. clockdomains {
  908. };
  909. };
  910. };
  911.  
  912. interrupt-controller@48200000 {
  913. compatible = "ti,am33xx-intc";
  914. interrupt-controller;
  915. #interrupt-cells = <0x1>;
  916. reg = <0x48200000 0x1000>;
  917. linux,phandle = <0x1>;
  918. phandle = <0x1>;
  919. };
  920.  
  921. edma@49000000 {
  922. compatible = "ti,edma3";
  923. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  924. reg = <0x49000000 0x10000 0x44e10f90 0x40>;
  925. interrupts = <0xc 0xd 0xe>;
  926. #dma-cells = <0x1>;
  927. linux,phandle = <0x25>;
  928. phandle = <0x25>;
  929. };
  930.  
  931. gpio@44e07000 {
  932. compatible = "ti,omap4-gpio";
  933. ti,hwmods = "gpio1";
  934. gpio-controller;
  935. #gpio-cells = <0x2>;
  936. interrupt-controller;
  937. #interrupt-cells = <0x2>;
  938. reg = <0x44e07000 0x1000>;
  939. interrupts = <0x60>;
  940. ti,no-reset-on-init;
  941. };
  942.  
  943. gpio@4804c000 {
  944. compatible = "ti,omap4-gpio";
  945. ti,hwmods = "gpio2";
  946. gpio-controller;
  947. #gpio-cells = <0x2>;
  948. interrupt-controller;
  949. #interrupt-cells = <0x2>;
  950. reg = <0x4804c000 0x1000>;
  951. interrupts = <0x62>;
  952. linux,phandle = <0x3e>;
  953. phandle = <0x3e>;
  954. };
  955.  
  956. gpio@481ac000 {
  957. compatible = "ti,omap4-gpio";
  958. ti,hwmods = "gpio3";
  959. gpio-controller;
  960. #gpio-cells = <0x2>;
  961. interrupt-controller;
  962. #interrupt-cells = <0x2>;
  963. reg = <0x481ac000 0x1000>;
  964. interrupts = <0x20>;
  965. linux,phandle = <0x3f>;
  966. phandle = <0x3f>;
  967. };
  968.  
  969. gpio@481ae000 {
  970. compatible = "ti,omap4-gpio";
  971. ti,hwmods = "gpio4";
  972. gpio-controller;
  973. #gpio-cells = <0x2>;
  974. interrupt-controller;
  975. #interrupt-cells = <0x2>;
  976. reg = <0x481ae000 0x1000>;
  977. interrupts = <0x3e>;
  978. linux,phandle = <0x30>;
  979. phandle = <0x30>;
  980. };
  981.  
  982. serial@44e09000 {
  983. compatible = "ti,omap3-uart";
  984. ti,hwmods = "uart1";
  985. clock-frequency = <0x2dc6c00>;
  986. reg = <0x44e09000 0x2000>;
  987. interrupts = <0x48>;
  988. status = "okay";
  989. dmas = <0x25 0x1a 0x25 0x1b>;
  990. dma-names = "tx", "rx";
  991. pinctrl-names = "default";
  992. pinctrl-0 = <0x26>;
  993. };
  994.  
  995. serial@48022000 {
  996. compatible = "ti,omap3-uart";
  997. ti,hwmods = "uart2";
  998. clock-frequency = <0x2dc6c00>;
  999. reg = <0x48022000 0x2000>;
  1000. interrupts = <0x49>;
  1001. status = "okay";
  1002. dmas = <0x25 0x1c 0x25 0x1d>;
  1003. dma-names = "tx", "rx";
  1004. pinctrl-names = "default";
  1005. pinctrl-0 = <0x27>;
  1006. };
  1007.  
  1008. serial@48024000 {
  1009. compatible = "ti,omap3-uart";
  1010. ti,hwmods = "uart3";
  1011. clock-frequency = <0x2dc6c00>;
  1012. reg = <0x48024000 0x2000>;
  1013. interrupts = <0x4a>;
  1014. status = "disabled";
  1015. dmas = <0x25 0x1e 0x25 0x1f>;
  1016. dma-names = "tx", "rx";
  1017. };
  1018.  
  1019. serial@481a6000 {
  1020. compatible = "ti,omap3-uart";
  1021. ti,hwmods = "uart4";
  1022. clock-frequency = <0x2dc6c00>;
  1023. reg = <0x481a6000 0x2000>;
  1024. interrupts = <0x2c>;
  1025. status = "disabled";
  1026. };
  1027.  
  1028. serial@481a8000 {
  1029. compatible = "ti,omap3-uart";
  1030. ti,hwmods = "uart5";
  1031. clock-frequency = <0x2dc6c00>;
  1032. reg = <0x481a8000 0x2000>;
  1033. interrupts = <0x2d>;
  1034. status = "disabled";
  1035. };
  1036.  
  1037. serial@481aa000 {
  1038. compatible = "ti,omap3-uart";
  1039. ti,hwmods = "uart6";
  1040. clock-frequency = <0x2dc6c00>;
  1041. reg = <0x481aa000 0x2000>;
  1042. interrupts = <0x2e>;
  1043. status = "okay";
  1044. pinctrl-names = "default";
  1045. pinctrl-0 = <0x28>;
  1046. };
  1047.  
  1048. i2c@44e0b000 {
  1049. compatible = "ti,omap4-i2c";
  1050. #address-cells = <0x1>;
  1051. #size-cells = <0x0>;
  1052. ti,hwmods = "i2c1";
  1053. reg = <0x44e0b000 0x1000>;
  1054. interrupts = <0x46>;
  1055. status = "okay";
  1056. pinctrl-names = "default";
  1057. pinctrl-0 = <0x29>;
  1058. clock-frequency = <0x61a80>;
  1059.  
  1060. tps@2d {
  1061. compatible = "ti,tps65910";
  1062. reg = <0x2d>;
  1063. pinctrl-names = "default";
  1064. pinctrl-0 = <0x2a>;
  1065. interrupts = <0x7>;
  1066. interrupt-parent = <0x1>;
  1067. ti,en-ck32k-xtal;
  1068. vcc1-supply = <0x2b>;
  1069. vcc2-supply = <0x2b>;
  1070. vcc3-supply = <0x2b>;
  1071. vcc4-supply = <0x2b>;
  1072. vcc5-supply = <0x2b>;
  1073. vcc6-supply = <0x2b>;
  1074. vcc7-supply = <0x2b>;
  1075. vccio-supply = <0x2b>;
  1076.  
  1077. regulators {
  1078. #address-cells = <0x1>;
  1079. #size-cells = <0x0>;
  1080.  
  1081. regulator@0 {
  1082. reg = <0x0>;
  1083. regulator-compatible = "vrtc";
  1084. regulator-always-on;
  1085. };
  1086.  
  1087. regulator@1 {
  1088. reg = <0x1>;
  1089. regulator-compatible = "vio";
  1090. regulator-always-on;
  1091. };
  1092.  
  1093. regulator@2 {
  1094. reg = <0x2>;
  1095. regulator-compatible = "vdd1";
  1096. regulator-name = "vdd_mpu";
  1097. regulator-min-microvolt = <0x927c0>;
  1098. regulator-max-microvolt = <0x16e360>;
  1099. regulator-boot-on;
  1100. regulator-always-on;
  1101. linux,phandle = <0x3>;
  1102. phandle = <0x3>;
  1103. };
  1104.  
  1105. regulator@3 {
  1106. reg = <0x3>;
  1107. regulator-compatible = "vdd2";
  1108. regulator-name = "vdd_core";
  1109. regulator-min-microvolt = <0x927c0>;
  1110. regulator-max-microvolt = <0x16e360>;
  1111. regulator-boot-on;
  1112. regulator-always-on;
  1113. };
  1114.  
  1115. regulator@4 {
  1116. reg = <0x4>;
  1117. regulator-compatible = "vdd3";
  1118. regulator-always-on;
  1119. };
  1120.  
  1121. regulator@5 {
  1122. reg = <0x5>;
  1123. regulator-compatible = "vdig1";
  1124. regulator-always-on;
  1125. };
  1126.  
  1127. regulator@6 {
  1128. reg = <0x6>;
  1129. regulator-compatible = "vdig2";
  1130. regulator-always-on;
  1131. };
  1132.  
  1133. regulator@7 {
  1134. reg = <0x7>;
  1135. regulator-compatible = "vpll";
  1136. regulator-always-on;
  1137. };
  1138.  
  1139. regulator@8 {
  1140. reg = <0x8>;
  1141. regulator-compatible = "vdac";
  1142. regulator-always-on;
  1143. };
  1144.  
  1145. regulator@9 {
  1146. reg = <0x9>;
  1147. regulator-compatible = "vaux1";
  1148. regulator-always-on;
  1149. };
  1150.  
  1151. regulator@10 {
  1152. reg = <0xa>;
  1153. regulator-compatible = "vaux2";
  1154. regulator-always-on;
  1155. };
  1156.  
  1157. regulator@11 {
  1158. reg = <0xb>;
  1159. regulator-compatible = "vaux33";
  1160. regulator-always-on;
  1161. };
  1162.  
  1163. regulator@12 {
  1164. reg = <0xc>;
  1165. regulator-compatible = "vmmc";
  1166. compatible = "regulator-fixed";
  1167. regulator-name = "vmmc_reg";
  1168. regulator-min-microvolt = <0x325aa0>;
  1169. regulator-max-microvolt = <0x325aa0>;
  1170. regulator-always-on;
  1171. };
  1172.  
  1173. regulator@13 {
  1174. reg = <0xd>;
  1175. regulator-compatible = "vbb";
  1176. regulator-always-on;
  1177. };
  1178. };
  1179. };
  1180.  
  1181. tpm@20 {
  1182. compatible = "infineon,slb9645tt";
  1183. reg = <0x20>;
  1184. };
  1185. };
  1186.  
  1187. i2c@4802a000 {
  1188. compatible = "ti,omap4-i2c";
  1189. #address-cells = <0x1>;
  1190. #size-cells = <0x0>;
  1191. ti,hwmods = "i2c2";
  1192. reg = <0x4802a000 0x1000>;
  1193. interrupts = <0x47>;
  1194. status = "okay";
  1195. pinctrl-names = "default";
  1196. pinctrl-0 = <0x2c>;
  1197. clock-frequency = <0x61a80>;
  1198.  
  1199. eeprom@50 {
  1200. compatible = "at,24c16";
  1201. pagesize = <0x10>;
  1202. reg = <0x50>;
  1203. };
  1204. };
  1205.  
  1206. i2c@4819c000 {
  1207. compatible = "ti,omap4-i2c";
  1208. #address-cells = <0x1>;
  1209. #size-cells = <0x0>;
  1210. ti,hwmods = "i2c3";
  1211. reg = <0x4819c000 0x1000>;
  1212. interrupts = <0x1e>;
  1213. status = "disabled";
  1214. };
  1215.  
  1216. mmc@48060000 {
  1217. compatible = "ti,omap4-hsmmc";
  1218. ti,hwmods = "mmc1";
  1219. ti,dual-volt;
  1220. ti,needs-special-reset;
  1221. ti,needs-special-hs-handling;
  1222. dmas = <0x25 0x18 0x25 0x19>;
  1223. dma-names = "tx", "rx";
  1224. interrupts = <0x40>;
  1225. interrupt-parent = <0x1>;
  1226. reg = <0x48060000 0x1000>;
  1227. status = "okay";
  1228. pinctrl-names = "default";
  1229. vmmc-supply = <0x2d>;
  1230. bus-width = <0x4>;
  1231. pinctrl-0 = <0x2e>;
  1232. };
  1233.  
  1234. mmc@481d8000 {
  1235. compatible = "ti,omap4-hsmmc";
  1236. ti,hwmods = "mmc2";
  1237. ti,needs-special-reset;
  1238. dmas = <0x25 0x2 0x25 0x3>;
  1239. dma-names = "tx", "rx";
  1240. interrupts = <0x1c>;
  1241. interrupt-parent = <0x1>;
  1242. reg = <0x481d8000 0x1000>;
  1243. status = "okay";
  1244. pinctrl-names = "default";
  1245. vmmc-supply = <0x2d>;
  1246. bus-width = <0x4>;
  1247. pinctrl-0 = <0x2f>;
  1248. cd-gpios = <0x30 0xf 0x0>;
  1249. };
  1250.  
  1251. mmc@47810000 {
  1252. compatible = "ti,omap4-hsmmc";
  1253. ti,hwmods = "mmc3";
  1254. ti,needs-special-reset;
  1255. interrupts = <0x1d>;
  1256. interrupt-parent = <0x1>;
  1257. reg = <0x47810000 0x1000>;
  1258. status = "disabled";
  1259. };
  1260.  
  1261. spinlock@480ca000 {
  1262. compatible = "ti,omap4-hwspinlock";
  1263. reg = <0x480ca000 0x1000>;
  1264. ti,hwmods = "spinlock";
  1265. #hwlock-cells = <0x1>;
  1266. };
  1267.  
  1268. wdt@44e35000 {
  1269. compatible = "ti,omap3-wdt";
  1270. ti,hwmods = "wd_timer2";
  1271. reg = <0x44e35000 0x1000>;
  1272. interrupts = <0x5b>;
  1273. };
  1274.  
  1275. can@481cc000 {
  1276. compatible = "ti,am3352-d_can";
  1277. ti,hwmods = "d_can0";
  1278. reg = <0x481cc000 0x2000>;
  1279. clocks = <0x31>;
  1280. clock-names = "fck";
  1281. syscon-raminit = <0x32 0x644 0x0>;
  1282. interrupts = <0x34>;
  1283. status = "disabled";
  1284. };
  1285.  
  1286. can@481d0000 {
  1287. compatible = "ti,am3352-d_can";
  1288. ti,hwmods = "d_can1";
  1289. reg = <0x481d0000 0x2000>;
  1290. clocks = <0x33>;
  1291. clock-names = "fck";
  1292. syscon-raminit = <0x32 0x644 0x1>;
  1293. interrupts = <0x37>;
  1294. status = "disabled";
  1295. };
  1296.  
  1297. mailbox@480C8000 {
  1298. compatible = "ti,omap4-mailbox";
  1299. reg = <0x480c8000 0x200>;
  1300. interrupts = <0x4d>;
  1301. ti,hwmods = "mailbox";
  1302. #mbox-cells = <0x1>;
  1303. ti,mbox-num-users = <0x4>;
  1304. ti,mbox-num-fifos = <0x8>;
  1305.  
  1306. wkup_m3 {
  1307. ti,mbox-tx = <0x0 0x0 0x0>;
  1308. ti,mbox-rx = <0x0 0x0 0x3>;
  1309. };
  1310. };
  1311.  
  1312. timer@44e31000 {
  1313. compatible = "ti,am335x-timer-1ms";
  1314. reg = <0x44e31000 0x400>;
  1315. interrupts = <0x43>;
  1316. ti,hwmods = "timer1";
  1317. ti,timer-alwon;
  1318. };
  1319.  
  1320. timer@48040000 {
  1321. compatible = "ti,am335x-timer";
  1322. reg = <0x48040000 0x400>;
  1323. interrupts = <0x44>;
  1324. ti,hwmods = "timer2";
  1325. };
  1326.  
  1327. timer@48042000 {
  1328. compatible = "ti,am335x-timer";
  1329. reg = <0x48042000 0x400>;
  1330. interrupts = <0x45>;
  1331. ti,hwmods = "timer3";
  1332. };
  1333.  
  1334. timer@48044000 {
  1335. compatible = "ti,am335x-timer";
  1336. reg = <0x48044000 0x400>;
  1337. interrupts = <0x5c>;
  1338. ti,hwmods = "timer4";
  1339. ti,timer-pwm;
  1340. };
  1341.  
  1342. timer@48046000 {
  1343. compatible = "ti,am335x-timer";
  1344. reg = <0x48046000 0x400>;
  1345. interrupts = <0x5d>;
  1346. ti,hwmods = "timer5";
  1347. ti,timer-pwm;
  1348. };
  1349.  
  1350. timer@48048000 {
  1351. compatible = "ti,am335x-timer";
  1352. reg = <0x48048000 0x400>;
  1353. interrupts = <0x5e>;
  1354. ti,hwmods = "timer6";
  1355. ti,timer-pwm;
  1356. };
  1357.  
  1358. timer@4804a000 {
  1359. compatible = "ti,am335x-timer";
  1360. reg = <0x4804a000 0x400>;
  1361. interrupts = <0x5f>;
  1362. ti,hwmods = "timer7";
  1363. ti,timer-pwm;
  1364. };
  1365.  
  1366. rtc@44e3e000 {
  1367. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  1368. reg = <0x44e3e000 0x1000>;
  1369. interrupts = <0x4b 0x4c>;
  1370. ti,hwmods = "rtc";
  1371. };
  1372.  
  1373. spi@48030000 {
  1374. compatible = "ti,omap4-mcspi";
  1375. #address-cells = <0x1>;
  1376. #size-cells = <0x0>;
  1377. reg = <0x48030000 0x400>;
  1378. interrupts = <0x41>;
  1379. ti,spi-num-cs = <0x2>;
  1380. ti,hwmods = "spi0";
  1381. dmas = <0x25 0x10 0x25 0x11 0x25 0x12 0x25 0x13>;
  1382. dma-names = "tx0", "rx0", "tx1", "rx1";
  1383. status = "disabled";
  1384. };
  1385.  
  1386. spi@481a0000 {
  1387. compatible = "ti,omap4-mcspi";
  1388. #address-cells = <0x1>;
  1389. #size-cells = <0x0>;
  1390. reg = <0x481a0000 0x400>;
  1391. interrupts = <0x7d>;
  1392. ti,spi-num-cs = <0x2>;
  1393. ti,hwmods = "spi1";
  1394. dmas = <0x25 0x2a 0x25 0x2b 0x25 0x2c 0x25 0x2d>;
  1395. dma-names = "tx0", "rx0", "tx1", "rx1";
  1396. status = "disabled";
  1397. };
  1398.  
  1399. usb@47400000 {
  1400. compatible = "ti,am33xx-usb";
  1401. reg = <0x47400000 0x1000>;
  1402. ranges;
  1403. #address-cells = <0x1>;
  1404. #size-cells = <0x1>;
  1405. ti,hwmods = "usb_otg_hs";
  1406. status = "okay";
  1407.  
  1408. dma-controller@47402000 {
  1409. compatible = "ti,am3359-cppi41";
  1410. reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000>;
  1411. reg-names = "glue", "controller", "scheduler", "queuemgr";
  1412. interrupts = <0x11>;
  1413. interrupt-names = "glue";
  1414. #dma-cells = <0x2>;
  1415. #dma-channels = <0x1e>;
  1416. #dma-requests = <0x100>;
  1417. status = "okay";
  1418. linux,phandle = <0x36>;
  1419. phandle = <0x36>;
  1420. };
  1421.  
  1422. control@44e10620 {
  1423. compatible = "ti,am335x-usb-ctrl-module";
  1424. reg = <0x44e10620 0x10 0x44e10648 0x4>;
  1425. reg-names = "phy_ctrl", "wakeup";
  1426. status = "okay";
  1427. linux,phandle = <0x34>;
  1428. phandle = <0x34>;
  1429. };
  1430.  
  1431. usb-phy@47401300 {
  1432. compatible = "ti,am335x-usb-phy";
  1433. reg = <0x47401300 0x100>;
  1434. reg-names = "phy";
  1435. status = "okay";
  1436. ti,ctrl_mod = <0x34>;
  1437. linux,phandle = <0x35>;
  1438. phandle = <0x35>;
  1439. };
  1440.  
  1441. usb@47401000 {
  1442. compatible = "ti,musb-am33xx";
  1443. status = "okay";
  1444. reg = <0x47401400 0x400 0x47401000 0x200>;
  1445. reg-names = "mc", "control";
  1446. interrupts = <0x12>;
  1447. interrupt-names = "mc";
  1448. dr_mode = "host";
  1449. mentor,multipoint = <0x1>;
  1450. mentor,num-eps = <0x10>;
  1451. mentor,ram-bits = <0xc>;
  1452. mentor,power = <0x1f4>;
  1453. phys = <0x35>;
  1454. dmas = <0x36 0x0 0x0 0x36 0x1 0x0 0x36 0x2 0x0 0x36 0x3 0x0 0x36 0x4 0x0 0x36 0x5 0x0 0x36 0x6 0x0 0x36 0x7 0x0 0x36 0x8 0x0 0x36 0x9 0x0 0x36 0xa 0x0 0x36 0xb 0x0 0x36 0xc 0x0 0x36 0xd 0x0 0x36 0xe 0x0 0x36 0x0 0x1 0x36 0x1 0x1 0x36 0x2 0x1 0x36 0x3 0x1 0x36 0x4 0x1 0x36 0x5 0x1 0x36 0x6 0x1 0x36 0x7 0x1 0x36 0x8 0x1 0x36 0x9 0x1 0x36 0xa 0x1 0x36 0xb 0x1 0x36 0xc 0x1 0x36 0xd 0x1 0x36 0xe 0x1>;
  1455. dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15";
  1456. };
  1457.  
  1458. usb-phy@47401b00 {
  1459. compatible = "ti,am335x-usb-phy";
  1460. reg = <0x47401b00 0x100>;
  1461. reg-names = "phy";
  1462. status = "okay";
  1463. ti,ctrl_mod = <0x34>;
  1464. linux,phandle = <0x37>;
  1465. phandle = <0x37>;
  1466. };
  1467.  
  1468. usb@47401800 {
  1469. compatible = "ti,musb-am33xx";
  1470. status = "okay";
  1471. reg = <0x47401c00 0x400 0x47401800 0x200>;
  1472. reg-names = "mc", "control";
  1473. interrupts = <0x13>;
  1474. interrupt-names = "mc";
  1475. dr_mode = "host";
  1476. mentor,multipoint = <0x1>;
  1477. mentor,num-eps = <0x10>;
  1478. mentor,ram-bits = <0xc>;
  1479. mentor,power = <0x1f4>;
  1480. phys = <0x37>;
  1481. dmas = <0x36 0xf 0x0 0x36 0x10 0x0 0x36 0x11 0x0 0x36 0x12 0x0 0x36 0x13 0x0 0x36 0x14 0x0 0x36 0x15 0x0 0x36 0x16 0x0 0x36 0x17 0x0 0x36 0x18 0x0 0x36 0x19 0x0 0x36 0x1a 0x0 0x36 0x1b 0x0 0x36 0x1c 0x0 0x36 0x1d 0x0 0x36 0xf 0x1 0x36 0x10 0x1 0x36 0x11 0x1 0x36 0x12 0x1 0x36 0x13 0x1 0x36 0x14 0x1 0x36 0x15 0x1 0x36 0x16 0x1 0x36 0x17 0x1 0x36 0x18 0x1 0x36 0x19 0x1 0x36 0x1a 0x1 0x36 0x1b 0x1 0x36 0x1c 0x1 0x36 0x1d 0x1>;
  1482. dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15";
  1483. };
  1484. };
  1485.  
  1486. epwmss@48300000 {
  1487. compatible = "ti,am33xx-pwmss";
  1488. reg = <0x48300000 0x10>;
  1489. ti,hwmods = "epwmss0";
  1490. #address-cells = <0x1>;
  1491. #size-cells = <0x1>;
  1492. status = "disabled";
  1493. ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>;
  1494.  
  1495. ecap@48300100 {
  1496. compatible = "ti,am33xx-ecap";
  1497. #pwm-cells = <0x3>;
  1498. reg = <0x48300100 0x80>;
  1499. interrupts = <0x1f>;
  1500. interrupt-names = "ecap0";
  1501. ti,hwmods = "ecap0";
  1502. status = "disabled";
  1503. };
  1504.  
  1505. ehrpwm@48300200 {
  1506. compatible = "ti,am33xx-ehrpwm";
  1507. #pwm-cells = <0x3>;
  1508. reg = <0x48300200 0x80>;
  1509. ti,hwmods = "ehrpwm0";
  1510. status = "disabled";
  1511. };
  1512. };
  1513.  
  1514. epwmss@48302000 {
  1515. compatible = "ti,am33xx-pwmss";
  1516. reg = <0x48302000 0x10>;
  1517. ti,hwmods = "epwmss1";
  1518. #address-cells = <0x1>;
  1519. #size-cells = <0x1>;
  1520. status = "disabled";
  1521. ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>;
  1522.  
  1523. ecap@48302100 {
  1524. compatible = "ti,am33xx-ecap";
  1525. #pwm-cells = <0x3>;
  1526. reg = <0x48302100 0x80>;
  1527. interrupts = <0x2f>;
  1528. interrupt-names = "ecap1";
  1529. ti,hwmods = "ecap1";
  1530. status = "disabled";
  1531. };
  1532.  
  1533. ehrpwm@48302200 {
  1534. compatible = "ti,am33xx-ehrpwm";
  1535. #pwm-cells = <0x3>;
  1536. reg = <0x48302200 0x80>;
  1537. ti,hwmods = "ehrpwm1";
  1538. status = "disabled";
  1539. };
  1540. };
  1541.  
  1542. epwmss@48304000 {
  1543. compatible = "ti,am33xx-pwmss";
  1544. reg = <0x48304000 0x10>;
  1545. ti,hwmods = "epwmss2";
  1546. #address-cells = <0x1>;
  1547. #size-cells = <0x1>;
  1548. status = "disabled";
  1549. ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>;
  1550.  
  1551. ecap@48304100 {
  1552. compatible = "ti,am33xx-ecap";
  1553. #pwm-cells = <0x3>;
  1554. reg = <0x48304100 0x80>;
  1555. interrupts = <0x3d>;
  1556. interrupt-names = "ecap2";
  1557. ti,hwmods = "ecap2";
  1558. status = "disabled";
  1559. };
  1560.  
  1561. ehrpwm@48304200 {
  1562. compatible = "ti,am33xx-ehrpwm";
  1563. #pwm-cells = <0x3>;
  1564. reg = <0x48304200 0x80>;
  1565. ti,hwmods = "ehrpwm2";
  1566. status = "disabled";
  1567. };
  1568. };
  1569.  
  1570. ethernet@4a100000 {
  1571. compatible = "ti,cpsw";
  1572. ti,hwmods = "cpgmac0";
  1573. clocks = <0x38 0x39>;
  1574. clock-names = "fck", "cpts";
  1575. cpdma_channels = <0x8>;
  1576. ale_entries = <0x400>;
  1577. bd_ram_size = <0x2000>;
  1578. no_bd_ram = <0x0>;
  1579. rx_descs = <0x40>;
  1580. mac_control = <0x20>;
  1581. slaves = <0x2>;
  1582. active_slave = <0x0>;
  1583. cpts_clock_mult = <0x80000000>;
  1584. cpts_clock_shift = <0x1d>;
  1585. reg = <0x4a100000 0x800 0x4a101200 0x100>;
  1586. #address-cells = <0x1>;
  1587. #size-cells = <0x1>;
  1588. interrupt-parent = <0x1>;
  1589. interrupts = <0x28 0x29 0x2a 0x2b>;
  1590. ranges;
  1591. syscon = <0x32>;
  1592. status = "okay";
  1593. pinctrl-names = "default";
  1594. pinctrl-0 = <0x3a>;
  1595. dual_emac = <0x1>;
  1596.  
  1597. mdio@4a101000 {
  1598. compatible = "ti,davinci_mdio";
  1599. #address-cells = <0x1>;
  1600. #size-cells = <0x0>;
  1601. ti,hwmods = "davinci_mdio";
  1602. bus_freq = <0xf4240>;
  1603. reg = <0x4a101000 0x100>;
  1604. status = "okay";
  1605. pinctrl-names = "default";
  1606. pinctrl-0 = <0x3b>;
  1607. linux,phandle = <0x3c>;
  1608. phandle = <0x3c>;
  1609. };
  1610.  
  1611. slave@4a100200 {
  1612. mac-address = [00 00 00 00 00 00];
  1613. phy_id = <0x3c 0x10>;
  1614. phy-mode = "mii";
  1615. dual_emac_res_vlan = <0x1>;
  1616. };
  1617.  
  1618. slave@4a100300 {
  1619. mac-address = [00 00 00 00 00 00];
  1620. phy_id = <0x3c 0x2>;
  1621. phy-mode = "mii";
  1622. dual_emac_res_vlan = <0x2>;
  1623. };
  1624.  
  1625. cpsw-phy-sel@44e10650 {
  1626. compatible = "ti,am3352-cpsw-phy-sel";
  1627. reg = <0x44e10650 0x4>;
  1628. reg-names = "gmii-sel";
  1629. };
  1630. };
  1631.  
  1632. ocmcram@40300000 {
  1633. compatible = "mmio-sram";
  1634. reg = <0x40300000 0x10000>;
  1635. };
  1636.  
  1637. wkup_m3@44d00000 {
  1638. compatible = "ti,am3353-wkup-m3";
  1639. reg = <0x44d00000 0x4000 0x44d80000 0x2000>;
  1640. ti,hwmods = "wkup_m3";
  1641. ti,no-reset-on-init;
  1642. };
  1643.  
  1644. elm@48080000 {
  1645. compatible = "ti,am3352-elm";
  1646. reg = <0x48080000 0x2000>;
  1647. interrupts = <0x4>;
  1648. ti,hwmods = "elm";
  1649. status = "disabled";
  1650. };
  1651.  
  1652. lcdc@4830e000 {
  1653. compatible = "ti,am33xx-tilcdc";
  1654. reg = <0x4830e000 0x1000>;
  1655. interrupt-parent = <0x1>;
  1656. interrupts = <0x24>;
  1657. ti,hwmods = "lcdc";
  1658. status = "disabled";
  1659. };
  1660.  
  1661. tscadc@44e0d000 {
  1662. compatible = "ti,am3359-tscadc";
  1663. reg = <0x44e0d000 0x1000>;
  1664. interrupt-parent = <0x1>;
  1665. interrupts = <0x10>;
  1666. ti,hwmods = "adc_tsc";
  1667. status = "disabled";
  1668.  
  1669. tsc {
  1670. compatible = "ti,am3359-tsc";
  1671. };
  1672.  
  1673. adc {
  1674. #io-channel-cells = <0x1>;
  1675. compatible = "ti,am3359-adc";
  1676. };
  1677. };
  1678.  
  1679. gpmc@50000000 {
  1680. compatible = "ti,am3352-gpmc";
  1681. ti,hwmods = "gpmc";
  1682. ti,no-idle-on-init;
  1683. reg = <0x50000000 0x2000>;
  1684. interrupts = <0x64>;
  1685. gpmc,num-cs = <0x7>;
  1686. gpmc,num-waitpins = <0x2>;
  1687. #address-cells = <0x2>;
  1688. #size-cells = <0x1>;
  1689. status = "disabled";
  1690. };
  1691.  
  1692. sham@53100000 {
  1693. compatible = "ti,omap4-sham";
  1694. ti,hwmods = "sham";
  1695. reg = <0x53100000 0x200>;
  1696. interrupt-parent = <0x1>;
  1697. interrupts = <0x6d>;
  1698. dmas = <0x25 0x24>;
  1699. dma-names = "rx";
  1700. status = "okay";
  1701. };
  1702.  
  1703. aes@53500000 {
  1704. compatible = "ti,omap4-aes";
  1705. ti,hwmods = "aes";
  1706. reg = <0x53500000 0xa0>;
  1707. interrupts = <0x67>;
  1708. dmas = <0x25 0x6 0x25 0x5>;
  1709. dma-names = "tx", "rx";
  1710. status = "okay";
  1711. };
  1712.  
  1713. mcasp@48038000 {
  1714. compatible = "ti,am33xx-mcasp-audio";
  1715. ti,hwmods = "mcasp0";
  1716. reg = <0x48038000 0x2000 0x46000000 0x400000>;
  1717. reg-names = "mpu", "dat";
  1718. interrupts = <0x50 0x51>;
  1719. interrupt-names = "tx", "rx";
  1720. status = "disabled";
  1721. dmas = <0x25 0x8 0x25 0x9>;
  1722. dma-names = "tx", "rx";
  1723. };
  1724.  
  1725. mcasp@4803C000 {
  1726. compatible = "ti,am33xx-mcasp-audio";
  1727. ti,hwmods = "mcasp1";
  1728. reg = <0x4803c000 0x2000 0x46400000 0x400000>;
  1729. reg-names = "mpu", "dat";
  1730. interrupts = <0x52 0x53>;
  1731. interrupt-names = "tx", "rx";
  1732. status = "disabled";
  1733. dmas = <0x25 0xa 0x25 0xb>;
  1734. dma-names = "tx", "rx";
  1735. };
  1736.  
  1737. rng@48310000 {
  1738. compatible = "ti,omap4-rng";
  1739. ti,hwmods = "rng";
  1740. reg = <0x48310000 0x2000>;
  1741. interrupts = <0x6f>;
  1742. };
  1743. };
  1744.  
  1745. fixedregulator@0 {
  1746. compatible = "regulator-fixed";
  1747. regulator-name = "vbat";
  1748. regulator-min-microvolt = <0x4c4b40>;
  1749. regulator-max-microvolt = <0x4c4b40>;
  1750. regulator-boot-on;
  1751. linux,phandle = <0x2b>;
  1752. phandle = <0x2b>;
  1753. };
  1754.  
  1755. fixedregulator@1 {
  1756. compatible = "regulator-fixed";
  1757. regulator-name = "vmmcsd_fixed";
  1758. regulator-min-microvolt = <0x325aa0>;
  1759. regulator-max-microvolt = <0x325aa0>;
  1760. regulator-boot-on;
  1761. linux,phandle = <0x2d>;
  1762. phandle = <0x2d>;
  1763. };
  1764.  
  1765. leds {
  1766. pinctrl-names = "default";
  1767. pinctrl-0 = <0x3d>;
  1768. compatible = "gpio-leds";
  1769.  
  1770. led@1 {
  1771. label = "uc811x:CEL1";
  1772. gpios = <0x3e 0x4 0x0>;
  1773. default-state = "off";
  1774. };
  1775.  
  1776. led@2 {
  1777. label = "uc811x:CEL2";
  1778. gpios = <0x3e 0x5 0x0>;
  1779. default-state = "off";
  1780. };
  1781.  
  1782. led@3 {
  1783. label = "uc811x:CEL3";
  1784. gpios = <0x3e 0x6 0x0>;
  1785. default-state = "off";
  1786. };
  1787.  
  1788. led@4 {
  1789. label = "uc811x:DIA1";
  1790. gpios = <0x3e 0xc 0x0>;
  1791. default-state = "off";
  1792. };
  1793.  
  1794. led@5 {
  1795. label = "uc811x:DIA2";
  1796. gpios = <0x3e 0xd 0x0>;
  1797. default-state = "off";
  1798. };
  1799.  
  1800. led@6 {
  1801. label = "uc811x:DIA3";
  1802. gpios = <0x3e 0xe 0x0>;
  1803. default-state = "off";
  1804. };
  1805.  
  1806. led@7 {
  1807. label = "uc811x:ZigBee";
  1808. gpios = <0x3f 0x2 0x0>;
  1809. default-state = "off";
  1810. };
  1811.  
  1812. led@8 {
  1813. label = "uc811x:SD";
  1814. gpios = <0x3f 0x3 0x0>;
  1815. default-state = "off";
  1816. };
  1817.  
  1818. led@9 {
  1819. label = "uc811x:USB";
  1820. gpios = <0x3f 0x4 0x0>;
  1821. default-state = "off";
  1822. };
  1823. };
  1824.  
  1825. push_button {
  1826. compatible = "gpio-keys";
  1827. pinctrl-names = "default";
  1828. pinctrl-0 = <0x40>;
  1829. #address-cells = <0x1>;
  1830. #size-cells = <0x0>;
  1831.  
  1832. button@0 {
  1833. label = "push_button";
  1834. linux,code = <0x100>;
  1835. gpios = <0x3f 0x1 0x1>;
  1836. };
  1837. };
  1838. };
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