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  1. /*
  2. * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of the
  12. * License, or (at your option) any later version.
  13. *
  14. * This file is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * Or, alternatively,
  20. *
  21. * b) Permission is hereby granted, free of charge, to any person
  22. * obtaining a copy of this software and associated documentation
  23. * files (the "Software"), to deal in the Software without
  24. * restriction, including without limitation the rights to use,
  25. * copy, modify, merge, publish, distribute, sublicense, and/or
  26. * sell copies of the Software, and to permit persons to whom the
  27. * Software is furnished to do so, subject to the following
  28. * conditions:
  29. *
  30. * The above copyright notice and this permission notice shall be
  31. * included in all copies or substantial portions of the Software.
  32. *
  33. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40. * OTHER DEALINGS IN THE SOFTWARE.
  41. */
  42.  
  43. /dts-v1/;
  44.  
  45. #include "em3399-boardcon-base.dtsi"
  46. #include "rk3399-android.dtsi"
  47. #include "rk3399-vop-clk-set.dtsi"
  48. #include <dt-bindings/input/input.h>
  49.  
  50. / {
  51. model = "Rockchip RK3399 Excavator Board edp (Android)";
  52. compatible = "rockchip,android", "rockchip,em3399-boardcon", "rockchip,rk3399";
  53.  
  54. vcc_lcd: vcc-lcd {
  55. compatible = "regulator-fixed";
  56. regulator-name = "vcc_lcd";
  57. gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
  58. startup-delay-us = <20000>;
  59. enable-active-high;
  60. regulator-min-microvolt = <3300000>;
  61. regulator-max-microvolt = <3300000>;
  62. regulator-boot-on;
  63. vin-supply = <&vcc5v0_sys>;
  64. };
  65.  
  66. panel: panel {
  67. compatible = "simple-panel";
  68. backlight = <&backlight>;
  69. power-supply = <&vcc_lcd>;
  70. // enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
  71. prepare-delay-ms = <20>;
  72. enable-delay-ms = <20>;
  73.  
  74. display-timings {
  75. native-mode = <&timing0>;
  76.  
  77. timing0: timing0 {
  78. clock-frequency = <150000000>;
  79. hactive = <1920>;
  80. vactive = <1200>;
  81. hfront-porch = <12>;
  82. hsync-len = <16>;
  83. hback-porch = <48>;
  84. vfront-porch = <8>;
  85. vsync-len = <4>;
  86. vback-porch = <8>;
  87. hsync-active = <0>;
  88. vsync-active = <0>;
  89. de-active = <0>;
  90. pixelclk-active = <0>;
  91. };
  92. };
  93.  
  94. ports {
  95. panel_in: endpoint {
  96. remote-endpoint = <&edp_out>;
  97. };
  98. };
  99. };
  100.  
  101. test-power {
  102. status = "okay";
  103. };
  104.  
  105. rt5651-sound {
  106. status = "disabled";
  107. };
  108.  
  109. rockchip-rt5651-sound {
  110. compatible = "rockchip,rockchip-rt5651-sound";
  111. rockchip,cpu = <&i2s0>;
  112. rockchip,codec = <&rt5651>;
  113. status = "okay";
  114. };
  115.  
  116. hdmiin-sound {
  117. compatible = "rockchip,rockchip-rt5651-tc358749x-sound";
  118. rockchip,cpu = <&i2s0>;
  119. rockchip,codec = <&rt5651 &rt5651 &tc358749x>;
  120. status = "disabled";
  121. };
  122. };
  123.  
  124. &backlight {
  125. status = "okay";
  126. enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  127. };
  128.  
  129. &edp {
  130. status = "disabled";
  131. force-hpd;
  132.  
  133. ports {
  134. port@1 {
  135. reg = <1>;
  136.  
  137. edp_out: endpoint {
  138. remote-endpoint = <&panel_in>;
  139. };
  140. };
  141. };
  142. };
  143.  
  144. &edp_in_vopl {
  145. status = "disabled";
  146. };
  147.  
  148. &dsi_in_vopl {
  149. status = "disabled";
  150. };
  151.  
  152. &dsi_in_vopb {
  153. status = "okay";
  154. };
  155.  
  156. &dsi {
  157. status = "okay";
  158. rockchip,lane-rate = <600>;
  159. panel@0 {
  160. compatible ="simple-panel-dsi";
  161. reg = <0>;
  162. backlight = <&backlight>;
  163. power-supply = <&vcc3v3_s0>;
  164. enable-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
  165. //enable-delay-ms = <30>;
  166. width-mm = <136>;
  167. height-mm = <216>;
  168.  
  169. dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
  170. MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
  171. dsi,format = <MIPI_DSI_FMT_RGB888>;
  172. dsi,lanes = <4>;
  173.  
  174. panel-init-sequence = [
  175. //Page0
  176. 15 00 02 E0 00
  177.  
  178. //--- PASSWORD ----//
  179. 15 00 02 E1 93
  180. 15 00 02 E2 65
  181. 15 00 02 E3 F8
  182. 15 00 02 80 03
  183.  
  184. //--- Sequence Ctrl ----//
  185. 15 00 02 70 10
  186. 15 00 02 71 13
  187. 15 00 02 72 06
  188. 15 00 02 75 03
  189. //--- Page4 ----//
  190. 15 00 02 E0 04
  191. 15 00 02 2D 03
  192.  
  193. //--- Page1 ----//
  194. 15 00 02 E0 01
  195.  
  196. //--- BIST MODE ----//
  197. // 15 00 02 4A 35
  198.  
  199. //Set VCOM
  200. 15 00 02 00 00
  201. 15 00 02 01 5A
  202. //Set VCOM_Reverse
  203. 15 00 02 03 00
  204. 15 00 02 04 58
  205. //Set Gamma Power
  206. 15 00 02 17 00
  207. 15 00 02 18 EF
  208. 15 00 02 19 01
  209. 15 00 02 1A 00
  210. 15 00 02 1B EF
  211. 15 00 02 1C 01
  212.  
  213. //Set Gate Power
  214. 15 00 02 1F 7A
  215. 15 00 02 20 24
  216. 15 00 02 21 24
  217. 15 00 02 22 4E
  218. // 15 00 02 24 F8
  219. // 15 00 02 26 D3
  220. //SetPanel
  221. 15 00 02 37 59
  222. 15 00 02 35 2C
  223. //SET RGBCYC
  224. 15 00 02 38 05
  225. 15 00 02 39 08
  226. 15 00 02 3A 10
  227. 15 00 02 3C 88
  228. 15 00 02 3D FF
  229. 15 00 02 3E FF
  230. 15 00 02 3F 7F
  231. //Set TCON
  232. 15 00 02 40 06
  233. 15 00 02 41 A0
  234. 15 00 02 43 14
  235. 15 00 02 44 0F
  236. 15 00 02 45 24
  237. // 15 00 02 4A 80
  238. //--- power voltage ----//
  239. 15 00 02 55 01
  240. 15 00 02 56 01
  241. 15 00 02 57 89
  242. 15 00 02 58 0A
  243. 15 00 02 59 0A //VCL = -2.5V
  244. 15 00 02 5A 39 //VGH = 18.4V 2D_VGH = 16V
  245. 15 00 02 5B 10 //VGL = -10.2V
  246. 15 00 02 5C 16
  247. //--- Gamma ----//
  248. 15 00 02 5D 7A
  249. 15 00 02 5E 65
  250. 15 00 02 5F 56
  251. 15 00 02 60 49
  252. 15 00 02 61 43
  253. 15 00 02 62 33
  254. 15 00 02 63 35
  255. 15 00 02 64 1C
  256. 15 00 02 65 33
  257. 15 00 02 66 30
  258. 15 00 02 67 2E
  259. 15 00 02 68 4A
  260. 15 00 02 69 36
  261.  
  262. 15 00 02 6A 3D
  263. 15 00 02 6B 2F
  264. 15 00 02 6C 2D
  265. 15 00 02 6D 23
  266. 15 00 02 6E 15
  267. 15 00 02 6F 04
  268. 15 00 02 70 7A
  269. 15 00 02 71 65
  270. 15 00 02 72 56
  271. 15 00 02 73 49
  272. 15 00 02 74 43
  273. 15 00 02 75 33
  274. 15 00 02 76 35
  275. 15 00 02 77 1C
  276. 15 00 02 78 33
  277. 15 00 02 79 30
  278. 15 00 02 7A 2E
  279. 15 00 02 7B 4A
  280. 15 00 02 7C 36
  281. 15 00 02 7D 3D
  282. 15 00 02 7E 2F
  283. 15 00 02 7F 2D
  284. 15 00 02 80 23
  285. 15 00 02 81 15
  286. 15 00 02 82 04
  287.  
  288.  
  289. //Page2, for GIP
  290. 15 00 02 E0 02
  291.  
  292. //GIP_L Pin mapping
  293. 15 00 02 00 1E
  294. 15 00 02 01 1F
  295. 15 00 02 02 57
  296. 15 00 02 03 58
  297. 15 00 02 04 48
  298. 15 00 02 05 4A
  299. 15 00 02 06 44
  300. 15 00 02 07 46
  301. 15 00 02 08 40
  302. 15 00 02 09 1F
  303. 15 00 02 0A 1F
  304. 15 00 02 0B 1F
  305. 15 00 02 0C 1F
  306. 15 00 02 0D 1F
  307. 15 00 02 0E 1F
  308. 15 00 02 0F 42
  309. 15 00 02 10 1F
  310. 15 00 02 11 1F
  311. 15 00 02 12 1F
  312. 15 00 02 13 1F
  313. 15 00 02 14 1F
  314. 15 00 02 15 1F
  315.  
  316. //GIP_R Pin mapping
  317. 15 00 02 16 1E
  318. 15 00 02 17 1F
  319. 15 00 02 18 57
  320. 15 00 02 19 58
  321. 15 00 02 1A 49
  322. 15 00 02 1B 4B
  323. 15 00 02 1C 45
  324. 15 00 02 1D 47
  325. 15 00 02 1E 41
  326. 15 00 02 1F 1F
  327. 15 00 02 20 1F
  328. 15 00 02 21 1F
  329. 15 00 02 22 1F
  330. 15 00 02 23 1F
  331. 15 00 02 24 1F
  332. 15 00 02 25 43
  333. 15 00 02 26 1F
  334. 15 00 02 27 1F
  335. 15 00 02 28 1F
  336. 15 00 02 29 1F
  337. 15 00 02 2A 1F
  338. 15 00 02 2B 1F
  339.  
  340. //GIP_L_GS Pin mapping
  341. 15 00 02 2C 1F
  342. 15 00 02 2D 1E
  343. 15 00 02 2E 17
  344. 15 00 02 2F 18
  345. 15 00 02 30 07
  346. 15 00 02 31 05
  347. 15 00 02 32 0B
  348. 15 00 02 33 09
  349. 15 00 02 34 03
  350. 15 00 02 35 1F
  351. 15 00 02 36 1F
  352. 15 00 02 37 1F
  353. 15 00 02 38 1F
  354. 15 00 02 39 1F
  355. 15 00 02 3A 1F
  356. 15 00 02 3B 01
  357. 15 00 02 3C 1F
  358. 15 00 02 3D 1F
  359. 15 00 02 3E 1F
  360. 15 00 02 3F 1F
  361. 15 00 02 40 1F
  362. 15 00 02 41 1F
  363.  
  364. //GIP_R_GS Pin mapping
  365. 15 00 02 42 1F
  366. 15 00 02 43 1E
  367. 15 00 02 44 17
  368. 15 00 02 45 18
  369. 15 00 02 46 06
  370. 15 00 02 47 04
  371. 15 00 02 48 0A
  372. 15 00 02 49 08
  373. 15 00 02 4A 02
  374. 15 00 02 4B 1F
  375. 15 00 02 4C 1F
  376. 15 00 02 4D 1F
  377. 15 00 02 4E 1F
  378. 15 00 02 4F 1F
  379. 15 00 02 50 1F
  380. 15 00 02 51 00
  381. 15 00 02 52 1F
  382. 15 00 02 53 1F
  383. 15 00 02 54 1F
  384. 15 00 02 55 1F
  385. 15 00 02 56 1F
  386. 15 00 02 57 1F
  387.  
  388. //GIP Timing
  389. 15 00 02 58 40
  390. 15 00 02 59 00
  391. 15 00 02 5A 00
  392. 15 00 02 5B 30
  393. 15 00 02 5C 05
  394. 15 00 02 5D 30
  395. 15 00 02 5E 01
  396. 15 00 02 5F 02
  397. 15 00 02 60 30
  398. 15 00 02 61 03
  399. 15 00 02 62 04
  400. 15 00 02 63 6A
  401. 15 00 02 64 6A
  402. 15 00 02 65 75
  403. 15 00 02 66 0D
  404. 15 00 02 67 73
  405. 15 00 02 68 09
  406. 15 00 02 69 6A
  407. 15 00 02 6A 6A
  408. 15 00 02 6B 08
  409. 15 00 02 6C 00
  410. 15 00 02 6D 04
  411. 15 00 02 6E 00
  412. 15 00 02 6F 88
  413. 15 00 02 70 00
  414. 15 00 02 71 00
  415. 15 00 02 72 06
  416. 15 00 02 73 7B
  417. 15 00 02 74 00
  418. 15 00 02 75 BC
  419. 15 00 02 76 00
  420. 15 00 02 77 0D
  421. 15 00 02 78 23
  422. 15 00 02 79 00
  423. 15 00 02 7A 00
  424. 15 00 02 7B 00
  425. 15 00 02 7C 00
  426. 15 00 02 7D 03
  427. 15 00 02 7E 7B
  428.  
  429. //Page4
  430. 15 00 02 E0 04
  431. 15 00 02 2B 2B
  432. 15 00 02 2E 44
  433.  
  434. //Page0
  435. 15 00 02 E0 00
  436. 15 00 02 E6 02
  437. 15 00 02 E7 02
  438.  
  439. 05 78 01 11
  440. 05 05 01 29
  441. // 15 00 02 35 00
  442.  
  443. ];
  444. display-timings {
  445. native-mode = <&timing1>;
  446.  
  447. timing1: timing1 {
  448. clock-frequency = <68000000>;
  449. hactive = <800>;
  450. vactive = <1280>;
  451. hfront-porch = <30>;
  452. hback-porch = <20>;
  453. hsync-len = <20>;
  454. vfront-porch = <20>;
  455. vback-porch = <12>;
  456. vsync-len = <4>;
  457. hsync-active = <1>;
  458. vsync-active = <1>;
  459. de-active = <0>;
  460. pixelclk-active = <0>;
  461. };
  462. };
  463. };
  464. };
  465.  
  466. &route_dsi {
  467. status = "okay";
  468. connect = <&vopb_out_dsi>;
  469. };
  470.  
  471. &hdmi {
  472. status = "okay";
  473. };
  474.  
  475. &hdmi_in_vopb {
  476. status = "disabled";
  477. };
  478.  
  479. &rt5651 {
  480. status = "okay";
  481. };
  482.  
  483. &cdn_dp {
  484. status = "okay";
  485. extcon = <&fusb0>;
  486. phys = <&tcphy0_dp>;
  487. };
  488. &dp_sound {
  489. status = "okay";
  490. };
  491.  
  492. &hdmi_sound {
  493. status = "okay";
  494. };
  495.  
  496. &dp_in_vopb {
  497. status = "disabled";
  498. };
  499.  
  500. &i2s2 {
  501. status = "okay";
  502. };
  503.  
  504. &i2c2 {
  505. status = "okay";
  506.  
  507. gsl3673: gsl3673@40 {
  508. status = "disabled";
  509. compatible = "GSL,GSL3673";
  510. reg = <0x40>;
  511. screen_max_x = <1536>;
  512. screen_max_y = <2048>;
  513. irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
  514. rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
  515. };
  516.  
  517. tc358749x: tc358749x@0f {
  518. compatible = "toshiba,tc358749x";
  519. reg = <0x0f>;
  520. //power-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
  521. //power18-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
  522. //power33-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
  523. //csi-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
  524. stanby-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
  525. reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  526. int-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  527. pinctrl-names = "default";
  528. pinctrl-0 = <&hdmiin_gpios>;
  529. // status = "okay";
  530. status = "disabled";
  531. };
  532. };
  533.  
  534. &i2c6 {
  535. status = "okay";
  536. gt928: gt928@5d {
  537. compatible = "goodix,gt9xx";
  538. reg = <0x5d>;
  539. max-x = <1280>;
  540. max-y = <800>;
  541. tp-size = <89>;
  542. touch-gpio = <&gpio3 28 GPIO_ACTIVE_LOW>;
  543. reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
  544. };
  545. cw2015@62 {
  546. status = "disabled";
  547. compatible = "cw201x";
  548. reg = <0x62>;
  549. bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48
  550. 0x48 0x44 0x44 0x46 0x49 0x48 0x32 0x24
  551. 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45
  552. 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E
  553. 0x4D 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D
  554. 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52
  555. 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 0xCB
  556. 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
  557. monitor_sec = <5>;
  558. virtual_power = <0>;
  559. };
  560. };
  561.  
  562. &isp0 {
  563. status = "okay";
  564. };
  565.  
  566. &isp1 {
  567. status = "okay";
  568. };
  569.  
  570. &isp0_mmu {
  571. status = "okay";
  572. };
  573.  
  574. &isp1_mmu {
  575. status = "okay";
  576. };
  577.  
  578. &vopb {
  579. assigned-clocks = <&cru DCLK_VOP0_DIV>;
  580. assigned-clock-parents = <&cru PLL_CPLL>;
  581. };
  582.  
  583. &vopl {
  584. assigned-clocks = <&cru DCLK_VOP1_DIV>;
  585. assigned-clock-parents = <&cru PLL_VPLL>;
  586. };
  587.  
  588. &pcie_phy {
  589. status = "okay";
  590. };
  591.  
  592. &pcie0 {
  593. status = "okay";
  594. };
  595.  
  596. &route_edp {
  597. status = "okay";
  598. };
  599.  
  600. &pwm3 {
  601. status = "okay";
  602. interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
  603. compatible = "rockchip,remotectl-pwm";
  604. remote_pwm_id = <3>;
  605. handle_cpu_id = <1>;
  606.  
  607. ir_key1 {
  608. rockchip,usercode = <0x4040>;
  609. rockchip,key_table =
  610. <0xf2 KEY_REPLY>,
  611. <0xba KEY_BACK>,
  612. <0xf4 KEY_UP>,
  613. <0xf1 KEY_DOWN>,
  614. <0xef KEY_LEFT>,
  615. <0xee KEY_RIGHT>,
  616. <0xbd KEY_HOME>,
  617. <0xea KEY_VOLUMEUP>,
  618. <0xe3 KEY_VOLUMEDOWN>,
  619. <0xe2 KEY_SEARCH>,
  620. <0xb2 KEY_POWER>,
  621. <0xbc KEY_MUTE>,
  622. <0xec KEY_MENU>,
  623. <0xbf 0x190>,
  624. <0xe0 0x191>,
  625. <0xe1 0x192>,
  626. <0xe9 183>,
  627. <0xe6 248>,
  628. <0xe8 185>,
  629. <0xe7 186>,
  630. <0xf0 388>,
  631. <0xbe 0x175>;
  632. };
  633.  
  634. ir_key2 {
  635. rockchip,usercode = <0xff00>;
  636. rockchip,key_table =
  637. <0xf9 KEY_HOME>,
  638. <0xbf KEY_BACK>,
  639. <0xfb KEY_MENU>,
  640. <0xaa KEY_REPLY>,
  641. <0xb9 KEY_UP>,
  642. <0xe9 KEY_DOWN>,
  643. <0xb8 KEY_LEFT>,
  644. <0xea KEY_RIGHT>,
  645. <0xeb KEY_VOLUMEDOWN>,
  646. <0xef KEY_VOLUMEUP>,
  647. <0xf7 KEY_MUTE>,
  648. <0xe7 KEY_POWER>,
  649. <0xfc KEY_POWER>,
  650. <0xa9 KEY_VOLUMEDOWN>,
  651. <0xa8 KEY_VOLUMEDOWN>,
  652. <0xe0 KEY_VOLUMEDOWN>,
  653. <0xa5 KEY_VOLUMEDOWN>,
  654. <0xab 183>,
  655. <0xb7 388>,
  656. <0xf8 184>,
  657. <0xaf 185>,
  658. <0xed KEY_VOLUMEDOWN>,
  659. <0xee 186>,
  660. <0xb3 KEY_VOLUMEDOWN>,
  661. <0xf1 KEY_VOLUMEDOWN>,
  662. <0xf2 KEY_VOLUMEDOWN>,
  663. <0xf3 KEY_SEARCH>,
  664. <0xb4 KEY_VOLUMEDOWN>,
  665. <0xbe KEY_SEARCH>;
  666. };
  667.  
  668. ir_key3 {
  669. rockchip,usercode = <0x1dcc>;
  670. rockchip,key_table =
  671. <0xee KEY_REPLY>,
  672. <0xf0 KEY_BACK>,
  673. <0xf8 KEY_UP>,
  674. <0xbb KEY_DOWN>,
  675. <0xef KEY_LEFT>,
  676. <0xed KEY_RIGHT>,
  677. <0xfc KEY_HOME>,
  678. <0xf1 KEY_VOLUMEUP>,
  679. <0xfd KEY_VOLUMEDOWN>,
  680. <0xb7 KEY_SEARCH>,
  681. <0xff KEY_POWER>,
  682. <0xf3 KEY_MUTE>,
  683. <0xbf KEY_MENU>,
  684. <0xf9 0x191>,
  685. <0xf5 0x192>,
  686. <0xb3 388>,
  687. <0xbe KEY_1>,
  688. <0xba KEY_2>,
  689. <0xb2 KEY_3>,
  690. <0xbd KEY_4>,
  691. <0xf9 KEY_5>,
  692. <0xb1 KEY_6>,
  693. <0xfc KEY_7>,
  694. <0xf8 KEY_8>,
  695. <0xb0 KEY_9>,
  696. <0xb6 KEY_0>,
  697. <0xb5 KEY_BACKSPACE>;
  698. };
  699. };
  700.  
  701. &pinctrl {
  702. lcd-panel {
  703. lcd_panel_reset: lcd-panel-reset {
  704. rockchip,pins = <3 10 RK_FUNC_GPIO &pcfg_pull_up>;
  705. };
  706. };
  707.  
  708. hdmiin {
  709. hdmiin_gpios: hdmiin_gpios {
  710. rockchip,pins =
  711. <2 5 RK_FUNC_GPIO &pcfg_pull_none>,
  712. <2 6 RK_FUNC_GPIO &pcfg_pull_none>,
  713. <2 7 RK_FUNC_GPIO &pcfg_pull_none>,
  714. <2 8 RK_FUNC_GPIO &pcfg_pull_none>,
  715. <0 8 RK_FUNC_GPIO &pcfg_pull_none>,
  716. <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
  717. };
  718. };
  719. };
  720.  
  721.  
  722.  
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