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sun6i-a31s-bpi-m2.dts

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Jun 13th, 2015
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. interrupt-parent = <0x1>;
  7. model = "Sinovoip Banana Pi BPI-M2";
  8. compatible = "sinovoip,a31s-bpi-m2", "allwinner,sun6i-a31";
  9.  
  10. chosen {
  11. #address-cells = <0x1>;
  12. #size-cells = <0x1>;
  13. ranges;
  14. bootargs = "earlyprintk console=ttyS0,115200";
  15.  
  16. framebuffer@0 {
  17. compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  18. allwinner,pipeline = "de_be0-lcd0-hdmi";
  19. clocks = <0x2 0x0>;
  20. status = "disabled";
  21. };
  22.  
  23. framebuffer@1 {
  24. compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  25. allwinner,pipeline = "de_be0-lcd0";
  26. clocks = <0x2 0x0>;
  27. status = "disabled";
  28. };
  29. };
  30.  
  31. aliases {
  32. ethernet0 = "/soc@01c00000/ethernet@01c30000";
  33. };
  34.  
  35. memory {
  36. device_type = "memory";
  37. reg = <0x40000000 0x80000000>;
  38. };
  39.  
  40. timer {
  41. compatible = "arm,armv7-timer";
  42. interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
  43. clock-frequency = <0x16e3600>;
  44. arm,cpu-registers-not-fw-configured;
  45. };
  46.  
  47. cpus {
  48. enable-method = "allwinner,sun6i-a31";
  49. #address-cells = <0x1>;
  50. #size-cells = <0x0>;
  51.  
  52. cpu@0 {
  53. compatible = "arm,cortex-a7";
  54. device_type = "cpu";
  55. reg = <0x0>;
  56. };
  57.  
  58. cpu@1 {
  59. compatible = "arm,cortex-a7";
  60. device_type = "cpu";
  61. reg = <0x1>;
  62. };
  63.  
  64. cpu@2 {
  65. compatible = "arm,cortex-a7";
  66. device_type = "cpu";
  67. reg = <0x2>;
  68. };
  69.  
  70. cpu@3 {
  71. compatible = "arm,cortex-a7";
  72. device_type = "cpu";
  73. reg = <0x3>;
  74. };
  75. };
  76.  
  77. pmu {
  78. compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
  79. interrupts = <0x0 0x78 0x4 0x0 0x79 0x4 0x0 0x7a 0x4 0x0 0x7b 0x4>;
  80. };
  81.  
  82. clocks {
  83. #address-cells = <0x1>;
  84. #size-cells = <0x1>;
  85. ranges;
  86.  
  87. osc24M {
  88. #clock-cells = <0x0>;
  89. compatible = "fixed-clock";
  90. clock-frequency = <0x16e3600>;
  91. linux,phandle = <0x3>;
  92. phandle = <0x3>;
  93. };
  94.  
  95. clk@0 {
  96. #clock-cells = <0x0>;
  97. compatible = "fixed-clock";
  98. clock-frequency = <0x8000>;
  99. clock-output-names = "osc32k";
  100. linux,phandle = <0x4>;
  101. phandle = <0x4>;
  102. };
  103.  
  104. clk@01c20000 {
  105. #clock-cells = <0x0>;
  106. compatible = "allwinner,sun6i-a31-pll1-clk";
  107. reg = <0x1c20000 0x4>;
  108. clocks = <0x3>;
  109. clock-output-names = "pll1";
  110. linux,phandle = <0x5>;
  111. phandle = <0x5>;
  112. };
  113.  
  114. clk@01c20028 {
  115. #clock-cells = <0x1>;
  116. compatible = "allwinner,sun6i-a31-pll6-clk";
  117. reg = <0x1c20028 0x4>;
  118. clocks = <0x3>;
  119. clock-output-names = "pll6", "pll6x2";
  120. linux,phandle = <0x2>;
  121. phandle = <0x2>;
  122. };
  123.  
  124. cpu@01c20050 {
  125. #clock-cells = <0x0>;
  126. compatible = "allwinner,sun4i-a10-cpu-clk";
  127. reg = <0x1c20050 0x4>;
  128. clocks = <0x4 0x3 0x5 0x5>;
  129. clock-output-names = "cpu";
  130. linux,phandle = <0x6>;
  131. phandle = <0x6>;
  132. };
  133.  
  134. axi@01c20050 {
  135. #clock-cells = <0x0>;
  136. compatible = "allwinner,sun4i-a10-axi-clk";
  137. reg = <0x1c20050 0x4>;
  138. clocks = <0x6>;
  139. clock-output-names = "axi";
  140. linux,phandle = <0x7>;
  141. phandle = <0x7>;
  142. };
  143.  
  144. ahb1@01c20054 {
  145. #clock-cells = <0x0>;
  146. compatible = "allwinner,sun6i-a31-ahb1-clk";
  147. reg = <0x1c20054 0x4>;
  148. clocks = <0x4 0x3 0x7 0x2 0x0>;
  149. clock-output-names = "ahb1";
  150. linux,phandle = <0x8>;
  151. phandle = <0x8>;
  152. };
  153.  
  154. clk@01c20060 {
  155. #clock-cells = <0x1>;
  156. compatible = "allwinner,sun6i-a31-ahb1-gates-clk";
  157. reg = <0x1c20060 0x8>;
  158. clocks = <0x8>;
  159. clock-output-names = "ahb1_mipidsi", "ahb1_ss", "ahb1_dma", "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", "ahb1_mmc3", "ahb1_nand1", "ahb1_nand0", "ahb1_sdram", "ahb1_gmac", "ahb1_ts", "ahb1_hstimer", "ahb1_spi0", "ahb1_spi1", "ahb1_spi2", "ahb1_spi3", "ahb1_otg", "ahb1_ehci0", "ahb1_ehci1", "ahb1_ohci0", "ahb1_ohci1", "ahb1_ohci2", "ahb1_ve", "ahb1_lcd0", "ahb1_lcd1", "ahb1_csi", "ahb1_hdmi", "ahb1_de0", "ahb1_de1", "ahb1_fe0", "ahb1_fe1", "ahb1_mp", "ahb1_gpu", "ahb1_deu0", "ahb1_deu1", "ahb1_drc0", "ahb1_drc1";
  160. linux,phandle = <0xd>;
  161. phandle = <0xd>;
  162. };
  163.  
  164. apb1@01c20054 {
  165. #clock-cells = <0x0>;
  166. compatible = "allwinner,sun4i-a10-apb0-clk";
  167. reg = <0x1c20054 0x4>;
  168. clocks = <0x8>;
  169. clock-output-names = "apb1";
  170. linux,phandle = <0x9>;
  171. phandle = <0x9>;
  172. };
  173.  
  174. clk@01c20068 {
  175. #clock-cells = <0x1>;
  176. compatible = "allwinner,sun6i-a31-apb1-gates-clk";
  177. reg = <0x1c20068 0x4>;
  178. clocks = <0x9>;
  179. clock-output-names = "apb1_codec", "apb1_digital_mic", "apb1_pio", "apb1_daudio0", "apb1_daudio1";
  180. linux,phandle = <0x1a>;
  181. phandle = <0x1a>;
  182. };
  183.  
  184. clk@01c20058 {
  185. #clock-cells = <0x0>;
  186. compatible = "allwinner,sun4i-a10-apb1-clk";
  187. reg = <0x1c20058 0x4>;
  188. clocks = <0x4 0x3 0x2 0x0 0x2 0x0>;
  189. clock-output-names = "apb2";
  190. linux,phandle = <0xa>;
  191. phandle = <0xa>;
  192. };
  193.  
  194. clk@01c2006c {
  195. #clock-cells = <0x1>;
  196. compatible = "allwinner,sun6i-a31-apb2-gates-clk";
  197. reg = <0x1c2006c 0x4>;
  198. clocks = <0xa>;
  199. clock-output-names = "apb2_i2c0", "apb2_i2c1", "apb2_i2c2", "apb2_i2c3", "apb2_uart0", "apb2_uart1", "apb2_uart2", "apb2_uart3", "apb2_uart4", "apb2_uart5";
  200. linux,phandle = <0x1b>;
  201. phandle = <0x1b>;
  202. };
  203.  
  204. clk@01c20088 {
  205. #clock-cells = <0x1>;
  206. compatible = "allwinner,sun4i-a10-mmc-clk";
  207. reg = <0x1c20088 0x4>;
  208. clocks = <0x3 0x2 0x0>;
  209. clock-output-names = "mmc0", "mmc0_output", "mmc0_sample";
  210. linux,phandle = <0xf>;
  211. phandle = <0xf>;
  212. };
  213.  
  214. clk@01c2008c {
  215. #clock-cells = <0x1>;
  216. compatible = "allwinner,sun4i-a10-mmc-clk";
  217. reg = <0x1c2008c 0x4>;
  218. clocks = <0x3 0x2 0x0>;
  219. clock-output-names = "mmc1", "mmc1_output", "mmc1_sample";
  220. linux,phandle = <0x14>;
  221. phandle = <0x14>;
  222. };
  223.  
  224. clk@01c20090 {
  225. #clock-cells = <0x1>;
  226. compatible = "allwinner,sun4i-a10-mmc-clk";
  227. reg = <0x1c20090 0x4>;
  228. clocks = <0x3 0x2 0x0>;
  229. clock-output-names = "mmc2", "mmc2_output", "mmc2_sample";
  230. linux,phandle = <0x15>;
  231. phandle = <0x15>;
  232. };
  233.  
  234. clk@01c20094 {
  235. #clock-cells = <0x1>;
  236. compatible = "allwinner,sun4i-a10-mmc-clk";
  237. reg = <0x1c20094 0x4>;
  238. clocks = <0x3 0x2 0x0>;
  239. clock-output-names = "mmc3", "mmc3_output", "mmc3_sample";
  240. linux,phandle = <0x16>;
  241. phandle = <0x16>;
  242. };
  243.  
  244. clk@01c200a0 {
  245. #clock-cells = <0x0>;
  246. compatible = "allwinner,sun4i-a10-mod0-clk";
  247. reg = <0x1c200a0 0x4>;
  248. clocks = <0x3 0x2 0x0>;
  249. clock-output-names = "spi0";
  250. linux,phandle = <0x25>;
  251. phandle = <0x25>;
  252. };
  253.  
  254. clk@01c200a4 {
  255. #clock-cells = <0x0>;
  256. compatible = "allwinner,sun4i-a10-mod0-clk";
  257. reg = <0x1c200a4 0x4>;
  258. clocks = <0x3 0x2 0x0>;
  259. clock-output-names = "spi1";
  260. linux,phandle = <0x26>;
  261. phandle = <0x26>;
  262. };
  263.  
  264. clk@01c200a8 {
  265. #clock-cells = <0x0>;
  266. compatible = "allwinner,sun4i-a10-mod0-clk";
  267. reg = <0x1c200a8 0x4>;
  268. clocks = <0x3 0x2 0x0>;
  269. clock-output-names = "spi2";
  270. linux,phandle = <0x27>;
  271. phandle = <0x27>;
  272. };
  273.  
  274. clk@01c200ac {
  275. #clock-cells = <0x0>;
  276. compatible = "allwinner,sun4i-a10-mod0-clk";
  277. reg = <0x1c200ac 0x4>;
  278. clocks = <0x3 0x2 0x0>;
  279. clock-output-names = "spi3";
  280. linux,phandle = <0x28>;
  281. phandle = <0x28>;
  282. };
  283.  
  284. clk@01c200cc {
  285. #clock-cells = <0x1>;
  286. #reset-cells = <0x1>;
  287. compatible = "allwinner,sun6i-a31-usb-clk";
  288. reg = <0x1c200cc 0x4>;
  289. clocks = <0x3>;
  290. clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2", "usb_ohci0", "usb_ohci1", "usb_ohci2";
  291. linux,phandle = <0x17>;
  292. phandle = <0x17>;
  293. };
  294.  
  295. clk@1 {
  296. #clock-cells = <0x0>;
  297. compatible = "fixed-clock";
  298. clock-frequency = <0x17d7840>;
  299. clock-output-names = "mii_phy_tx";
  300. linux,phandle = <0xb>;
  301. phandle = <0xb>;
  302. };
  303.  
  304. clk@2 {
  305. #clock-cells = <0x0>;
  306. compatible = "fixed-clock";
  307. clock-frequency = <0x7735940>;
  308. clock-output-names = "gmac_int_tx";
  309. linux,phandle = <0xc>;
  310. phandle = <0xc>;
  311. };
  312.  
  313. clk@01c200d0 {
  314. #clock-cells = <0x0>;
  315. compatible = "allwinner,sun7i-a20-gmac-clk";
  316. reg = <0x1c200d0 0x4>;
  317. clocks = <0xb 0xc>;
  318. clock-output-names = "gmac_tx";
  319. linux,phandle = <0x22>;
  320. phandle = <0x22>;
  321. };
  322. };
  323.  
  324. soc@01c00000 {
  325. compatible = "simple-bus";
  326. #address-cells = <0x1>;
  327. #size-cells = <0x1>;
  328. ranges;
  329.  
  330. dma-controller@01c02000 {
  331. compatible = "allwinner,sun6i-a31-dma";
  332. reg = <0x1c02000 0x1000>;
  333. interrupts = <0x0 0x32 0x4>;
  334. clocks = <0xd 0x6>;
  335. resets = <0xe 0x6>;
  336. #dma-cells = <0x1>;
  337. assigned-clocks = <0x8>;
  338. assigned-clock-parents = <0x2 0x0>;
  339. linux,phandle = <0x1d>;
  340. phandle = <0x1d>;
  341. };
  342.  
  343. mmc@01c0f000 {
  344. compatible = "allwinner,sun5i-a13-mmc";
  345. reg = <0x1c0f000 0x1000>;
  346. clocks = <0xd 0x8 0xf 0x0 0xf 0x1 0xf 0x2>;
  347. clock-names = "ahb", "mmc", "output", "sample";
  348. resets = <0xe 0x8>;
  349. reset-names = "ahb";
  350. interrupts = <0x0 0x3c 0x4>;
  351. status = "okay";
  352. pinctrl-names = "default";
  353. pinctrl-0 = <0x10 0x11>;
  354. vmmc-supply = <0x12>;
  355. bus-width = <0x4>;
  356. cd-gpios = <0x13 0x0 0x4 0x0>;
  357. cd-inverted;
  358. };
  359.  
  360. mmc@01c10000 {
  361. compatible = "allwinner,sun5i-a13-mmc";
  362. reg = <0x1c10000 0x1000>;
  363. clocks = <0xd 0x9 0x14 0x0 0x14 0x1 0x14 0x2>;
  364. clock-names = "ahb", "mmc", "output", "sample";
  365. resets = <0xe 0x9>;
  366. reset-names = "ahb";
  367. interrupts = <0x0 0x3d 0x4>;
  368. status = "disabled";
  369. };
  370.  
  371. mmc@01c11000 {
  372. compatible = "allwinner,sun5i-a13-mmc";
  373. reg = <0x1c11000 0x1000>;
  374. clocks = <0xd 0xa 0x15 0x0 0x15 0x1 0x15 0x2>;
  375. clock-names = "ahb", "mmc", "output", "sample";
  376. resets = <0xe 0xa>;
  377. reset-names = "ahb";
  378. interrupts = <0x0 0x3e 0x4>;
  379. status = "disabled";
  380. };
  381.  
  382. mmc@01c12000 {
  383. compatible = "allwinner,sun5i-a13-mmc";
  384. reg = <0x1c12000 0x1000>;
  385. clocks = <0xd 0xb 0x16 0x0 0x16 0x1 0x16 0x2>;
  386. clock-names = "ahb", "mmc", "output", "sample";
  387. resets = <0xe 0xb>;
  388. reset-names = "ahb";
  389. interrupts = <0x0 0x3f 0x4>;
  390. status = "disabled";
  391. };
  392.  
  393. phy@01c19400 {
  394. compatible = "allwinner,sun6i-a31-usb-phy";
  395. reg = <0x1c19400 0x10 0x1c1a800 0x4 0x1c1b800 0x4>;
  396. reg-names = "phy_ctrl", "pmu1", "pmu2";
  397. clocks = <0x17 0x8 0x17 0x9 0x17 0xa>;
  398. clock-names = "usb0_phy", "usb1_phy", "usb2_phy";
  399. resets = <0x17 0x0 0x17 0x1 0x17 0x2>;
  400. reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
  401. status = "okay";
  402. #phy-cells = <0x1>;
  403. usb1_vbus-supply = <0x18>;
  404. linux,phandle = <0x19>;
  405. phandle = <0x19>;
  406. };
  407.  
  408. usb@01c1a000 {
  409. compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
  410. reg = <0x1c1a000 0x100>;
  411. interrupts = <0x0 0x48 0x4>;
  412. clocks = <0xd 0x1a>;
  413. resets = <0xe 0x1a>;
  414. phys = <0x19 0x1>;
  415. phy-names = "usb";
  416. status = "okay";
  417. };
  418.  
  419. usb@01c1a400 {
  420. compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
  421. reg = <0x1c1a400 0x100>;
  422. interrupts = <0x0 0x49 0x4>;
  423. clocks = <0xd 0x1d 0x17 0x10>;
  424. resets = <0xe 0x1d>;
  425. phys = <0x19 0x1>;
  426. phy-names = "usb";
  427. status = "okay";
  428. };
  429.  
  430. usb@01c1b000 {
  431. compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
  432. reg = <0x1c1b000 0x100>;
  433. interrupts = <0x0 0x4a 0x4>;
  434. clocks = <0xd 0x1b>;
  435. resets = <0xe 0x1b>;
  436. phys = <0x19 0x2>;
  437. phy-names = "usb";
  438. status = "disabled";
  439. };
  440.  
  441. usb@01c1b400 {
  442. compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
  443. reg = <0x1c1b400 0x100>;
  444. interrupts = <0x0 0x4b 0x4>;
  445. clocks = <0xd 0x1e 0x17 0x11>;
  446. resets = <0xe 0x1e>;
  447. phys = <0x19 0x2>;
  448. phy-names = "usb";
  449. status = "disabled";
  450. };
  451.  
  452. usb@01c1c400 {
  453. compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
  454. reg = <0x1c1c400 0x100>;
  455. interrupts = <0x0 0x4d 0x4>;
  456. clocks = <0xd 0x1f 0x17 0x12>;
  457. resets = <0xe 0x1f>;
  458. status = "disabled";
  459. };
  460.  
  461. pinctrl@01c20800 {
  462. compatible = "allwinner,sun6i-a31-pinctrl";
  463. reg = <0x1c20800 0x400>;
  464. interrupts = <0x0 0xb 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4>;
  465. clocks = <0x1a 0x5>;
  466. gpio-controller;
  467. interrupt-controller;
  468. #interrupt-cells = <0x2>;
  469. #size-cells = <0x0>;
  470. #gpio-cells = <0x3>;
  471. linux,phandle = <0x13>;
  472. phandle = <0x13>;
  473.  
  474. uart0@0 {
  475. allwinner,pins = "PH20", "PH21";
  476. allwinner,function = "uart0";
  477. allwinner,drive = <0x0>;
  478. allwinner,pull = <0x0>;
  479. linux,phandle = <0x1e>;
  480. phandle = <0x1e>;
  481. };
  482.  
  483. i2c0@0 {
  484. allwinner,pins = "PH14", "PH15";
  485. allwinner,function = "i2c0";
  486. allwinner,drive = <0x0>;
  487. allwinner,pull = <0x0>;
  488. linux,phandle = <0x1f>;
  489. phandle = <0x1f>;
  490. };
  491.  
  492. i2c1@0 {
  493. allwinner,pins = "PH16", "PH17";
  494. allwinner,function = "i2c1";
  495. allwinner,drive = <0x0>;
  496. allwinner,pull = <0x0>;
  497. linux,phandle = <0x20>;
  498. phandle = <0x20>;
  499. };
  500.  
  501. i2c2@0 {
  502. allwinner,pins = "PH18", "PH19";
  503. allwinner,function = "i2c2";
  504. allwinner,drive = <0x0>;
  505. allwinner,pull = <0x0>;
  506. linux,phandle = <0x21>;
  507. phandle = <0x21>;
  508. };
  509.  
  510. mmc0@0 {
  511. allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
  512. allwinner,function = "mmc0";
  513. allwinner,drive = <0x2>;
  514. allwinner,pull = <0x1>;
  515. linux,phandle = <0x10>;
  516. phandle = <0x10>;
  517. };
  518.  
  519. gmac_mii@0 {
  520. allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA8", "PA9", "PA11", "PA12", "PA13", "PA14", "PA19", "PA20", "PA21", "PA22", "PA23", "PA24", "PA26", "PA27";
  521. allwinner,function = "gmac";
  522. allwinner,drive = <0x0>;
  523. allwinner,pull = <0x0>;
  524. };
  525.  
  526. gmac_gmii@0 {
  527. allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9", "PA10", "PA11", "PA12", "PA13", "PA14", "PA15", "PA16", "PA17", "PA18", "PA19", "PA20", "PA21", "PA22", "PA23", "PA24", "PA25", "PA26", "PA27";
  528. allwinner,function = "gmac";
  529. allwinner,drive = <0x2>;
  530. allwinner,pull = <0x0>;
  531. };
  532.  
  533. gmac_rgmii@0 {
  534. allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA9", "PA10", "PA11", "PA12", "PA13", "PA14", "PA19", "PA20", "PA25", "PA26", "PA27";
  535. allwinner,function = "gmac";
  536. allwinner,drive = <0x3>;
  537. allwinner,pull = <0x0>;
  538. linux,phandle = <0x23>;
  539. phandle = <0x23>;
  540. };
  541.  
  542. ahci_pwr_pin@0 {
  543. allwinner,pins = "PA15";
  544. allwinner,function = "gpio_out";
  545. allwinner,drive = <0x0>;
  546. allwinner,pull = <0x0>;
  547. linux,phandle = <0x2f>;
  548. phandle = <0x2f>;
  549. };
  550.  
  551. usb0_vbus_pin@0 {
  552. allwinner,pins = "PA16";
  553. allwinner,function = "gpio_out";
  554. allwinner,drive = <0x0>;
  555. allwinner,pull = <0x0>;
  556. linux,phandle = <0x30>;
  557. phandle = <0x30>;
  558. };
  559.  
  560. usb1_vbus_pin@0 {
  561. allwinner,pins = "PA17";
  562. allwinner,function = "gpio_out";
  563. allwinner,drive = <0x0>;
  564. allwinner,pull = <0x0>;
  565. linux,phandle = <0x31>;
  566. phandle = <0x31>;
  567. };
  568.  
  569. usb2_vbus_pin@0 {
  570. allwinner,pins = "PA18";
  571. allwinner,function = "gpio_out";
  572. allwinner,drive = <0x0>;
  573. allwinner,pull = <0x0>;
  574. linux,phandle = <0x32>;
  575. phandle = <0x32>;
  576. };
  577.  
  578. mmc0_cd_pin@0 {
  579. allwinner,pins = "PA4";
  580. allwinner,function = "gpio_in";
  581. allwinner,drive = <0x0>;
  582. allwinner,pull = <0x1>;
  583. linux,phandle = <0x11>;
  584. phandle = <0x11>;
  585. };
  586. };
  587.  
  588. reset@01c202c0 {
  589. #reset-cells = <0x1>;
  590. compatible = "allwinner,sun6i-a31-ahb1-reset";
  591. reg = <0x1c202c0 0xc>;
  592. linux,phandle = <0xe>;
  593. phandle = <0xe>;
  594. };
  595.  
  596. reset@01c202d0 {
  597. #reset-cells = <0x1>;
  598. compatible = "allwinner,sun6i-a31-clock-reset";
  599. reg = <0x1c202d0 0x4>;
  600. };
  601.  
  602. reset@01c202d8 {
  603. #reset-cells = <0x1>;
  604. compatible = "allwinner,sun6i-a31-clock-reset";
  605. reg = <0x1c202d8 0x4>;
  606. linux,phandle = <0x1c>;
  607. phandle = <0x1c>;
  608. };
  609.  
  610. timer@01c20c00 {
  611. compatible = "allwinner,sun4i-a10-timer";
  612. reg = <0x1c20c00 0xa0>;
  613. interrupts = <0x0 0x12 0x4 0x0 0x13 0x4 0x0 0x14 0x4 0x0 0x15 0x4 0x0 0x16 0x4>;
  614. clocks = <0x3>;
  615. };
  616.  
  617. watchdog@01c20ca0 {
  618. compatible = "allwinner,sun6i-a31-wdt";
  619. reg = <0x1c20ca0 0x20>;
  620. };
  621.  
  622. rtp@01c25000 {
  623. compatible = "allwinner,sun6i-a31-ts";
  624. reg = <0x1c25000 0x100>;
  625. interrupts = <0x0 0x1c 0x4>;
  626. #thermal-sensor-cells = <0x0>;
  627. };
  628.  
  629. serial@01c28000 {
  630. compatible = "snps,dw-apb-uart";
  631. reg = <0x1c28000 0x400>;
  632. interrupts = <0x0 0x0 0x4>;
  633. reg-shift = <0x2>;
  634. reg-io-width = <0x4>;
  635. clocks = <0x1b 0x10>;
  636. resets = <0x1c 0x10>;
  637. dmas = <0x1d 0x6 0x1d 0x6>;
  638. dma-names = "rx", "tx";
  639. status = "okay";
  640. pinctrl-names = "default";
  641. pinctrl-0 = <0x1e>;
  642. };
  643.  
  644. serial@01c28400 {
  645. compatible = "snps,dw-apb-uart";
  646. reg = <0x1c28400 0x400>;
  647. interrupts = <0x0 0x1 0x4>;
  648. reg-shift = <0x2>;
  649. reg-io-width = <0x4>;
  650. clocks = <0x1b 0x11>;
  651. resets = <0x1c 0x11>;
  652. dmas = <0x1d 0x7 0x1d 0x7>;
  653. dma-names = "rx", "tx";
  654. status = "disabled";
  655. };
  656.  
  657. serial@01c28800 {
  658. compatible = "snps,dw-apb-uart";
  659. reg = <0x1c28800 0x400>;
  660. interrupts = <0x0 0x2 0x4>;
  661. reg-shift = <0x2>;
  662. reg-io-width = <0x4>;
  663. clocks = <0x1b 0x12>;
  664. resets = <0x1c 0x12>;
  665. dmas = <0x1d 0x8 0x1d 0x8>;
  666. dma-names = "rx", "tx";
  667. status = "disabled";
  668. };
  669.  
  670. serial@01c28c00 {
  671. compatible = "snps,dw-apb-uart";
  672. reg = <0x1c28c00 0x400>;
  673. interrupts = <0x0 0x3 0x4>;
  674. reg-shift = <0x2>;
  675. reg-io-width = <0x4>;
  676. clocks = <0x1b 0x13>;
  677. resets = <0x1c 0x13>;
  678. dmas = <0x1d 0x9 0x1d 0x9>;
  679. dma-names = "rx", "tx";
  680. status = "disabled";
  681. };
  682.  
  683. serial@01c29000 {
  684. compatible = "snps,dw-apb-uart";
  685. reg = <0x1c29000 0x400>;
  686. interrupts = <0x0 0x4 0x4>;
  687. reg-shift = <0x2>;
  688. reg-io-width = <0x4>;
  689. clocks = <0x1b 0x14>;
  690. resets = <0x1c 0x14>;
  691. dmas = <0x1d 0xa 0x1d 0xa>;
  692. dma-names = "rx", "tx";
  693. status = "disabled";
  694. };
  695.  
  696. serial@01c29400 {
  697. compatible = "snps,dw-apb-uart";
  698. reg = <0x1c29400 0x400>;
  699. interrupts = <0x0 0x5 0x4>;
  700. reg-shift = <0x2>;
  701. reg-io-width = <0x4>;
  702. clocks = <0x1b 0x15>;
  703. resets = <0x1c 0x15>;
  704. dmas = <0x1d 0x16 0x1d 0x16>;
  705. dma-names = "rx", "tx";
  706. status = "disabled";
  707. };
  708.  
  709. i2c@01c2ac00 {
  710. compatible = "allwinner,sun6i-a31-i2c";
  711. reg = <0x1c2ac00 0x400>;
  712. interrupts = <0x0 0x6 0x4>;
  713. clocks = <0x1b 0x0>;
  714. resets = <0x1c 0x0>;
  715. status = "failed";
  716. #address-cells = <0x1>;
  717. #size-cells = <0x0>;
  718. pinctrl-names = "default";
  719. pinctrl-0 = <0x1f>;
  720. };
  721.  
  722. i2c@01c2b000 {
  723. compatible = "allwinner,sun6i-a31-i2c";
  724. reg = <0x1c2b000 0x400>;
  725. interrupts = <0x0 0x7 0x4>;
  726. clocks = <0x1b 0x1>;
  727. resets = <0x1c 0x1>;
  728. status = "okay";
  729. #address-cells = <0x1>;
  730. #size-cells = <0x0>;
  731. pinctrl-names = "default";
  732. pinctrl-0 = <0x20>;
  733. };
  734.  
  735. i2c@01c2b400 {
  736. compatible = "allwinner,sun6i-a31-i2c";
  737. reg = <0x1c2b400 0x400>;
  738. interrupts = <0x0 0x8 0x4>;
  739. clocks = <0x1b 0x2>;
  740. resets = <0x1c 0x2>;
  741. status = "okay";
  742. #address-cells = <0x1>;
  743. #size-cells = <0x0>;
  744. pinctrl-names = "default";
  745. pinctrl-0 = <0x21>;
  746.  
  747. rtc@51 {
  748. compatible = "nxp,pcf8563";
  749. reg = <0x51>;
  750. };
  751. };
  752.  
  753. i2c@01c2b800 {
  754. compatible = "allwinner,sun6i-a31-i2c";
  755. reg = <0x1c2b800 0x400>;
  756. interrupts = <0x0 0x9 0x4>;
  757. clocks = <0x1b 0x3>;
  758. resets = <0x1c 0x3>;
  759. status = "disabled";
  760. #address-cells = <0x1>;
  761. #size-cells = <0x0>;
  762. };
  763.  
  764. ethernet@01c30000 {
  765. compatible = "allwinner,sun7i-a20-gmac";
  766. reg = <0x1c30000 0x1054>;
  767. interrupts = <0x0 0x52 0x4>;
  768. interrupt-names = "macirq";
  769. clocks = <0xd 0x11 0x22>;
  770. clock-names = "stmmaceth", "allwinner_gmac_tx";
  771. resets = <0xe 0x11>;
  772. reset-names = "stmmaceth";
  773. snps,pbl = <0x2>;
  774. snps,fixed-burst;
  775. snps,force_sf_dma_mode;
  776. status = "okay";
  777. #address-cells = <0x1>;
  778. #size-cells = <0x0>;
  779. pinctrl-names = "default";
  780. pinctrl-0 = <0x23>;
  781. phy = <0x24>;
  782. phy-mode = "rgmii";
  783. snps,reset-gpio = <0x13 0x0 0x15 0x0>;
  784. snps,reset-active-low;
  785. snps,reset-delays-us = <0x0 0x2710 0x7530>;
  786.  
  787. ethernet-phy@1 {
  788. reg = <0x1>;
  789. linux,phandle = <0x24>;
  790. phandle = <0x24>;
  791. };
  792. };
  793.  
  794. timer@01c60000 {
  795. compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer";
  796. reg = <0x1c60000 0x1000>;
  797. interrupts = <0x0 0x33 0x4 0x0 0x34 0x4 0x0 0x35 0x4 0x0 0x36 0x4>;
  798. clocks = <0xd 0x13>;
  799. resets = <0xe 0x13>;
  800. };
  801.  
  802. spi@01c68000 {
  803. compatible = "allwinner,sun6i-a31-spi";
  804. reg = <0x1c68000 0x1000>;
  805. interrupts = <0x0 0x41 0x4>;
  806. clocks = <0xd 0x14 0x25>;
  807. clock-names = "ahb", "mod";
  808. dmas = <0x1d 0x17 0x1d 0x17>;
  809. dma-names = "rx", "tx";
  810. resets = <0xe 0x14>;
  811. status = "disabled";
  812. };
  813.  
  814. spi@01c69000 {
  815. compatible = "allwinner,sun6i-a31-spi";
  816. reg = <0x1c69000 0x1000>;
  817. interrupts = <0x0 0x42 0x4>;
  818. clocks = <0xd 0x15 0x26>;
  819. clock-names = "ahb", "mod";
  820. dmas = <0x1d 0x18 0x1d 0x18>;
  821. dma-names = "rx", "tx";
  822. resets = <0xe 0x15>;
  823. status = "disabled";
  824. };
  825.  
  826. spi@01c6a000 {
  827. compatible = "allwinner,sun6i-a31-spi";
  828. reg = <0x1c6a000 0x1000>;
  829. interrupts = <0x0 0x43 0x4>;
  830. clocks = <0xd 0x16 0x27>;
  831. clock-names = "ahb", "mod";
  832. dmas = <0x1d 0x19 0x1d 0x19>;
  833. dma-names = "rx", "tx";
  834. resets = <0xe 0x16>;
  835. status = "disabled";
  836. };
  837.  
  838. spi@01c6b000 {
  839. compatible = "allwinner,sun6i-a31-spi";
  840. reg = <0x1c6b000 0x1000>;
  841. interrupts = <0x0 0x44 0x4>;
  842. clocks = <0xd 0x17 0x28>;
  843. clock-names = "ahb", "mod";
  844. dmas = <0x1d 0x1a 0x1d 0x1a>;
  845. dma-names = "rx", "tx";
  846. resets = <0xe 0x17>;
  847. status = "disabled";
  848. };
  849.  
  850. interrupt-controller@01c81000 {
  851. compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
  852. reg = <0x1c81000 0x1000 0x1c82000 0x1000 0x1c84000 0x2000 0x1c86000 0x2000>;
  853. interrupt-controller;
  854. #interrupt-cells = <0x3>;
  855. interrupts = <0x1 0x9 0xf04>;
  856. linux,phandle = <0x1>;
  857. phandle = <0x1>;
  858. };
  859.  
  860. rtc@01f00000 {
  861. compatible = "allwinner,sun6i-a31-rtc";
  862. reg = <0x1f00000 0x54>;
  863. interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
  864. };
  865.  
  866. interrupt-controller@01f00c0c {
  867. compatible = "allwinner,sun6i-a31-sc-nmi";
  868. interrupt-controller;
  869. #interrupt-cells = <0x2>;
  870. reg = <0x1f00c0c 0x38>;
  871. interrupts = <0x0 0x20 0x4>;
  872. };
  873.  
  874. prcm@01f01400 {
  875. compatible = "allwinner,sun6i-a31-prcm";
  876. reg = <0x1f01400 0x200>;
  877.  
  878. ar100_clk {
  879. compatible = "allwinner,sun6i-a31-ar100-clk";
  880. #clock-cells = <0x0>;
  881. clocks = <0x4 0x3 0x2 0x0 0x2 0x0>;
  882. clock-output-names = "ar100";
  883. linux,phandle = <0x29>;
  884. phandle = <0x29>;
  885. };
  886.  
  887. ahb0_clk {
  888. compatible = "fixed-factor-clock";
  889. #clock-cells = <0x0>;
  890. clock-div = <0x1>;
  891. clock-mult = <0x1>;
  892. clocks = <0x29>;
  893. clock-output-names = "ahb0";
  894. linux,phandle = <0x2a>;
  895. phandle = <0x2a>;
  896. };
  897.  
  898. apb0_clk {
  899. compatible = "allwinner,sun6i-a31-apb0-clk";
  900. #clock-cells = <0x0>;
  901. clocks = <0x2a>;
  902. clock-output-names = "apb0";
  903. linux,phandle = <0x2b>;
  904. phandle = <0x2b>;
  905. };
  906.  
  907. apb0_gates_clk {
  908. compatible = "allwinner,sun6i-a31-apb0-gates-clk";
  909. #clock-cells = <0x1>;
  910. clocks = <0x2b>;
  911. clock-output-names = "apb0_pio", "apb0_ir", "apb0_timer", "apb0_p2wi", "apb0_uart", "apb0_1wire", "apb0_i2c";
  912. linux,phandle = <0x2c>;
  913. phandle = <0x2c>;
  914. };
  915.  
  916. ir_clk {
  917. #clock-cells = <0x0>;
  918. compatible = "allwinner,sun4i-a10-mod0-clk";
  919. clocks = <0x4 0x3>;
  920. clock-output-names = "ir";
  921. linux,phandle = <0x2d>;
  922. phandle = <0x2d>;
  923. };
  924.  
  925. apb0_rst {
  926. compatible = "allwinner,sun6i-a31-clock-reset";
  927. #reset-cells = <0x1>;
  928. linux,phandle = <0x2e>;
  929. phandle = <0x2e>;
  930. };
  931. };
  932.  
  933. cpucfg@01f01c00 {
  934. compatible = "allwinner,sun6i-a31-cpuconfig";
  935. reg = <0x1f01c00 0x300>;
  936. };
  937.  
  938. ir@01f02000 {
  939. compatible = "allwinner,sun5i-a13-ir";
  940. clocks = <0x2c 0x1 0x2d>;
  941. clock-names = "apb", "ir";
  942. resets = <0x2e 0x1>;
  943. interrupts = <0x0 0x25 0x4>;
  944. reg = <0x1f02000 0x40>;
  945. status = "disabled";
  946. };
  947.  
  948. pinctrl@01f02c00 {
  949. compatible = "allwinner,sun6i-a31-r-pinctrl";
  950. reg = <0x1f02c00 0x400>;
  951. interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4>;
  952. clocks = <0x2c 0x0>;
  953. resets = <0x2e 0x0>;
  954. gpio-controller;
  955. interrupt-controller;
  956. #interrupt-cells = <0x2>;
  957. #size-cells = <0x0>;
  958. #gpio-cells = <0x3>;
  959.  
  960. ir@0 {
  961. allwinner,pins = "PL4";
  962. allwinner,function = "s_ir";
  963. allwinner,drive = <0x0>;
  964. allwinner,pull = <0x0>;
  965. };
  966. };
  967. };
  968.  
  969. ahci-5v {
  970. compatible = "regulator-fixed";
  971. pinctrl-names = "default";
  972. pinctrl-0 = <0x2f>;
  973. regulator-name = "ahci-5v";
  974. regulator-min-microvolt = <0x4c4b40>;
  975. regulator-max-microvolt = <0x4c4b40>;
  976. regulator-boot-on;
  977. enable-active-high;
  978. gpio = <0x13 0x0 0xf 0x0>;
  979. status = "disabled";
  980. };
  981.  
  982. usb0-vbus {
  983. compatible = "regulator-fixed";
  984. pinctrl-names = "default";
  985. pinctrl-0 = <0x30>;
  986. regulator-name = "usb0-vbus";
  987. regulator-min-microvolt = <0x4c4b40>;
  988. regulator-max-microvolt = <0x4c4b40>;
  989. enable-active-high;
  990. gpio = <0x13 0x0 0x10 0x0>;
  991. status = "disabled";
  992. };
  993.  
  994. usb1-vbus {
  995. compatible = "regulator-fixed";
  996. pinctrl-names = "default";
  997. pinctrl-0 = <0x31>;
  998. regulator-name = "usb1-vbus";
  999. regulator-min-microvolt = <0x4c4b40>;
  1000. regulator-max-microvolt = <0x4c4b40>;
  1001. enable-active-high;
  1002. gpio = <0x13 0x0 0x11 0x0>;
  1003. status = "okay";
  1004. linux,phandle = <0x18>;
  1005. phandle = <0x18>;
  1006. };
  1007.  
  1008. usb2-vbus {
  1009. compatible = "regulator-fixed";
  1010. pinctrl-names = "default";
  1011. pinctrl-0 = <0x32>;
  1012. regulator-name = "usb2-vbus";
  1013. regulator-min-microvolt = <0x4c4b40>;
  1014. regulator-max-microvolt = <0x4c4b40>;
  1015. enable-active-high;
  1016. gpio = <0x13 0x0 0x12 0x0>;
  1017. status = "disabled";
  1018. };
  1019.  
  1020. vcc3v0 {
  1021. compatible = "regulator-fixed";
  1022. regulator-name = "vcc3v0";
  1023. regulator-min-microvolt = <0x2dc6c0>;
  1024. regulator-max-microvolt = <0x2dc6c0>;
  1025. linux,phandle = <0x12>;
  1026. phandle = <0x12>;
  1027. };
  1028.  
  1029. vcc3v3 {
  1030. compatible = "regulator-fixed";
  1031. regulator-name = "vcc3v3";
  1032. regulator-min-microvolt = <0x325aa0>;
  1033. regulator-max-microvolt = <0x325aa0>;
  1034. };
  1035.  
  1036. vcc5v0 {
  1037. compatible = "regulator-fixed";
  1038. regulator-name = "vcc5v0";
  1039. regulator-min-microvolt = <0x4c4b40>;
  1040. regulator-max-microvolt = <0x4c4b40>;
  1041. };
  1042. };
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