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Oct 19th, 2017
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  1. #define F_CPU 8000000UL
  2.  
  3. #include <avr/io.h>
  4. #include <util/delay.h>
  5.  
  6. #define SCK 3
  7. #define MOSI 1
  8. #define CSN 2
  9.  
  10. uint8_t data = 0;
  11. uint8_t reg = 0;
  12.  
  13.  
  14. int main(void)
  15. {
  16. PRR = 0; // turn off power reduction
  17. REMAP |= (1<<SPIMAP); // remap SPI pins
  18. // set SCK, MOSI, CSN as outputs:
  19. DDRA = (1<<SCK) | (1<<MOSI) | (1<<CSN);
  20. // enable SPI, set as master, use f_clkIO/16 (500kHz):
  21. SPCR = (1<<SPE) | (1<<MSTR) | (1<<SPR0);
  22. reg = SPSR;
  23. reg = SPDR;
  24.  
  25. while(1)
  26. {
  27. PORTA &= ~(1 << CSN); // clear CSN
  28. SPDR = data++; // send byte
  29. while( !(SPSR & (1<<SPIF)) ); // wait for flag to set
  30. PORTA |= (1 << CSN); // set CSN
  31. _delay_ms(10);
  32. }
  33.  
  34. return 0;
  35. }
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