Vhdl vector boundry check
type dmemSpace is array(0 to 1023) of std_logic_vector(31 downto 0);
signal dataMem : dmemSpace := (
  400 => X"00000000",
  404 => X"00001000",
  408 => X"FFFFEFFF",
  others => X"00000000"
);

signal dAddr : std_logic_vector(31 downto 0);
signal check : integer;


dAddr(31 downto 0) <= Addr(31 downto 2) & "00";
check <= to_integer(unsigned(dAddr));
DataOut <= dataMem(to_integer(unsigned(dAddr))) when (check > 0);

DataOut <= dataMem(to_integer(unsigned(dAddr))) when (check > 0);