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  1. /*
  2. * Amlogic Ltd. GXBaby Plaform
  3. *
  4. */
  5.  
  6. /dts-v1/;
  7.  
  8. #include <dt-bindings/interrupt-controller/arm-gic.h>
  9. #include <dt-bindings/clock/gxbb.h>
  10. #include <dt-bindings/gpio/gxbb.h>
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include <dt-bindings/reset/aml_gxbb.h>
  13. #include "mesongxbb.dtsi"
  14. / {
  15. model = "Amlogic";
  16. amlogic-dt-id = "gxb_p200_2g";
  17. compatible = "amlogic, Gxbb";
  18. interrupt-parent = <&gic>;
  19. #address-cells = <2>;
  20. #size-cells = <2>;
  21.  
  22. aliases {
  23. serial0 = &uart_AO;
  24. serial1 = &uart_A;
  25. };
  26.  
  27. gpu_dvfs_tbl:gpu_dvfs_tbl {
  28. sc_mpp = <3>;/* number of pp used most of time.*/
  29. tbl = <&clk285_cfg &clk400_cfg &clk500_cfg &clk666_cfg &clk800_cfg>;
  30. };
  31.  
  32. memory@00000000 {
  33. device_type = "memory";
  34. linux,usable-memory = <0x0 0x1000000 0x0 0x7f000000>;
  35. };
  36.  
  37. reserved-memory {
  38. #address-cells = <2>;
  39. #size-cells = <2>;
  40. ranges;
  41. /* global autoconfigured region for contiguous allocations */
  42. secmon_reserved:linux,secmon {
  43. compatible = "amlogic, aml_secmon_memory";
  44. reg = <0x0 0x10000000 0x0 0x200000>;
  45. no-map;
  46. };
  47. secos_reserved:linux,secos {
  48. status = "disable";
  49. compatible = "amlogic, aml_secos_memory";
  50. reg = <0x0 0x05300000 0x0 0x2000000>;
  51. no-map;
  52. };
  53. pstore:aml_pstore {
  54. compatible = "amlogic, pstore";
  55. reg = <0x0 0x07300000 0x0 0x100000>;
  56. no-map;
  57. };
  58. fb_reserved:linux,meson-fb {
  59. compatible = "amlogic, fb-memory";
  60. size = <0x0 0x1900000>;
  61. no-map;
  62. };
  63.  
  64. di_reserved:linux,di {
  65. compatible = "amlogic, di-mem";
  66. size = <0x0 0x1e00000>; //10x1920x1088x3/2=30M
  67. //no-map;
  68. multi-use;
  69. };
  70.  
  71. ion_reserved:linux,ion-dev {
  72. compatible = "amlogic, idev-mem";
  73. size = <0x0 0x2000000>;
  74. multi-use;
  75. };
  76.  
  77. /* vdin0 */
  78. // vdin0_reserved:linux,vdin0 {
  79. // compatible = "amlogic, vdin_memory";
  80. /* 1920x1080x2x4 =17M */
  81. // size = <0x0 0x01000000>;
  82. // };
  83. /* vdin1 */
  84. // vdin1_reserved:linux,vdin1 {
  85. // compatible = "amlogic, vdin_memory";
  86. /* 1920x1080x2x4 =17M */
  87. // size = <0x0 0x01000000>;
  88. // };
  89. /* POST PROCESS MANAGER */
  90. //ppmgr_reserved:linux,ppmgr {
  91. // compatible = "amlogic, ppmgr_memory";
  92. // size = <0x0 0x2000000>;
  93. //};
  94.  
  95. codec_mm_cma:linux,codec_mm_cma {
  96. compatible = "shared-dma-pool";
  97. reusable;
  98. size = <0x0 0xc000000>;
  99. alignment = <0x0 0x400000>;
  100. linux,contiguous-region;
  101. };
  102. picdec_cma_reserved:linux,picdec {
  103. compatible = "shared-dma-pool";
  104. reusable;
  105. size = <0x0 0x0>;
  106. status = "disabled";
  107. alignment = <0x0 0x400000>;
  108. linux,contiguous-region;
  109. };
  110. /*vm0_cma_reserved:linux,vm0_cma {
  111. compatible = "shared-dma-pool";
  112. reusable;
  113. size = <0x0 0x2000000>;
  114. alignment = <0x0 0x400000>;
  115. };
  116. vm1_cma_reserved:linux,vm1_cma {
  117. compatible = "shared-dma-pool";
  118. reusable;
  119. size = <0x0 0x2000000>;
  120. alignment = <0x0 0x400000>;
  121. };*/
  122. /* codec shared reserved */
  123. codec_mm_reserved:linux,codec_mm_reserved {
  124. compatible = "amlogic, codec-mm-reserved";
  125. size = <0x0 0x4100000>;
  126. alignment = <0x0 0x100000>;
  127. //no-map;
  128. };
  129. };
  130.  
  131. meson-vout {
  132. compatible = "amlogic, meson-vout";
  133. dev_name = "meson-vout";
  134. status = "okay";
  135. };
  136. meson-fb {
  137. compatible = "amlogic, meson-fb";
  138. memory-region = <&fb_reserved>;
  139. dev_name = "meson-fb";
  140. status = "okay";
  141. interrupts = <0 3 1
  142. 0 89 1>;
  143. interrupt-names = "viu-vsync", "rdma";
  144. mem_size = <0x01800000 0x00100000>; /* fb0/fb1 memory size */
  145. display_mode_default = "1080p60hz";
  146. scale_mode = <1>; /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
  147. display_size_default = <1920 1080 1920 3240 32>; //1920*1080*4*3 = 0x17BB000
  148. };
  149. ge2d {
  150. compatible = "amlogic, ge2d";
  151. dev_name = "ge2d";
  152. status = "okay";
  153. interrupts = <0 150 1>;
  154. interrupt-names = "ge2d";
  155. clocks = <&clock CLK_VAPB_0>,
  156. <&clock CLK_GE2D>;
  157. clock-names = "clk_vapb_0",
  158. "clk_ge2d";
  159. resets = <&clock GCLK_IDX_GE2D>;
  160. reset-names = "ge2d";
  161. };
  162. codec_io {
  163. compatible = "amlogic, codec_io";
  164. #address-cells=<2>;
  165. #size-cells=<2>;
  166. ranges;
  167. io_cbus_base{
  168. reg = <0x0 0xC1100000 0x0 0x100000>;
  169. };
  170. io_dos_base{
  171. reg = <0x0 0xc8820000 0x0 0x10000>;
  172. };
  173. io_hiubus_base{
  174. reg = <0x0 0xc883c000 0x0 0x2000>;
  175. };
  176. io_aobus_base{
  177. reg = <0x0 0xc8100000 0x0 0x100000>;
  178. };
  179. io_vcbus_base{
  180. reg = <0x0 0xd0100000 0x0 0x40000>;
  181. };
  182. io_dmc_base{
  183. reg = <0x0 0xc8838000 0x0 0x400>;
  184. };
  185. };
  186. codec_mm {
  187. compatible = "amlogic, codec, mm";
  188. memory-region = <&codec_mm_cma &codec_mm_reserved>;
  189. dev_name = "codec_mm";
  190. status = "okay";
  191. };
  192. ethmac: ethernet@0xc9410000{
  193. compatible = "amlogic, gxbb-rgmii-dwmac";
  194. reg = <0x0 0xc9410000 0x0 0x10000
  195. 0x0 0xc8834540 0x0 0x8>;
  196. interrupts = <0 8 1>;
  197. phy-mode= "rgmii";
  198. pinctrl-names = "eth_pins";
  199. pinctrl-0 = <&eth_pins>;
  200. rst_pin-gpios = <&gpio GPIOZ_14 0>;
  201. mc_val = <0x1621>;
  202. resets = <&clock GCLK_IDX_ETHERNET>;
  203. reset-names = "ethpower";
  204. interrupt-names = "macirq";
  205. clocks = <&clock CLK_81>;
  206. clock-names = "ethclk81";
  207. };
  208.  
  209. mesonstream {
  210. compatible = "amlogic, codec, streambuf";
  211. dev_name = "mesonstream";
  212. status = "okay";
  213. resets = <&clock GCLK_IDX_HIU_PARSER_TOP
  214. &clock GCLK_IDX_VPU_INTR
  215. &clock GCLK_IDX_DEMUX
  216. &clock GCLK_IDX_DOS>;
  217. reset-names = "parser_top",
  218. "vpu_intr",
  219. "demux",
  220. "vdec";
  221. };
  222.  
  223. amvideocap {
  224. compatible = "amlogic, amvideocap";
  225. dev_name = "amvideocap.0";
  226. status = "okay";
  227. max_size = <8>;//8M
  228. };
  229.  
  230. ion_dev {
  231. compatible = "amlogic, ion_dev";
  232. memory-region = <&ion_reserved>;
  233. };
  234.  
  235. vdec {
  236. compatible = "amlogic, vdec";
  237. dev_name = "vdec.0";
  238. status = "okay";
  239. interrupts = <0 3 1
  240. 0 23 1
  241. 0 32 1
  242. 0 43 1
  243. 0 44 1
  244. 0 45 1>;
  245. interrupt-names = "vsync",
  246. "demux",
  247. "parser",
  248. "mailbox_0",
  249. "mailbox_1",
  250. "mailbox_2";
  251. };
  252. picdec {
  253. compatible = "amlogic, picdec";
  254. memory-region = <&picdec_cma_reserved>;
  255. dev_name = "picdec";
  256. status = "okay";
  257. };
  258. ppmgr {
  259. compatible = "amlogic, ppmgr";//to match of_device_id's compatible member
  260. memory-region = <&ion_reserved>;
  261. dev_name = "ppmgr";
  262. status = "okay";
  263. };
  264. deinterlace {
  265. compatible = "amlogic, deinterlace";
  266. status = "okay";
  267. memory-region = <&di_reserved>;
  268. interrupts = <0 46 1
  269. 0 6 1>;
  270. interrupt-names = "de_irq",
  271. "timerc";
  272. buffer-size = <3133440>; //1920x1088x3/2
  273. hw-version = <2>;
  274. };
  275. /* vdin0 {
  276. compatible = "amlogic, vdin";
  277. memory-region = <&vdin0_reserved>;
  278. dev_name = "vdin0";
  279. status = "ok";
  280. reserve-iomap = "true";
  281. interrupts = <0 83 1>;
  282. rdma-irq = <2>;
  283. clocks = <&clock CLK_XTAL>,
  284. <&clock CLK_VID_LOCK_CLK>;
  285. clock-names = "xtal", "cts_vid_lock_clk";
  286. vdin_id = <0>;
  287. };
  288. vdin1 {
  289. compatible = "amlogic, vdin";
  290. memory-region = <&vdin1_reserved>;
  291. dev_name = "vdin1";
  292. status = "ok";
  293. reserve-iomap = "true";
  294. interrupts = <0 85 1>;
  295. rdma-irq = <4>;
  296. clocks = <&clock CLK_XTAL>,
  297. <&clock CLK_VID_LOCK_CLK>;
  298. clock-names = "xtal", "cts_vid_lock_clk";
  299. vdin_id = <1>;
  300. };*/
  301.  
  302. amvdec_656in0 {
  303. compatible = "amlogic, amvdec_656in";
  304. dev_name = "amvdec_656in0";
  305. status = "ok";
  306. reg = <0x0 0xd0048000 0x0 0x7c>;
  307. clocks = <&clock CLK_FPLL_DIV2>,
  308. <&clock CLK_BT656_CLK0>;
  309. clock-names = "fclk_div2", "cts_bt656_clk0";
  310. bt656_id = <0>;
  311. };
  312. amvdec_656in1 {
  313. compatible = "amlogic, amvdec_656in";
  314. dev_name = "amvdec_656in1";
  315. status = "ok";
  316. reg = <0x0 0xd0050000 0x0 0x7c>;
  317. clocks = <&clock CLK_FPLL_DIV2>,
  318. <&clock CLK_BT656_CLK1>;
  319. clock-names = "fclk_div2", "cts_bt656_clk1";
  320. bt656_id = <1>;
  321. };
  322.  
  323. amvenc_avc{
  324. compatible = "amlogic, amvenc_avc";
  325. //memory-region = <&amvenc_avc_reserved>;
  326. dev_name = "amvenc_avc";
  327. status = "okay";
  328. interrupts = <0 45 1>;
  329. interrupt-names = "mailbox_2";
  330. };
  331.  
  332. /*vm0 {
  333. compatible = "amlogic, vm";
  334. memory-region = <&vm0_cma_reserved>;
  335. dev_name = "vm0";
  336. status = "okay";
  337. vm_id = <0>;
  338. };
  339.  
  340. vm1 {
  341. compatible = "amlogic, vm";
  342. memory-region = <&vm1_cma_reserved>;
  343. dev_name = "vm1";
  344. status = "okay";
  345. vm_id = <1>;
  346. };*/
  347.  
  348. vpu {
  349. compatible = "amlogic, vpu";
  350. dev_name = "vpu";
  351. status = "ok";
  352. clk_level = <7>;
  353. /** 0: 100.0M 1: 166.7M 2: 200.0M
  354. 3: 250.0M 4: 333.3M 5: 400.0M
  355. 6: 500.0M 7: 666.7M */
  356. };
  357. bt-dev{
  358. compatible = "amlogic, bt-dev";
  359. dev_name = "bt-dev";
  360. status = "ok";
  361. gpio_reset = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
  362. };
  363.  
  364. rtc{
  365. compatible = "amlogic, aml_vrtc";
  366. alarm_reg_addr = <0xc81000a8>;
  367. timer_e_addr = <0xc1109988>;
  368. init_date = "2015/01/01";
  369. status = "okay";
  370. };
  371.  
  372. wifi{
  373. compatible = "amlogic, aml_wifi";
  374. dev_name = "aml_wifi";
  375. status = "okay";
  376. interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
  377. interrupts = < 0 68 4>;
  378. irq_trigger_type = "GPIO_IRQ_LOW";
  379. power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
  380. dhd_static_buf;
  381. pinctrl-names = "wifi_32k_pins";
  382. pinctrl-0 = <&wifi_32k_pins>;
  383. };
  384. emmc{
  385. compatible = "amlogic, aml_sd_emmc";
  386. dev_name = "aml_newsd.0";
  387. status = "okay";
  388. reg = <0x0 0xd0074000 0x0 0x2000>;
  389. interrupts = < 0 218 1>;
  390. pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
  391. pinctrl-0 = <&emmc_clk_cmd_pins>;
  392. pinctrl-1 = <&emmc_all_pins>;
  393. emmc{
  394. status = "okay";
  395. pinname = "emmc";
  396. ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
  397. caps = "MMC_CAP_8_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
  398. "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE","MMC_CAP_1_8V_DDR",
  399. "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23";
  400. caps2 = "MMC_CAP2_HS200";
  401. f_min = <300000>;
  402. f_max = <200000000>;
  403. tx_phase = <0>;
  404. max_req_size = <0x20000>; /**256KB*/
  405. // gpio_dat3 = "BOOT_3"
  406. gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
  407. hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
  408. card_type = <1>; /* 1:mmc card(include eMMC), 2:sd card(include tSD), */
  409. };
  410. };
  411. sd{
  412. compatible = "amlogic, aml_sd_emmc";
  413. dev_name = "aml_newsd.0";
  414. status = "okay";
  415. reg = <0x0 0xd0072000 0x0 0x2000>;
  416. interrupts = < 0 217 1
  417. 0 67 1
  418. 0 69 1>;
  419. pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins", "sd_1bit_pins","sd_clk_cmd_uart_pins","sd_1bit_uart_pins", "sd_to_ao_uart_pins", "ao_to_sd_uart_pins","ao_to_sd_jtag_pins","sd_to_ao_jtag_pins";
  420. pinctrl-0 = <&sd_clk_cmd_pins>;
  421. pinctrl-1 = <&sd_all_pins>;
  422. pinctrl-2 = <&sd_1bit_pins>;
  423. pinctrl-3 = <&sd_clk_cmd_uart_pins>;
  424. pinctrl-4 = <&sd_1bit_uart_pins>;
  425. pinctrl-5 = <&sd_to_ao_uart_pins>;
  426. pinctrl-6 = <&ao_to_sd_uart_pins>;
  427. pinctrl-7 = <&ao_to_sd_jtag_pins>;
  428. pinctrl-8 = <&sd_to_ao_jtag_pins>;
  429.  
  430. sd{
  431. status = "okay";
  432. port = <1>; /**0:sdio_a, 1:sdio_b, 2:sdio_c, 3:sdhc_a, 4:sdhc_b, 5:sdhc_c */
  433. pinname = "sd";
  434. ocr_avail = <0x00200080>; // 3.3:0x200000, 1.8+3.3:0x00200080
  435. caps = "MMC_CAP_4_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
  436. "MMC_CAP_SD_HIGHSPEED";
  437. //"MMC_CAP_UHS_SDR12",
  438. //"MMC_CAP_UHS_SDR25","MMC_CAP_UHS_SDR50",
  439. //"MMC_CAP_UHS_SDR104";
  440. f_min = <400000>;
  441. f_max = <100000000>;
  442. max_req_size = <0x20000>; /**128KB*/
  443. gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
  444. jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
  445. gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
  446. irq_in = <3>;
  447. irq_out = <5>;
  448. card_type = <5>; /* 0:unknown, 1:mmc card(include eMMC), 2:sd card(include tSD), 3:sdio device(ie:sdio-wifi), 4:SD combo (IO+mem) card, 5:NON sdio device(means sd/mmc card), other:reserved */
  449. };
  450. };
  451. sdio{
  452. compatible = "amlogic, aml_sd_emmc";
  453. dev_name = "aml_newsd.0";
  454. status = "okay";
  455. reg = <0x0 0xd0070000 0x0 0x2000>;
  456. interrupts = < 0 216 1>;
  457. pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
  458. pinctrl-0 = <&sdio_clk_cmd_pins>;
  459. pinctrl-1 = <&sdio_all_pins>;
  460. sdio{
  461. status = "okay";
  462. pinname = "sdio";
  463. ocr_avail = <0x00200080>; /*3.3:0x200000, 1.8+3.3:0x00200080 */
  464. caps = "MMC_CAP_4_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
  465. "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE",
  466. "MMC_CAP_UHS_SDR12","MMC_CAP_UHS_SDR25",
  467. "MMC_CAP_UHS_SDR50","MMC_CAP_UHS_SDR104",
  468. "MMC_PM_KEEP_POWER","MMC_CAP_SDIO_IRQ";
  469. f_min = <400000>;
  470. f_max = <200000000>;
  471. max_req_size = <0x20000>; /**128KB*/
  472. card_type = <3>; /*3:sdio device(ie:sdio-wifi), 4:SD combo (IO+mem) card, */
  473. };
  474. };
  475. nand{
  476. compatible = "amlogic, aml_nand";
  477. dev_name = "nand";
  478. status = "ok";
  479. reg = <0x0 0xd0074800 0x0 0x200>;
  480. interrupts = < 0 34 1 >;
  481. pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_pins_only";
  482. pinctrl-0 = <&conf_nand_pulldown &conf_nand_pullup &all_nand_pins>;
  483. pinctrl-1 = <&conf_nand_pulldown &conf_nand_pullup &all_nand_pins>;
  484. pinctrl-2 = <&nand_cs_pins>;
  485. device_id = <0>;
  486. plat-names = "nandnormal";
  487. plat-num = <1>;
  488. plat-part-0 = <&normal>;
  489. normal: normal{
  490. enable_pad ="ce0","ce1","ce2","ce3";
  491. busy_pad = "rb0";
  492. };
  493. };
  494. aml_nftl{
  495. compatible = "amlogic, nftl";
  496. /* config nftl here */
  497.  
  498. };
  499. /*aml_cams{
  500. compatible = "amlogic, cams_prober";
  501. status = "okay";
  502. clocks = <&clock CLK_CAMERA_24M>;
  503. clock-names = "clk_camera_24";
  504. pinctrl-names = "cam_gpio_a", "cam_gpio_b","cam_all";
  505. pinctrl-0 = <&cam_gpio_a> ;
  506. pinctrl-1 = <&cam_gpio_b> ;
  507. pinctrl-2 = <&cam_gpio_a &cam_gpio_b> ;
  508. cam_0{
  509. cam_name = "sp2518";
  510. front_back = <0>;
  511. i2c_bus = "i2c_bus_a";
  512. gpio_pwdn-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_HIGH>;
  513. gpio_rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>;
  514. mirror_flip = <1>;
  515. vertical_flip = <1>;
  516. spread_spectrum = <0>; //0:none; 1:0.3%; 2:0.6%; 3:1.25%; 4:2.5%; 5:5%
  517. bt_path = "gpio";
  518. bt_path_count = <2>;
  519. vdin_path = <0>;
  520. status = "okay";
  521. };
  522. cam_1{
  523. cam_name = "sp0838";
  524. front_back = <1>;
  525. i2c_bus = "i2c_bus_a";
  526. gpio_pwdn-gpios = <&gpio GPIOZ_13 GPIO_ACTIVE_HIGH>;
  527. gpio_rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>;
  528. mirror_flip = <1>;
  529. vertical_flip = <1>;
  530. spread_spectrum = <0>; //0:none; 1:0.3%; 2:0.6%; 3:1.25%; 4:2.5%; 5:5%
  531. bt_path = "gpio_b";
  532. bt_path_count = <2>;
  533. vdin_path = <1>;
  534. status = "okay";
  535. };
  536. };*/
  537. partitions: partitions{
  538. parts = <11>;
  539. part-0 = <&logo>;
  540. part-1 = <&recovery>;
  541. part-2 = <&rsv>;
  542. part-3 = <&tee>;
  543. part-4 = <&crypt>;
  544. part-5 = <&misc>;
  545. part-6 = <&instaboot>;
  546. part-7 = <&boot>;
  547. part-8 = <&system>;
  548. part-9 = <&cache>;
  549. part-10 = <&data>;
  550. logo:logo{
  551. pname = "logo";
  552. size = <0x0 0x2000000>;
  553. mask = <1>;
  554. };
  555. recovery:recovery{
  556. pname = "recovery";
  557. size = <0x0 0x2000000>;
  558. mask = <1>;
  559. };
  560. rsv:rsv{
  561. pname = "rsv";
  562. size = <0x0 0x800000>;
  563. mask = <1>;
  564. };
  565. tee:tee{
  566. pname = "tee";
  567. size = <0x0 0x800000>;
  568. mask = <1>;
  569. };
  570. crypt:crypt{
  571. pname = "crypt";
  572. size = <0x0 0x2000000>;
  573. mask = <1>;
  574. };
  575. misc:misc{
  576. pname = "misc";
  577. size = <0x0 0x2000000>;
  578. mask = <1>;
  579. };
  580. instaboot:instaboot{
  581. pname = "instaboot";
  582. size = <0x0 0x20000000>;
  583. mask = <1>;
  584. };
  585. boot:boot
  586. {
  587. pname = "boot";
  588. size = <0x0 0x2000000>;
  589. mask = <1>;
  590. };
  591. system:system
  592. {
  593. pname = "system";
  594. size = <0x0 0x40000000>;
  595. mask = <1>;
  596. };
  597. cache:cache
  598. {
  599. pname = "cache";
  600. size = <0x0 0x20000000>;
  601. mask = <2>;
  602. };
  603. data:data
  604. {
  605. pname = "data";
  606. size = <0xffffffff 0xffffffff>;
  607. mask = <4>;
  608. };
  609. };
  610. unifykey{
  611. compatible = "amlogic, unifykey";
  612. status = "ok";
  613.  
  614. unifykey-num = <11>;
  615. unifykey-index-0 = <&keysn_0>;
  616. unifykey-index-1 = <&keysn_1>;
  617. unifykey-index-2 = <&keysn_2>;
  618. unifykey-index-3 = <&keysn_3>;
  619. unifykey-index-4 = <&keysn_4>;
  620. unifykey-index-5 = <&keysn_5>;
  621. unifykey-index-6 = <&keysn_6>;
  622. unifykey-index-7 = <&keysn_7>;
  623. unifykey-index-8 = <&keysn_8>;
  624. unifykey-index-9 = <&keysn_9>;
  625. unifykey-index-10= <&keysn_10>;
  626.  
  627. keysn_0: key_0{
  628. key-name = "usid";
  629. key-device = "normal";
  630. key-permit = "read","write","del";
  631. };
  632. keysn_1:key_1{
  633. key-name = "mac";
  634. key-device = "normal";
  635. key-permit = "read","write","del";
  636. };
  637. keysn_2:key_2{
  638. key-name = "hdcp";
  639. key-device = "secure";
  640. key-type = "sha1";
  641. key-permit = "read","write","del";
  642. };
  643. keysn_3:key_3{
  644. key-name = "secure_boot_set";
  645. key-device = "efuse";
  646. key-permit = "write";
  647. };
  648. keysn_4:key_4{
  649. key-name = "mac_bt";
  650. key-device = "normal";
  651. key-permit = "read","write","del";
  652. key-type = "mac";
  653. };
  654. keysn_5:key_5{
  655. key-name = "mac_wifi";
  656. key-device = "normal";
  657. key-permit = "read","write","del";
  658. key-type = "mac";
  659. };
  660. keysn_6:key_6{
  661. key-name = "hdcp2_tx";
  662. key-device = "normal";
  663. key-permit = "read","write","del";
  664. };
  665. keysn_7:key_7{
  666. key-name = "hdcp2_rx";
  667. key-device = "normal";
  668. key-permit = "read","write","del";
  669. };
  670. keysn_8:key_8{
  671. key-name = "widevinekeybox";
  672. key-device = "secure";
  673. key-permit = "read","write","del";
  674. };
  675. keysn_9:key_9{
  676. key-name = "deviceid";
  677. key-device = "normal";
  678. key-permit = "read","write","del";
  679. };
  680. keysn_10:key_10{
  681. key-name = "hdcp22_fw_private";
  682. key-device = "secure";
  683. key-permit = "read","write","del";
  684. };
  685. };//End unifykey
  686. amhdmitx: amhdmitx{
  687. compatible = "amlogic, amhdmitx";
  688. dev_name = "amhdmitx";
  689. status = "okay";
  690. pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
  691. pinctrl-0=<&hdmitx_hpd>;
  692. pinctrl-1=<&hdmitx_ddc>;
  693. /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
  694. interrupts = <0 57 1>;
  695. interrupt-names = "hdmitx_hpd";
  696. clocks = <&clock CLK_HDMITX_SYS &clock CLK_HDMITX_ENCP
  697. &clock CLK_HDMITX_ENCI &clock CLK_HDMITX_PIXEL
  698. &clock CLK_HDMITX_PHY &clock CLK_VID>;
  699. clock-names = "hdmitx_clk_sys", "hdmitx_clk_encp", "hdmitx_clk_enci",
  700. "hdmitx_clk_pixel", "hdmitx_clk_phy", "hdmitx_clk_vid";
  701. /* hdcp14_en = <0x82000010>; */
  702. /* hdcp14_rslt = <0x82000011>; */
  703. gpio_i2c_en = <0x1>;
  704. ranges;
  705. #address-cells = <2>;
  706. #size-cells = <2>;
  707. };
  708. aocec: aocec{
  709. compatible = "amlogic, amlogic-aocec";
  710. device_name = "aocec";
  711. status = "okay";
  712. vendor_name = "Amlogic"; /* Max Chars: 8 */
  713. vendor_id = <0x000000>; /* Refer to http://standards.ieee.org/develop/regauth/oui/oui.txt */
  714. product_desc = "GXBB Mbox"; /* Max Chars: 16 */
  715. cec_osd_string = "MBox"; /* Max Chars: 14 */
  716. port_num = <1>;
  717. arc_port_mask = <0x0>;
  718. interrupts = <0 199 1>;
  719. interrupt-names = "hdmi_aocec";
  720. pinctrl-names = "hdmitx_aocec";
  721. pinctrl-0=<&hdmitx_aocec>;
  722. reg = <0x0 0xc810023c 0x0 0x4
  723. 0x0 0xc8100000 0x0 0x200>;
  724. };
  725.  
  726. tvout {
  727. compatible = "amlogic, tvout";
  728. dev_name = "tvout";
  729. status = "okay";
  730. };
  731.  
  732. i2c_gpio: i2c_gpio {
  733. compatible = "i2c-gpio";
  734. dev_name = "i2c-gpio";
  735. i2c-gpio,delay-us = <10>; /* 50 kHz */
  736. gpios = <&gpio GPIOH_1 0
  737. &gpio GPIOH_2 0>;
  738. #address-cells = <2>;
  739. #size-cells = <2>;
  740. i2c-gpio,timeout-ms = <10>;
  741. i2c_gpio_edid: i2c_gpio_edid {
  742. compatible = "i2c-gpio-edid";
  743. reg = <0x50 0x0 0x0 0x0>;
  744. };
  745. };
  746.  
  747. uart_AO: serial@c81004c0 {
  748. compatible = "amlogic, meson-uart";
  749. reg = <0x0 0xc81004c0 0x0 0x14>;
  750. interrupts = <0 193 1>;
  751. status = "okay";
  752. clocks = <&clock CLK_XTAL>;
  753. clock-names = "clk_uart";
  754. fifosize = < 64 >;
  755. pinctrl-names = "default";
  756. //pinctrl-0 = <&ao_uart_pins>;
  757. support-sysrq = <0>; /* 0 not support , 1 support */
  758. };
  759. uart_A: serial@c11084c0 {
  760. compatible = "amlogic, meson-uart";
  761. reg = <0x0 0xc11084c0 0x0 0x14>;
  762. interrupts = <0 26 1>;
  763. status = "okay";
  764. clocks = <&clock CLK_XTAL>;
  765. clock-names = "clk_uart";
  766. fifosize = < 128 >;
  767. pinctrl-names = "default";
  768. pinctrl-0 = <&a_uart_pins>;
  769. resets = <&clock GCLK_IDX_UART0>;
  770. };
  771.  
  772.  
  773. canvas{
  774. compatible = "amlogic, meson, canvas";
  775. dev_name = "amlogic-canvas";
  776. status = "ok";
  777. reg = <0x0 0xc8838000 0x0 0x400>;
  778. };
  779.  
  780. rdma{
  781. compatible = "amlogic, meson, rdma";
  782. dev_name = "amlogic-rdma";
  783. status = "ok";
  784. interrupts = <0 89 1>;
  785. interrupt-names = "rdma";
  786. };
  787.  
  788. dwc2_b {
  789. compatible = "amlogic,dwc2";
  790. device_name = "dwc2_b";
  791. reg = <0x0 0xc9100000 0x0 0x40000>;
  792. interrupts = <0 31 4>;
  793. status = "okay";
  794. pl-periph-id = <1>; /** lm name */
  795. clock-src = "usb1"; /** clock src */
  796. port-id = <1>; /** ref to mach/usb.h */
  797. port-type = <1>; /** 0: otg, 1: host, 2: slave */
  798. port-speed = <0>; /** 0: default, 1: high, 2: full */
  799. port-config = <0>; /** 0: default */
  800. port-dma = <0>; /** 0: default, 1: single, 2: incr, 3: incr4, 4: incr8, 5: incr16, 6: disable*/
  801. port-id-mode = <1>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
  802. phy-reg = <0xc0000020>;
  803. phy-reg-size = <0x20>;
  804. usb-fifo = <1024>;
  805. host-only-core = <1>;
  806. pmu-apply-power = <1>;
  807. cpu-type = "gxbaby";
  808. resets = <&clock GCLK_IDX_USB_GENERAL
  809. &clock GCLK_IDX_MISC_USB1_TO_DDR
  810. &clock GCLK_IDX_USB1>;
  811. reset-names = "usb_general",
  812. "usb1",
  813. "usb1_to_ddr";
  814. };
  815.  
  816. dwc2_a {
  817. compatible = "amlogic,dwc2";
  818. device_name = "dwc2_a";
  819. reg = <0x0 0xc9000000 0x0 0x40000>;
  820. interrupts = <0 30 4>;
  821. status = "okay";
  822. pl-periph-id = <0>; /** lm name */
  823. clock-src = "usb0"; /** clock src */
  824. port-id = <0>; /** ref to mach/usb.h */
  825. port-type = <1>; /** 0: otg, 1: host, 2: slave */
  826. port-speed = <0>; /** 0: default, high, 1: full */
  827. port-config = <0>; /** 0: default */
  828. port-dma = <0>; /** 0: default, 1: single, 2: incr, 3: incr4, 4: incr8, 5: incr16, 6: disable*/
  829. port-id-mode = <1>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
  830. gpio-vbus-power = "GPIODV_24";
  831. gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
  832. gpio-work-mask = <1>; /**0: work on pulldown,1:work on pullup*/
  833. phy-reg = <0xc0000000>;
  834. phy-reg-size = <0x20>;
  835. usb-fifo = <1024>;
  836. cpu-type = "gxbaby";
  837. resets = <&clock GCLK_IDX_USB_GENERAL
  838. &clock GCLK_IDX_MISC_USB0_TO_DDR
  839. &clock GCLK_IDX_USB0>;
  840. reset-names = "usb_general",
  841. "usb0",
  842. "usb0_to_ddr";
  843. };
  844.  
  845. /* AUDIO MESON8 DEVICES */
  846. i2s_dai: I2S {
  847. #sound-dai-cells = <0>;
  848. resets = <
  849. &clock GCLK_IDX_AIU_AI_TOP_GLUE
  850. &clock GCLK_IDX_AUD_BUF_ABD
  851. &clock GCLK_IDX_AIU_I2S_OUT
  852. &clock GCLK_IDX_AIU_AMCLK_MEASURE
  853. &clock GCLK_IDX_AIU_AIFIFO2
  854. &clock GCLK_IDX_AIU_AUD_MIXER
  855. &clock GCLK_IDX_AIU_MIXER_REG
  856. &clock GCLK_IDX_AIU_ADC
  857. &clock GCLK_IDX_AIU_TOP_LEVEL
  858. &clock GCLK_IDX_AIU_AOCLK
  859. &clock GCLK_IDX_AUD_IN
  860. >;
  861. reset-names =
  862. "top_glue",
  863. "aud_buf",
  864. "i2s_out",
  865. "amclk_measure",
  866. "aififo2",
  867. "aud_mixer",
  868. "mixer_reg",
  869. "adc",
  870. "top_level",
  871. "aoclk",
  872. "aud_in";
  873. clocks = <&clock CLK_MPLL2>,
  874. <&clock CLK_AMCLK>;
  875. clock-names = "mpll2", "mclk";
  876. compatible = "amlogic, aml-i2s-dai";
  877. };
  878. spdif_dai: SPDIF {
  879. #sound-dai-cells = <0>;
  880. compatible = "amlogic, aml-spdif-dai";
  881. resets = <
  882. &clock GCLK_IDX_AIU_IEC958
  883. &clock GCLK_IDX_AIU_ICE958_AMCLK
  884. >;
  885. reset-names =
  886. "iec958",
  887. "iec958_amclk";
  888. clocks = <&clock CLK_MPLL1>,
  889. <&clock CLK_I958>,
  890. <&clock CLK_AMCLK>,
  891. <&clock CLK_SPDIF>,
  892. <&clock CLK_81>;
  893. clock-names = "mpll1", "i958", "mclk", "spdif", "clk_81";
  894. };
  895. pcm_dai: PCM {
  896. #sound-dai-cells = <0>;
  897. compatible = "amlogic, aml-pcm-dai";
  898. pinctrl-names = "aml_audio_btpcm";
  899. pinctrl-0 = <&audio_btpcm_pins>;
  900. clocks = <&clock CLK_MPLL0>,
  901. <&clock CLK_PCM_MCLK>,
  902. <&clock CLK_PCM_SCLK>;
  903. clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
  904. pcm_mode = <1>; /* 0=slave mode, 1=master mode */
  905. };
  906. i2s_plat: i2s_platform {
  907. compatible = "amlogic, aml-i2s";
  908. interrupts = <0 29 1>;
  909. };
  910. pcm_plat: pcm_platform {
  911. compatible = "amlogic, aml-pcm";
  912. };
  913. spdif_codec: spdif_codec{
  914. #sound-dai-cells = <0>;
  915. compatible = "amlogic, aml-spdif-codec";
  916. pinctrl-names = "aml_audio_spdif";
  917. pinctrl-0 = <&audio_spdif_pins>;
  918. };
  919. pcm_codec: pcm_codec{
  920. #sound-dai-cells = <0>;
  921. compatible = "amlogic, pcm2BT-codec";
  922. };
  923. /* endof AUDIO MESON8 DEVICES */
  924.  
  925. /* AUDIO board specific */
  926. dummy_codec:dummy{
  927. #sound-dai-cells = <0>;
  928. compatible = "amlogic, aml_dummy_codec";
  929. status = "okay";
  930. };
  931. aml_m8_snd {
  932. compatible = "aml, aml_snd_m8";
  933. status = "okay";
  934. aml-sound-card,format = "i2s";
  935. aml_sound_card,name = "AML-M8AUDIO";
  936. aml,audio-routing =
  937. "Ext Spk","LOUTL",
  938. "Ext Spk","LOUTR";
  939.  
  940. mute_gpio-gpios = <&gpio GPIOH_3 0>;
  941. hp_disable;
  942. hp_paraments = <800 300 0 5 1>;
  943. pinctrl-names = "aml_snd_m8";
  944. pinctrl-0 = <&audio_pins>;
  945. cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
  946. codec_list = <&codec0 &codec1 &codec2>;
  947. plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
  948. cpudai0: cpudai0 {
  949. sound-dai = <&i2s_dai>;
  950. };
  951. cpudai1: cpudai1 {
  952. sound-dai = <&spdif_dai>;
  953. };
  954. cpudai2: cpudai2 {
  955. sound-dai = <&pcm_dai>;
  956. };
  957. codec0: codec0 {
  958. sound-dai = <&dummy_codec>;
  959. };
  960. codec1: codec1 {
  961. sound-dai = <&spdif_codec>;
  962. };
  963. codec2: codec2 {
  964. sound-dai = <&pcm_codec>;
  965. };
  966. };
  967. /* END OF AUDIO board specific */
  968.  
  969. gpio_keypad{
  970. compatible = "amlogic, gpio_keypad";
  971. status = "okay";
  972. scan_period = <20>;
  973. key_num = <1>;
  974. key_name = "power";
  975. key_code = <116>;
  976. key_pin = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; /*"GPIOAO_3";*/
  977. irq_keyup = <6>;
  978. irq_keydown = <7>;
  979. };
  980.  
  981. adc_keypad{
  982. compatible = "amlogic, adc_keypad";
  983. status = "okay";
  984. key_name = "menu", "vol-","vol+", "esc", "home";
  985. key_num = <5>;
  986. key_code = <139 114 115 1 102>;
  987. key_chan = <0 0 0 0 0>;
  988. key_val = <0 143 271 393 510>; //voltage=0/252/478/692/824mV, val=voltage/1800mV*1023
  989. key_tolerance = <40 40 40 40 40>;
  990. };
  991.  
  992. sysled {
  993. compatible = "amlogic, sysled";
  994. dev_name = "sysled";
  995. status = "okay";
  996. led_gpio = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
  997. led_active_low = <1>;
  998. };
  999. aml_sensor0: aml-sensor@0 {
  1000. compatible = "amlogic, aml-thermal";
  1001. device_name = "thermal";
  1002. #thermal-sensor-cells = <1>;
  1003. cooling_devices {
  1004. cpufreq_cool_cluster0 {
  1005. min_state = <1000000>;
  1006. dyn_coeff = <140>;
  1007. cluster_id = <0>;
  1008. node_name = "cpus";
  1009. device_type = "cpufreq";
  1010. };
  1011. cpucore_cool_cluster0 {
  1012. min_state = <1>;
  1013. dyn_coeff = <0>;
  1014. cluster_id = <0>;
  1015. node_name = "cpu_core_cluster0";
  1016. device_type = "cpucore";
  1017. };
  1018. gpufreq_cool {
  1019. min_state = <400>;
  1020. dyn_coeff = <437>;
  1021. cluster_id = <0>;
  1022. node_name = "mali";
  1023. device_type = "gpufreq";
  1024. };
  1025. gpucore_cool {
  1026. min_state = <1>;
  1027. dyn_coeff = <0>;
  1028. cluster_id = <0>;
  1029. node_name = "thermal_gpu_cores";
  1030. device_type = "gpucore";
  1031. };
  1032. };
  1033. cpu_cluster0:cpu_core_cluster0 {
  1034. #cooling-cells = <2>; /* min followed by max */
  1035. };
  1036. gpucore:thermal_gpu_cores {
  1037. #cooling-cells = <2>; /* min followed by max */
  1038. };
  1039. };
  1040. thermal-zones {
  1041. soc_thermal {
  1042. polling-delay = <1000>;
  1043. polling-delay-passive = <100>;
  1044. sustainable-power = <2150>;
  1045.  
  1046. thermal-sensors = <&aml_sensor0 3>;
  1047.  
  1048. trips {
  1049. switch_on: trip-point@0 {
  1050. temperature = <70000>;
  1051. hysteresis = <1000>;
  1052. type = "passive";
  1053. };
  1054. control: trip-point@1 {
  1055. temperature = <80000>;
  1056. hysteresis = <1000>;
  1057. type = "passive";
  1058. };
  1059. hot: trip-point@2 {
  1060. temperature = <85000>;
  1061. hysteresis = <5000>;
  1062. type = "hot";
  1063. };
  1064. critical: trip-point@3 {
  1065. temperature = <260000>;
  1066. hysteresis = <1000>;
  1067. type = "critical";
  1068. };
  1069. };
  1070.  
  1071. cooling-maps {
  1072. cpufreq_cooling_map {
  1073. trip = <&control>;
  1074. cooling-device = <&cpus 0 4>;
  1075. contribution = <1024>;
  1076. };
  1077. cpucore_cooling_map {
  1078. trip = <&control>;
  1079. cooling-device = <&cpu_cluster0 0 3>;
  1080. contribution = <1024>;
  1081. };
  1082. gpufreq_cooling_map {
  1083. trip = <&control>;
  1084. cooling-device = <&gpu 0 4>;
  1085. contribution = <1024>;
  1086. };
  1087. gpucore_cooling_map {
  1088. trip = <&control>;
  1089. cooling-device = <&gpucore 0 2>;
  1090. contribution = <1024>;
  1091. };
  1092. };
  1093. };
  1094. };
  1095.  
  1096. /*
  1097. dvb {
  1098. compatible = "amlogic, dvb";
  1099. dev_name = "dvb";
  1100. //"parallel","serial","disable"
  1101. ts0 = "parallel";
  1102. ts0_control = <0>;
  1103. ts0_invert = <0>;
  1104. pinctrl-names = "p_ts0", "s_ts0";
  1105. pinctrl-0 = <&dvb_p_ts0_pins>;
  1106. pinctrl-1 = <&dvb_s_ts0_pins>;
  1107. resets = <&clock GCLK_IDX_DEMUX
  1108. &clock GCLK_IDX_ASYNC_FIFO
  1109. &clock GCLK_IDX_AHB_ARB0
  1110. &clock GCLK_IDX_HIU_PARSER_TOP>;
  1111. reset-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
  1112. };
  1113. dvbfe {
  1114. compatible = "amlogic, dvbfe";
  1115. dev_name = "dvbfe";
  1116. dtv_demod0 = "Mxl241";
  1117. dtv_demod0_i2c_adap_id = <2>;
  1118. dtv_demod0_i2c_addr = <0x60>;
  1119. dtv_demod0_reset_value = <0>;
  1120. dtv_demod0_reset_gpio-gpios = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
  1121. fe0_dtv_demod = <0>;
  1122. fe0_ts = <0>;
  1123. fe0_dev = <0>;
  1124. };
  1125. */
  1126. };
  1127. &i2c_a {
  1128. status = "disabled";
  1129. /*p200: multiplex with usb PWR, disbaled*/
  1130. };
  1131. /*
  1132. &i2c_b {
  1133. status = "okay";
  1134. };
  1135. */
  1136.  
  1137. &pinmux {
  1138. audio_pins:audio_pin{
  1139. amlogic,setmask=<AO 0x78000000>;
  1140. amlogic,clrmask=<AO 0x40000>;
  1141. amlogic,pins = "GPIOAO_8","GPIOAO_9","GPIOAO_10","GPIOAO_11";
  1142. };
  1143.  
  1144. audio_spdif_pins:audio_pin1{
  1145. amlogic,setmask=<1 0x200>; /*spdif_out*/
  1146. amlogic,clrmask=<1 0x10000>; /*spdif_out*/
  1147. amlogic,pins ="GPIOY_12"; /*spdif_out*/
  1148. };
  1149.  
  1150. audio_btpcm_pins:audio_btpcm_pins{
  1151. /* BT PCM PINMUX SETTING*/
  1152. amlogic,setmask=<3 0x78000000>;
  1153. amlogic,clrmask=<3 0x803280
  1154. 4 0xc0>;
  1155. amlogic,pins ="GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11";
  1156. };
  1157. };
  1158.  
  1159. &efuse {
  1160. status = "okay";
  1161. };
  1162. &audio_data{
  1163. status = "okay";
  1164. };
  1165. &defendkey {
  1166. status = "okay";
  1167. };
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