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  1. /dts-v1/;
  2.  
  3. / {
  4. compatible = "raspberrypi,3-model-b-plus\0brcm,bcm2837";
  5. serial-number = "00000000a2e117c2";
  6. model = "Raspberry Pi 3 Model A Plus Rev 1.0";
  7. memreserve = < 0x1c000000 0x4000000 >;
  8. interrupt-parent = < 0x01 >;
  9. #address-cells = < 0x01 >;
  10. #size-cells = < 0x01 >;
  11.  
  12. clocks {
  13. compatible = "simple-bus";
  14. #address-cells = < 0x01 >;
  15. #size-cells = < 0x00 >;
  16.  
  17. clock@3 {
  18. compatible = "fixed-clock";
  19. #clock-cells = < 0x00 >;
  20. phandle = < 0x04 >;
  21. reg = < 0x03 >;
  22. clock-output-names = "osc";
  23. clock-frequency = < 0x124f800 >;
  24. };
  25.  
  26. clock@4 {
  27. compatible = "fixed-clock";
  28. #clock-cells = < 0x00 >;
  29. phandle = < 0x16 >;
  30. reg = < 0x04 >;
  31. clock-output-names = "otg";
  32. clock-frequency = < 0x1c9c3800 >;
  33. };
  34. };
  35.  
  36. __overrides__ {
  37. pwr_led_gpio = "\0\0\00gpios:4";
  38. cam0-led-ctrl;
  39. eth_led1 = "\0\0\0.microchip,led-modes:4";
  40. i2c1 = "\0\0\0&status";
  41. i2c_vc = "\0\0\0%status";
  42. sd_overclock = "\0\0\0*brcm,overclock-50:0";
  43. sdio_overclock = "\0\0\0+brcm,overclock-50:0\0\0\0\0,brcm,overclock-50:0";
  44. i2c0_baudrate = "\0\0\0%clock-frequency:0";
  45. sd_pio_limit = "\0\0\0*brcm,pio-limit:0";
  46. act_led_trigger = "\0\0\0/linux,default-trigger";
  47. audio = "\0\0\0'status";
  48. tx_lpi_timer = "\0\0\0.microchip,tx-lpi-timer:0";
  49. sd_debug = "\0\0\0*brcm,debug";
  50. cam0-pwdn-ctrl;
  51. eth_downshift_after = "\0\0\0.microchip,downshift-after:0";
  52. cache_line_size;
  53. cam0-led;
  54. i2c1_baudrate = "\0\0\0&clock-frequency:0";
  55. spi = "\0\0\0$status";
  56. i2c_arm = "\0\0\0&status";
  57. pwr_led_activelow = "\0\0\00gpios:8";
  58. uart0 = "\0\0\0!status";
  59. i2c2_iknowwhatimdoing = [ 00 00 00 15 73 74 61 74 75 73 00 ];
  60. i2s = "\0\0\0#status";
  61. eth_led0 = "\0\0\0.microchip,led-modes:0";
  62. i2c0 = "\0\0\0%status";
  63. arm_freq = < 0x1d 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x1e636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 0x1f 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x20636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 >;
  64. watchdog = "\0\0\0(status";
  65. i2c_baudrate = "\0\0\0&clock-frequency:0";
  66. i2c_vc_baudrate = "\0\0\0%clock-frequency:0";
  67. axiperf = "\0\0\0-status";
  68. act_led_activelow = "\0\0\0/gpios:8";
  69. i2c2_baudrate = [ 00 00 00 15 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 79 3a 30 00 ];
  70. eth_max_speed = "\0\0\0.max-speed:0";
  71. sd_force_pio = "\0\0\0*brcm,force-pio?";
  72. pwr_led_trigger = "\0\0\00linux,default-trigger";
  73. cam0-pwdn;
  74. uart1 = "\0\0\0\"status";
  75. i2c_arm_baudrate = "\0\0\0&clock-frequency:0";
  76. random = "\0\0\0)status";
  77. act_led_gpio = "\0\0\0/gpios:4";
  78. i2c = "\0\0\0&status";
  79. eee = "\0\0\0.microchip,eee-enabled?";
  80. };
  81.  
  82. arm-pmu {
  83. compatible = "arm,cortex-a7-pmu";
  84. interrupt-parent = < 0x18 >;
  85. interrupts = < 0x09 0x04 >;
  86. };
  87.  
  88. system {
  89. linux,serial = < 0x00 0xa2e117c2 >;
  90. linux,revision = < 0x9020e0 >;
  91. };
  92.  
  93. __symbols__ {
  94. uart0_gpio14 = "/soc/gpio@7e200000/uart0_gpio14";
  95. pwm = "/soc/pwm@7e20c000";
  96. gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1_gpio5";
  97. clk_usb = "/clocks/clock@4";
  98. pixelvalve0 = "/soc/pixelvalve@7e206000";
  99. uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0_ctsrts_gpio30";
  100. uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1_ctsrts_gpio16";
  101. uart0_gpio32 = "/soc/gpio@7e200000/uart0_gpio32";
  102. intc = "/soc/interrupt-controller@7e00b200";
  103. spi2 = "/soc/spi@7e2150c0";
  104. jtag_gpio4 = "/soc/gpio@7e200000/jtag_gpio4";
  105. dsi1 = "/soc/dsi@7e700000";
  106. clocks = "/soc/cprman@7e101000";
  107. eth_phy = "/soc/usb@7e980000/usb-port@1/usb-port@1/ethernet@1/mdio/ethernet-phy@1";
  108. i2c1 = "/soc/i2c@7e804000";
  109. i2c_vc = "/soc/i2c@7e205000";
  110. alt0 = "/soc/gpio@7e200000/alt0";
  111. firmwarekms = "/soc/firmwarekms@7e600000";
  112. smi = "/soc/smi@7e600000";
  113. uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1_ctsrts_gpio42";
  114. spi0 = "/soc/spi@7e204000";
  115. thermal = "/soc/thermal@7e212000";
  116. vdd_5v0_reg = "/fixedregulator_5v0";
  117. vchiq = "/soc/mailbox@7e00b840";
  118. sdhost = "/soc/mmc@7e202000";
  119. aux = "/soc/aux@7e215000";
  120. gpio = "/soc/gpio@7e200000";
  121. gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0_gpio4";
  122. pwm0_gpio12 = "/soc/gpio@7e200000/pwm0_gpio12";
  123. pwm1_gpio19 = "/soc/gpio@7e200000/pwm1_gpio19";
  124. sdhci = "/soc/mmc@7e300000";
  125. pwm0_gpio40 = "/soc/gpio@7e200000/pwm0_gpio40";
  126. gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2_gpio43";
  127. dpi = "/soc/dpi@7e208000";
  128. vcsm = "/soc/vcsm";
  129. v3d = "/soc/v3d@7ec00000";
  130. audio = "/soc/audio";
  131. vdd_3v3_reg = "/fixedregulator_3v3";
  132. uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1_ctsrts_gpio30";
  133. gpioout = "/soc/gpio@7e200000/gpioout";
  134. dma = "/soc/dma@7e007000";
  135. spidev1 = "/soc/spi@7e204000/spidev@1";
  136. mmcnr = "/soc/mmcnr@7e300000";
  137. spi0_gpio35 = "/soc/gpio@7e200000/spi0_gpio35";
  138. vc4 = "/soc/gpu";
  139. pwm1_gpio45 = "/soc/gpio@7e200000/pwm1_gpio45";
  140. cpu3 = "/cpus/cpu@3";
  141. pcm_gpio28 = "/soc/gpio@7e200000/pcm_gpio28";
  142. dpi_gpio0 = "/soc/gpio@7e200000/dpi_gpio0";
  143. power = "/soc/power";
  144. soc = "/soc";
  145. i2c0_gpio0 = "/soc/gpio@7e200000/i2c0_gpio0";
  146. pcm_gpio18 = "/soc/gpio@7e200000/pcm_gpio18";
  147. leds = "/leds";
  148. csi1 = "/soc/csi@7e801000";
  149. i2s_pins = "/soc/gpio@7e200000/i2s";
  150. firmware = "/soc/firmware";
  151. cpu1 = "/cpus/cpu@1";
  152. mmc = "/soc/mmc@7e300000";
  153. usbphy = "/phy";
  154. pixelvalve1 = "/soc/pixelvalve@7e207000";
  155. spi = "/soc/spi@7e204000";
  156. spi0_pins = "/soc/gpio@7e200000/spi0_pins";
  157. i2c_arm = "/soc/i2c@7e804000";
  158. clk_osc = "/clocks/clock@3";
  159. ethernet = "/soc/usb@7e980000/usb-port@1/usb-port@1/ethernet@1";
  160. rng = "/soc/rng@7e104000";
  161. uart0 = "/soc/serial@7e201000";
  162. pwm1_gpio13 = "/soc/gpio@7e200000/pwm1_gpio13";
  163. i2c1_pins = "/soc/gpio@7e200000/i2c1";
  164. cpu_thermal = "/thermal-zones/cpu-thermal";
  165. fb = "/soc/fb";
  166. pwm1_gpio41 = "/soc/gpio@7e200000/pwm1_gpio41";
  167. txp = "/soc/txp@7e004000";
  168. sdhost_pins = "/soc/gpio@7e200000/sdhost_gpio48";
  169. dpi_18bit_gpio0 = "/soc/gpio@7e200000/dpi_18bit_gpio0";
  170. spi0_gpio7 = "/soc/gpio@7e200000/spi0_gpio7";
  171. i2c2 = "/soc/i2c@7e805000";
  172. uart1_pins = "/soc/gpio@7e200000/uart1_pins";
  173. i2c1_gpio44 = "/soc/gpio@7e200000/i2c1_gpio44";
  174. i2c0_gpio28 = "/soc/gpio@7e200000/i2c0_gpio28";
  175. i2c_slave_gpio18 = "/soc/gpio@7e200000/i2c_slave_gpio18";
  176. i2s = "/soc/i2s@7e203000";
  177. emmc_gpio48 = "/soc/gpio@7e200000/emmc_gpio48";
  178. spi1 = "/soc/spi@7e215080";
  179. usb = "/soc/usb@7e980000";
  180. dsi0 = "/soc/dsi@7e209000";
  181. i2c1_gpio2 = "/soc/gpio@7e200000/i2c1_gpio2";
  182. expgpio = "/soc/firmware/expgpio";
  183. uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0_ctsrts_gpio38";
  184. audio_pins = "/soc/gpio@7e200000/audio_pins";
  185. i2c0 = "/soc/i2c@7e205000";
  186. spi1_gpio16 = "/soc/gpio@7e200000/spi1_gpio16";
  187. i2c0_pins = "/soc/gpio@7e200000/i2c0";
  188. pwr_led = "/leds/pwr";
  189. watchdog = "/soc/watchdog@7e100000";
  190. jtag_gpio22 = "/soc/gpio@7e200000/jtag_gpio22";
  191. spi2_gpio40 = "/soc/gpio@7e200000/spi2_gpio40";
  192. uart0_pins = "/soc/gpio@7e200000/uart0_pins";
  193. vec = "/soc/vec@7e806000";
  194. local_intc = "/soc/local_intc@40000000";
  195. i2c0_gpio44 = "/soc/gpio@7e200000/i2c0_gpio44";
  196. axiperf = "/soc/axiperf";
  197. spi0_cs_pins = "/soc/gpio@7e200000/spi0_cs_pins";
  198. sound = "/soc/sound";
  199. hvs = "/soc/hvs@7e400000";
  200. uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0_ctsrts_gpio16";
  201. act_led = "/leds/act";
  202. gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2_gpio6";
  203. spidev0 = "/soc/spi@7e204000/spidev@0";
  204. sdhost_gpio48 = "/soc/gpio@7e200000/sdhost_gpio48";
  205. bt_pins = "/soc/gpio@7e200000/bt_pins";
  206. emmc_gpio34 = "/soc/gpio@7e200000/emmc_gpio34";
  207. gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1_gpio44";
  208. uart1_gpio14 = "/soc/gpio@7e200000/uart1_gpio14";
  209. uart0_gpio36 = "/soc/gpio@7e200000/uart0_gpio36";
  210. sdio_pins = "/soc/gpio@7e200000/sdio_pins";
  211. cpus = "/cpus";
  212. cpu2 = "/cpus/cpu@2";
  213. uart1_gpio32 = "/soc/gpio@7e200000/uart1_gpio32";
  214. hdmi = "/soc/hdmi@7e902000";
  215. pixelvalve2 = "/soc/pixelvalve@7e807000";
  216. pwm0_gpio18 = "/soc/gpio@7e200000/pwm0_gpio18";
  217. gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1_gpio42";
  218. mailbox = "/soc/mailbox@7e00b880";
  219. uart1_gpio40 = "/soc/gpio@7e200000/uart1_gpio40";
  220. emmc_gpio22 = "/soc/gpio@7e200000/emmc_gpio22";
  221. uart1 = "/soc/serial@7e215040";
  222. csi0 = "/soc/csi@7e800000";
  223. random = "/soc/rng@7e104000";
  224. i2c = "/soc/i2c@7e804000";
  225. cpu0 = "/cpus/cpu@0";
  226. };
  227.  
  228. soc {
  229. compatible = "simple-bus";
  230. ranges = < 0x7e000000 0x3f000000 0x1000000 0x40000000 0x40000000 0x1000 >;
  231. #address-cells = < 0x01 >;
  232. #size-cells = < 0x01 >;
  233. phandle = < 0x33 >;
  234. dma-ranges = < 0xc0000000 0x00 0x3f000000 >;
  235.  
  236. serial@7e201000 {
  237. compatible = "brcm,bcm2835-pl011\0arm,pl011\0arm,primecell";
  238. clocks = < 0x03 0x13 0x03 0x14 >;
  239. clock-names = "uartclk\0apb_pclk";
  240. status = "okay";
  241. interrupts = < 0x02 0x19 >;
  242. phandle = < 0x21 >;
  243. arm,primecell-periphid = < 0x241011 >;
  244. reg = < 0x7e201000 0x200 >;
  245. pinctrl-0 = < 0x08 0x09 >;
  246. cts-event-workaround;
  247. pinctrl-names = "default";
  248. };
  249.  
  250. pixelvalve@7e207000 {
  251. compatible = "brcm,bcm2835-pixelvalve1";
  252. status = "disabled";
  253. interrupts = < 0x02 0x0e >;
  254. phandle = < 0x65 >;
  255. reg = < 0x7e207000 0x100 >;
  256. };
  257.  
  258. cprman@7e101000 {
  259. compatible = "brcm,bcm2835-cprman";
  260. clocks = < 0x04 0x05 0x00 0x05 0x01 0x05 0x02 0x06 0x00 0x06 0x01 0x06 0x02 >;
  261. firmware = < 0x07 >;
  262. #clock-cells = < 0x01 >;
  263. phandle = < 0x03 >;
  264. reg = < 0x7e101000 0x2000 >;
  265. };
  266.  
  267. csi@7e801000 {
  268. power-domains = < 0x11 0x0d >;
  269. compatible = "brcm,bcm2835-unicam";
  270. clocks = < 0x03 0x2e >;
  271. clock-names = "lp";
  272. status = "disabled";
  273. #address-cells = < 0x01 >;
  274. interrupts = < 0x02 0x07 >;
  275. #size-cells = < 0x00 >;
  276. #clock-cells = < 0x01 >;
  277. phandle = < 0x6c >;
  278. reg = < 0x7e801000 0x800 0x7e802004 0x04 >;
  279.  
  280. port {
  281.  
  282. endpoint {
  283. data-lanes = < 0x01 0x02 >;
  284. };
  285. };
  286. };
  287.  
  288. thermal@7e212000 {
  289. compatible = "brcm,bcm2837-thermal";
  290. clocks = < 0x03 0x1b >;
  291. #thermal-sensor-cells = < 0x00 >;
  292. status = "okay";
  293. phandle = < 0x02 >;
  294. reg = < 0x7e212000 0x08 >;
  295. };
  296.  
  297. hvs@7e400000 {
  298. compatible = "brcm,bcm2835-hvs";
  299. status = "disabled";
  300. interrupts = < 0x02 0x01 >;
  301. phandle = < 0x6a >;
  302. reg = < 0x7e400000 0x6000 >;
  303. };
  304.  
  305. gpio@7e200000 {
  306. compatible = "brcm,bcm2835-gpio";
  307. gpio-controller;
  308. #interrupt-cells = < 0x02 >;
  309. interrupts = < 0x02 0x11 0x02 0x12 >;
  310. phandle = < 0x0f >;
  311. reg = < 0x7e200000 0xb4 >;
  312. #gpio-cells = < 0x02 >;
  313. pinctrl-names = "default";
  314. interrupt-controller;
  315.  
  316. uart0_gpio14 {
  317. brcm,pins = < 0x0e 0x0f >;
  318. phandle = < 0x51 >;
  319. brcm,function = < 0x04 >;
  320. };
  321.  
  322. gpclk1_gpio5 {
  323. brcm,pins = < 0x05 >;
  324. phandle = < 0x39 >;
  325. brcm,function = < 0x04 >;
  326. };
  327.  
  328. uart0_ctsrts_gpio30 {
  329. brcm,pins = < 0x1e 0x1f >;
  330. phandle = < 0x53 >;
  331. brcm,pull = < 0x02 0x00 >;
  332. brcm,function = < 0x07 >;
  333. };
  334.  
  335. uart1_ctsrts_gpio16 {
  336. brcm,pins = < 0x10 0x11 >;
  337. phandle = < 0x58 >;
  338. brcm,function = < 0x02 >;
  339. };
  340.  
  341. uart0_gpio32 {
  342. brcm,pins = < 0x20 0x21 >;
  343. phandle = < 0x54 >;
  344. brcm,pull = < 0x00 0x02 >;
  345. brcm,function = < 0x07 >;
  346. };
  347.  
  348. jtag_gpio4 {
  349. brcm,pins = < 0x04 0x05 0x06 0x0c 0x0d >;
  350. phandle = < 0x5e >;
  351. brcm,function = < 0x02 >;
  352. };
  353.  
  354. i2c1 {
  355. brcm,pins = < 0x02 0x03 >;
  356. phandle = < 0x14 >;
  357. brcm,function = < 0x04 >;
  358. };
  359.  
  360. alt0 {
  361. brcm,pins = < 0x04 0x05 0x07 0x08 0x09 0x0a 0x0b >;
  362. phandle = < 0x61 >;
  363. brcm,function = < 0x04 >;
  364. };
  365.  
  366. uart1_ctsrts_gpio42 {
  367. brcm,pins = < 0x2a 0x2b >;
  368. phandle = < 0x5c >;
  369. brcm,function = < 0x02 >;
  370. };
  371.  
  372. gpclk0_gpio4 {
  373. brcm,pins = < 0x04 >;
  374. phandle = < 0x38 >;
  375. brcm,function = < 0x04 >;
  376. };
  377.  
  378. pwm0_gpio12 {
  379. brcm,pins = < 0x0c >;
  380. phandle = < 0x46 >;
  381. brcm,function = < 0x04 >;
  382. };
  383.  
  384. pwm1_gpio19 {
  385. brcm,pins = < 0x13 >;
  386. phandle = < 0x4a >;
  387. brcm,function = < 0x02 >;
  388. };
  389.  
  390. pwm0_gpio40 {
  391. brcm,pins = < 0x28 >;
  392. phandle = < 0x48 >;
  393. brcm,function = < 0x04 >;
  394. };
  395.  
  396. gpclk2_gpio43 {
  397. brcm,pins = < 0x2b >;
  398. phandle = < 0x3d >;
  399. brcm,pull = < 0x00 >;
  400. brcm,function = < 0x04 >;
  401. };
  402.  
  403. uart1_ctsrts_gpio30 {
  404. brcm,pins = < 0x1e 0x1f >;
  405. phandle = < 0x5a >;
  406. brcm,function = < 0x02 >;
  407. };
  408.  
  409. gpioout {
  410. brcm,pins = < 0x06 >;
  411. phandle = < 0x60 >;
  412. brcm,function = < 0x01 >;
  413. };
  414.  
  415. spi0_gpio35 {
  416. brcm,pins = < 0x23 0x24 0x25 0x26 0x27 >;
  417. phandle = < 0x4e >;
  418. brcm,function = < 0x04 >;
  419. };
  420.  
  421. pwm1_gpio45 {
  422. brcm,pins = < 0x2d >;
  423. phandle = < 0x4c >;
  424. brcm,function = < 0x04 >;
  425. };
  426.  
  427. pcm_gpio28 {
  428. brcm,pins = < 0x1c 0x1d 0x1e 0x1f >;
  429. phandle = < 0x45 >;
  430. brcm,function = < 0x06 >;
  431. };
  432.  
  433. dpi_gpio0 {
  434. brcm,pins = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  435. phandle = < 0x35 >;
  436. brcm,function = < 0x06 >;
  437. };
  438.  
  439. i2c0_gpio0 {
  440. brcm,pins = < 0x00 0x01 >;
  441. phandle = < 0x3e >;
  442. brcm,function = < 0x04 >;
  443. };
  444.  
  445. pcm_gpio18 {
  446. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  447. phandle = < 0x44 >;
  448. brcm,function = < 0x04 >;
  449. };
  450.  
  451. spi0_pins {
  452. brcm,pins = < 0x09 0x0a 0x0b >;
  453. phandle = < 0x0d >;
  454. brcm,function = < 0x04 >;
  455. };
  456.  
  457. pwm1_gpio13 {
  458. brcm,pins = < 0x0d >;
  459. phandle = < 0x49 >;
  460. brcm,function = < 0x04 >;
  461. };
  462.  
  463. pwm1_gpio41 {
  464. brcm,pins = < 0x29 >;
  465. phandle = < 0x4b >;
  466. brcm,function = < 0x04 >;
  467. };
  468.  
  469. dpi_18bit_gpio0 {
  470. brcm,pins = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 >;
  471. phandle = < 0x5f >;
  472. brcm,function = < 0x06 >;
  473. };
  474.  
  475. spi0_gpio7 {
  476. brcm,pins = < 0x07 0x08 0x09 0x0a 0x0b >;
  477. phandle = < 0x4d >;
  478. brcm,function = < 0x04 >;
  479. };
  480.  
  481. uart1_pins {
  482. brcm,pins;
  483. phandle = < 0x13 >;
  484. brcm,pull;
  485. brcm,function;
  486. };
  487.  
  488. i2c1_gpio44 {
  489. brcm,pins = < 0x2c 0x2d >;
  490. phandle = < 0x42 >;
  491. brcm,function = < 0x06 >;
  492. };
  493.  
  494. i2c0_gpio28 {
  495. brcm,pins = < 0x1c 0x1d >;
  496. phandle = < 0x3f >;
  497. brcm,function = < 0x04 >;
  498. };
  499.  
  500. i2c_slave_gpio18 {
  501. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  502. phandle = < 0x5d >;
  503. brcm,function = < 0x07 >;
  504. };
  505.  
  506. i2s {
  507. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  508. phandle = < 0x0c >;
  509. brcm,function = < 0x04 >;
  510. };
  511.  
  512. emmc_gpio48 {
  513. brcm,pins = < 0x30 0x31 0x32 0x33 0x34 0x35 >;
  514. phandle = < 0x19 >;
  515. brcm,function = < 0x07 >;
  516. };
  517.  
  518. i2c1_gpio2 {
  519. brcm,pins = < 0x02 0x03 >;
  520. phandle = < 0x41 >;
  521. brcm,function = < 0x04 >;
  522. };
  523.  
  524. uart0_ctsrts_gpio38 {
  525. brcm,pins = < 0x26 0x27 >;
  526. phandle = < 0x56 >;
  527. brcm,function = < 0x06 >;
  528. };
  529.  
  530. audio_pins {
  531. brcm,pins = < 0x28 0x29 >;
  532. phandle = < 0x1c >;
  533. brcm,function = < 0x04 >;
  534. };
  535.  
  536. i2c0 {
  537. brcm,pins = < 0x00 0x01 >;
  538. phandle = < 0x10 >;
  539. brcm,function = < 0x04 >;
  540. };
  541.  
  542. spi1_gpio16 {
  543. brcm,pins = < 0x10 0x11 0x12 0x13 0x14 0x15 >;
  544. phandle = < 0x4f >;
  545. brcm,function = < 0x03 >;
  546. };
  547.  
  548. jtag_gpio22 {
  549. brcm,pins = < 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  550. phandle = < 0x43 >;
  551. brcm,function = < 0x03 >;
  552. };
  553.  
  554. spi2_gpio40 {
  555. brcm,pins = < 0x28 0x29 0x2a 0x2b 0x2c 0x2d >;
  556. phandle = < 0x50 >;
  557. brcm,function = < 0x03 >;
  558. };
  559.  
  560. uart0_pins {
  561. brcm,pins = < 0x1e 0x1f 0x20 0x21 >;
  562. phandle = < 0x08 >;
  563. brcm,pull = < 0x02 0x00 0x00 0x02 >;
  564. brcm,function = < 0x07 >;
  565. };
  566.  
  567. i2c0_gpio44 {
  568. brcm,pins = < 0x2c 0x2d >;
  569. phandle = < 0x40 >;
  570. brcm,function = < 0x05 >;
  571. };
  572.  
  573. spi0_cs_pins {
  574. brcm,pins = < 0x08 0x07 >;
  575. phandle = < 0x0e >;
  576. brcm,function = < 0x01 >;
  577. };
  578.  
  579. uart0_ctsrts_gpio16 {
  580. brcm,pins = < 0x10 0x11 >;
  581. phandle = < 0x52 >;
  582. brcm,function = < 0x07 >;
  583. };
  584.  
  585. gpclk2_gpio6 {
  586. brcm,pins = < 0x06 >;
  587. phandle = < 0x3c >;
  588. brcm,function = < 0x04 >;
  589. };
  590.  
  591. sdhost_gpio48 {
  592. brcm,pins = < 0x30 0x31 0x32 0x33 0x34 0x35 >;
  593. phandle = < 0x0b >;
  594. brcm,function = < 0x04 >;
  595. };
  596.  
  597. bt_pins {
  598. brcm,pins = < 0x2b >;
  599. phandle = < 0x09 >;
  600. brcm,pull = < 0x00 >;
  601. brcm,function = < 0x04 >;
  602. };
  603.  
  604. emmc_gpio34 {
  605. brcm,pins = < 0x22 0x23 0x24 0x25 0x26 0x27 >;
  606. phandle = < 0x37 >;
  607. brcm,pull = < 0x00 0x02 0x02 0x02 0x02 0x02 >;
  608. brcm,function = < 0x07 >;
  609. };
  610.  
  611. gpclk1_gpio44 {
  612. brcm,pins = < 0x2c >;
  613. phandle = < 0x3b >;
  614. brcm,function = < 0x04 >;
  615. };
  616.  
  617. uart1_gpio14 {
  618. brcm,pins = < 0x0e 0x0f >;
  619. phandle = < 0x57 >;
  620. brcm,function = < 0x02 >;
  621. };
  622.  
  623. uart0_gpio36 {
  624. brcm,pins = < 0x24 0x25 >;
  625. phandle = < 0x55 >;
  626. brcm,function = < 0x06 >;
  627. };
  628.  
  629. sdio_pins {
  630. brcm,pins = < 0x22 0x23 0x24 0x25 0x26 0x27 >;
  631. phandle = < 0x1a >;
  632. brcm,pull = < 0x00 0x02 0x02 0x02 0x02 0x02 >;
  633. brcm,function = < 0x07 >;
  634. };
  635.  
  636. uart1_gpio32 {
  637. brcm,pins = < 0x20 0x21 >;
  638. phandle = < 0x59 >;
  639. brcm,function = < 0x02 >;
  640. };
  641.  
  642. pwm0_gpio18 {
  643. brcm,pins = < 0x12 >;
  644. phandle = < 0x47 >;
  645. brcm,function = < 0x02 >;
  646. };
  647.  
  648. gpclk1_gpio42 {
  649. brcm,pins = < 0x2a >;
  650. phandle = < 0x3a >;
  651. brcm,function = < 0x04 >;
  652. };
  653.  
  654. uart1_gpio40 {
  655. brcm,pins = < 0x28 0x29 >;
  656. phandle = < 0x5b >;
  657. brcm,function = < 0x02 >;
  658. };
  659.  
  660. emmc_gpio22 {
  661. brcm,pins = < 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  662. phandle = < 0x36 >;
  663. brcm,function = < 0x07 >;
  664. };
  665. };
  666.  
  667. pixelvalve@7e807000 {
  668. compatible = "brcm,bcm2835-pixelvalve2";
  669. status = "disabled";
  670. interrupts = < 0x02 0x0a >;
  671. phandle = < 0x6e >;
  672. reg = < 0x7e807000 0x100 >;
  673. };
  674.  
  675. v3d@7ec00000 {
  676. power-domains = < 0x11 0x0a >;
  677. compatible = "brcm,vc4-v3d";
  678. status = "disabled";
  679. interrupts = < 0x01 0x0a >;
  680. phandle = < 0x73 >;
  681. reg = < 0x7ec00000 0x1000 >;
  682. };
  683.  
  684. gpu {
  685. compatible = "brcm,bcm2835-vc4";
  686. status = "disabled";
  687. phandle = < 0x72 >;
  688. };
  689.  
  690. mmc@7e300000 {
  691. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  692. clocks = < 0x03 0x1c >;
  693. status = "disabled";
  694. interrupts = < 0x02 0x1e >;
  695. brcm,overclock-50 = < 0x00 >;
  696. bus-width = < 0x04 >;
  697. dma-names = "rx-tx";
  698. phandle = < 0x2b >;
  699. reg = < 0x7e300000 0x100 >;
  700. pinctrl-0 = < 0x19 >;
  701. dmas = < 0x0a 0x0b >;
  702. pinctrl-names = "default";
  703. };
  704.  
  705. spi@7e204000 {
  706. compatible = "brcm,bcm2835-spi";
  707. clocks = < 0x03 0x14 >;
  708. status = "okay";
  709. #address-cells = < 0x01 >;
  710. interrupts = < 0x02 0x16 >;
  711. cs-gpios = < 0x0f 0x08 0x01 0x0f 0x07 0x01 >;
  712. #size-cells = < 0x00 >;
  713. dma-names = "tx\0rx";
  714. phandle = < 0x24 >;
  715. reg = < 0x7e204000 0x200 >;
  716. pinctrl-0 = < 0x0d 0x0e >;
  717. dmas = < 0x0a 0x06 0x0a 0x07 >;
  718. pinctrl-names = "default";
  719.  
  720. spidev@1 {
  721. compatible = "spidev";
  722. #address-cells = < 0x01 >;
  723. #size-cells = < 0x00 >;
  724. phandle = < 0x63 >;
  725. reg = < 0x01 >;
  726. spi-max-frequency = < 0x7735940 >;
  727. };
  728.  
  729. spidev@0 {
  730. compatible = "spidev";
  731. #address-cells = < 0x01 >;
  732. #size-cells = < 0x00 >;
  733. phandle = < 0x62 >;
  734. reg = < 0x00 >;
  735. spi-max-frequency = < 0x7735940 >;
  736. };
  737. };
  738.  
  739. i2c@7e804000 {
  740. compatible = "brcm,bcm2835-i2c";
  741. clocks = < 0x03 0x14 >;
  742. status = "okay";
  743. #address-cells = < 0x01 >;
  744. interrupts = < 0x02 0x15 >;
  745. #size-cells = < 0x00 >;
  746. phandle = < 0x26 >;
  747. reg = < 0x7e804000 0x1000 >;
  748. clock-frequency = < 0x186a0 >;
  749. pinctrl-0 = < 0x14 >;
  750. pinctrl-names = "default";
  751.  
  752. mpu6050@68 {
  753. compatible = "invensense,mpu6050";
  754. status = "okay";
  755. phandle = < 0x7e >;
  756. reg = < 0x68 >;
  757. };
  758. };
  759.  
  760. vcsm {
  761. compatible = "raspberrypi,bcm2835-vcsm";
  762. firmware = < 0x07 >;
  763. status = "okay";
  764. phandle = < 0x78 >;
  765. };
  766.  
  767. audio {
  768. brcm,pwm-channels = < 0x08 >;
  769. compatible = "brcm,bcm2835-audio";
  770. status = "okay";
  771. phandle = < 0x27 >;
  772. pinctrl-0 = < 0x1c >;
  773. pinctrl-names = "default";
  774. };
  775.  
  776. i2s@7e203000 {
  777. compatible = "brcm,bcm2835-i2s";
  778. clocks = < 0x03 0x1f >;
  779. #sound-dai-cells = < 0x00 >;
  780. status = "disabled";
  781. dma-names = "tx\0rx";
  782. phandle = < 0x23 >;
  783. reg = < 0x7e203000 0x24 >;
  784. pinctrl-0 = < 0x0c >;
  785. dmas = < 0x0a 0x02 0x0a 0x03 >;
  786. pinctrl-names = "default";
  787. };
  788.  
  789. mailbox@7e00b880 {
  790. compatible = "brcm,bcm2835-mbox";
  791. #mbox-cells = < 0x00 >;
  792. interrupts = < 0x00 0x01 >;
  793. phandle = < 0x1b >;
  794. reg = < 0x7e00b880 0x40 >;
  795. };
  796.  
  797. gpiomem {
  798. compatible = "brcm,bcm2835-gpiomem";
  799. reg = < 0x7e200000 0x1000 >;
  800. };
  801.  
  802. vec@7e806000 {
  803. power-domains = < 0x11 0x07 >;
  804. compatible = "brcm,bcm2835-vec";
  805. clocks = < 0x03 0x18 >;
  806. status = "disabled";
  807. interrupts = < 0x02 0x1b >;
  808. phandle = < 0x6d >;
  809. reg = < 0x7e806000 0x1000 >;
  810. };
  811.  
  812. power {
  813. compatible = "raspberrypi,bcm2835-power";
  814. firmware = < 0x07 >;
  815. phandle = < 0x11 >;
  816. #power-domain-cells = < 0x01 >;
  817. };
  818.  
  819. pixelvalve@7e206000 {
  820. compatible = "brcm,bcm2835-pixelvalve0";
  821. status = "disabled";
  822. interrupts = < 0x02 0x0d >;
  823. phandle = < 0x64 >;
  824. reg = < 0x7e206000 0x100 >;
  825. };
  826.  
  827. csi@7e800000 {
  828. power-domains = < 0x11 0x0c >;
  829. compatible = "brcm,bcm2835-unicam";
  830. clocks = < 0x03 0x2d >;
  831. clock-names = "lp";
  832. status = "disabled";
  833. #address-cells = < 0x01 >;
  834. interrupts = < 0x02 0x06 >;
  835. #size-cells = < 0x00 >;
  836. #clock-cells = < 0x01 >;
  837. phandle = < 0x6b >;
  838. reg = < 0x7e800000 0x800 0x7e802000 0x04 >;
  839. };
  840.  
  841. mailbox@7e00b840 {
  842. compatible = "brcm,bcm2836-vchiq\0brcm,bcm2835-vchiq";
  843. interrupts = < 0x00 0x02 >;
  844. phandle = < 0x76 >;
  845. reg = < 0x7e00b840 0x3c >;
  846. };
  847.  
  848. firmware {
  849. compatible = "raspberrypi,bcm2835-firmware\0simple-bus";
  850. #address-cells = < 0x00 >;
  851. mboxes = < 0x1b >;
  852. #size-cells = < 0x00 >;
  853. phandle = < 0x07 >;
  854.  
  855. expgpio {
  856. compatible = "raspberrypi,firmware-gpio";
  857. gpio-controller;
  858. status = "okay";
  859. phandle = < 0x31 >;
  860. #gpio-cells = < 0x02 >;
  861. };
  862. };
  863.  
  864. dsi@7e209000 {
  865. power-domains = < 0x11 0x11 >;
  866. compatible = "brcm,bcm2835-dsi0";
  867. clocks = < 0x03 0x20 0x03 0x2f 0x03 0x31 >;
  868. clock-names = "phy\0escape\0pixel";
  869. #address-cells = < 0x01 >;
  870. interrupts = < 0x02 0x04 >;
  871. #size-cells = < 0x00 >;
  872. #clock-cells = < 0x01 >;
  873. phandle = < 0x05 >;
  874. reg = < 0x7e209000 0x78 >;
  875. clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr";
  876. };
  877.  
  878. mmcnr@7e300000 {
  879. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  880. clocks = < 0x03 0x1c >;
  881. status = "okay";
  882. interrupts = < 0x02 0x1e >;
  883. brcm,overclock-50 = < 0x00 >;
  884. bus-width = < 0x04 >;
  885. dma-names = "rx-tx";
  886. phandle = < 0x2c >;
  887. reg = < 0x7e300000 0x100 >;
  888. pinctrl-0 = < 0x1a >;
  889. dmas = < 0x0a 0x0b >;
  890. non-removable;
  891. pinctrl-names = "default";
  892. };
  893.  
  894. fb {
  895. compatible = "brcm,bcm2708-fb";
  896. firmware = < 0x07 >;
  897. status = "okay";
  898. phandle = < 0x77 >;
  899. };
  900.  
  901. local_intc@40000000 {
  902. compatible = "brcm,bcm2836-l1-intc";
  903. #interrupt-cells = < 0x02 >;
  904. interrupt-parent = < 0x18 >;
  905. phandle = < 0x18 >;
  906. reg = < 0x40000000 0x100 >;
  907. interrupt-controller;
  908. };
  909.  
  910. dpi@7e208000 {
  911. compatible = "brcm,bcm2835-dpi";
  912. clocks = < 0x03 0x14 0x03 0x2c >;
  913. clock-names = "core\0pixel";
  914. status = "disabled";
  915. #address-cells = < 0x01 >;
  916. #size-cells = < 0x00 >;
  917. phandle = < 0x66 >;
  918. reg = < 0x7e208000 0x8c >;
  919. };
  920.  
  921. mmc@7e202000 {
  922. compatible = "brcm,bcm2835-sdhost";
  923. clocks = < 0x03 0x14 >;
  924. brcm,pio-limit = < 0x01 >;
  925. status = "okay";
  926. interrupts = < 0x02 0x18 >;
  927. brcm,overclock-50 = < 0x00 >;
  928. bus-width = < 0x04 >;
  929. dma-names = "rx-tx";
  930. phandle = < 0x2a >;
  931. reg = < 0x7e202000 0x100 >;
  932. pinctrl-0 = < 0x0b >;
  933. dmas = < 0x0a 0x2000000d >;
  934. pinctrl-names = "default";
  935. };
  936.  
  937. hdmi@7e902000 {
  938. power-domains = < 0x11 0x05 >;
  939. compatible = "brcm,bcm2835-hdmi";
  940. clocks = < 0x03 0x10 0x03 0x19 >;
  941. clock-names = "pixel\0hdmi";
  942. ddc = < 0x15 >;
  943. status = "disabled";
  944. interrupts = < 0x02 0x08 0x02 0x09 >;
  945. dma-names = "audio-rx";
  946. phandle = < 0x6f >;
  947. hpd-gpios = < 0x0f 0x1c 0x01 >;
  948. reg = < 0x7e902000 0x600 0x7e808000 0x100 >;
  949. dmas = < 0x0a 0x11 >;
  950. };
  951.  
  952. pwm@7e20c000 {
  953. compatible = "brcm,bcm2835-pwm";
  954. clocks = < 0x03 0x1e >;
  955. status = "disabled";
  956. assigned-clock-rates = < 0x989680 >;
  957. assigned-clocks = < 0x03 0x1e >;
  958. phandle = < 0x69 >;
  959. reg = < 0x7e20c000 0x28 >;
  960. #pwm-cells = < 0x02 >;
  961. };
  962.  
  963. watchdog@7e100000 {
  964. compatible = "brcm,bcm2835-pm\0brcm,bcm2835-pm-wdt";
  965. clocks = < 0x03 0x15 0x03 0x1d 0x03 0x17 0x03 0x16 >;
  966. #reset-cells = < 0x01 >;
  967. clock-names = "v3d\0peri_image\0h264\0isp";
  968. system-power-controller;
  969. phandle = < 0x28 >;
  970. reg = < 0x7e100000 0x114 0x7e00a000 0x24 >;
  971. #power-domain-cells = < 0x01 >;
  972. };
  973.  
  974. interrupt-controller@7e00b200 {
  975. compatible = "brcm,bcm2836-armctrl-ic";
  976. #interrupt-cells = < 0x02 >;
  977. interrupt-parent = < 0x18 >;
  978. interrupts = < 0x08 0x04 >;
  979. phandle = < 0x01 >;
  980. reg = < 0x7e00b200 0x200 >;
  981. interrupt-controller;
  982. };
  983.  
  984. aux@7e215000 {
  985. compatible = "brcm,bcm2835-aux";
  986. clocks = < 0x03 0x14 >;
  987. #clock-cells = < 0x01 >;
  988. phandle = < 0x12 >;
  989. reg = < 0x7e215000 0x08 >;
  990. };
  991.  
  992. dsi@7e700000 {
  993. power-domains = < 0x11 0x12 >;
  994. compatible = "brcm,bcm2835-dsi1";
  995. clocks = < 0x03 0x23 0x03 0x30 0x03 0x32 >;
  996. clock-names = "phy\0escape\0pixel";
  997. status = "disabled";
  998. #address-cells = < 0x01 >;
  999. interrupts = < 0x02 0x0c >;
  1000. #size-cells = < 0x00 >;
  1001. #clock-cells = < 0x01 >;
  1002. phandle = < 0x06 >;
  1003. reg = < 0x7e700000 0x8c >;
  1004. clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr";
  1005. };
  1006.  
  1007. axiperf {
  1008. compatible = "brcm,bcm2835-axiperf";
  1009. firmware = < 0x07 >;
  1010. status = "disabled";
  1011. phandle = < 0x2d >;
  1012. reg = < 0x7e009800 0x100 0x7ee08000 0x100 >;
  1013. };
  1014.  
  1015. sound {
  1016. status = "disabled";
  1017. phandle = < 0x79 >;
  1018. };
  1019.  
  1020. i2c@7e205000 {
  1021. compatible = "brcm,bcm2835-i2c";
  1022. clocks = < 0x03 0x14 >;
  1023. status = "disabled";
  1024. #address-cells = < 0x01 >;
  1025. interrupts = < 0x02 0x15 >;
  1026. #size-cells = < 0x00 >;
  1027. phandle = < 0x25 >;
  1028. reg = < 0x7e205000 0x200 >;
  1029. clock-frequency = < 0x186a0 >;
  1030. pinctrl-0 = < 0x10 >;
  1031. pinctrl-names = "default";
  1032. };
  1033.  
  1034. txp@7e004000 {
  1035. compatible = "brcm,bcm2835-txp";
  1036. status = "disabled";
  1037. interrupts = < 0x01 0x0b >;
  1038. phandle = < 0x34 >;
  1039. reg = < 0x7e004000 0x20 >;
  1040. };
  1041.  
  1042. serial@7e215040 {
  1043. compatible = "brcm,bcm2835-aux-uart";
  1044. clocks = < 0x12 0x00 >;
  1045. status = "disabled";
  1046. interrupts = < 0x01 0x1d >;
  1047. phandle = < 0x22 >;
  1048. reg = < 0x7e215040 0x40 >;
  1049. pinctrl-0 = < 0x13 >;
  1050. pinctrl-names = "default";
  1051. };
  1052.  
  1053. dma@7e007000 {
  1054. #dma-cells = < 0x01 >;
  1055. compatible = "brcm,bcm2835-dma";
  1056. brcm,dma-channel-mask = < 0x7f35 >;
  1057. interrupts = < 0x01 0x10 0x01 0x11 0x01 0x12 0x01 0x13 0x01 0x14 0x01 0x15 0x01 0x16 0x01 0x17 0x01 0x18 0x01 0x19 0x01 0x1a 0x01 0x1b 0x01 0x1b 0x01 0x1b 0x01 0x1b 0x01 0x1c >;
  1058. phandle = < 0x0a >;
  1059. reg = < 0x7e007000 0xf00 >;
  1060. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7\0dma8\0dma9\0dma10\0dma11\0dma12\0dma13\0dma14\0dma-shared-all";
  1061. };
  1062.  
  1063. i2c@7e805000 {
  1064. compatible = "brcm,bcm2835-i2c";
  1065. clocks = < 0x03 0x14 >;
  1066. status = "disabled";
  1067. #address-cells = < 0x01 >;
  1068. interrupts = < 0x02 0x15 >;
  1069. #size-cells = < 0x00 >;
  1070. phandle = < 0x15 >;
  1071. reg = < 0x7e805000 0x1000 >;
  1072. clock-frequency = < 0x186a0 >;
  1073. };
  1074.  
  1075. spi@7e215080 {
  1076. compatible = "brcm,bcm2835-aux-spi";
  1077. clocks = < 0x12 0x01 >;
  1078. status = "disabled";
  1079. #address-cells = < 0x01 >;
  1080. interrupts = < 0x01 0x1d >;
  1081. #size-cells = < 0x00 >;
  1082. phandle = < 0x67 >;
  1083. reg = < 0x7e215080 0x40 >;
  1084. };
  1085.  
  1086. firmwarekms@7e600000 {
  1087. compatible = "raspberrypi,rpi-firmware-kms";
  1088. status = "disabled";
  1089. interrupts = < 0x02 0x10 >;
  1090. brcm,firmware = < 0x07 >;
  1091. phandle = < 0x74 >;
  1092. reg = < 0x7e600000 0x100 >;
  1093. };
  1094.  
  1095. rng@7e104000 {
  1096. compatible = "brcm,bcm2835-rng";
  1097. interrupts = < 0x02 0x1d >;
  1098. phandle = < 0x29 >;
  1099. reg = < 0x7e104000 0x10 >;
  1100. };
  1101.  
  1102. usb@7e980000 {
  1103. power-domains = < 0x11 0x06 >;
  1104. compatible = "brcm,bcm2708-usb";
  1105. clocks = < 0x16 >;
  1106. clock-names = "otg";
  1107. phy-names = "usb2-phy";
  1108. #address-cells = < 0x01 >;
  1109. interrupts = < 0x01 0x09 0x02 0x00 >;
  1110. #size-cells = < 0x00 >;
  1111. phandle = < 0x70 >;
  1112. phys = < 0x17 >;
  1113. reg = < 0x7e980000 0x10000 0x7e006000 0x1000 >;
  1114. interrupt-names = "usb\0soft";
  1115.  
  1116. usb-port@1 {
  1117. compatible = "usb424,2514";
  1118. #address-cells = < 0x01 >;
  1119. #size-cells = < 0x00 >;
  1120. reg = < 0x01 >;
  1121.  
  1122. usb-port@1 {
  1123. compatible = "usb424,2514";
  1124. #address-cells = < 0x01 >;
  1125. #size-cells = < 0x00 >;
  1126. reg = < 0x01 >;
  1127.  
  1128. ethernet@1 {
  1129. compatible = "usb424,7800";
  1130. local-mac-address = [ b8 27 eb e1 17 c2 ];
  1131. phandle = < 0x71 >;
  1132. reg = < 0x01 >;
  1133.  
  1134. mdio {
  1135. #address-cells = < 0x01 >;
  1136. #size-cells = < 0x00 >;
  1137.  
  1138. ethernet-phy@1 {
  1139. microchip,tx-lpi-timer = < 0x258 >;
  1140. microchip,eee-enabled;
  1141. microchip,led-modes = < 0x01 0x06 >;
  1142. phandle = < 0x2e >;
  1143. reg = < 0x01 >;
  1144. microchip,downshift-after = < 0x02 >;
  1145. };
  1146. };
  1147. };
  1148. };
  1149. };
  1150. };
  1151.  
  1152. smi@7e600000 {
  1153. compatible = "brcm,bcm2835-smi";
  1154. clocks = < 0x03 0x2a >;
  1155. status = "disabled";
  1156. interrupts = < 0x02 0x10 >;
  1157. assigned-clock-rates = < 0x7735940 >;
  1158. dma-names = "rx-tx";
  1159. assigned-clocks = < 0x03 0x2a >;
  1160. phandle = < 0x75 >;
  1161. reg = < 0x7e600000 0x100 >;
  1162. dmas = < 0x0a 0x04 >;
  1163. };
  1164.  
  1165. spi@7e2150c0 {
  1166. compatible = "brcm,bcm2835-aux-spi";
  1167. clocks = < 0x12 0x02 >;
  1168. status = "disabled";
  1169. #address-cells = < 0x01 >;
  1170. interrupts = < 0x01 0x1d >;
  1171. #size-cells = < 0x00 >;
  1172. phandle = < 0x68 >;
  1173. reg = < 0x7e2150c0 0x40 >;
  1174. };
  1175. };
  1176.  
  1177. leds {
  1178. compatible = "gpio-leds";
  1179. phandle = < 0x7b >;
  1180.  
  1181. act {
  1182. gpios = < 0x0f 0x1d 0x00 >;
  1183. label = "led0";
  1184. phandle = < 0x2f >;
  1185. default-state = "keep";
  1186. linux,default-trigger = "mmc0";
  1187. };
  1188.  
  1189. pwr {
  1190. gpios = < 0x31 0x02 0x01 >;
  1191. label = "led1";
  1192. phandle = < 0x30 >;
  1193. linux,default-trigger = "default-on";
  1194. };
  1195. };
  1196.  
  1197. aliases {
  1198. intc = "/soc/interrupt-controller@7e00b200";
  1199. spi2 = "/soc/spi@7e2150c0";
  1200. i2c1 = "/soc/i2c@7e804000";
  1201. i2c_vc = "/soc/i2c@7e205000";
  1202. spi0 = "/soc/spi@7e204000";
  1203. thermal = "/soc/thermal@7e212000";
  1204. sdhost = "/soc/mmc@7e202000";
  1205. aux = "/soc/aux@7e215000";
  1206. gpio = "/soc/gpio@7e200000";
  1207. mmc1 = "/soc/mmcnr@7e300000";
  1208. audio = "/soc/audio";
  1209. dma = "/soc/dma@7e007000";
  1210. ethernet0 = "/soc/usb@7e980000/usb-port@1/usb-port@1/ethernet@1";
  1211. soc = "/soc";
  1212. leds = "/leds";
  1213. mmc = "/soc/mmc@7e300000";
  1214. serial1 = "/soc/serial@7e201000";
  1215. i2c_arm = "/soc/i2c@7e804000";
  1216. uart0 = "/soc/serial@7e201000";
  1217. fb = "/soc/fb";
  1218. i2c2 = "/soc/i2c@7e805000";
  1219. i2s = "/soc/i2s@7e203000";
  1220. spi1 = "/soc/spi@7e215080";
  1221. usb = "/soc/usb@7e980000";
  1222. i2c0 = "/soc/i2c@7e205000";
  1223. watchdog = "/soc/watchdog@7e100000";
  1224. axiperf = "/soc/axiperf";
  1225. mmc0 = "/soc/mmc@7e202000";
  1226. sound = "/soc/sound";
  1227. mailbox = "/soc/mailbox@7e00b880";
  1228. uart1 = "/soc/serial@7e215040";
  1229. random = "/soc/rng@7e104000";
  1230. i2c = "/soc/i2c@7e804000";
  1231. serial0 = "/soc/serial@7e215040";
  1232. };
  1233.  
  1234. chosen {
  1235. bootargs = "coherent_pool=1M 8250.nr_uarts=0 bcm2708_fb.fbwidth=1824 bcm2708_fb.fbheight=984 bcm2708_fb.fbswap=1 vc_mem.mem_base=0x1ec00000 vc_mem.mem_size=0x20000000 dwc_otg.lpm_enable=0 console=ttyS0,115200 console=tty1 root=/dev/mmcblk0p7 rootfstype=ext4 elevator=deadline fsck.repair=yes rootwait quiet splash plymouth.ignore-serial-consoles";
  1236. kaslr-seed = < 0x6672efd2 0x6e1dbe7 >;
  1237. };
  1238.  
  1239. thermal-zones {
  1240.  
  1241. cpu-thermal {
  1242. thermal-sensors = < 0x02 >;
  1243. polling-delay = < 0x3e8 >;
  1244. polling-delay-passive = < 0x00 >;
  1245. coefficients = < 0xfffffde6 0x64960 >;
  1246. phandle = < 0x32 >;
  1247.  
  1248. cooling-maps {
  1249. };
  1250. };
  1251. };
  1252.  
  1253. timer {
  1254. compatible = "arm,armv7-timer";
  1255. always-on;
  1256. interrupt-parent = < 0x18 >;
  1257. interrupts = < 0x00 0x04 0x01 0x04 0x03 0x04 0x02 0x04 >;
  1258. };
  1259.  
  1260. memory {
  1261. device_type = "memory";
  1262. reg = < 0x00 0x1c000000 >;
  1263. };
  1264.  
  1265. phy {
  1266. compatible = "usb-nop-xceiv";
  1267. phandle = < 0x17 >;
  1268. #phy-cells = < 0x00 >;
  1269. };
  1270.  
  1271. fixedregulator_3v3 {
  1272. compatible = "regulator-fixed";
  1273. phandle = < 0x7c >;
  1274. regulator-min-microvolt = < 0x325aa0 >;
  1275. regulator-max-microvolt = < 0x325aa0 >;
  1276. regulator-always-on;
  1277. regulator-name = "3v3";
  1278. };
  1279.  
  1280. cpus {
  1281. enable-method = "brcm,bcm2836-smp";
  1282. #address-cells = < 0x01 >;
  1283. #size-cells = < 0x00 >;
  1284. phandle = < 0x7a >;
  1285.  
  1286. cpu@3 {
  1287. compatible = "arm,cortex-a53";
  1288. cpu-release-addr = < 0x00 0xf0 >;
  1289. device_type = "cpu";
  1290. enable-method = "spin-table";
  1291. phandle = < 0x20 >;
  1292. reg = < 0x03 >;
  1293. clock-frequency = "SrN";
  1294. };
  1295.  
  1296. cpu@1 {
  1297. compatible = "arm,cortex-a53";
  1298. cpu-release-addr = < 0x00 0xe0 >;
  1299. device_type = "cpu";
  1300. enable-method = "spin-table";
  1301. phandle = < 0x1e >;
  1302. reg = < 0x01 >;
  1303. clock-frequency = "SrN";
  1304. };
  1305.  
  1306. cpu@2 {
  1307. compatible = "arm,cortex-a53";
  1308. cpu-release-addr = < 0x00 0xe8 >;
  1309. device_type = "cpu";
  1310. enable-method = "spin-table";
  1311. phandle = < 0x1f >;
  1312. reg = < 0x02 >;
  1313. clock-frequency = "SrN";
  1314. };
  1315.  
  1316. cpu@0 {
  1317. compatible = "arm,cortex-a53";
  1318. cpu-release-addr = < 0x00 0xd8 >;
  1319. device_type = "cpu";
  1320. enable-method = "spin-table";
  1321. phandle = < 0x1d >;
  1322. reg = < 0x00 >;
  1323. clock-frequency = "SrN";
  1324. };
  1325. };
  1326.  
  1327. fixedregulator_5v0 {
  1328. compatible = "regulator-fixed";
  1329. phandle = < 0x7d >;
  1330. regulator-min-microvolt = < 0x4c4b40 >;
  1331. regulator-max-microvolt = < 0x4c4b40 >;
  1332. regulator-always-on;
  1333. regulator-name = "5v0";
  1334. };
  1335.  
  1336. axi {
  1337.  
  1338. vc_mem {
  1339. reg = < 0x1ec00000 0x20000000 0xc0000000 >;
  1340. };
  1341. };
  1342. };
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