# SP-1000 Specifications

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The SP-1000 is a 16-bit hobbyist CPU and computing system based around an FPGA. See ["Pinout"](#Pinout) for information on pin requirements.

**Note: In this specification document, data size units are to be interpreted using their "classical" definitions, multiples of 1024 bytes.**

## Overview

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The SP-1000 is a 16-bit computer system designed to be capable of being fully comprehended by a programmer, and to have the entirety of the system in mind when programming.

The SP-1000 processor has a 32-bit address space, allowing up to 4GB of memory or memory-mapped IO to be addressed. In the case that an out-of-bounds memory location is requested, the value returned over the data line is tied to ground rather than left floating.

For faster access, 8 general purpose 16-bit registers are available for computation. There a 32-bit register used solely for storing the the current instruction, incremented with each instruction. It cannot be set with a typical MOV instruction, but instead with the special JMP/JPC instructions, however it can be set this way (see "MOV" in ["Instruction Set"](#Instruction Set))

External to the processor, a address located next to memory (the "External Address Register") is set each time a memory operation is required. This register is set by utilizing both the OUTPUT data line and 16 additional pins to form a 32-bit address.

Each time an instruction is executed, three cycles of the CPU's clock are used and three phases are used.

1. Fetch - This phase loads the current instruction from memory. It sets the External Address Register to the value of the instruction pointer, and requests the value at that address in preparation for the next phase.
2. Decode - This phase takes the instruction requested in the previous phase and breaks it down into its constituent parts. It breaks down the instruction into operands (see ["Operands"](#Operands)) and exposes the appropriate registers in slots 1, 2, and 3. Along with that, it extracts other information from bits to inform the operation of certain instructions.
3. Execute - This phase executes the instruction with the information provided by the previous phase. See ["Instruction Set"](#Instruction Set) for information on each instruction's behavior.

### Pinout

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0-15: INPUT - An input data line to take in data from memory or external I/O.

16-31: OUTPUT - An output data line to send data to memory or external I/O.

16-47: ADDRESS - Used to form a 32 bit memory address to send to the External Address Register.

48: MEMREG - If set, the ADDRESS data line is used and its value is stored in the External Address Register.

49: READ - If set, memory returns the value at the address stored in the External Address Register to the INPUT line.

50: WRITE - If set, memory sets the value at the the address stored in the External Address Register to the value of the OUTPUT line.



### Instruction Set

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0: NOP - Does nothing.

1: ADD - Adds the contents of operand 1 to operand 2, and stores the result in operand 3.

2: SUB - Subtracts the contents of operand 2 from operand 1, and stores the result in operand 3.

3: MUL - Multiplies the contents of operand 1 by operand 2, and stores the result in operand 3.

4: SHIFT - Shifts the contents of operand 1 by a number of bits represented by the value of operand 2, and stores it in operand 3. The shift is left or right depending on if the eighth bit is 0 or 1, respectively.

5: AND - Bitwise ANDs operand 1 and operand 2 and stores the result in the operand 3.

6: OR - Bitwise ORs operand 1 and operand 2 and stores the result in the operand 3.

7: XOR - Bitwise XORs operand 1 and operand 2 and stores the result in the operand 3.

8: NOT - Bitwise NOTs operand 1 and operand 2 and stores the result in the operand 3.

9: JMP - Sets the instruction pointer to the contents of the first two operand registers.

A: JPC - Performs the same operation as JMP, based on the contents of the provided register. If the eighth bit is 1, it jumps if the operand register is zero. Otherwise, it jumps if the operand register is zero.

B: READ - Reads a word from memory into the first operand, at the location specified by the 2nd and 3rd operands.

C: WRITE - Writes a word from the first operand to memory, at the location specified by the 2nd and 3rd operands.

D: MOV - Copies the contents of the first operand to the second operand. If the eighth bit is 1, the first operand is ignored and a word of the instruction pointer is copied into the second operand. The word copied is the lower or higher word depending on whether the seventh bit is 0 or 1, respectively.

F: LIT - Increments the instruction pointer, and reads the data at that location to the operand.

### Operands

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An "operand" is a three-bit sequence representing a register. A register can refer to any of the eight registers. The order of operands goes from the highest bit to the lowest, however the individual operands are to be read from lowest to highest like any other binary number. An instruction may ask for two registers, in the case of a memory address. They are stitched in order.

[INSERT FANCY IMAGE DEMONSTRATING AN INSTRUCTION HERE]