/home/bielpa/.priv/drafts/esp8266/main/main.c:
35      {
   0x40100ee0 <+0>:     12 c1 f0        addi    a1, a1, -16
   0x40100ee3 <+3>:     09 31   s32i.n  a0, a1, 12
   0x40100ee5 <+5>:     c9 21   s32i.n  a12, a1, 8

36          uint32_t delay_cycles = US_TO_CYCLES(delay_us);
   0x40100ee7 <+7>:     e0 32 11        slli    a3, a2, 2
   0x40100eea <+10>:    2a 23   add.n   a2, a3, a2
   0x40100eec <+12>:    c0 c2 11        slli    a12, a2, 4

37
38          vPortETSIntrLock();
   0x40100eef <+15>:    85 a9 ff        call0   0x40100988 <vPortETSIntrLock>

39
40          READ_CCOUNT(cycles_begin);
   0x40100ef2 <+18>:    30 ea 03        rsr.ccount      a3
   0x40100ef5 <+21>:    21 ab fc        l32r    a2, 0x401001a4
   0x40100ef8 <+24>:    39 02   s32i.n  a3, a2, 0

41
42          wait(delay_cycles); //80 -> 1us
   0x40100efa <+26>:    30 ea 03        rsr.ccount      a3

28          waitUntil += delta;
   0x40100efd <+29>:    30 3c 80        add     a3, a12, a3

29          do {
30              READ_CCOUNT(cycleCount);
   0x40100f00 <+32>:    20 ea 03        rsr.ccount      a2

31          } while(waitUntil > cycleCount);
   0x40100f03 <+35>:    37 32 f9        bltu    a2, a3, 0x40100f00 <custom_delay_us+32>

43
44          READ_CCOUNT(cycles_end);
   0x40100f06 <+38>:    30 ea 03        rsr.ccount      a3
   0x40100f09 <+41>:    21 a7 fc        l32r    a2, 0x401001a8
   0x40100f0c <+44>:    32 62 00        s32i    a3, a2, 0

45
46          vPortETSIntrUnlock();
   0x40100f0f <+47>:    45 ac ff        call0   0x401009d4 <vPortETSIntrUnlock>
   0x40100f12 <+50>:    02 21 03        l32i    a0, a1, 12
   0x40100f15 <+53>:    c2 21 02        l32i    a12, a1, 8
   0x40100f18 <+56>:    12 c1 10        addi    a1, a1, 16
   0x40100f1b <+59>:    0d f0   ret.n
End of assembler dump.