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- ;NOTE: all bits are relative to 0.
- ;This means bits are marked 0-7, where 7
- ;is $80.
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;; Write registers
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- !CCNT = $2200 ;SA-1 CPU CONTROL (4.1.1)
- !SIE = $2201 ;SUPER NES CPU INT ENABLE (4.1.2)
- !SIC = $2202 ;SUPER NES CPU INT CLEAR (4.1.3)
- !CRVL = $2203 ;SA-1 CPU RESET VECTOR (4.1.4) \bits 0-7
- !CRVH = $2204 ;SA-1 CPU RESET VECTOR (4.1.4) /bits 8-15
- !CNVL = $2205 ;SA-1 CPU NMI VECTOR (4.1.5) \bits 0-7
- !CNVH = $2206 ;SA-1 CPU NMI VECTOR (4.1.5) /bits 8-15
- !CIVL = $2207 ;SA-1 CPU IRQ VECTOR (4.1.6) \bits 0-7
- !CIVH = $2208 ;SA-1 CPU IRQ VECTOR (4.1.6) /bits 8-15
- !SCNT = $2209 ;SUPER NES CPU CONTROL (4.1.7)
- !CIE = $220a ;SA-1 CPU INT ENABLE (4.1.8)
- !CIC = $220b ;SA-1 CPU INT CLEAR (4.1.9)
- !SNVL = $220c ;SUPER NES CPU NMI VECTOR (4.1.10) \bits 0-7
- !SNVH = $220d ;SUPER NES CPU NMI VECTOR (4.1.10) /bits 8-15
- !SIVL = $220e ;SUPER NES CPU IRQ VECTOR (4.1.11) \bits 0-7
- !SIVH = $220f ;SUPER NES CPU IRQ VECTOR (4.1.11) /bits 8-15
- !TMC = $2210 ;H/V TIMER CONTROL (4.1.12)
- !CTR = $2211 ;SA-1 CPU TIMER RESTART (4.1.13)
- !HCNTL = $2212 ;SET H-COUNT (4.1.14) \bits 0-7
- !HCNTH = $2213 ;SET H-COUNT (4.1.14) /bits 8-15 (only bit 8 used)
- !VCNTL = $2214 ;SET V-COUNT (4.1.15) \bits 0-7
- !VCNTH = $2215 ;SET V-COUNT (4.1.15) /bits 8-15 (only bit 8 used)
- !CXB = $2220 ;SET SUPER MMC BANK C (4.1.16) \
- !DXB = $2221 ;SET SUPER MMC BANK D (4.1.17) | I have no clue...
- !EXB = $2222 ;SET SUPER MMC BANK E (4.1.18) |
- !FXB = $2223 ;SET SUPER MMC BANK F (4.1.19) /
- !BMAPS = $2224 ;SUPER NES CPU BW-RAM ADDRESS MAPPING (4.1.20)
- !BMAP = $2225 ;SA-1 CPU BW-RAM ADDRESS MAPPING (4.1.21)
- !SBWE = $2226 ;SUPER NES CPU BW-RAM WRITE ENABLE (4.1.22)
- !CBWE = $2227 ;SA-1 CPU BW-RAM WRITE ENABLE (4.1.23)
- !BWPA = $2228 ;BW-RAM WRITE-PROTECTED AREA (4.1.24)
- !SIWP = $2229 ;SA-1 I-RAM WRITE PROTECTION (4.1.25) \S-CPU controlled
- !CIWP = $222a ;SA-1 I-RAM WRITE PROTECTION (4.1.26) / SA-1 controlled
- !DCNT = $2230 ;DMA CONTROL (4.1.27)
- !CDMA = $2231 ;CHARACTER CONVERSION OMA PARAMETERS (4.1.28)
- !SDAL = $2232 ;DMA SOURCE DEVICE START ADDRESS (4.1.29) \ bits 0-7
- !SDAH = $2233 ;DMA SOURCE DEVICE START ADDRESS (4.1.29) | bits 8-15
- !SDAB = $2234 ;DMA SOURCE DEVICE START ADDRESS (4.1.29) / bits 16-23
- !DDAL = $2235 ;DMA DESTINATION START ADDRESS (4.1.30) \ bits 0-7
- !DDAH = $2236 ;DMA DESTINATION START ADDRESS (4.1.30) | bits 8-15
- !DDAB = $2237 ;DMA DESTINATION START ADDRESS (4.1.30) / bits 16-23
- !DTCL = $2238 ;DMA TERMINAL COUNTER (4.1.31) \ bits 0-7
- !DTCH = $2239 ;DMA TERMINAL COUNTER (4.1.31) / bits 8-15
- !BBF = $223f ;BW-RAM BIT MAP FORMAT (4.1.32)
- !BRF0 = $2240 ;BIT MAP REGISTER FILE (4.1.33) \ File 0
- !BRF1 = $2241 ;BIT MAP REGISTER FILE (4.1.33) | File 1
- !BRF2 = $2242 ;BIT MAP REGISTER FILE (4.1.33) | File 2
- !BRF3 = $2243 ;BIT MAP REGISTER FILE (4.1.33) | File 3
- !BRF4 = $2244 ;BIT MAP REGISTER FILE (4.1.33) | File 4
- !BRF5 = $2245 ;BIT MAP REGISTER FILE (4.1.33) | File 5
- !BRF6 = $2246 ;BIT MAP REGISTER FILE (4.1.33) | File 6
- !BRF7 = $2247 ;BIT MAP REGISTER FILE (4.1.33) | File 7
- !BRF8 = $2248 ;BIT MAP REGISTER FILE (4.1.33) | File 8
- !BRF9 = $2249 ;BIT MAP REGISTER FILE (4.1.33) | File 9
- !BRFA = $224a ;BIT MAP REGISTER FILE (4.1.33) | File A
- !BRFB = $224b ;BIT MAP REGISTER FILE (4.1.33) | File B
- !BRFC = $224c ;BIT MAP REGISTER FILE (4.1.33) | File C
- !BRFD = $224d ;BIT MAP REGISTER FILE (4.1.33) | File D
- !BRFE = $224e ;BIT MAP REGISTER FILE (4.1.33) | File E
- !BRFF = $224f ;BIT MAP REGISTER FILE (4.1.33) / File F
- !MCNT = $2250 ;ARITHMETIC CONTROL (4.1.34)
- !MAL = $2251 ;ARITHMETIC PARAMETERS: MULTIPLICAND/DIVIDEND (4.1.35) \ bits 0-7
- !MAH = $2252 ;ARITHMETIC PARAMETERS: MULTIPLICAND/DIVIDEND (4.1.35) / bits 8-15
- !MBL = $2253 ;ARITHMETIC PARAMETERS: MULTIPLIER/DIVISOR (4.1.36) \ bits 0-7
- !MBH = $2254 ;ARITHMETIC PARAMETERS: MULTIPLIER/DIVISOR (4.1.36) / bits 8-15
- !VBD = $2258 ;VARIABLE-LENGTH BIT PROCESSING (4.1.37)
- !VDAL = $2259 ;VARIABLE-LENGTH BIT GAME PAK ROM START ADDRESS(4.1.38) \ bits 0-7
- !VDAH = $225a ;VARIABLE-LENGTH BIT GAME PAK ROM START ADDRESS(4.1.38) | bits 8-15
- !VDAB = $225b ;VARIABLE-LENGTH BIT GAME PAK ROM START ADDRESS(4.1.38) / bits 16-23
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;; End Write registers
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;; Read registers
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- !SFR = $2300 ;SUPER NES CPU FLAG READ (4.1.39)
- !CFR = $2301 ;SA-1 CPU FLAG READ (4.1.40)
- !HCRL = $2302 ;H-COUNT READ (4.1.41)
- !HCRH = $2303 ;H-COUNT READ (4.1.41)
- !VCRL = $2304 ;V-COUNT READ (4.1.42)
- !VCRH = $2305 ;V-COUNT READ (4.1.42)
- !MR1 = $2306 ;ARITHMETIC RESULT [PRODUCT/QUOTIENT/ACCUMULATIVE SUM](4.1.43) \ bits 0-7
- !MR2 = $2307 ;ARITHMETIC RESULT [PRODUCT/QUOTIENT/ACCUMULATIVE SUM](4.1.43) | bits 8-15
- !MR3 = $2308 ;ARITHMETIC RESULT [PRODUCT/QUOTIENT/ACCUMULATIVE SUM](4.1.43) | bits 16-23
- !MR4 = $2309 ;ARITHMETIC RESULT [PRODUCT/QUOTIENT/ACCUMULATIVE SUM](4.1.43) | bits 24-31
- !MR5 = $230a ;ARITHMETIC RESULT [PRODUCT/QUOTIENT/ACCUMULATIVE SUM](4.1.43) / bits 32-39
- !OF = $230b ;ARITHMETIC OVERFLOW FLAG (4.1.44)
- !VDPL = $230c ;VARIABLE-LENGTH DATA READ PORT (4.1.45) \ bits 0-7
- !VDPH = $230d ;VARIABLE-LENGTH DATA READ PORT (4.1.45) / bits 8-15
- !VC = $230e ;VERSION CODE REGISTER (4.1.46)
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;; End Read registers
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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