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  1. #include "bone/black.h"
  2. #include "gpio.h"
  3.  
  4. // XXX not compatible with cape-universal!
  5.  
  6. // Requires a sufficiently recent kernel by rcn (4.9-bone or 4.9-ti).
  7. //
  8. // A udev rule along these lines is recommended:
  9. //
  10. // SUBSYSTEM=="subsystem", KERNEL=="gpio", ACTION=="add", \
  11. // RUN+="/bin/mkdir -p /dev/gpio"
  12. //
  13. // SUBSYSTEM=="gpio", ACTION=="add", TEST=="value", ATTR{label}!="sysfs", \
  14. // RUN+="/bin/ln -sT '/sys/class/gpio/%k' /dev/gpio/%s{label}"
  15.  
  16. / {
  17. // If you want to use multiple overlays that do gpio configuration, be
  18. // sure that each uses a different device tree node!
  19.  
  20. gpio-demo {
  21. compatible = "gpio-of-helper";
  22.  
  23. // It is usually not *strictly* required to perform pinmux for
  24. // GPIOs since this is typically their default, but it's good
  25. // practice to do it anyway since:
  26. // 1. it makes *sure* the pinmux is right
  27. // 2. you can configure internal pull-up/down
  28. // 3. it lets the kernel know the pins are in use
  29. pinctrl-names = "default";
  30. pinctrl-0 = <&gpio_demo_pins>;
  31.  
  32. // Note that gpio numbers for each pin can be found in the
  33. // comments in include/bone/black.h
  34.  
  35. // custom (new) configuration
  36.  
  37.  
  38. P9_14 {
  39. gpio = <&gpio1 18 ACTIVE_HIGH>; // P9.14
  40. output;
  41. init-low;
  42. };
  43. P9_15 {
  44. gpio = <&gpio1 16 ACTIVE_HIGH>; // P9.15
  45. input;
  46. };
  47.  
  48.  
  49. P9_23 {
  50. gpio = <&gpio1 17 ACTIVE_HIGH>; // P9.23
  51. output;
  52. init-low;
  53. };
  54. P9_27 {
  55. gpio = <&gpio3 19 ACTIVE_HIGH>; // P9.27
  56. output;
  57. init-low;
  58. };
  59. P8_3 {
  60. gpio = <&gpio1 6 ACTIVE_HIGH>; // P8.3
  61. output;
  62. init-low;
  63. };
  64. P8_4 {
  65. gpio = <&gpio1 7 ACTIVE_HIGH>; // P8.4
  66. output;
  67. init-low;
  68. };
  69. P8_5 {
  70. gpio = <&gpio1 2 ACTIVE_HIGH>; // P8.5
  71. output;
  72. init-low;
  73. };
  74. P8_6 {
  75. gpio = <&gpio1 3 ACTIVE_HIGH>; // P8.6
  76. output;
  77. init-low;
  78. };
  79. P8_11 {
  80. gpio = <&gpio1 13 ACTIVE_HIGH>; // P8.11
  81. output;
  82. init-low;
  83. };
  84. P8_12 {
  85. gpio = <&gpio1 12 ACTIVE_HIGH>; // P8.12
  86. output;
  87. init-low;
  88. };
  89. P8_14 {
  90. gpio = <&gpio0 26 ACTIVE_HIGH>; // P8.14
  91. output;
  92. init-low;
  93. };
  94. P8_15 {
  95. gpio = <&gpio1 15 ACTIVE_HIGH>; // P8.15
  96. input;
  97. };
  98. P8_16 {
  99. gpio = <&gpio1 14 ACTIVE_HIGH>; // P8.16
  100. input;
  101. };
  102. P8_17 {
  103. gpio = <&gpio0 27 ACTIVE_HIGH>; // P8.17
  104. input;
  105. };
  106. P8_18 {
  107. gpio = <&gpio2 1 ACTIVE_HIGH>; // P8.18
  108. input;
  109. };
  110. P8_20 {
  111. gpio = <&gpio1 31 ACTIVE_HIGH>; // P8.20
  112. output;
  113. init-low;
  114. };
  115. P8_21 {
  116. gpio = <&gpio1 30 ACTIVE_HIGH>; // P8.21
  117. output;
  118. init-low;
  119. };
  120. P8_22 {
  121. gpio = <&gpio1 5 ACTIVE_HIGH>; // P8.22
  122. output;
  123. init-low;
  124. };
  125. P8_23 {
  126. gpio = <&gpio1 4 ACTIVE_HIGH>; // P8.23
  127. output;
  128. init-low;
  129. };
  130. P8_24 {
  131. gpio = <&gpio1 1 ACTIVE_HIGH>; // P8.24
  132. output;
  133. init-low;
  134. };
  135. P8_25 {
  136. gpio = <&gpio1 0 ACTIVE_HIGH>; // P8.25
  137. input;
  138. };
  139. P8_26 {
  140. gpio = <&gpio1 29 ACTIVE_HIGH>; // P8.26
  141. input;
  142. };
  143. P8_27 {
  144. gpio = <&gpio2 22 ACTIVE_HIGH>; // P8.27
  145. input;
  146. };
  147. P8_28 {
  148. gpio = <&gpio2 24 ACTIVE_HIGH>; // P8.28
  149. input;
  150. };
  151. P8_29 {
  152. gpio = <&gpio2 23 ACTIVE_HIGH>; // P8.29
  153. input;
  154. };
  155. P8_30 {
  156. gpio = <&gpio2 25 ACTIVE_HIGH>; // P8.30
  157. input;
  158. };
  159. P8_39 {
  160. gpio = <&gpio2 12 ACTIVE_HIGH>; // P8.39
  161. input;
  162. };
  163. P8_40 {
  164. gpio = <&gpio2 13 ACTIVE_HIGH>; // P8.40
  165. input;
  166. };
  167. P8_41 {
  168. gpio = <&gpio2 10 ACTIVE_HIGH>; // P8.41
  169. output;
  170. init-low;
  171. };
  172. P8_42 {
  173. gpio = <&gpio2 11 ACTIVE_HIGH>; // P8.42
  174. output;
  175. init-low;
  176. };
  177. P8_43 {
  178. gpio = <&gpio2 8 ACTIVE_HIGH>; // P8.43
  179. output;
  180. init-low;
  181. };
  182. P8_44 {
  183. gpio = <&gpio2 9 ACTIVE_HIGH>; // P8.44
  184. input;
  185. };
  186. P8_45 {
  187. gpio = <&gpio2 6 ACTIVE_HIGH>; // P8.45
  188. input;
  189. };
  190. P8_46 {
  191. gpio = <&gpio2 7 ACTIVE_HIGH>; // P8.46
  192. input;
  193. };
  194. };
  195. };
  196.  
  197. &am33xx_pinmux {
  198. gpio_demo_pins: gpio-demo {
  199. pinctrl-single,pins = <
  200. //PIN_PULLUP( P8_07, 7 ) // gpio 2.02 / button
  201. //PIN_PULLUP( P8_08, 7 ) // gpio 2.03 / reset-thing
  202. //PIN_PULLUP( P8_09, 7 ) // gpio 2.05 / input-bidi
  203. //PIN_PULLUP( P8_10, 7 ) // gpio 2.04 / output-bidi
  204. PIN_PULLDN( P9_14, 7 ) //gpio 1.18
  205. PIN_NOPULL( P9_15a, 7 ) //gpio 1.16
  206. PIN_NOPULL( P9_15b, 7 ) //gpio 1.16 //for some reason there are two processors on P9_15?
  207. PIN_PULLDN( P9_23, 7 ) // gpio 1.17 // use PIN_PULLUP/PIN_PULLDN/PIN_NOPULL mode 7
  208. PIN_PULLDN( P9_27, 7 ) // gpio 3.19 //if we want slow slew rate: PIN_PULLUP( P9_26, 3 | SLEW_SLOW)
  209. //AIN1-3 not configurable?
  210. PIN_PULLDN( P8_03, 7 ) // gpio 1.6
  211. PIN_PULLDN( P8_04, 7 ) // gpio 1.7
  212. PIN_PULLDN( P8_05, 7 ) // gpio 1.2
  213. PIN_PULLDN( P8_06, 7 ) // gpio 1.3
  214. PIN_PULLDN( P8_11, 7 ) // gpio 1.13
  215. PIN_PULLDN( P8_12, 7 ) // gpio 1.12
  216. PIN_PULLDN( P8_14, 7 ) // gpio 1.26
  217. PIN_NOPULL( P8_15, 7 ) // gpio 1.15
  218. PIN_NOPULL( P8_16, 7 ) // gpio 1.14
  219. PIN_NOPULL( P8_17, 7 ) // gpio 2.1?
  220. PIN_NOPULL( P8_18, 7 ) // gpio 2.1?
  221. PIN_PULLDN( P8_20, 7 ) // gpio 1.31
  222. PIN_PULLDN( P8_21, 7 ) // gpio 1.30
  223. PIN_PULLDN( P8_22, 7 ) // gpio 1.5
  224. PIN_NOPULL( P8_23, 7 ) // gpio 1.4
  225. PIN_PULLDN( P8_24, 7 ) // gpio 1.1
  226. PIN_NOPULL( P8_25, 7 ) // gpio 1.0
  227. PIN_NOPULL( P8_26, 7 ) // gpio 1.29
  228. PIN_NOPULL( P8_27, 7 ) // gpio 2.22
  229. PIN_NOPULL( P8_28, 7 ) // gpio 2.24
  230. PIN_NOPULL( P8_29, 7 ) // gpio 2.23
  231. PIN_NOPULL( P8_30, 7 ) // gpio 2.25
  232. PIN_NOPULL( P8_39, 7 ) // gpio 2.12
  233. PIN_NOPULL( P8_40, 7 ) // gpio 2.13
  234. PIN_PULLDN( P8_41, 7 ) // gpio 2.10
  235. PIN_PULLDN( P8_42, 7 ) // gpio 2.11
  236. PIN_PULLDN( P8_43, 7 ) // gpio 2.8
  237. PIN_NOPULL( P8_44, 7 ) // gpio 2.9
  238. PIN_NOPULL( P8_45, 7 ) // gpio 2.6
  239. PIN_NOPULL( P8_46, 7 ) // gpio 2.7
  240. //PIN_NOPULL( P9_19, 7 ) // gpio
  241. //PIN_NOPULL( P9_20, 7 ) // gpio
  242. >;
  243. };
  244. uart4_pins: uart4 {
  245. pinctrl-single,pins = <
  246. PIN_PULLUP( P9_13, 6 ) // txd
  247. PIN_PULLUP( P9_11, 6 ) // rxd
  248. >;
  249. };
  250. uart2_pins: uart2 {
  251. pinctrl-single,pins = <
  252. PIN_PULLUP( P9_21, 1 ) // txd
  253. PIN_PULLUP( P9_22, 1 ) // rxd
  254. >;
  255. };
  256. uart1_pins: uart1 {
  257. pinctrl-single,pins = <
  258. PIN_PULLUP( P9_24, 0 ) // txd
  259. PIN_PULLUP( P9_26, 0 ) // rxd
  260. >;
  261. };
  262. };
  263.  
  264. // configure and enable uart modules
  265. &uart4 {
  266. status = "okay";
  267.  
  268. pinctrl-names = "default";
  269. pinctrl-0 = <&uart4_pins>;
  270. };
  271.  
  272. &uart2 {
  273. status = "okay";
  274.  
  275. pinctrl-names = "default";
  276. pinctrl-0 = <&uart2_pins>;
  277. };
  278.  
  279. &uart1 {
  280. status = "okay";
  281.  
  282. pinctrl-names = "default";
  283. pinctrl-0 = <&uart1_pins>;
  284. };
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