CPLD CPU Info

CPU Data, this should give a rough idea on how i did my CPU, which can hopefully be useful to you to design your own further.

---------------Structure:
8 bit Data Bus
16 bit Address Bus
7 bit Opcodes (bit 7 is thrown away)
Instruction lenght(s): 1-3 bytes (including Opcode)

---------------Registers:
Accumulator (A) (8 bits)
Secondary Register (B) (8 bits)
Index Register (X) (8 bits)
Page Register (N) (8 bits)
Stack Pointer (SP) (16 bits)
Program Counter (PC) (16 bits)

---------------Addressing Modes:

Immediate: 		Operand is the value directly following the instruction
	OPC 0xLL	(LL is the  8 bit data)
	OPC 0xHHLL	(HHLL is the 16 bit data)

Absolute: 		Operand is an Address used to load the value
	OPC 0xHHLL	(value is loaded from address 0xHHLL)

Asbolute X:		Operand is an Address used to load the value, effective address is added with X
	OPC 0xHHLL	(value is loaded from address 0xHHLL + X) (X is sign extended to 16 bits)

N-Page:			Operand is an N-Page Address used to load the value, effective address is combined from the N Register and 0xLL
	OPC 0xLL	(value is loaded from address 0xNNLL, where 0xNN is taken from the N Register)

N-Page X:		Operand is an N-Page Address used to load the value, effective address is combined from the N Register and 0xLL plus X
	OPC 0xLL	(value is loaded from address 0xNNLL + X, where 0xNN is taken from the N Register) (X is sign extended to 16 bits)

---------------Arithmetic/Logic Instructions:
Flags:
Z (Zero)		- set when an ALI outputs a result equal to 0
C (Carry)		- set when an ALI outputs a result that went above 0xFF (255)
N (Negative)	- set when an ALI outputs a result that went below 0x00 (0)

these are the basic ALIs i always try to implement:
note that "S" refers to the "source", which is just the data that could come from any of the above mentioned Addressing Modes or a Register.

ADD - Addition			- A + S -> A		- Flags: Z C 0
INC - Increment			- S + 1 -> S		- Flags: Z C 0
SUB - Subtract			- A - S -> A		- Flags: Z 0 N
DEC - Decrement			- S - 1 -> S		- Flags: Z 0 N
AND - Logic AND			- A & S -> A		- Flags: Z 0 0
OR  - Logic OR			- A ∥ S -> A		- Flags: Z 0 0
XOR - Logic XOR			- A ⊻ S -> A		- Flags: Z 0 0
CMP - Compare			- A ? S				- Flags: Z C N

Compare stores no result, it only updates the flags.
the flags function a bit differently when used in a Compare (CMP) instruction:
Z				- set when A = S
C				- set when A > S (unsigned)
N				- set when A < S (unsigned)