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- <?xml version="1.0" encoding="UTF-8" standalone="no"?>
- <project source="3.8.0" version="1.0">
- This file is intended to be loaded by Logisim-evolution v3.8.0(https://github.com/logisim-evolution/).
- <lib desc="#Wiring" name="0">
- <tool name="Pin">
- <a name="appearance" val="classic"/>
- </tool>
- <tool name="Pull Resistor">
- <a name="facing" val="north"/>
- </tool>
- </lib>
- <lib desc="#Gates" name="1"/>
- <lib desc="#Plexers" name="2"/>
- <lib desc="#Arithmetic" name="3"/>
- <lib desc="#Memory" name="4"/>
- <lib desc="#I/O" name="5"/>
- <lib desc="#TTL" name="6"/>
- <lib desc="#TCL" name="7"/>
- <lib desc="#Base" name="8"/>
- <lib desc="#BFH-Praktika" name="9"/>
- <lib desc="#Input/Output-Extra" name="10"/>
- <lib desc="#Soc" name="11"/>
- <main name="main"/>
- <options>
- <a name="gateUndefined" val="ignore"/>
- <a name="simlimit" val="1000"/>
- <a name="simrand" val="0"/>
- </options>
- <mappings>
- <tool lib="8" map="Button2" name="Poke Tool"/>
- <tool lib="8" map="Button3" name="Menu Tool"/>
- <tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
- </mappings>
- <toolbar>
- <tool lib="8" name="Poke Tool"/>
- <tool lib="8" name="Edit Tool"/>
- <tool lib="8" name="Wiring Tool"/>
- <tool lib="8" name="Text Tool"/>
- <sep/>
- <tool lib="0" name="Pin"/>
- <tool lib="0" name="Pin">
- <a name="facing" val="west"/>
- <a name="output" val="true"/>
- </tool>
- <sep/>
- <tool lib="1" name="NOT Gate"/>
- <tool lib="1" name="AND Gate"/>
- <tool lib="1" name="OR Gate"/>
- <tool lib="1" name="XOR Gate"/>
- <tool lib="1" name="NAND Gate"/>
- <tool lib="1" name="NOR Gate"/>
- <sep/>
- <tool lib="4" name="D Flip-Flop"/>
- <tool lib="4" name="Register"/>
- </toolbar>
- <circuit name="main">
- <a name="appearance" val="logisim_evolution"/>
- <a name="circuit" val="main"/>
- <a name="circuitnamedboxfixedsize" val="true"/>
- <a name="simulationFrequency" val="8.0"/>
- <comp lib="0" loc="(270,610)" name="Power"/>
- <comp lib="0" loc="(360,660)" name="Pull Resistor">
- <a name="facing" val="north"/>
- </comp>
- <comp lib="0" loc="(370,600)" name="Power"/>
- <comp lib="0" loc="(680,550)" name="Clock"/>
- <comp lib="1" loc="(480,640)" name="XOR Gate"/>
- <comp lib="1" loc="(480,790)" name="XOR Gate"/>
- <comp lib="1" loc="(670,660)" name="XOR Gate"/>
- <comp lib="1" loc="(670,810)" name="XOR Gate"/>
- <comp lib="10" loc="(310,660)" name="Switch">
- <a name="label" val="Direction"/>
- <a name="labelloc" val="south"/>
- </comp>
- <comp lib="10" loc="(930,610)" name="Digital Oscilloscope">
- <a name="inputs" val="4"/>
- <a name="nState" val="20"/>
- </comp>
- <comp lib="4" loc="(760,630)" name="J-K Flip-Flop">
- <a name="appearance" val="logisim_evolution"/>
- </comp>
- <comp lib="4" loc="(760,780)" name="J-K Flip-Flop">
- <a name="appearance" val="logisim_evolution"/>
- </comp>
- <wire from="(270,610)" to="(270,660)"/>
- <wire from="(270,660)" to="(290,660)"/>
- <wire from="(310,660)" to="(360,660)"/>
- <wire from="(360,660)" to="(390,660)"/>
- <wire from="(370,600)" to="(370,620)"/>
- <wire from="(370,620)" to="(420,620)"/>
- <wire from="(380,770)" to="(380,890)"/>
- <wire from="(380,770)" to="(420,770)"/>
- <wire from="(380,890)" to="(850,890)"/>
- <wire from="(390,660)" to="(390,690)"/>
- <wire from="(390,660)" to="(420,660)"/>
- <wire from="(390,690)" to="(510,690)"/>
- <wire from="(400,810)" to="(400,870)"/>
- <wire from="(400,810)" to="(420,810)"/>
- <wire from="(400,870)" to="(830,870)"/>
- <wire from="(480,640)" to="(610,640)"/>
- <wire from="(480,790)" to="(570,790)"/>
- <wire from="(510,690)" to="(510,830)"/>
- <wire from="(510,830)" to="(610,830)"/>
- <wire from="(570,680)" to="(570,790)"/>
- <wire from="(570,680)" to="(610,680)"/>
- <wire from="(570,790)" to="(610,790)"/>
- <wire from="(670,660)" to="(740,660)"/>
- <wire from="(670,810)" to="(740,810)"/>
- <wire from="(680,550)" to="(700,550)"/>
- <wire from="(700,550)" to="(700,610)"/>
- <wire from="(700,610)" to="(700,680)"/>
- <wire from="(700,610)" to="(930,610)"/>
- <wire from="(700,680)" to="(700,830)"/>
- <wire from="(700,680)" to="(750,680)"/>
- <wire from="(700,830)" to="(750,830)"/>
- <wire from="(740,640)" to="(740,660)"/>
- <wire from="(740,640)" to="(750,640)"/>
- <wire from="(740,660)" to="(750,660)"/>
- <wire from="(740,790)" to="(740,810)"/>
- <wire from="(740,790)" to="(750,790)"/>
- <wire from="(740,810)" to="(750,810)"/>
- <wire from="(810,640)" to="(850,640)"/>
- <wire from="(810,680)" to="(870,680)"/>
- <wire from="(810,790)" to="(880,790)"/>
- <wire from="(810,830)" to="(830,830)"/>
- <wire from="(830,830)" to="(830,870)"/>
- <wire from="(830,830)" to="(900,830)"/>
- <wire from="(850,640)" to="(850,890)"/>
- <wire from="(850,640)" to="(930,640)"/>
- <wire from="(870,670)" to="(870,680)"/>
- <wire from="(870,670)" to="(930,670)"/>
- <wire from="(880,700)" to="(880,790)"/>
- <wire from="(880,700)" to="(930,700)"/>
- <wire from="(900,730)" to="(900,830)"/>
- <wire from="(900,730)" to="(930,730)"/>
- </circuit>
- </project>
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