AC_LAB1_EX3

module add6(
    output[6:0] sum,
    input[5:0] a, b);

    wire c_in1, c_in2;
    add4(sum[3:0], c_in1, a[3:0], b[3:0]);
    full_adder f1(sum[4], c_in2, a[4], b[4], c_in1);
    full_adder f2(sum[5], sum[6], a[5], b[5], c_in2);
endmodule