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  1.  
  2. /dts-v1/;
  3.  
  4. /memreserve/ 0x0000000048000000 0x0000000001000000;
  5. / {
  6. interrupt-parent = <0x01>;
  7. #address-cells = <0x02>;
  8. #size-cells = <0x02>;
  9. model = "sun50iw9";
  10. compatible = "allwinner,h616\0arm,sun50iw9p1";
  11.  
  12. clocks {
  13. compatible = "allwinner,clk-init";
  14. device_type = "clocks";
  15. #address-cells = <0x02>;
  16. #size-cells = <0x02>;
  17. ranges;
  18. reg = <0x00 0x3001000 0x00 0x1000 0x00 0x7010000 0x00 0x400 0x00 0x7000000 0x00 0x04>;
  19.  
  20. losc {
  21. #clock-cells = <0x00>;
  22. compatible = "allwinner,fixed-clock";
  23. clock-frequency = <0x8000>;
  24. clock-output-names = "losc";
  25. linux,phandle = <0x1e>;
  26. phandle = <0x1e>;
  27. };
  28.  
  29. iosc {
  30. #clock-cells = <0x00>;
  31. compatible = "allwinner,fixed-clock";
  32. clock-frequency = <0xf42400>;
  33. clock-output-names = "iosc";
  34. linux,phandle = <0x20>;
  35. phandle = <0x20>;
  36. };
  37.  
  38. hosc {
  39. #clock-cells = <0x00>;
  40. compatible = "allwinner,fixed-clock";
  41. clock-frequency = <0x16e3600>;
  42. clock-output-names = "hosc";
  43. linux,phandle = <0x09>;
  44. phandle = <0x09>;
  45. };
  46.  
  47. osc48m {
  48. #clock-cells = <0x00>;
  49. compatible = "allwinner,fixed-clock";
  50. clock-frequency = <0x2dc6c00>;
  51. clock-output-names = "osc48m";
  52. linux,phandle = <0x0a>;
  53. phandle = <0x0a>;
  54. };
  55.  
  56. hoscdiv32k {
  57. #clock-cells = <0x00>;
  58. compatible = "allwinner,fixed-clock";
  59. clock-frequency = <0x8000>;
  60. clock-output-names = "hoscdiv32k";
  61. linux,phandle = <0xdf>;
  62. phandle = <0xdf>;
  63. };
  64.  
  65. pll_periph0div25m {
  66. #clock-cells = <0x00>;
  67. compatible = "allwinner,fixed-clock";
  68. clock-frequency = <0x17d7840>;
  69. clock-output-names = "pll_periph0div25m";
  70. linux,phandle = <0xe0>;
  71. phandle = <0xe0>;
  72. };
  73.  
  74. pll_cpu {
  75. #clock-cells = <0x00>;
  76. compatible = "allwinner,pll-clock";
  77. lock-mode = "new";
  78. clock-output-names = "pll_cpu";
  79. linux,phandle = <0xd3>;
  80. phandle = <0xd3>;
  81. };
  82.  
  83. pll_ddr0 {
  84. #clock-cells = <0x00>;
  85. compatible = "allwinner,pll-clock";
  86. lock-mode = "new";
  87. clock-output-names = "pll_ddr0";
  88. linux,phandle = <0xd8>;
  89. phandle = <0xd8>;
  90. };
  91.  
  92. pll_ddr1 {
  93. #clock-cells = <0x00>;
  94. compatible = "allwinner,pll-clock";
  95. lock-mode = "new";
  96. clock-output-names = "pll_ddr1";
  97. linux,phandle = <0xe1>;
  98. phandle = <0xe1>;
  99. };
  100.  
  101. pll_periph0 {
  102. #clock-cells = <0x00>;
  103. compatible = "allwinner,pll-clock";
  104. assigned-clocks = <0x02>;
  105. assigned-clock-rates = <0x23c34600>;
  106. lock-mode = "new";
  107. clock-output-names = "pll_periph0";
  108. linux,phandle = <0x02>;
  109. phandle = <0x02>;
  110. };
  111.  
  112. pll_periph1 {
  113. #clock-cells = <0x00>;
  114. compatible = "allwinner,pll-clock";
  115. assigned-clocks = <0x03>;
  116. assigned-clock-rates = <0x23c34600>;
  117. lock-mode = "new";
  118. clock-output-names = "pll_periph1";
  119. linux,phandle = <0x03>;
  120. phandle = <0x03>;
  121. };
  122.  
  123. pll_gpu {
  124. #clock-cells = <0x00>;
  125. compatible = "allwinner,pll-clock";
  126. lock-mode = "new";
  127. clock-output-names = "pll_gpu";
  128. linux,phandle = <0xda>;
  129. phandle = <0xda>;
  130. };
  131.  
  132. pll_video0x4 {
  133. #clock-cells = <0x00>;
  134. compatible = "allwinner,pll-clock";
  135. lock-mode = "new";
  136. clock-output-names = "pll_video0x4";
  137. linux,phandle = <0x08>;
  138. phandle = <0x08>;
  139. };
  140.  
  141. pll_video1 {
  142. #clock-cells = <0x00>;
  143. compatible = "allwinner,pll-clock";
  144. lock-mode = "new";
  145. assigned-clocks = <0x04>;
  146. assigned-clock-rates = <0x19bfcc00>;
  147. clock-output-names = "pll_video1";
  148. linux,phandle = <0x04>;
  149. phandle = <0x04>;
  150. };
  151.  
  152. pll_video2 {
  153. #clock-cells = <0x00>;
  154. compatible = "allwinner,pll-clock";
  155. lock-mode = "new";
  156. assigned-clocks = <0x05>;
  157. clock-output-names = "pll_video2";
  158. linux,phandle = <0x05>;
  159. phandle = <0x05>;
  160. };
  161.  
  162. pll_ve {
  163. #clock-cells = <0x00>;
  164. compatible = "allwinner,pll-clock";
  165. device_type = "clk_pll_ve";
  166. lock-mode = "new";
  167. clock-output-names = "pll_ve";
  168. linux,phandle = <0x26>;
  169. phandle = <0x26>;
  170. };
  171.  
  172. pll_de {
  173. #clock-cells = <0x00>;
  174. compatible = "allwinner,pll-clock";
  175. assigned-clocks = <0x06>;
  176. assigned-clock-rates = <0x297c1e00>;
  177. lock-mode = "new";
  178. clock-output-names = "pll_de";
  179. linux,phandle = <0x06>;
  180. phandle = <0x06>;
  181. };
  182.  
  183. pll_csi {
  184. #clock-cells = <0x00>;
  185. compatible = "allwinner,pll-clock";
  186. lock-mode = "new";
  187. clock-output-names = "pll_csi";
  188. linux,phandle = <0xa5>;
  189. phandle = <0xa5>;
  190. };
  191.  
  192. pll_audiox4 {
  193. #clock-cells = <0x00>;
  194. compatible = "allwinner,pll-clock";
  195. assigned-clocks = <0x07>;
  196. assigned-clock-rates = <0x5dc0000>;
  197. lock-mode = "new";
  198. clock-output-names = "pll_audiox4";
  199. linux,phandle = <0x07>;
  200. phandle = <0x07>;
  201. };
  202.  
  203. pll_periph0x2 {
  204. #clock-cells = <0x00>;
  205. compatible = "allwinner,fixed-factor-clock";
  206. clocks = <0x02>;
  207. clock-mult = <0x02>;
  208. clock-div = <0x01>;
  209. clock-output-names = "pll_periph0x2";
  210. linux,phandle = <0x0c>;
  211. phandle = <0x0c>;
  212. };
  213.  
  214. pll_periph0x4 {
  215. #clock-cells = <0x00>;
  216. compatible = "allwinner,fixed-factor-clock";
  217. clocks = <0x02>;
  218. clock-mult = <0x04>;
  219. clock-div = <0x01>;
  220. clock-output-names = "pll_periph0x4";
  221. linux,phandle = <0xe2>;
  222. phandle = <0xe2>;
  223. };
  224.  
  225. periph32k {
  226. #clock-cells = <0x00>;
  227. compatible = "allwinner,fixed-factor-clock";
  228. clocks = <0x02>;
  229. clock-mult = <0x02>;
  230. clock-div = <0x8f0d>;
  231. clock-output-names = "periph32k";
  232. linux,phandle = <0xe3>;
  233. phandle = <0xe3>;
  234. };
  235.  
  236. pll_periph1x2 {
  237. #clock-cells = <0x00>;
  238. compatible = "allwinner,fixed-factor-clock";
  239. clocks = <0x03>;
  240. clock-mult = <0x02>;
  241. clock-div = <0x01>;
  242. clock-output-names = "pll_periph1x2";
  243. linux,phandle = <0x86>;
  244. phandle = <0x86>;
  245. };
  246.  
  247. pll_audio {
  248. #clock-cells = <0x00>;
  249. compatible = "allwinner,fixed-factor-clock";
  250. clocks = <0x07>;
  251. clock-mult = <0x01>;
  252. clock-div = <0x04>;
  253. clock-output-names = "pll_audio";
  254. linux,phandle = <0x60>;
  255. phandle = <0x60>;
  256. };
  257.  
  258. pll_audiox2 {
  259. #clock-cells = <0x00>;
  260. compatible = "allwinner,fixed-factor-clock";
  261. clocks = <0x07>;
  262. clock-mult = <0x01>;
  263. clock-div = <0x02>;
  264. clock-output-names = "pll_audiox2";
  265. linux,phandle = <0xe4>;
  266. phandle = <0xe4>;
  267. };
  268.  
  269. pll_video0 {
  270. #clock-cells = <0x00>;
  271. compatible = "allwinner,fixed-factor-clock";
  272. clocks = <0x08>;
  273. clock-mult = <0x01>;
  274. clock-div = <0x04>;
  275. clock-output-names = "pll_video0";
  276. linux,phandle = <0xe5>;
  277. phandle = <0xe5>;
  278. };
  279.  
  280. pll_video1x4 {
  281. #clock-cells = <0x00>;
  282. compatible = "allwinner,fixed-factor-clock";
  283. clocks = <0x04>;
  284. clock-mult = <0x04>;
  285. clock-div = <0x01>;
  286. clock-output-names = "pll_video1x4";
  287. linux,phandle = <0xe6>;
  288. phandle = <0xe6>;
  289. };
  290.  
  291. pll_video2x4 {
  292. #clock-cells = <0x00>;
  293. compatible = "allwinner,fixed-factor-clock";
  294. clocks = <0x05>;
  295. clock-mult = <0x04>;
  296. clock-div = <0x01>;
  297. clock-output-names = "pll_video2x4";
  298. linux,phandle = <0xe7>;
  299. phandle = <0xe7>;
  300. };
  301.  
  302. hoscd2 {
  303. #clock-cells = <0x00>;
  304. compatible = "allwinner,fixed-factor-clock";
  305. clocks = <0x09>;
  306. clock-mult = <0x01>;
  307. clock-div = <0x02>;
  308. clock-output-names = "hoscd2";
  309. linux,phandle = <0xe8>;
  310. phandle = <0xe8>;
  311. };
  312.  
  313. osc48md4 {
  314. #clock-cells = <0x00>;
  315. compatible = "allwinner,fixed-factor-clock";
  316. clocks = <0x0a>;
  317. clock-mult = <0x01>;
  318. clock-div = <0x04>;
  319. clock-output-names = "osc48md4";
  320. linux,phandle = <0x52>;
  321. phandle = <0x52>;
  322. };
  323.  
  324. pll_periph0d6 {
  325. #clock-cells = <0x00>;
  326. compatible = "allwinner,fixed-factor-clock";
  327. clocks = <0x02>;
  328. clock-mult = <0x01>;
  329. clock-div = <0x06>;
  330. clock-output-names = "pll_periph0d6";
  331. linux,phandle = <0xe9>;
  332. phandle = <0xe9>;
  333. };
  334.  
  335. cpu {
  336. #clock-cells = <0x00>;
  337. compatible = "allwinner,cpu-clock";
  338. clock-output-names = "cpu";
  339. linux,phandle = <0xea>;
  340. phandle = <0xea>;
  341. };
  342.  
  343. axi {
  344. #clock-cells = <0x00>;
  345. compatible = "allwinner,periph-clock";
  346. clock-output-names = "axi";
  347. linux,phandle = <0xeb>;
  348. phandle = <0xeb>;
  349. };
  350.  
  351. cpuapb {
  352. #clock-cells = <0x00>;
  353. compatible = "allwinner,periph-clock";
  354. clock-output-names = "cpuapb";
  355. linux,phandle = <0xec>;
  356. phandle = <0xec>;
  357. };
  358.  
  359. psi {
  360. #clock-cells = <0x00>;
  361. compatible = "allwinner,periph-clock";
  362. clock-output-names = "psi";
  363. linux,phandle = <0xed>;
  364. phandle = <0xed>;
  365. };
  366.  
  367. ahb1 {
  368. #clock-cells = <0x00>;
  369. compatible = "allwinner,periph-clock";
  370. clock-output-names = "ahb1";
  371. linux,phandle = <0xee>;
  372. phandle = <0xee>;
  373. };
  374.  
  375. ahb2 {
  376. #clock-cells = <0x00>;
  377. compatible = "allwinner,periph-clock";
  378. clock-output-names = "ahb2";
  379. linux,phandle = <0xef>;
  380. phandle = <0xef>;
  381. };
  382.  
  383. ahb3 {
  384. #clock-cells = <0x00>;
  385. compatible = "allwinner,periph-clock";
  386. clock-output-names = "ahb3";
  387. linux,phandle = <0xf0>;
  388. phandle = <0xf0>;
  389. };
  390.  
  391. apb1 {
  392. #clock-cells = <0x00>;
  393. compatible = "allwinner,periph-clock";
  394. clock-output-names = "apb1";
  395. linux,phandle = <0xf1>;
  396. phandle = <0xf1>;
  397. };
  398.  
  399. apb2 {
  400. #clock-cells = <0x00>;
  401. compatible = "allwinner,periph-clock";
  402. clock-output-names = "apb2";
  403. linux,phandle = <0xb7>;
  404. phandle = <0xb7>;
  405. };
  406.  
  407. mbus {
  408. #clock-cells = <0x00>;
  409. compatible = "allwinner,periph-clock";
  410. clock-output-names = "mbus";
  411. linux,phandle = <0xf2>;
  412. phandle = <0xf2>;
  413. };
  414.  
  415. de {
  416. #clock-cells = <0x00>;
  417. compatible = "allwinner,periph-clock";
  418. assigned-clock-parents = <0x06>;
  419. assigned-clock-rates = <0x297c1e00>;
  420. assigned-clocks = <0x0b>;
  421. clock-output-names = "de";
  422. linux,phandle = <0x0b>;
  423. phandle = <0x0b>;
  424. };
  425.  
  426. g2d {
  427. #clock-cells = <0x00>;
  428. compatible = "allwinner,periph-clock";
  429. assigned-clock-parents = <0x0c>;
  430. assigned-clock-rates = <0x11e1a300>;
  431. assigned-clocks = <0x0d>;
  432. clock-output-names = "g2d";
  433. linux,phandle = <0x0d>;
  434. phandle = <0x0d>;
  435. };
  436.  
  437. di {
  438. #clock-cells = <0x00>;
  439. compatible = "allwinner,periph-clock";
  440. assigned-clock-parents = <0x0c>;
  441. assigned-clock-rates = <0x11e1a300>;
  442. assigned-clocks = <0x0e>;
  443. clock-output-names = "di";
  444. linux,phandle = <0x0e>;
  445. phandle = <0x0e>;
  446. };
  447.  
  448. gpu0 {
  449. #clock-cells = <0x00>;
  450. compatible = "allwinner,periph-clock";
  451. clock-output-names = "gpu0";
  452. linux,phandle = <0xdb>;
  453. phandle = <0xdb>;
  454. };
  455.  
  456. gpu1 {
  457. #clock-cells = <0x00>;
  458. compatible = "allwinner,periph-clock";
  459. clock-output-names = "gpu1";
  460. linux,phandle = <0xdc>;
  461. phandle = <0xdc>;
  462. };
  463.  
  464. ce {
  465. #clock-cells = <0x00>;
  466. compatible = "allwinner,periph-clock";
  467. clock-output-names = "ce";
  468. linux,phandle = <0xb5>;
  469. phandle = <0xb5>;
  470. };
  471.  
  472. ve {
  473. #clock-cells = <0x00>;
  474. compatible = "allwinner,periph-clock";
  475. clock-output-names = "ve";
  476. linux,phandle = <0x27>;
  477. phandle = <0x27>;
  478. };
  479.  
  480. dma {
  481. #clock-cells = <0x00>;
  482. compatible = "allwinner,periph-clock";
  483. clock-output-names = "dma";
  484. linux,phandle = <0x1f>;
  485. phandle = <0x1f>;
  486. };
  487.  
  488. msgbox {
  489. #clock-cells = <0x00>;
  490. compatible = "allwinner,periph-clock";
  491. clock-output-names = "msgbox";
  492. linux,phandle = <0x21>;
  493. phandle = <0x21>;
  494. };
  495.  
  496. hwspinlock_rst {
  497. #clock-cells = <0x00>;
  498. compatible = "allwinner,periph-clock";
  499. clock-output-names = "hwspinlock_rst";
  500. linux,phandle = <0x22>;
  501. phandle = <0x22>;
  502. };
  503.  
  504. hwspinlock_bus {
  505. #clock-cells = <0x00>;
  506. compatible = "allwinner,periph-clock";
  507. clock-output-names = "hwspinlock_bus";
  508. linux,phandle = <0x23>;
  509. phandle = <0x23>;
  510. };
  511.  
  512. hstimer {
  513. #clock-cells = <0x00>;
  514. compatible = "allwinner,periph-clock";
  515. clock-output-names = "hstimer";
  516. linux,phandle = <0xf3>;
  517. phandle = <0xf3>;
  518. };
  519.  
  520. avs {
  521. #clock-cells = <0x00>;
  522. compatible = "allwinner,periph-clock";
  523. clock-output-names = "avs";
  524. linux,phandle = <0xf4>;
  525. phandle = <0xf4>;
  526. };
  527.  
  528. dbgsys {
  529. #clock-cells = <0x00>;
  530. compatible = "allwinner,periph-clock";
  531. clock-output-names = "dbgsys";
  532. linux,phandle = <0xf5>;
  533. phandle = <0xf5>;
  534. };
  535.  
  536. pwm {
  537. #clock-cells = <0x00>;
  538. compatible = "allwinner,periph-clock";
  539. clock-output-names = "pwm";
  540. linux,phandle = <0x9b>;
  541. phandle = <0x9b>;
  542. };
  543.  
  544. iommu {
  545. #clock-cells = <0x00>;
  546. compatible = "allwinner,periph-clock";
  547. clock-output-names = "iommu";
  548. linux,phandle = <0xd9>;
  549. phandle = <0xd9>;
  550. };
  551.  
  552. sdram {
  553. #clock-cells = <0x00>;
  554. compatible = "allwinner,periph-clock";
  555. clock-output-names = "sdram";
  556. linux,phandle = <0xf6>;
  557. phandle = <0xf6>;
  558. };
  559.  
  560. nand0 {
  561. #clock-cells = <0x00>;
  562. compatible = "allwinner,periph-clock";
  563. clock-output-names = "nand0";
  564. linux,phandle = <0xbb>;
  565. phandle = <0xbb>;
  566. };
  567.  
  568. nand1 {
  569. #clock-cells = <0x00>;
  570. compatible = "allwinner,periph-clock";
  571. clock-output-names = "nand1";
  572. linux,phandle = <0xbc>;
  573. phandle = <0xbc>;
  574. };
  575.  
  576. sdmmc0_mod {
  577. #clock-cells = <0x00>;
  578. compatible = "allwinner,periph-clock";
  579. clock-output-names = "sdmmc0_mod";
  580. linux,phandle = <0x8d>;
  581. phandle = <0x8d>;
  582. };
  583.  
  584. sdmmc0_bus {
  585. #clock-cells = <0x00>;
  586. compatible = "allwinner,periph-clock";
  587. clock-output-names = "sdmmc0_bus";
  588. linux,phandle = <0x8e>;
  589. phandle = <0x8e>;
  590. };
  591.  
  592. sdmmc0_rst {
  593. #clock-cells = <0x00>;
  594. compatible = "allwinner,periph-clock";
  595. clock-output-names = "sdmmc0_rst";
  596. linux,phandle = <0x8f>;
  597. phandle = <0x8f>;
  598. };
  599.  
  600. sdmmc1_mod {
  601. #clock-cells = <0x00>;
  602. compatible = "allwinner,periph-clock";
  603. clock-output-names = "sdmmc1_mod";
  604. linux,phandle = <0x93>;
  605. phandle = <0x93>;
  606. };
  607.  
  608. sdmmc1_bus {
  609. #clock-cells = <0x00>;
  610. compatible = "allwinner,periph-clock";
  611. clock-output-names = "sdmmc1_bus";
  612. linux,phandle = <0x94>;
  613. phandle = <0x94>;
  614. };
  615.  
  616. sdmmc1_rst {
  617. #clock-cells = <0x00>;
  618. compatible = "allwinner,periph-clock";
  619. clock-output-names = "sdmmc1_rst";
  620. linux,phandle = <0x95>;
  621. phandle = <0x95>;
  622. };
  623.  
  624. sdmmc2_mod {
  625. #clock-cells = <0x00>;
  626. compatible = "allwinner,periph-clock";
  627. clock-output-names = "sdmmc2_mod";
  628. linux,phandle = <0x87>;
  629. phandle = <0x87>;
  630. };
  631.  
  632. sdmmc2_bus {
  633. #clock-cells = <0x00>;
  634. compatible = "allwinner,periph-clock";
  635. clock-output-names = "sdmmc2_bus";
  636. linux,phandle = <0x88>;
  637. phandle = <0x88>;
  638. };
  639.  
  640. sdmmc2_rst {
  641. #clock-cells = <0x00>;
  642. compatible = "allwinner,periph-clock";
  643. clock-output-names = "sdmmc2_rst";
  644. linux,phandle = <0x89>;
  645. phandle = <0x89>;
  646. };
  647.  
  648. uart0 {
  649. #clock-cells = <0x00>;
  650. compatible = "allwinner,periph-clock";
  651. clock-output-names = "uart0";
  652. linux,phandle = <0x29>;
  653. phandle = <0x29>;
  654. };
  655.  
  656. uart1 {
  657. #clock-cells = <0x00>;
  658. compatible = "allwinner,periph-clock";
  659. clock-output-names = "uart1";
  660. linux,phandle = <0x2c>;
  661. phandle = <0x2c>;
  662. };
  663.  
  664. uart2 {
  665. #clock-cells = <0x00>;
  666. compatible = "allwinner,periph-clock";
  667. clock-output-names = "uart2";
  668. linux,phandle = <0x2f>;
  669. phandle = <0x2f>;
  670. };
  671.  
  672. uart3 {
  673. #clock-cells = <0x00>;
  674. compatible = "allwinner,periph-clock";
  675. clock-output-names = "uart3";
  676. linux,phandle = <0x32>;
  677. phandle = <0x32>;
  678. };
  679.  
  680. uart4 {
  681. #clock-cells = <0x00>;
  682. compatible = "allwinner,periph-clock";
  683. clock-output-names = "uart4";
  684. linux,phandle = <0x35>;
  685. phandle = <0x35>;
  686. };
  687.  
  688. uart5 {
  689. #clock-cells = <0x00>;
  690. compatible = "allwinner,periph-clock";
  691. clock-output-names = "uart5";
  692. linux,phandle = <0x38>;
  693. phandle = <0x38>;
  694. };
  695.  
  696. twi0 {
  697. #clock-cells = <0x00>;
  698. compatible = "allwinner,periph-clock";
  699. clock-output-names = "twi0";
  700. linux,phandle = <0x3b>;
  701. phandle = <0x3b>;
  702. };
  703.  
  704. twi1 {
  705. #clock-cells = <0x00>;
  706. compatible = "allwinner,periph-clock";
  707. clock-output-names = "twi1";
  708. linux,phandle = <0x3e>;
  709. phandle = <0x3e>;
  710. };
  711.  
  712. twi2 {
  713. #clock-cells = <0x00>;
  714. compatible = "allwinner,periph-clock";
  715. clock-output-names = "twi2";
  716. linux,phandle = <0x41>;
  717. phandle = <0x41>;
  718. };
  719.  
  720. twi3 {
  721. #clock-cells = <0x00>;
  722. compatible = "allwinner,periph-clock";
  723. clock-output-names = "twi3";
  724. linux,phandle = <0x44>;
  725. phandle = <0x44>;
  726. };
  727.  
  728. twi4 {
  729. #clock-cells = <0x00>;
  730. compatible = "allwinner,periph-clock";
  731. clock-output-names = "twi4";
  732. linux,phandle = <0x47>;
  733. phandle = <0x47>;
  734. };
  735.  
  736. scr0 {
  737. #clock-cells = <0x00>;
  738. compatible = "allwinner,periph-clock";
  739. clock-output-names = "scr0";
  740. linux,phandle = <0xb6>;
  741. phandle = <0xb6>;
  742. };
  743.  
  744. spi0 {
  745. #clock-cells = <0x00>;
  746. compatible = "allwinner,periph-clock";
  747. clock-output-names = "spi0";
  748. linux,phandle = <0x7d>;
  749. phandle = <0x7d>;
  750. };
  751.  
  752. spi1 {
  753. #clock-cells = <0x00>;
  754. compatible = "allwinner,periph-clock";
  755. clock-output-names = "spi1";
  756. linux,phandle = <0x81>;
  757. phandle = <0x81>;
  758. };
  759.  
  760. ephy_25m {
  761. #clock-cells = <0x00>;
  762. compatible = "allwinner,periph-clock";
  763. clock-output-names = "ephy_25m";
  764. linux,phandle = <0xcc>;
  765. phandle = <0xcc>;
  766. };
  767.  
  768. gmac0 {
  769. #clock-cells = <0x00>;
  770. compatible = "allwinner,periph-clock";
  771. clock-output-names = "gmac0";
  772. linux,phandle = <0xcb>;
  773. phandle = <0xcb>;
  774. };
  775.  
  776. gmac1 {
  777. #clock-cells = <0x00>;
  778. compatible = "allwinner,periph-clock";
  779. clock-output-names = "gmac1";
  780. linux,phandle = <0xcf>;
  781. phandle = <0xcf>;
  782. };
  783.  
  784. gpadc {
  785. #clock-cells = <0x00>;
  786. compatible = "allwinner,periph-clock";
  787. clock-output-names = "gpadc";
  788. linux,phandle = <0xc9>;
  789. phandle = <0xc9>;
  790. };
  791.  
  792. ts {
  793. #clock-cells = <0x00>;
  794. compatible = "allwinner,periph-clock";
  795. clock-output-names = "ts";
  796. linux,phandle = <0xc0>;
  797. phandle = <0xc0>;
  798. };
  799.  
  800. ths {
  801. #clock-cells = <0x00>;
  802. compatible = "allwinner,periph-clock";
  803. clock-output-names = "ths";
  804. linux,phandle = <0xc3>;
  805. phandle = <0xc3>;
  806. };
  807.  
  808. spdif {
  809. #clock-cells = <0x00>;
  810. compatible = "allwinner,periph-clock";
  811. clock-output-names = "spdif";
  812. linux,phandle = <0x61>;
  813. phandle = <0x61>;
  814. };
  815.  
  816. dmic {
  817. #clock-cells = <0x00>;
  818. compatible = "allwinner,periph-clock";
  819. clock-output-names = "dmic";
  820. linux,phandle = <0x64>;
  821. phandle = <0x64>;
  822. };
  823.  
  824. codec_1x {
  825. #clock-cells = <0x00>;
  826. compatible = "allwinner,periph-clock";
  827. clock-output-names = "codec_1x";
  828. linux,phandle = <0x67>;
  829. phandle = <0x67>;
  830. };
  831.  
  832. codec_4x {
  833. #clock-cells = <0x00>;
  834. compatible = "allwinner,periph-clock";
  835. clock-output-names = "codec_4x";
  836. linux,phandle = <0xf7>;
  837. phandle = <0xf7>;
  838. };
  839.  
  840. ahub {
  841. #clock-cells = <0x00>;
  842. compatible = "allwinner,periph-clock";
  843. clock-output-names = "ahub";
  844. linux,phandle = <0x6a>;
  845. phandle = <0x6a>;
  846. };
  847.  
  848. usbphy0 {
  849. #clock-cells = <0x00>;
  850. compatible = "allwinner,periph-clock";
  851. clock-output-names = "usbphy0";
  852. linux,phandle = <0x4d>;
  853. phandle = <0x4d>;
  854. };
  855.  
  856. usbphy1 {
  857. #clock-cells = <0x00>;
  858. compatible = "allwinner,periph-clock";
  859. clock-output-names = "usbphy1";
  860. linux,phandle = <0x54>;
  861. phandle = <0x54>;
  862. };
  863.  
  864. usbphy2 {
  865. #clock-cells = <0x00>;
  866. compatible = "allwinner,periph-clock";
  867. clock-output-names = "usbphy2";
  868. linux,phandle = <0x58>;
  869. phandle = <0x58>;
  870. };
  871.  
  872. usbphy3 {
  873. #clock-cells = <0x00>;
  874. compatible = "allwinner,periph-clock";
  875. clock-output-names = "usbphy3";
  876. linux,phandle = <0x5c>;
  877. phandle = <0x5c>;
  878. };
  879.  
  880. usbohci0 {
  881. #clock-cells = <0x00>;
  882. compatible = "allwinner,periph-clock";
  883. clock-output-names = "usbohci0";
  884. linux,phandle = <0x50>;
  885. phandle = <0x50>;
  886. };
  887.  
  888. usbohci0_12m {
  889. #clock-cells = <0x00>;
  890. compatible = "allwinner,periph-clock";
  891. clock-output-names = "usbohci0_12m";
  892. linux,phandle = <0x51>;
  893. phandle = <0x51>;
  894. };
  895.  
  896. usbohci1 {
  897. #clock-cells = <0x00>;
  898. compatible = "allwinner,periph-clock";
  899. clock-output-names = "usbohci1";
  900. linux,phandle = <0x56>;
  901. phandle = <0x56>;
  902. };
  903.  
  904. usbohci1_12m {
  905. #clock-cells = <0x00>;
  906. compatible = "allwinner,periph-clock";
  907. clock-output-names = "usbohci1_12m";
  908. linux,phandle = <0x57>;
  909. phandle = <0x57>;
  910. };
  911.  
  912. usbohci2 {
  913. #clock-cells = <0x00>;
  914. compatible = "allwinner,periph-clock";
  915. clock-output-names = "usbohci2";
  916. linux,phandle = <0x5a>;
  917. phandle = <0x5a>;
  918. };
  919.  
  920. usbohci2_12m {
  921. #clock-cells = <0x00>;
  922. compatible = "allwinner,periph-clock";
  923. clock-output-names = "usbohci2_12m";
  924. linux,phandle = <0x5b>;
  925. phandle = <0x5b>;
  926. };
  927.  
  928. usbohci3 {
  929. #clock-cells = <0x00>;
  930. compatible = "allwinner,periph-clock";
  931. clock-output-names = "usbohci3";
  932. linux,phandle = <0x5e>;
  933. phandle = <0x5e>;
  934. };
  935.  
  936. usbohci3_12m {
  937. #clock-cells = <0x00>;
  938. compatible = "allwinner,periph-clock";
  939. clock-output-names = "usbohci3_12m";
  940. linux,phandle = <0x5f>;
  941. phandle = <0x5f>;
  942. };
  943.  
  944. usbehci0 {
  945. #clock-cells = <0x00>;
  946. compatible = "allwinner,periph-clock";
  947. clock-output-names = "usbehci0";
  948. linux,phandle = <0x4f>;
  949. phandle = <0x4f>;
  950. };
  951.  
  952. usbehci1 {
  953. #clock-cells = <0x00>;
  954. compatible = "allwinner,periph-clock";
  955. clock-output-names = "usbehci1";
  956. linux,phandle = <0x55>;
  957. phandle = <0x55>;
  958. };
  959.  
  960. usbehci2 {
  961. #clock-cells = <0x00>;
  962. compatible = "allwinner,periph-clock";
  963. clock-output-names = "usbehci2";
  964. linux,phandle = <0x59>;
  965. phandle = <0x59>;
  966. };
  967.  
  968. usbehci3 {
  969. #clock-cells = <0x00>;
  970. compatible = "allwinner,periph-clock";
  971. clock-output-names = "usbehci3";
  972. linux,phandle = <0x5d>;
  973. phandle = <0x5d>;
  974. };
  975.  
  976. usb3_0_host {
  977. #clock-cells = <0x00>;
  978. compatible = "allwinner,periph-clock";
  979. clock-output-names = "usb3_0_host";
  980. linux,phandle = <0xf8>;
  981. phandle = <0xf8>;
  982. };
  983.  
  984. usbotg {
  985. #clock-cells = <0x00>;
  986. compatible = "allwinner,periph-clock";
  987. clock-output-names = "usbotg";
  988. linux,phandle = <0x4e>;
  989. phandle = <0x4e>;
  990. };
  991.  
  992. lradc {
  993. #clock-cells = <0x00>;
  994. compatible = "allwinner,periph-clock";
  995. clock-output-names = "lradc";
  996. linux,phandle = <0xca>;
  997. phandle = <0xca>;
  998. };
  999.  
  1000. hdmi {
  1001. #clock-cells = <0x00>;
  1002. compatible = "allwinner,periph-clock";
  1003. assigned-clock-parents = <0x05>;
  1004. assigned-clocks = <0x0f>;
  1005. clock-output-names = "hdmi";
  1006. linux,phandle = <0x0f>;
  1007. phandle = <0x0f>;
  1008. };
  1009.  
  1010. hdmi_slow {
  1011. #clock-cells = <0x00>;
  1012. compatible = "allwinner,periph-clock";
  1013. assigned-clocks = <0x10>;
  1014. clock-output-names = "hdmi_slow";
  1015. linux,phandle = <0x10>;
  1016. phandle = <0x10>;
  1017. };
  1018.  
  1019. hdmi_cec {
  1020. #clock-cells = <0x00>;
  1021. compatible = "allwinner,periph-clock";
  1022. assigned-clocks = <0x11>;
  1023. clock-output-names = "hdmi_cec";
  1024. linux,phandle = <0x11>;
  1025. phandle = <0x11>;
  1026. };
  1027.  
  1028. display_top {
  1029. #clock-cells = <0x00>;
  1030. compatible = "allwinner,periph-clock";
  1031. clock-output-names = "display_top";
  1032. linux,phandle = <0x98>;
  1033. phandle = <0x98>;
  1034. };
  1035.  
  1036. tcon_lcd {
  1037. #clock-cells = <0x00>;
  1038. compatible = "allwinner,periph-clock";
  1039. clock-output-names = "tcon_lcd";
  1040. assigned-clock-parents = <0x08>;
  1041. assigned-clocks = <0x12>;
  1042. linux,phandle = <0x12>;
  1043. phandle = <0x12>;
  1044. };
  1045.  
  1046. tcon_lcd1 {
  1047. #clock-cells = <0x00>;
  1048. compatible = "allwinner,periph-clock";
  1049. clock-output-names = "tcon_lcd1";
  1050. assigned-clock-parents = <0x04>;
  1051. assigned-clocks = <0x13>;
  1052. linux,phandle = <0x13>;
  1053. phandle = <0x13>;
  1054. };
  1055.  
  1056. tcon_tv {
  1057. #clock-cells = <0x00>;
  1058. compatible = "allwinner,periph-clock";
  1059. assigned-clock-parents = <0x05>;
  1060. assigned-clocks = <0x14>;
  1061. clock-output-names = "tcon_tv";
  1062. linux,phandle = <0x14>;
  1063. phandle = <0x14>;
  1064. };
  1065.  
  1066. tcon_tv1 {
  1067. #clock-cells = <0x00>;
  1068. compatible = "allwinner,periph-clock";
  1069. assigned-clock-parents = <0x04>;
  1070. assigned-clocks = <0x15>;
  1071. clock-output-names = "tcon_tv1";
  1072. linux,phandle = <0x15>;
  1073. phandle = <0x15>;
  1074. };
  1075.  
  1076. lvds {
  1077. #clock-cells = <0x00>;
  1078. compatible = "allwinner,periph-clock";
  1079. clock-output-names = "lvds";
  1080. assigned-clocks = <0x16>;
  1081. linux,phandle = <0x16>;
  1082. phandle = <0x16>;
  1083. };
  1084.  
  1085. tve {
  1086. #clock-cells = <0x00>;
  1087. compatible = "allwinner,periph-clock";
  1088. clock-output-names = "tve";
  1089. assigned-clock-parents = <0x04>;
  1090. assigned-clocks = <0x17>;
  1091. linux,phandle = <0x17>;
  1092. phandle = <0x17>;
  1093. };
  1094.  
  1095. tve_top {
  1096. #clock-cells = <0x00>;
  1097. compatible = "allwinner,periph-clock";
  1098. clock-output-names = "tve_top";
  1099. assigned-clock-parents = <0x04>;
  1100. assigned-clocks = <0x18>;
  1101. linux,phandle = <0x18>;
  1102. phandle = <0x18>;
  1103. };
  1104.  
  1105. csi_top {
  1106. #clock-cells = <0x00>;
  1107. compatible = "allwinner,periph-clock";
  1108. clock-output-names = "csi_top";
  1109. linux,phandle = <0xa4>;
  1110. phandle = <0xa4>;
  1111. };
  1112.  
  1113. csi_master0 {
  1114. #clock-cells = <0x00>;
  1115. compatible = "allwinner,periph-clock";
  1116. clock-output-names = "csi_master0";
  1117. linux,phandle = <0xa6>;
  1118. phandle = <0xa6>;
  1119. };
  1120.  
  1121. csi_master1 {
  1122. #clock-cells = <0x00>;
  1123. compatible = "allwinner,periph-clock";
  1124. clock-output-names = "csi_master1";
  1125. linux,phandle = <0xa7>;
  1126. phandle = <0xa7>;
  1127. };
  1128.  
  1129. hdmi_hdcp {
  1130. #clock-cells = <0x00>;
  1131. compatible = "allwinner,periph-clock";
  1132. assigned-clock-parents = <0x03>;
  1133. assigned-clocks = <0x19>;
  1134. clock-output-names = "hdmi_hdcp";
  1135. linux,phandle = <0x19>;
  1136. phandle = <0x19>;
  1137. };
  1138.  
  1139. pio {
  1140. #clock-cells = <0x00>;
  1141. compatible = "allwinner,periph-clock";
  1142. clock-output-names = "pio";
  1143. linux,phandle = <0x1d>;
  1144. phandle = <0x1d>;
  1145. };
  1146.  
  1147. cpurcir {
  1148. #clock-cells = <0x00>;
  1149. compatible = "allwinner,periph-cpus-clock";
  1150. clock-output-names = "cpurcir";
  1151. linux,phandle = <0x25>;
  1152. phandle = <0x25>;
  1153. };
  1154.  
  1155. hosc32k {
  1156. #clock-cells = <0x00>;
  1157. compatible = "allwinner,periph-cpus-clock";
  1158. clock-output-names = "hosc32k";
  1159. linux,phandle = <0x1a>;
  1160. phandle = <0x1a>;
  1161. };
  1162.  
  1163. losc_out {
  1164. #clock-cells = <0x00>;
  1165. compatible = "allwinner,periph-cpus-clock";
  1166. assigned-clock-parents = <0x1a>;
  1167. assigned-clocks = <0x1b>;
  1168. clock-output-names = "losc_out";
  1169. linux,phandle = <0x1b>;
  1170. phandle = <0x1b>;
  1171. };
  1172.  
  1173. cpurcpus_pll {
  1174. #clock-cells = <0x00>;
  1175. compatible = "allwinner,periph-cpus-clock";
  1176. clock-output-names = "cpurcpus_pll";
  1177. linux,phandle = <0xf9>;
  1178. phandle = <0xf9>;
  1179. };
  1180.  
  1181. cpurcpus {
  1182. #clock-cells = <0x00>;
  1183. compatible = "allwinner,periph-cpus-clock";
  1184. clock-output-names = "cpurcpus";
  1185. linux,phandle = <0xfa>;
  1186. phandle = <0xfa>;
  1187. };
  1188.  
  1189. cpurahbs {
  1190. #clock-cells = <0x00>;
  1191. compatible = "allwinner,periph-cpus-clock";
  1192. clock-output-names = "cpurahbs";
  1193. linux,phandle = <0xfb>;
  1194. phandle = <0xfb>;
  1195. };
  1196.  
  1197. cpurapbs1 {
  1198. #clock-cells = <0x00>;
  1199. compatible = "allwinner,periph-cpus-clock";
  1200. clock-output-names = "cpurapbs1";
  1201. linux,phandle = <0xfc>;
  1202. phandle = <0xfc>;
  1203. };
  1204.  
  1205. cpurapbs2_pll {
  1206. #clock-cells = <0x00>;
  1207. compatible = "allwinner,periph-cpus-clock";
  1208. clock-output-names = "cpurapbs2_pll";
  1209. linux,phandle = <0xfd>;
  1210. phandle = <0xfd>;
  1211. };
  1212.  
  1213. cpurapbs2 {
  1214. #clock-cells = <0x00>;
  1215. compatible = "allwinner,periph-cpus-clock";
  1216. clock-output-names = "cpurapbs2";
  1217. linux,phandle = <0xfe>;
  1218. phandle = <0xfe>;
  1219. };
  1220.  
  1221. cpurpio {
  1222. #clock-cells = <0x00>;
  1223. compatible = "allwinner,periph-cpus-clock";
  1224. clock-output-names = "cpurpio";
  1225. linux,phandle = <0x1c>;
  1226. phandle = <0x1c>;
  1227. };
  1228.  
  1229. dcxo_out {
  1230. #clock-cells = <0x00>;
  1231. compatible = "allwinner,periph-cpus-clock";
  1232. clock-output-names = "dcxo_out";
  1233. linux,phandle = <0xff>;
  1234. phandle = <0xff>;
  1235. };
  1236.  
  1237. stwi {
  1238. #clock-cells = <0x00>;
  1239. compatible = "allwinner,periph-cpus-clock";
  1240. clock-output-names = "stwi";
  1241. linux,phandle = <0x4a>;
  1242. phandle = <0x4a>;
  1243. };
  1244. };
  1245.  
  1246. soc@03000000 {
  1247. compatible = "simple-bus";
  1248. #address-cells = <0x02>;
  1249. #size-cells = <0x02>;
  1250. ranges;
  1251. device_type = "soc";
  1252. linux,phandle = <0x100>;
  1253. phandle = <0x100>;
  1254.  
  1255. pinctrl@07022000 {
  1256. compatible = "allwinner,sun50iw9p1-r-pinctrl";
  1257. reg = <0x00 0x7022000 0x00 0x400>;
  1258. clocks = <0x1c>;
  1259. device_type = "r_pio";
  1260. gpio-controller;
  1261. interrupt-controller;
  1262. #interrupt-cells = <0x03>;
  1263. #size-cells = <0x00>;
  1264. #gpio-cells = <0x06>;
  1265. linux,phandle = <0x101>;
  1266. phandle = <0x101>;
  1267.  
  1268. s_rsb0@0 {
  1269. allwinner,pins = "PL0\0PL1";
  1270. allwinner,function = "s_rsb0";
  1271. allwinner,muxsel = <0x02>;
  1272. allwinner,drive = <0x02>;
  1273. allwinner,pull = <0x01>;
  1274. linux,phandle = <0x102>;
  1275. phandle = <0x102>;
  1276. };
  1277.  
  1278. s_twi0@0 {
  1279. allwinner,pins = "PL0\0PL1";
  1280. allwinner,pname = "s_twi0_scl\0s_twi0_sda";
  1281. allwinner,function = "s_twi0";
  1282. allwinner,muxsel = <0x03>;
  1283. allwinner,drive = <0x01>;
  1284. allwinner,pull = <0x01>;
  1285. linux,phandle = <0x4b>;
  1286. phandle = <0x4b>;
  1287. };
  1288.  
  1289. s_twi0@1 {
  1290. allwinner,pins = "PL0\0PL1";
  1291. allwinner,function = "io_disabled";
  1292. allwinner,muxsel = <0x07>;
  1293. allwinner,drive = <0x01>;
  1294. allwinner,pull = <0x00>;
  1295. linux,phandle = <0x4c>;
  1296. phandle = <0x4c>;
  1297. };
  1298. };
  1299.  
  1300. pinctrl@0300b000 {
  1301. compatible = "allwinner,sun50iw9p1-pinctrl";
  1302. reg = <0x00 0x300b000 0x00 0x400>;
  1303. interrupts = <0x00 0x33 0x04 0x00 0x34 0x04 0x00 0x35 0x04 0x00 0x2b 0x04 0x00 0x36 0x04 0x00 0x37 0x04 0x00 0x38 0x04 0x00 0x39 0x04>;
  1304. device_type = "pio";
  1305. clocks = <0x1d 0x1e 0x09>;
  1306. gpio-controller;
  1307. interrupt-controller;
  1308. #interrupt-cells = <0x03>;
  1309. #size-cells = <0x00>;
  1310. #gpio-cells = <0x06>;
  1311. input-debounce = <0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
  1312. linux,phandle = <0x53>;
  1313. phandle = <0x53>;
  1314.  
  1315. clk_losc@0 {
  1316. allwinner,pins = "PG10";
  1317. allwinner,function = "x32kfout";
  1318. allwinner,muxsel = <0x03>;
  1319. allwinner,drive = <0x02>;
  1320. allwinner,pull = <0x01>;
  1321. linux,phandle = <0xd2>;
  1322. phandle = <0xd2>;
  1323. };
  1324.  
  1325. s_cir0@0 {
  1326. allwinner,pins = "PH10";
  1327. allwinner,function = "ir";
  1328. allwinner,muxsel = <0x03>;
  1329. allwinner,drive = <0x02>;
  1330. allwinner,pull = <0x01>;
  1331. linux,phandle = <0x24>;
  1332. phandle = <0x24>;
  1333. };
  1334.  
  1335. vdevice@0 {
  1336. allwinner,pins = "PA1\0PA2";
  1337. allwinner,function = "Vdevice";
  1338. allwinner,muxsel = <0x05>;
  1339. allwinner,drive = <0x01>;
  1340. allwinner,pull = <0x01>;
  1341. linux,phandle = <0xb4>;
  1342. phandle = <0xb4>;
  1343. };
  1344.  
  1345. uart0@1 {
  1346. allwinner,pins = "PH0\0PH1";
  1347. allwinner,function = "uart0";
  1348. allwinner,muxsel = <0x07>;
  1349. allwinner,drive = <0x01>;
  1350. allwinner,pull = <0x00>;
  1351. linux,phandle = <0x2b>;
  1352. phandle = <0x2b>;
  1353. };
  1354.  
  1355. uart1@0 {
  1356. allwinner,pins = "PG6\0PG7\0PG8\0PG9";
  1357. allwinner,pname = "uart1_tx\0uart1_rx\0uart1_rts\0uart1_cts";
  1358. allwinner,function = "uart1";
  1359. allwinner,muxsel = <0x02>;
  1360. allwinner,drive = <0x01>;
  1361. allwinner,pull = <0x01>;
  1362. linux,phandle = <0x2d>;
  1363. phandle = <0x2d>;
  1364. };
  1365.  
  1366. uart1@1 {
  1367. allwinner,pins = "PG6\0PG7\0PG8\0PG9";
  1368. allwinner,function = "io_disabled";
  1369. allwinner,muxsel = <0x07>;
  1370. allwinner,drive = <0x01>;
  1371. allwinner,pull = <0x00>;
  1372. linux,phandle = <0x2e>;
  1373. phandle = <0x2e>;
  1374. };
  1375.  
  1376. uart2@0 {
  1377. allwinner,pins = "PH5\0PH6\0PH7\0PH8";
  1378. allwinner,pname = "uart2_tx\0uart2_rx\0uart2_rts\0uart2_cts";
  1379. allwinner,function = "uart2";
  1380. allwinner,muxsel = <0x02>;
  1381. allwinner,drive = <0x01>;
  1382. allwinner,pull = <0x01>;
  1383. linux,phandle = <0x30>;
  1384. phandle = <0x30>;
  1385. };
  1386.  
  1387. uart2@1 {
  1388. allwinner,pins = "PH5\0PH6\0PH7\0PH8";
  1389. allwinner,function = "io_disabled";
  1390. allwinner,muxsel = <0x07>;
  1391. allwinner,drive = <0x01>;
  1392. allwinner,pull = <0x00>;
  1393. linux,phandle = <0x31>;
  1394. phandle = <0x31>;
  1395. };
  1396.  
  1397. uart3@0 {
  1398. allwinner,pins = "PI9\0PI10\0PI11\0PI12";
  1399. allwinner,pname = "uart3_tx\0uart3_rx\0uart3_rts\0uart3_cts";
  1400. allwinner,function = "uart3";
  1401. allwinner,muxsel = <0x03>;
  1402. allwinner,drive = <0x01>;
  1403. allwinner,pull = <0x01>;
  1404. linux,phandle = <0x33>;
  1405. phandle = <0x33>;
  1406. };
  1407.  
  1408. uart3@1 {
  1409. allwinner,pins = "PI9\0PI10\0PI11\0PI12";
  1410. allwinner,function = "io_disabled";
  1411. allwinner,muxsel = <0x07>;
  1412. allwinner,drive = <0x01>;
  1413. allwinner,pull = <0x00>;
  1414. linux,phandle = <0x34>;
  1415. phandle = <0x34>;
  1416. };
  1417.  
  1418. uart4@0 {
  1419. allwinner,pins = "PI13\0PI14\0PI15\0PI16";
  1420. allwinner,pname = "uart4_tx\0uart4_rx\0uart4_rts\0uart4_cts";
  1421. allwinner,function = "uart4";
  1422. allwinner,muxsel = <0x03>;
  1423. allwinner,drive = <0x01>;
  1424. allwinner,pull = <0x01>;
  1425. linux,phandle = <0x36>;
  1426. phandle = <0x36>;
  1427. };
  1428.  
  1429. uart4@1 {
  1430. allwinner,pins = "PI13\0PI14\0PI15\0PI16";
  1431. allwinner,function = "io_disabled";
  1432. allwinner,muxsel = <0x07>;
  1433. allwinner,drive = <0x01>;
  1434. allwinner,pull = <0x00>;
  1435. linux,phandle = <0x37>;
  1436. phandle = <0x37>;
  1437. };
  1438.  
  1439. uart5@0 {
  1440. allwinner,pins = "PH2\0PH3";
  1441. allwinner,pname = "uart3_tx\0uart3_rx";
  1442. allwinner,function = "uart5";
  1443. allwinner,muxsel = <0x02>;
  1444. allwinner,drive = <0x01>;
  1445. allwinner,pull = <0x01>;
  1446. linux,phandle = <0x39>;
  1447. phandle = <0x39>;
  1448. };
  1449.  
  1450. uart5@1 {
  1451. allwinner,pins = "PH2\0PH3";
  1452. allwinner,function = "io_disabled";
  1453. allwinner,muxsel = <0x07>;
  1454. allwinner,drive = <0x01>;
  1455. allwinner,pull = <0x00>;
  1456. linux,phandle = <0x3a>;
  1457. phandle = <0x3a>;
  1458. };
  1459.  
  1460. twi0@0 {
  1461. allwinner,pins = "PA0\0PA1";
  1462. allwinner,pname = "twi0_scl\0twi0_sda";
  1463. allwinner,function = "twi0";
  1464. allwinner,muxsel = <0x04>;
  1465. allwinner,drive = <0x01>;
  1466. allwinner,pull = <0x00>;
  1467. linux,phandle = <0x3c>;
  1468. phandle = <0x3c>;
  1469. };
  1470.  
  1471. twi0@1 {
  1472. allwinner,pins = "PA0\0PA1";
  1473. allwinner,function = "io_disabled";
  1474. allwinner,muxsel = <0x07>;
  1475. allwinner,drive = <0x01>;
  1476. allwinner,pull = <0x00>;
  1477. linux,phandle = <0x3d>;
  1478. phandle = <0x3d>;
  1479. };
  1480.  
  1481. twi1@0 {
  1482. allwinner,pins = "PA2\0PA3";
  1483. allwinner,pname = "twi1_scl\0twi1_sda";
  1484. allwinner,function = "twi1";
  1485. allwinner,muxsel = <0x04>;
  1486. allwinner,drive = <0x01>;
  1487. allwinner,pull = <0x00>;
  1488. linux,phandle = <0x3f>;
  1489. phandle = <0x3f>;
  1490. };
  1491.  
  1492. twi1@1 {
  1493. allwinner,pins = "PA2\0PA3";
  1494. allwinner,function = "io_disabled";
  1495. allwinner,muxsel = <0x07>;
  1496. allwinner,drive = <0x01>;
  1497. allwinner,pull = <0x00>;
  1498. linux,phandle = <0x40>;
  1499. phandle = <0x40>;
  1500. };
  1501.  
  1502. twi2@0 {
  1503. allwinner,pins = "PE20\0PE21";
  1504. allwinner,pname = "twi2_scl\0twi2_sda";
  1505. allwinner,function = "twi2";
  1506. allwinner,muxsel = <0x05>;
  1507. allwinner,drive = <0x01>;
  1508. allwinner,pull = <0x00>;
  1509. linux,phandle = <0x42>;
  1510. phandle = <0x42>;
  1511. };
  1512.  
  1513. twi2@1 {
  1514. allwinner,pins = "PE20\0PE21";
  1515. allwinner,function = "io_disabled";
  1516. allwinner,muxsel = <0x07>;
  1517. allwinner,drive = <0x01>;
  1518. allwinner,pull = <0x00>;
  1519. linux,phandle = <0x43>;
  1520. phandle = <0x43>;
  1521. };
  1522.  
  1523. twi3@0 {
  1524. allwinner,pins = "PA10\0PA11";
  1525. allwinner,pname = "twi3_scl\0twi3_sda";
  1526. allwinner,function = "twi3";
  1527. allwinner,muxsel = <0x02>;
  1528. allwinner,drive = <0x01>;
  1529. allwinner,pull = <0x01>;
  1530. linux,phandle = <0x45>;
  1531. phandle = <0x45>;
  1532. };
  1533.  
  1534. twi3@1 {
  1535. allwinner,pins = "PA10\0PA11";
  1536. allwinner,function = "io_disabled";
  1537. allwinner,muxsel = <0x07>;
  1538. allwinner,drive = <0x01>;
  1539. allwinner,pull = <0x00>;
  1540. linux,phandle = <0x46>;
  1541. phandle = <0x46>;
  1542. };
  1543.  
  1544. twi4@0 {
  1545. allwinner,pins = "PG15\0PG16";
  1546. allwinner,pname = "twi4_scl\0twi4_sda";
  1547. allwinner,function = "twi4";
  1548. allwinner,muxsel = <0x05>;
  1549. allwinner,drive = <0x01>;
  1550. allwinner,pull = <0x00>;
  1551. linux,phandle = <0x48>;
  1552. phandle = <0x48>;
  1553. };
  1554.  
  1555. twi4@1 {
  1556. allwinner,pins = "PG15\0PG16";
  1557. allwinner,function = "io_disabled";
  1558. allwinner,muxsel = <0x07>;
  1559. allwinner,drive = <0x01>;
  1560. allwinner,pull = <0x00>;
  1561. linux,phandle = <0x49>;
  1562. phandle = <0x49>;
  1563. };
  1564.  
  1565. ts0@0 {
  1566. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11";
  1567. allwinner,pname = "ts0_clk\0ts0_err\0ts0_sync\0ts0_dvld\0ts0_d0\0ts0_d1\0ts0_d2\0ts0_d3\0ts0_d4\0ts0_d5\0ts0_d6\0ts0_d7";
  1568. allwinner,function = "ts0";
  1569. allwinner,muxsel = <0x04>;
  1570. allwinner,drive = <0x01>;
  1571. allwinner,pull = <0x00>;
  1572. linux,phandle = <0xc1>;
  1573. phandle = <0xc1>;
  1574. };
  1575.  
  1576. ts0_sleep@0 {
  1577. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11";
  1578. allwinner,pname = "ts0_clk\0ts0_err\0ts0_sync\0ts0_dvld\0ts0_d0\0ts0_d1\0ts0_d2\0ts0_d3\0ts0_d4\0ts0_d5\0ts0_d6\0ts0_d7";
  1579. allwinner,function = "io_disabled";
  1580. allwinner,muxsel = <0x07>;
  1581. allwinner,drive = <0x01>;
  1582. allwinner,pull = <0x00>;
  1583. linux,phandle = <0xc2>;
  1584. phandle = <0xc2>;
  1585. };
  1586.  
  1587. spi0@0 {
  1588. allwinner,pins = "PC0\0PC2\0PC4\0PC15\0PC16";
  1589. allwinner,pname = "spi0_sclk\0spi0_mosi\0spi0_miso\0spi0_wp\0spi0_hold";
  1590. allwinner,function = "spi0";
  1591. allwinner,muxsel = <0x04>;
  1592. allwinner,drive = <0x01>;
  1593. allwinner,pull = <0x00>;
  1594. linux,phandle = <0x7e>;
  1595. phandle = <0x7e>;
  1596. };
  1597.  
  1598. spi0@1 {
  1599. allwinner,pins = "PC3\0PC7";
  1600. allwinner,pname = "spi0_cs0\0spi0_cs1";
  1601. allwinner,function = "spi0";
  1602. allwinner,muxsel = <0x04>;
  1603. allwinner,drive = <0x01>;
  1604. allwinner,pull = <0x01>;
  1605. linux,phandle = <0x7f>;
  1606. phandle = <0x7f>;
  1607. };
  1608.  
  1609. spi0@2 {
  1610. allwinner,pins = "PC0\0PC2\0PC3\0PC4\0PC7\0PC15\0PC16";
  1611. allwinner,function = "io_disabled";
  1612. allwinner,muxsel = <0x07>;
  1613. allwinner,drive = <0x01>;
  1614. allwinner,pull = <0x00>;
  1615. linux,phandle = <0x80>;
  1616. phandle = <0x80>;
  1617. };
  1618.  
  1619. spi1@0 {
  1620. allwinner,pins = "PH6\0PH7\0PH8";
  1621. allwinner,pname = "spi1_sclk\0spi1_mosi\0spi1_miso";
  1622. allwinner,function = "spi1";
  1623. allwinner,muxsel = <0x04>;
  1624. allwinner,drive = <0x01>;
  1625. allwinner,pull = <0x00>;
  1626. linux,phandle = <0x82>;
  1627. phandle = <0x82>;
  1628. };
  1629.  
  1630. spi1@1 {
  1631. allwinner,pins = "PH5\0PH9";
  1632. allwinner,pname = "spi1_cs0\0spi1_cs1";
  1633. allwinner,function = "spi1";
  1634. allwinner,muxsel = <0x04>;
  1635. allwinner,drive = <0x01>;
  1636. allwinner,pull = <0x01>;
  1637. linux,phandle = <0x83>;
  1638. phandle = <0x83>;
  1639. };
  1640.  
  1641. spi1@2 {
  1642. allwinner,pins = "PH5\0PH6\0PH7\0PH8\0PH9";
  1643. allwinner,function = "io_disabled";
  1644. allwinner,muxsel = <0x07>;
  1645. allwinner,drive = <0x01>;
  1646. allwinner,pull = <0x00>;
  1647. linux,phandle = <0x84>;
  1648. phandle = <0x84>;
  1649. };
  1650.  
  1651. sdc0@0 {
  1652. allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
  1653. allwinner,function = "sdc0";
  1654. allwinner,muxsel = <0x02>;
  1655. allwinner,drive = <0x03>;
  1656. allwinner,pull = <0x01>;
  1657. linux,phandle = <0x90>;
  1658. phandle = <0x90>;
  1659. };
  1660.  
  1661. sdc0@1 {
  1662. allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
  1663. allwinner,function = "io_disabled";
  1664. allwinner,muxsel = <0x07>;
  1665. allwinner,drive = <0x01>;
  1666. allwinner,pull = <0x01>;
  1667. linux,phandle = <0x91>;
  1668. phandle = <0x91>;
  1669. };
  1670.  
  1671. sdc0@2 {
  1672. allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
  1673. allwinner,function = "uart0_jtag";
  1674. allwinner,muxsel = <0x03>;
  1675. allwinner,drive = <0x01>;
  1676. allwinner,pull = <0x01>;
  1677. linux,phandle = <0x92>;
  1678. phandle = <0x92>;
  1679. };
  1680.  
  1681. sdc1@0 {
  1682. allwinner,pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5";
  1683. allwinner,function = "sdc1";
  1684. allwinner,muxsel = <0x02>;
  1685. allwinner,drive = <0x03>;
  1686. allwinner,pull = <0x01>;
  1687. linux,phandle = <0x96>;
  1688. phandle = <0x96>;
  1689. };
  1690.  
  1691. sdc1@1 {
  1692. allwinner,pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5";
  1693. allwinner,function = "io_disabled";
  1694. allwinner,muxsel = <0x07>;
  1695. allwinner,drive = <0x01>;
  1696. allwinner,pull = <0x01>;
  1697. linux,phandle = <0x97>;
  1698. phandle = <0x97>;
  1699. };
  1700.  
  1701. sdc2@0 {
  1702. allwinner,pins = "PC1\0PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC13\0PC14\0PC15\0PC16";
  1703. allwinner,function = "sdc2";
  1704. allwinner,muxsel = <0x03>;
  1705. allwinner,drive = <0x02>;
  1706. allwinner,pull = <0x01>;
  1707. linux,phandle = <0x8a>;
  1708. phandle = <0x8a>;
  1709. };
  1710.  
  1711. sdc2@1 {
  1712. allwinner,pins = "PC0\0PC1\0PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC13\0PC14\0PC15\0PC16";
  1713. allwinner,function = "io_disabled";
  1714. allwinner,muxsel = <0x07>;
  1715. allwinner,drive = <0x01>;
  1716. allwinner,pull = <0x01>;
  1717. linux,phandle = <0x8c>;
  1718. phandle = <0x8c>;
  1719. };
  1720.  
  1721. sdc2@2 {
  1722. allwinner,pins = "PC0";
  1723. allwinner,function = "sdc2";
  1724. allwinner,muxsel = <0x03>;
  1725. allwinner,drive = <0x02>;
  1726. allwinner,pull = <0x02>;
  1727. linux,phandle = <0x8b>;
  1728. phandle = <0x8b>;
  1729. };
  1730.  
  1731. spdif@0 {
  1732. allwinner,pins = "PH2\0PH3\0PH4";
  1733. allwinner,function = "spdif";
  1734. allwinner,muxsel = <0x03>;
  1735. allwinner,drive = <0x01>;
  1736. allwinner,pull = <0x00>;
  1737. linux,phandle = <0x62>;
  1738. phandle = <0x62>;
  1739. };
  1740.  
  1741. spdif_sleep@0 {
  1742. allwinner,pins = "PH2\0PH3\0PH4";
  1743. allwinner,function = "io_disabled";
  1744. allwinner,muxsel = <0x07>;
  1745. allwinner,drive = <0x01>;
  1746. allwinner,pull = <0x00>;
  1747. linux,phandle = <0x63>;
  1748. phandle = <0x63>;
  1749. };
  1750.  
  1751. dmic@0 {
  1752. allwinner,pins = "PI0\0PI1\0PI2\0PI3\0PI4";
  1753. allwinner,function = "dmic";
  1754. allwinner,muxsel = <0x03>;
  1755. allwinner,drive = <0x01>;
  1756. allwinner,pull = <0x00>;
  1757. linux,phandle = <0x65>;
  1758. phandle = <0x65>;
  1759. };
  1760.  
  1761. dmic_sleep@0 {
  1762. allwinner,pins = "PI0\0PI1\0PI2\0PI3\0PI4";
  1763. allwinner,function = "io_disabled";
  1764. allwinner,muxsel = <0x07>;
  1765. allwinner,drive = <0x01>;
  1766. allwinner,pull = <0x00>;
  1767. linux,phandle = <0x66>;
  1768. phandle = <0x66>;
  1769. };
  1770.  
  1771. ahub_daudio0@0 {
  1772. allwinner,pins = "PA6\0PA7\0PA8\0PA9";
  1773. allwinner,function = "h_pcm0";
  1774. allwinner,muxsel = <0x03>;
  1775. allwinner,drive = <0x01>;
  1776. allwinner,pull = <0x00>;
  1777. linux,phandle = <0x103>;
  1778. phandle = <0x103>;
  1779. };
  1780.  
  1781. ahub_daudio0_sleep@0 {
  1782. allwinner,pins = "PA6\0PA7\0PA8\0PA9";
  1783. allwinner,function = "io_disabled";
  1784. allwinner,muxsel = <0x07>;
  1785. allwinner,drive = <0x01>;
  1786. allwinner,pull = <0x00>;
  1787. linux,phandle = <0x104>;
  1788. phandle = <0x104>;
  1789. };
  1790.  
  1791. h_ahub_daudio0@0 {
  1792. allwinner,pins = "PI0\0PI1\0PI2\0PI3\0PI4";
  1793. allwinner,function = "h_pcm0";
  1794. allwinner,muxsel = <0x04>;
  1795. allwinner,drive = <0x01>;
  1796. allwinner,pull = <0x00>;
  1797. linux,phandle = <0x6b>;
  1798. phandle = <0x6b>;
  1799. };
  1800.  
  1801. h_ahub_daudio0_sleep@0 {
  1802. allwinner,pins = "PI0\0PI1\0PI2\0PI3\0PI4";
  1803. allwinner,function = "io_disabled";
  1804. allwinner,muxsel = <0x07>;
  1805. allwinner,drive = <0x01>;
  1806. allwinner,pull = <0x00>;
  1807. linux,phandle = <0x6c>;
  1808. phandle = <0x6c>;
  1809. };
  1810.  
  1811. ahub_daudio2@0 {
  1812. allwinner,pins = "PG10\0PG11\0PG12\0PG13\0PG14";
  1813. allwinner,function = "h_pcm2";
  1814. allwinner,muxsel = <0x02>;
  1815. allwinner,drive = <0x01>;
  1816. allwinner,pull = <0x00>;
  1817. linux,phandle = <0x6d>;
  1818. phandle = <0x6d>;
  1819. };
  1820.  
  1821. ahub_daudio2_sleep@0 {
  1822. allwinner,pins = "PG10\0PG11\0PG12\0PG13\0PG14";
  1823. allwinner,function = "io_disabled";
  1824. allwinner,muxsel = <0x07>;
  1825. allwinner,drive = <0x01>;
  1826. allwinner,pull = <0x00>;
  1827. linux,phandle = <0x6e>;
  1828. phandle = <0x6e>;
  1829. };
  1830.  
  1831. ahub_daudio3@0 {
  1832. allwinner,pins = "PH5\0PH6\0PH7\0PH8\0PH9";
  1833. allwinner,function = "h_pcm3";
  1834. allwinner,muxsel = <0x03>;
  1835. allwinner,drive = <0x01>;
  1836. allwinner,pull = <0x00>;
  1837. linux,phandle = <0x6f>;
  1838. phandle = <0x6f>;
  1839. };
  1840.  
  1841. ahub_daudio3_sleep@0 {
  1842. allwinner,pins = "PH5\0PH6\0PH7\0PH8\0PH9";
  1843. allwinner,function = "io_disabled";
  1844. allwinner,muxsel = <0x07>;
  1845. allwinner,drive = <0x01>;
  1846. allwinner,pull = <0x00>;
  1847. linux,phandle = <0x70>;
  1848. phandle = <0x70>;
  1849. };
  1850.  
  1851. csi1@0 {
  1852. allwinner,pins = "PE0\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11\0PE12\0PE13\0PE14\0PE15\0PE16\0PE17\0PE18\0PE19";
  1853. allwinner,pname = "csi1_pck\0csi1_hsync\0csi1_vsync\0csi1_d0\0csi1_d1\0csi1_d2\0csi1_d3\0csi1_d4\0csi1_d5\0csi1_d6\0csi1_d7\0csi1_d8\0csi1_d9\0csi1_d10\0csi1_d11\0csi1_d12\0csi1_d13\0csi1_d14\0csi1_d15";
  1854. allwinner,function = "csi1";
  1855. allwinner,muxsel = <0x02>;
  1856. allwinner,drive = <0x01>;
  1857. allwinner,pull = <0x00>;
  1858. linux,phandle = <0xb0>;
  1859. phandle = <0xb0>;
  1860. };
  1861.  
  1862. csi1@1 {
  1863. allwinner,pins = "PE0\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11\0PE12\0PE13\0PE14\0PE15\0PE16\0PE17\0PE18\0PE19";
  1864. allwinner,pname = "csi1_pck\0csi1_hsync\0csi1_vsync\0csi1_d0\0csi1_d1\0csi1_d2\0csi1_d3\0csi1_d4\0csi1_d5\0csi1_d6\0csi1_d7\0csi1_d8\0csi1_d9\0csi1_d10\0csi1_d11\0csi1_d12\0csi1_d13\0csi1_d14\0csi1_d15";
  1865. allwinner,function = "io_disabled";
  1866. allwinner,muxsel = <0x07>;
  1867. allwinner,drive = <0x01>;
  1868. allwinner,pull = <0x00>;
  1869. linux,phandle = <0xb1>;
  1870. phandle = <0xb1>;
  1871. };
  1872.  
  1873. csi_mclk0@0 {
  1874. allwinner,pins = "PG19";
  1875. allwinner,pname = "csi_mclk0";
  1876. allwinner,function = "csi_mclk0";
  1877. allwinner,muxsel = <0x03>;
  1878. allwinner,drive = <0x02>;
  1879. allwinner,pull = <0x00>;
  1880. linux,phandle = <0xa8>;
  1881. phandle = <0xa8>;
  1882. };
  1883.  
  1884. csi_mclk0@1 {
  1885. allwinner,pins = "PG19";
  1886. allwinner,pname = "csi_mclk0";
  1887. allwinner,function = "io_disabled";
  1888. allwinner,muxsel = <0x07>;
  1889. allwinner,drive = <0x02>;
  1890. allwinner,pull = <0x00>;
  1891. linux,phandle = <0xa9>;
  1892. phandle = <0xa9>;
  1893. };
  1894.  
  1895. csi_cci0@0 {
  1896. allwinner,pins = "PG17\0PG18";
  1897. allwinner,pname = "csi_cci0_sck\0csi_cci0_sda";
  1898. allwinner,function = "csi_cci0";
  1899. allwinner,muxsel = <0x03>;
  1900. allwinner,drive = <0x02>;
  1901. allwinner,pull = <0x00>;
  1902. linux,phandle = <0xac>;
  1903. phandle = <0xac>;
  1904. };
  1905.  
  1906. csi_cci0@1 {
  1907. allwinner,pins = "PG17\0PG18";
  1908. allwinner,pname = "csi_cci0_sck\0csi_cci0_sda";
  1909. allwinner,function = "io_disabled";
  1910. allwinner,muxsel = <0x07>;
  1911. allwinner,drive = <0x02>;
  1912. allwinner,pull = <0x00>;
  1913. linux,phandle = <0xad>;
  1914. phandle = <0xad>;
  1915. };
  1916.  
  1917. csi_mclk1@0 {
  1918. allwinner,pins = "PE1";
  1919. allwinner,pname = "csi_mclk1";
  1920. allwinner,function = "csi_mclk1";
  1921. allwinner,muxsel = <0x02>;
  1922. allwinner,drive = <0x02>;
  1923. allwinner,pull = <0x00>;
  1924. linux,phandle = <0xaa>;
  1925. phandle = <0xaa>;
  1926. };
  1927.  
  1928. csi_mclk1@1 {
  1929. allwinner,pins = "PE1";
  1930. allwinner,pname = "csi_mclk1";
  1931. allwinner,function = "io_disabled";
  1932. allwinner,muxsel = <0x07>;
  1933. allwinner,drive = <0x02>;
  1934. allwinner,pull = <0x00>;
  1935. linux,phandle = <0xab>;
  1936. phandle = <0xab>;
  1937. };
  1938.  
  1939. csi_cci1@0 {
  1940. allwinner,pins = "PE20\0PE21";
  1941. allwinner,pname = "csi_cci1_sck\0csi_cci1_sda";
  1942. allwinner,function = "csi_cci1";
  1943. allwinner,muxsel = <0x02>;
  1944. allwinner,drive = <0x02>;
  1945. allwinner,pull = <0x00>;
  1946. linux,phandle = <0xae>;
  1947. phandle = <0xae>;
  1948. };
  1949.  
  1950. csi_cci1@1 {
  1951. allwinner,pins = "PE20\0PE21";
  1952. allwinner,pname = "csi_cci1_sck\0csi_cci1_sda";
  1953. allwinner,function = "io_disabled";
  1954. allwinner,muxsel = <0x07>;
  1955. allwinner,drive = <0x02>;
  1956. allwinner,pull = <0x00>;
  1957. linux,phandle = <0xaf>;
  1958. phandle = <0xaf>;
  1959. };
  1960.  
  1961. scr0@0 {
  1962. allwinner,pins = "PG13\0PG14\0PG10\0PG11\0PG12";
  1963. allwinner,pname = "scr0_rst\0scr0_det\0scr0_vccen\0scr0_sck\0scr0_sda";
  1964. allwinner,function = "sim0";
  1965. allwinner,muxsel = <0x04>;
  1966. allwinner,drive = <0x00>;
  1967. allwinner,pull = <0x01>;
  1968. linux,phandle = <0xb8>;
  1969. phandle = <0xb8>;
  1970. };
  1971.  
  1972. scr0@1 {
  1973. allwinner,pins = "PG8\0PG9";
  1974. allwinner,pname = "scr0_vppen\0scr0_vppp";
  1975. allwinner,function = "sim0";
  1976. allwinner,muxsel = <0x04>;
  1977. allwinner,drive = <0x00>;
  1978. allwinner,pull = <0x01>;
  1979. linux,phandle = <0xb9>;
  1980. phandle = <0xb9>;
  1981. };
  1982.  
  1983. scr0@2 {
  1984. allwinner,pins = "PG8\0PG9\0PG10\0PG11\0PG12\0PG13\0PG14";
  1985. allwinner,function = "io_disabled";
  1986. allwinner,muxsel = <0x07>;
  1987. allwinner,drive = <0x00>;
  1988. allwinner,pull = <0x00>;
  1989. linux,phandle = <0xba>;
  1990. phandle = <0xba>;
  1991. };
  1992.  
  1993. scr1@0 {
  1994. allwinner,pins = "PH5\0PH6\0PH2\0PH3\0PH4";
  1995. allwinner,pname = "scr1_rst\0scr1_det\0scr1_vccen\0scr1_sck\0scr1_sda";
  1996. allwinner,function = "sim1";
  1997. allwinner,muxsel = <0x05>;
  1998. allwinner,drive = <0x01>;
  1999. allwinner,pull = <0x01>;
  2000. linux,phandle = <0x105>;
  2001. phandle = <0x105>;
  2002. };
  2003.  
  2004. scr1@1 {
  2005. allwinner,pins = "PH0\0PH1";
  2006. allwinner,pname = "scr1_vppen\0scr1_vppp";
  2007. allwinner,function = "sim1";
  2008. allwinner,muxsel = <0x05>;
  2009. allwinner,drive = <0x01>;
  2010. allwinner,pull = <0x01>;
  2011. linux,phandle = <0x106>;
  2012. phandle = <0x106>;
  2013. };
  2014.  
  2015. scr1@2 {
  2016. allwinner,pins = "PH0\0PH1\0PH2\0PH3\0PH4\0PH5\0PH6";
  2017. allwinner,function = "io_disabled";
  2018. allwinner,muxsel = <0x07>;
  2019. allwinner,drive = <0x01>;
  2020. allwinner,pull = <0x00>;
  2021. linux,phandle = <0x107>;
  2022. phandle = <0x107>;
  2023. };
  2024.  
  2025. nand0@2 {
  2026. allwinner,pins = "PC0\0PC1\0PC2\0PC3\0PC4\0PC5\0PC6\0PC7\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14\0PC15\0PC16";
  2027. allwinner,function = "io_disabled";
  2028. allwinner,muxsel = <0x07>;
  2029. allwinner,drive = <0x01>;
  2030. allwinner,pull = <0x00>;
  2031. linux,phandle = <0xbf>;
  2032. phandle = <0xbf>;
  2033. };
  2034.  
  2035. ac200@2 {
  2036. allwinner,pins = "PB0";
  2037. allwinner,function = "ac200";
  2038. allwinner,muxsel = <0x02>;
  2039. allwinner,drive = <0x01>;
  2040. allwinner,pull = <0x00>;
  2041. linux,phandle = <0x108>;
  2042. phandle = <0x108>;
  2043. };
  2044.  
  2045. ac200@3 {
  2046. allwinner,pins = "PB0";
  2047. allwinner,function = "io_disabled";
  2048. allwinner,muxsel = <0x07>;
  2049. allwinner,drive = <0x01>;
  2050. allwinner,pull = <0x00>;
  2051. linux,phandle = <0x109>;
  2052. phandle = <0x109>;
  2053. };
  2054.  
  2055. gmac@0 {
  2056. allwinner,pins = "PI0\0PI1\0PI2\0PI3\0PI4\0PI5\0PI6\0PI7\0PI8\0PI9\0PI10\0PI11\0PI12\0PI13\0PI14\0PI15\0PI16";
  2057. allwinner,function = "gmac0";
  2058. allwinner,muxsel = <0x02>;
  2059. allwinner,drive = <0x03>;
  2060. allwinner,pull = <0x00>;
  2061. linux,phandle = <0xcd>;
  2062. phandle = <0xcd>;
  2063. };
  2064.  
  2065. gmac@1 {
  2066. allwinner,pins = "PI0\0PI1\0PI2\0PI3\0PI4\0PI5\0PI6\0PI7\0PI8\0PI9\0PI10\0PI11\0PI12\0PI13\0PI14\0PI15\0PI16";
  2067. allwinner,function = "io_disabled";
  2068. allwinner,muxsel = <0x07>;
  2069. allwinner,drive = <0x03>;
  2070. allwinner,pull = <0x00>;
  2071. linux,phandle = <0xce>;
  2072. phandle = <0xce>;
  2073. };
  2074.  
  2075. gmac1@0 {
  2076. allwinner,pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA9";
  2077. allwinner,function = "gmac1";
  2078. allwinner,muxsel = <0x02>;
  2079. allwinner,drive = <0x03>;
  2080. allwinner,pull = <0x00>;
  2081. linux,phandle = <0xd0>;
  2082. phandle = <0xd0>;
  2083. };
  2084.  
  2085. gmac1@1 {
  2086. allwinner,pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA9";
  2087. allwinner,function = "io_disabled";
  2088. allwinner,muxsel = <0x07>;
  2089. allwinner,drive = <0x03>;
  2090. allwinner,pull = <0x00>;
  2091. linux,phandle = <0xd1>;
  2092. phandle = <0xd1>;
  2093. };
  2094.  
  2095. lvds0@0 {
  2096. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7";
  2097. allwinner,pname = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7";
  2098. allwinner,function = "lvds0";
  2099. allwinner,muxsel = <0x03>;
  2100. allwinner,drive = <0x03>;
  2101. allwinner,pull = <0x00>;
  2102. linux,phandle = <0x10a>;
  2103. phandle = <0x10a>;
  2104. };
  2105.  
  2106. lvds0@1 {
  2107. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7";
  2108. allwinner,pname = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7";
  2109. allwinner,function = "lvds0_suspend";
  2110. allwinner,muxsel = <0x07>;
  2111. allwinner,drive = <0x03>;
  2112. allwinner,pull = <0x00>;
  2113. linux,phandle = <0x10b>;
  2114. phandle = <0x10b>;
  2115. };
  2116.  
  2117. lvds1@0 {
  2118. allwinner,pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2119. allwinner,pname = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2120. allwinner,function = "lvds1";
  2121. allwinner,muxsel = <0x03>;
  2122. allwinner,drive = <0x03>;
  2123. allwinner,pull = <0x00>;
  2124. linux,phandle = <0x10c>;
  2125. phandle = <0x10c>;
  2126. };
  2127.  
  2128. lvds1@1 {
  2129. allwinner,pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2130. allwinner,pname = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2131. allwinner,function = "lvds1_suspend";
  2132. allwinner,muxsel = <0x07>;
  2133. allwinner,drive = <0x03>;
  2134. allwinner,pull = <0x00>;
  2135. linux,phandle = <0x10d>;
  2136. phandle = <0x10d>;
  2137. };
  2138.  
  2139. lvds2link@0 {
  2140. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2141. allwinner,pname = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2142. allwinner,function = "lvds1";
  2143. allwinner,muxsel = <0x03>;
  2144. allwinner,drive = <0x03>;
  2145. allwinner,pull = <0x00>;
  2146. linux,phandle = <0x10e>;
  2147. phandle = <0x10e>;
  2148. };
  2149.  
  2150. lvds2link@1 {
  2151. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2152. allwinner,pname = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD8\0PD9\0PD6\0PD7\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD18\0PD19\0PD16\0PD17";
  2153. allwinner,function = "lvds1_suspend";
  2154. allwinner,muxsel = <0x07>;
  2155. allwinner,drive = <0x03>;
  2156. allwinner,pull = <0x00>;
  2157. linux,phandle = <0x10f>;
  2158. phandle = <0x10f>;
  2159. };
  2160.  
  2161. rgb24@0 {
  2162. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21\0PD22\0PD23\0PD24\0PD25\0PD26\0PD27";
  2163. allwinner,pname = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21\0PD22\0PD23\0PD24\0PD25\0PD26\0PD27";
  2164. allwinner,function = "rgb24";
  2165. allwinner,muxsel = <0x02>;
  2166. allwinner,drive = <0x03>;
  2167. allwinner,pull = <0x00>;
  2168. linux,phandle = <0x99>;
  2169. phandle = <0x99>;
  2170. };
  2171.  
  2172. rgb24@1 {
  2173. allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21\0PD22\0PD23\0PD24\0PD25\0PD26\0PD27";
  2174. allwinner,pname = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21\0PD22\0PD23\0PD24\0PD25\0PD26\0PD27";
  2175. allwinner,function = "rgb24_suspend";
  2176. allwinner,muxsel = <0x07>;
  2177. allwinner,drive = <0x03>;
  2178. allwinner,pull = <0x00>;
  2179. linux,phandle = <0x9a>;
  2180. phandle = <0x9a>;
  2181. };
  2182.  
  2183. pwm5@0 {
  2184. allwinner,pins = "PA12";
  2185. allwinner,function = "pwm5";
  2186. allwinner,muxsel = <0x02>;
  2187. allwinner,drive = <0xffffffff>;
  2188. allwinner,pull = <0x00>;
  2189. allwinner,data = <0xffffffff>;
  2190. linux,phandle = <0xa2>;
  2191. phandle = <0xa2>;
  2192. };
  2193.  
  2194. pwm5@1 {
  2195. allwinner,pins = "PA12";
  2196. allwinner,function = "io_disabled";
  2197. allwinner,muxsel = <0x07>;
  2198. allwinner,drive = <0xffffffff>;
  2199. allwinner,pull = <0x00>;
  2200. allwinner,data = <0xffffffff>;
  2201. linux,phandle = <0xa3>;
  2202. phandle = <0xa3>;
  2203. };
  2204.  
  2205. standby@0 {
  2206. allwinner,pins = "PH6";
  2207. allwinner,function = "gpio_out";
  2208. allwinner,muxsel = <0x01>;
  2209. allwinner,data = <0x01>;
  2210. allwinner,drive = <0x00>;
  2211. allwinner,pull = <0x00>;
  2212. linux,phandle = <0xde>;
  2213. phandle = <0xde>;
  2214. };
  2215.  
  2216. standby@1 {
  2217. allwinner,pins = "PH7";
  2218. allwinner,function = "gpio_out";
  2219. allwinner,muxsel = <0x01>;
  2220. allwinner,data = <0x00>;
  2221. allwinner,drive = <0x02>;
  2222. allwinner,pull = <0x02>;
  2223. linux,phandle = <0xdd>;
  2224. phandle = <0xdd>;
  2225. };
  2226.  
  2227. standby@2 {
  2228. allwinner,pins = "PG16";
  2229. allwinner,function = "gpio_in";
  2230. allwinner,muxsel = <0x01>;
  2231. allwinner,data = <0x00>;
  2232. allwinner,drive = <0x00>;
  2233. allwinner,pull = <0x00>;
  2234. linux,phandle = <0x110>;
  2235. phandle = <0x110>;
  2236. };
  2237.  
  2238. card0_boot_para@0 {
  2239. linux,phandle = <0x182>;
  2240. phandle = <0x182>;
  2241. allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
  2242. allwinner,function = "card0_boot_para";
  2243. allwinner,pname = "sdc_d1\0sdc_d0\0sdc_clk\0sdc_cmd\0sdc_d3\0sdc_d2";
  2244. allwinner,muxsel = <0x02>;
  2245. allwinner,pull = <0x01>;
  2246. allwinner,drive = <0x03>;
  2247. allwinner,data = <0xffffffff>;
  2248. };
  2249.  
  2250. card2_boot_para@0 {
  2251. linux,phandle = <0x183>;
  2252. phandle = <0x183>;
  2253. allwinner,pins = "PC5\0PC6\0PC10\0PC13\0PC15\0PC8\0PC9\0PC11\0PC14\0PC16\0PC1";
  2254. allwinner,function = "card2_boot_para";
  2255. allwinner,pname = "sdc_clk\0sdc_cmd\0sdc_d0\0sdc_d1\0sdc_d2\0sdc_d3\0sdc_d4\0sdc_d5\0sdc_d6\0sdc_d7\0sdc_emmc_rst";
  2256. allwinner,muxsel = <0x03>;
  2257. allwinner,pull = <0x01>;
  2258. allwinner,drive = <0x03>;
  2259. allwinner,data = <0xffffffff>;
  2260. };
  2261.  
  2262. card2_boot_para@1 {
  2263. linux,phandle = <0x184>;
  2264. phandle = <0x184>;
  2265. allwinner,pins = "PC0";
  2266. allwinner,function = "card2_boot_para";
  2267. allwinner,pname = "sdc_ds";
  2268. allwinner,muxsel = <0x03>;
  2269. allwinner,pull = <0x02>;
  2270. allwinner,drive = <0x03>;
  2271. allwinner,data = <0xffffffff>;
  2272. };
  2273.  
  2274. twi_para@0 {
  2275. linux,phandle = <0x185>;
  2276. phandle = <0x185>;
  2277. allwinner,pins = "PH14\0PH15";
  2278. allwinner,function = "twi_para";
  2279. allwinner,pname = "twi_scl\0twi_sda";
  2280. allwinner,muxsel = <0x02>;
  2281. allwinner,pull = <0xffffffff>;
  2282. allwinner,drive = <0xffffffff>;
  2283. allwinner,data = <0xffffffff>;
  2284. };
  2285.  
  2286. uart_para@0 {
  2287. linux,phandle = <0x186>;
  2288. phandle = <0x186>;
  2289. allwinner,pins = "PH0\0PH1";
  2290. allwinner,function = "uart_para";
  2291. allwinner,pname = "uart_debug_tx\0uart_debug_rx";
  2292. allwinner,muxsel = <0x02>;
  2293. allwinner,pull = <0x01>;
  2294. allwinner,drive = <0xffffffff>;
  2295. allwinner,data = <0xffffffff>;
  2296. };
  2297.  
  2298. jtag_para@0 {
  2299. linux,phandle = <0x187>;
  2300. phandle = <0x187>;
  2301. allwinner,pins = "PH9\0PH10\0PH11\0PH12";
  2302. allwinner,function = "jtag_para";
  2303. allwinner,pname = "jtag_ms\0jtag_ck\0jtag_do\0jtag_di";
  2304. allwinner,muxsel = <0x03>;
  2305. allwinner,pull = <0xffffffff>;
  2306. allwinner,drive = <0xffffffff>;
  2307. allwinner,data = <0xffffffff>;
  2308. };
  2309.  
  2310. uart0@0 {
  2311. linux,phandle = <0x188>;
  2312. phandle = <0x188>;
  2313. allwinner,pins = "PH0\0PH1";
  2314. allwinner,function = "uart0";
  2315. allwinner,pname = "uart0_tx\0uart0_rx";
  2316. allwinner,muxsel = <0x02>;
  2317. allwinner,pull = <0x01>;
  2318. allwinner,drive = <0xffffffff>;
  2319. allwinner,data = <0xffffffff>;
  2320. };
  2321.  
  2322. nand0@0 {
  2323. linux,phandle = <0x189>;
  2324. phandle = <0x189>;
  2325. allwinner,pins = "PC0\0PC1\0PC2\0PC4\0PC6\0PC7\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14";
  2326. allwinner,function = "nand0";
  2327. allwinner,pname = "nand0_we\0nand0_ale\0nand0_cle\0nand0_nre\0nand0_d0\0nand0_d1\0nand0_d2\0nand0_d3\0nand0_d4\0nand0_d5\0nand0_d6\0nand0_d7\0nand0_ndqs";
  2328. allwinner,muxsel = <0x02>;
  2329. allwinner,pull = <0x00>;
  2330. allwinner,drive = <0x01>;
  2331. allwinner,data = <0xffffffff>;
  2332. };
  2333.  
  2334. nand0@1 {
  2335. linux,phandle = <0x18a>;
  2336. phandle = <0x18a>;
  2337. allwinner,pins = "PC3\0PC5\0PC15\0PC16";
  2338. allwinner,function = "nand0";
  2339. allwinner,pname = "nand0_ce0\0nand0_rb0\0nand0_ce1\0nand0_rb1";
  2340. allwinner,muxsel = <0x02>;
  2341. allwinner,pull = <0x01>;
  2342. allwinner,drive = <0x01>;
  2343. allwinner,data = <0xffffffff>;
  2344. };
  2345. };
  2346.  
  2347. auto_print {
  2348. device_type = "auto_print";
  2349. status = "okay";
  2350. };
  2351.  
  2352. dma-controller@03002000 {
  2353. compatible = "allwinner,sun50i-dma";
  2354. reg = <0x00 0x3002000 0x00 0x1000>;
  2355. interrupts = <0x00 0x2a 0x04>;
  2356. clocks = <0x1f>;
  2357. #dma-cells = <0x01>;
  2358. linux,phandle = <0x111>;
  2359. phandle = <0x111>;
  2360. };
  2361.  
  2362. mbus-controller@047fa000 {
  2363. compatible = "allwinner,sun50i-mbus";
  2364. reg = <0x00 0x47fa000 0x00 0x1000>;
  2365. #mbus-cells = <0x01>;
  2366. linux,phandle = <0x112>;
  2367. phandle = <0x112>;
  2368. };
  2369.  
  2370. arisc {
  2371. compatible = "allwinner,sunxi-arisc";
  2372. #address-cells = <0x02>;
  2373. #size-cells = <0x02>;
  2374. clocks = <0x1e 0x20 0x09 0x02>;
  2375. clock-names = "losc\0iosc\0hosc\0pll_periph0";
  2376. powchk_used = <0x00>;
  2377. power_reg = <0x2309621>;
  2378. system_power = <0x32>;
  2379. };
  2380.  
  2381. arisc_space {
  2382. compatible = "allwinner,arisc_space";
  2383. space1 = <0x48040000 0x00 0x14000>;
  2384. space2 = <0x48100000 0x18000 0x4000>;
  2385. space3 = <0x48104000 0x00 0x1000>;
  2386. space4 = <0x48105000 0x00 0x1000>;
  2387. };
  2388.  
  2389. standby_space {
  2390. compatible = "allwinner,sun50iw9-usbstandby";
  2391. space1 = <0x40020000 0x00 0x800>;
  2392. };
  2393.  
  2394. msgbox@03003000 {
  2395. compatible = "allwinner,msgbox";
  2396. clocks = <0x21>;
  2397. clock-names = "clk_msgbox";
  2398. reg = <0x00 0x3003000 0x00 0x1000>;
  2399. interrupts = <0x00 0x27 0x01>;
  2400. status = "okay";
  2401. linux,phandle = <0x113>;
  2402. phandle = <0x113>;
  2403. };
  2404.  
  2405. hwspinlock@3004000 {
  2406. compatible = "allwinner,sunxi-hwspinlock";
  2407. clocks = <0x22 0x23>;
  2408. clock-names = "clk_hwspinlock_rst\0clk_hwspinlock_bus";
  2409. reg = <0x00 0x3004000 0x00 0x1000>;
  2410. num-locks = <0x08>;
  2411. status = "okay";
  2412. linux,phandle = <0x114>;
  2413. phandle = <0x114>;
  2414. };
  2415.  
  2416. s_cir@07040000 {
  2417. compatible = "allwinner,s_cir";
  2418. reg = <0x00 0x7040000 0x00 0x400>;
  2419. interrupts = <0x00 0x6a 0x04>;
  2420. pinctrl-names = "default";
  2421. pinctrl-0 = <0x24>;
  2422. clocks = <0x09 0x25>;
  2423. supply = "vcc-pl";
  2424. supply_vol = "3300000";
  2425. status = "okay";
  2426. s_cir0_used = <0x01>;
  2427. ir_power_key_code0 = <0x40>;
  2428. ir_addr_code0 = <0xfe01>;
  2429. ir_power_key_code1 = <0x1a>;
  2430. ir_addr_code1 = <0xfb04>;
  2431. ir_power_key_code2 = <0xf2>;
  2432. ir_addr_code2 = <0x2992>;
  2433. ir_power_key_code3 = <0x57>;
  2434. ir_addr_code3 = <0x9f00>;
  2435. ir_power_key_code4 = <0xdc>;
  2436. ir_addr_code4 = <0x4cb3>;
  2437. ir_power_key_code5 = <0x18>;
  2438. ir_addr_code5 = <0xff00>;
  2439. ir_power_key_code6 = <0xdc>;
  2440. ir_addr_code6 = <0xdd22>;
  2441. ir_power_key_code7 = <0x0d>;
  2442. ir_addr_code7 = <0xbc00>;
  2443. ir_power_key_code8 = <0x4d>;
  2444. ir_addr_code8 = <0x4040>;
  2445. ir_power_key_code9 = <0x51>;
  2446. ir_addr_code9 = <0x7f80>;
  2447. wakeup-source;
  2448. linux,phandle = <0x115>;
  2449. phandle = <0x115>;
  2450. };
  2451.  
  2452. timer@03009000 {
  2453. compatible = "allwinner,sun4i-a10-timer";
  2454. device_type = "soc_timer";
  2455. reg = <0x00 0x3009000 0x00 0x400>;
  2456. interrupts = <0x00 0x30 0x04>;
  2457. clocks = <0x09>;
  2458. linux,phandle = <0x116>;
  2459. phandle = <0x116>;
  2460. };
  2461.  
  2462. rtc@07000000 {
  2463. compatible = "allwinner,sunxi-rtc";
  2464. device_type = "rtc";
  2465. auto_switch;
  2466. wakeup-source;
  2467. reg = <0x00 0x7000000 0x00 0x200>;
  2468. interrupts = <0x00 0x68 0x04>;
  2469. gpr_offset = <0x100>;
  2470. gpr_len = <0x08>;
  2471. gpr_cur_pos = <0x06>;
  2472. linux,phandle = <0x117>;
  2473. phandle = <0x117>;
  2474. };
  2475.  
  2476. watchdog@030090a0 {
  2477. compatible = "allwinner,sun50i-wdt";
  2478. reg = <0x00 0x30090a0 0x00 0x20>;
  2479. interrupts = <0x00 0x32 0x04>;
  2480. linux,phandle = <0x118>;
  2481. phandle = <0x118>;
  2482. };
  2483.  
  2484. ve@01c0e000 {
  2485. compatible = "allwinner,sunxi-cedar-ve";
  2486. reg = <0x00 0x1c0e000 0x00 0x1000 0x00 0x3000000 0x00 0x10 0x00 0x3001000 0x00 0x1000>;
  2487. interrupts = <0x00 0x5d 0x04>;
  2488. clocks = <0x26 0x27>;
  2489. iommus = <0x28 0x03 0x01>;
  2490. linux,phandle = <0x119>;
  2491. phandle = <0x119>;
  2492. };
  2493.  
  2494. vp9@01c00000 {
  2495. compatible = "allwinner,sunxi-google-vp9";
  2496. reg = <0x00 0x1c00000 0x00 0x1000 0x00 0x3000000 0x00 0x10 0x00 0x3001000 0x00 0x1000>;
  2497. interrupts = <0x00 0x5a 0x04>;
  2498. clocks = <0x26>;
  2499. iommus = <0x28 0x02 0x01>;
  2500. #clocks = <0x0c>;
  2501. linux,phandle = <0x11a>;
  2502. phandle = <0x11a>;
  2503. };
  2504.  
  2505. uart@05000000 {
  2506. compatible = "allwinner,sun50i-uart";
  2507. device_type = "uart0";
  2508. reg = <0x00 0x5000000 0x00 0x400>;
  2509. interrupts = <0x00 0x00 0x04>;
  2510. clocks = <0x29>;
  2511. pinctrl-names = "default\0sleep";
  2512. pinctrl-1 = <0x2b>;
  2513. uart0_port = <0x00>;
  2514. uart0_type = <0x02>;
  2515. status = "okay";
  2516. linux,phandle = <0x11b>;
  2517. phandle = <0x11b>;
  2518. pinctrl-0 = <0x188>;
  2519. };
  2520.  
  2521. uart@05000400 {
  2522. compatible = "allwinner,sun50i-uart";
  2523. device_type = "uart1";
  2524. reg = <0x00 0x5000400 0x00 0x400>;
  2525. interrupts = <0x00 0x01 0x04>;
  2526. clocks = <0x2c>;
  2527. pinctrl-names = "default\0sleep";
  2528. pinctrl-0 = <0x2d>;
  2529. pinctrl-1 = <0x2e>;
  2530. uart1_port = <0x01>;
  2531. uart1_type = <0x04>;
  2532. status = "okay";
  2533. linux,phandle = <0x11c>;
  2534. phandle = <0x11c>;
  2535. };
  2536.  
  2537. uart@05000800 {
  2538. compatible = "allwinner,sun50i-uart";
  2539. device_type = "uart2";
  2540. reg = <0x00 0x5000800 0x00 0x400>;
  2541. interrupts = <0x00 0x02 0x04>;
  2542. clocks = <0x2f>;
  2543. pinctrl-names = "default\0sleep";
  2544. pinctrl-0 = <0x30>;
  2545. pinctrl-1 = <0x31>;
  2546. uart2_port = <0x02>;
  2547. uart2_type = <0x04>;
  2548. status = "disabled";
  2549. linux,phandle = <0x11d>;
  2550. phandle = <0x11d>;
  2551. };
  2552.  
  2553. uart@05000c00 {
  2554. compatible = "allwinner,sun50i-uart";
  2555. device_type = "uart3";
  2556. reg = <0x00 0x5000c00 0x00 0x400>;
  2557. interrupts = <0x00 0x03 0x04>;
  2558. clocks = <0x32>;
  2559. pinctrl-names = "default\0sleep";
  2560. pinctrl-0 = <0x33>;
  2561. pinctrl-1 = <0x34>;
  2562. uart3_port = <0x03>;
  2563. uart3_type = <0x04>;
  2564. status = "disabled";
  2565. linux,phandle = <0x11e>;
  2566. phandle = <0x11e>;
  2567. };
  2568.  
  2569. uart@05001000 {
  2570. compatible = "allwinner,sun50i-uart";
  2571. device_type = "uart4";
  2572. reg = <0x00 0x5001000 0x00 0x400>;
  2573. interrupts = <0x00 0x04 0x04>;
  2574. clocks = <0x35>;
  2575. pinctrl-names = "default\0sleep";
  2576. pinctrl-0 = <0x36>;
  2577. pinctrl-1 = <0x37>;
  2578. uart4_port = <0x04>;
  2579. uart4_type = <0x04>;
  2580. status = "disabled";
  2581. linux,phandle = <0x11f>;
  2582. phandle = <0x11f>;
  2583. };
  2584.  
  2585. uart@05001400 {
  2586. compatible = "allwinner,sun50i-uart";
  2587. device_type = "uart5";
  2588. reg = <0x00 0x5001400 0x00 0x400>;
  2589. interrupts = <0x00 0x05 0x04>;
  2590. clocks = <0x38>;
  2591. pinctrl-names = "default\0sleep";
  2592. pinctrl-0 = <0x39>;
  2593. pinctrl-1 = <0x3a>;
  2594. uart5_port = <0x05>;
  2595. uart5_type = <0x02>;
  2596. status = "disabled";
  2597. linux,phandle = <0x120>;
  2598. phandle = <0x120>;
  2599. };
  2600.  
  2601. twi@0x05002000 {
  2602. #address-cells = <0x01>;
  2603. #size-cells = <0x00>;
  2604. compatible = "allwinner,sun50i-twi";
  2605. device_type = "twi0";
  2606. reg = <0x00 0x5002000 0x00 0x400>;
  2607. interrupts = <0x00 0x06 0x04>;
  2608. clocks = <0x3b>;
  2609. clock-frequency = <0x61a80>;
  2610. pinctrl-names = "default\0sleep";
  2611. pinctrl-0 = <0x3c>;
  2612. pinctrl-1 = <0x3d>;
  2613. status = "disable";
  2614. linux,phandle = <0x121>;
  2615. phandle = <0x121>;
  2616. };
  2617.  
  2618. twi@0x05002400 {
  2619. #address-cells = <0x01>;
  2620. #size-cells = <0x00>;
  2621. compatible = "allwinner,sun50i-twi";
  2622. device_type = "twi1";
  2623. reg = <0x00 0x5002400 0x00 0x400>;
  2624. interrupts = <0x00 0x07 0x04>;
  2625. clocks = <0x3e>;
  2626. clock-frequency = <0x30d40>;
  2627. pinctrl-names = "default\0sleep";
  2628. pinctrl-0 = <0x3f>;
  2629. pinctrl-1 = <0x40>;
  2630. status = "disable";
  2631. linux,phandle = <0x122>;
  2632. phandle = <0x122>;
  2633. };
  2634.  
  2635. twi@0x05002800 {
  2636. #address-cells = <0x01>;
  2637. #size-cells = <0x00>;
  2638. compatible = "allwinner,sun50i-twi";
  2639. device_type = "twi2";
  2640. reg = <0x00 0x5002800 0x00 0x400>;
  2641. interrupts = <0x00 0x08 0x04>;
  2642. clocks = <0x41>;
  2643. clock-frequency = <0x30d40>;
  2644. pinctrl-names = "default\0sleep";
  2645. pinctrl-0 = <0x42>;
  2646. pinctrl-1 = <0x43>;
  2647. status = "disable";
  2648. linux,phandle = <0x123>;
  2649. phandle = <0x123>;
  2650. };
  2651.  
  2652. twi@0x05002c00 {
  2653. #address-cells = <0x01>;
  2654. #size-cells = <0x00>;
  2655. compatible = "allwinner,sun50i-twi";
  2656. device_type = "twi3";
  2657. reg = <0x00 0x5002c00 0x00 0x400>;
  2658. interrupts = <0x00 0x09 0x04>;
  2659. clocks = <0x44>;
  2660. clock-frequency = <0x30d40>;
  2661. pinctrl-names = "default\0sleep";
  2662. pinctrl-0 = <0x45>;
  2663. pinctrl-1 = <0x46>;
  2664. status = "okay";
  2665. linux,phandle = <0x124>;
  2666. phandle = <0x124>;
  2667. };
  2668.  
  2669. twi@0x05003000 {
  2670. #address-cells = <0x01>;
  2671. #size-cells = <0x00>;
  2672. compatible = "allwinner,sun50i-twi";
  2673. device_type = "twi4";
  2674. reg = <0x00 0x5003000 0x00 0x400>;
  2675. interrupts = <0x00 0x0a 0x04>;
  2676. clocks = <0x47>;
  2677. clock-frequency = <0x30d40>;
  2678. pinctrl-names = "default\0sleep";
  2679. pinctrl-0 = <0x48>;
  2680. pinctrl-1 = <0x49>;
  2681. status = "disable";
  2682. linux,phandle = <0x125>;
  2683. phandle = <0x125>;
  2684. };
  2685.  
  2686. twi@0x07081400 {
  2687. #address-cells = <0x01>;
  2688. #size-cells = <0x00>;
  2689. compatible = "allwinner,sun50i-twi";
  2690. device_type = "twi5";
  2691. reg = <0x00 0x7081400 0x00 0x400>;
  2692. interrupts = <0x00 0x69 0x04>;
  2693. clocks = <0x4a>;
  2694. clock-frequency = <0x30d40>;
  2695. pinctrl-names = "default\0sleep";
  2696. pinctrl-0 = <0x4b>;
  2697. pinctrl-1 = <0x4c>;
  2698. status = "okay";
  2699. no_suspend = <0x01>;
  2700. linux,phandle = <0x126>;
  2701. phandle = <0x126>;
  2702.  
  2703. pmu {
  2704. compatible = "x-powers,axp1530";
  2705. reg = <0x36>;
  2706. wakeup-source;
  2707. linux,phandle = <0x127>;
  2708. phandle = <0x127>;
  2709.  
  2710. standby_param {
  2711. vcc-dram = <0x04>;
  2712. linux,phandle = <0x128>;
  2713. phandle = <0x128>;
  2714. };
  2715.  
  2716. regulators {
  2717.  
  2718. dcdc1 {
  2719. regulator-name = "axp1530-dcdc1";
  2720. regulator-min-microvolt = <0x7a120>;
  2721. regulator-max-microvolt = <0x33e140>;
  2722. regulator-step-delay-us = <0x19>;
  2723. regulator-final-delay-us = <0x32>;
  2724. regulator-always-on;
  2725. linux,phandle = <0x129>;
  2726. phandle = <0x129>;
  2727. };
  2728.  
  2729. dcdc2 {
  2730. regulator-name = "axp1530-dcdc2";
  2731. regulator-min-microvolt = <0x7a120>;
  2732. regulator-max-microvolt = <0x177fa0>;
  2733. regulator-step-delay-us = <0x19>;
  2734. regulator-final-delay-us = <0x32>;
  2735. regulator-ramp-delay = <0xc8>;
  2736. regulator-always-on;
  2737. linux,phandle = <0xd6>;
  2738. phandle = <0xd6>;
  2739. };
  2740.  
  2741. dcdc3 {
  2742. regulator-name = "axp1530-dcdc3";
  2743. regulator-min-microvolt = <0x16e360>;
  2744. regulator-max-microvolt = <0x16e360>;
  2745. regulator-step-delay-us = <0x19>;
  2746. regulator-final-delay-us = <0x32>;
  2747. regulator-always-on;
  2748. linux,phandle = <0x12a>;
  2749. phandle = <0x12a>;
  2750. };
  2751.  
  2752. ldo1 {
  2753. regulator-name = "axp1530-aldo1";
  2754. regulator-min-microvolt = <0x1b7740>;
  2755. regulator-max-microvolt = <0x1b7740>;
  2756. regulator-step-delay-us = <0x19>;
  2757. regulator-final-delay-us = <0x32>;
  2758. regulator-always-on;
  2759. linux,phandle = <0x68>;
  2760. phandle = <0x68>;
  2761. };
  2762.  
  2763. ldo2 {
  2764. regulator-name = "axp1530-dldo1";
  2765. regulator-min-microvolt = <0x325aa0>;
  2766. regulator-max-microvolt = <0x325aa0>;
  2767. regulator-step-delay-us = <0x19>;
  2768. regulator-final-delay-us = <0x32>;
  2769. regulator-always-on;
  2770. linux,phandle = <0x69>;
  2771. phandle = <0x69>;
  2772. };
  2773. };
  2774. };
  2775. };
  2776.  
  2777. usbc0@0 {
  2778. device_type = "usbc0";
  2779. compatible = "allwinner,sunxi-otg-manager";
  2780. usb_port_type = <0x01>;
  2781. usb_detect_type = <0x01>;
  2782. usb_id_gpio;
  2783. usb_det_vbus_gpio;
  2784. usb_drv_vbus_gpio;
  2785. usb_host_init_state = <0x00>;
  2786. usb_regulator_io = "nocare";
  2787. usb_wakeup_suspend = <0x02>;
  2788. usb_luns = <0x03>;
  2789. usb_serial_unique = <0x00>;
  2790. usb_serial_number = "20080411";
  2791. rndis_wceis = <0x01>;
  2792. wakeup-source;
  2793. status = "okay";
  2794. usb_detect_mode = <0x00>;
  2795. linux,phandle = <0x12b>;
  2796. phandle = <0x12b>;
  2797. };
  2798.  
  2799. udc-controller@0x05100000 {
  2800. compatible = "allwinner,sunxi-udc";
  2801. reg = <0x00 0x5100000 0x00 0x1000 0x00 0x00 0x00 0x100>;
  2802. interrupts = <0x00 0x19 0x04>;
  2803. clocks = <0x4d 0x4e>;
  2804. status = "okay";
  2805. linux,phandle = <0x12c>;
  2806. phandle = <0x12c>;
  2807. };
  2808.  
  2809. ehci0-controller@0x05101000 {
  2810. compatible = "allwinner,sunxi-ehci0";
  2811. reg = <0x00 0x5101000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2812. interrupts = <0x00 0x1a 0x04>;
  2813. clocks = <0x4d 0x4f>;
  2814. hci_ctrl_no = <0x00>;
  2815. status = "okay";
  2816. linux,phandle = <0x12d>;
  2817. phandle = <0x12d>;
  2818. };
  2819.  
  2820. ohci0-controller@0x05101400 {
  2821. compatible = "allwinner,sunxi-ohci0";
  2822. reg = <0x00 0x5101000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2823. interrupts = <0x00 0x1b 0x04>;
  2824. clocks = <0x4d 0x50 0x51 0x52 0x09 0x1e>;
  2825. hci_ctrl_no = <0x00>;
  2826. status = "okay";
  2827. linux,phandle = <0x12e>;
  2828. phandle = <0x12e>;
  2829. };
  2830.  
  2831. usbc1@0 {
  2832. device_type = "usbc1";
  2833. usb_drv_vbus_gpio = <0x53 0x07 0x08 0x00 0x01 0xffffffff 0xffffffff>;
  2834. usb_host_init_state = <0x01>;
  2835. usb_regulator_io = "nocare";
  2836. usb_wakeup_suspend = <0x02>;
  2837. wakeup-source;
  2838. status = "okay";
  2839. linux,phandle = <0x12f>;
  2840. phandle = <0x12f>;
  2841. };
  2842.  
  2843. ehci1-controller@0x05200000 {
  2844. compatible = "allwinner,sunxi-ehci1";
  2845. reg = <0x00 0x5200000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2846. interrupts = <0x00 0x1c 0x04>;
  2847. clocks = <0x54 0x55>;
  2848. hci_ctrl_no = <0x01>;
  2849. status = "okay";
  2850. linux,phandle = <0x130>;
  2851. phandle = <0x130>;
  2852. };
  2853.  
  2854. ohci1-controller@0x05200400 {
  2855. compatible = "allwinner,sunxi-ohci1";
  2856. reg = <0x00 0x5200000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2857. interrupts = <0x00 0x1d 0x04>;
  2858. clocks = <0x54 0x56 0x57 0x52 0x09 0x1e>;
  2859. hci_ctrl_no = <0x01>;
  2860. status = "okay";
  2861. linux,phandle = <0x131>;
  2862. phandle = <0x131>;
  2863. };
  2864.  
  2865. usbc2@0 {
  2866. device_type = "usbc2";
  2867. usb_drv_vbus_gpio;
  2868. usb_host_init_state = <0x01>;
  2869. usb_regulator_io = "nocare";
  2870. usb_wakeup_suspend = <0x02>;
  2871. wakeup-source;
  2872. status = "okay";
  2873. linux,phandle = <0x132>;
  2874. phandle = <0x132>;
  2875. };
  2876.  
  2877. ehci2-controller@0x05310000 {
  2878. compatible = "allwinner,sunxi-ehci2";
  2879. reg = <0x00 0x5310000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2880. interrupts = <0x00 0x1e 0x04>;
  2881. clocks = <0x58 0x59>;
  2882. hci_ctrl_no = <0x02>;
  2883. status = "okay";
  2884. linux,phandle = <0x133>;
  2885. phandle = <0x133>;
  2886. };
  2887.  
  2888. ohci2-controller@0x05310400 {
  2889. compatible = "allwinner,sunxi-ohci2";
  2890. reg = <0x00 0x5310000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2891. interrupts = <0x00 0x1f 0x04>;
  2892. clocks = <0x58 0x5a 0x5b 0x52 0x09 0x1e>;
  2893. hci_ctrl_no = <0x02>;
  2894. status = "okay";
  2895. linux,phandle = <0x134>;
  2896. phandle = <0x134>;
  2897. };
  2898.  
  2899. usbc3@0 {
  2900. device_type = "usbc3";
  2901. usb_drv_vbus_gpio;
  2902. usb_host_init_state = <0x01>;
  2903. usb_regulator_io = "nocare";
  2904. usb_wakeup_suspend = <0x02>;
  2905. wakeup-source;
  2906. status = "okay";
  2907. linux,phandle = <0x135>;
  2908. phandle = <0x135>;
  2909. };
  2910.  
  2911. ehci3-controller@0x05311000 {
  2912. compatible = "allwinner,sunxi-ehci3";
  2913. reg = <0x00 0x5311000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2914. interrupts = <0x00 0x20 0x04>;
  2915. clocks = <0x5c 0x5d>;
  2916. hci_ctrl_no = <0x03>;
  2917. status = "okay";
  2918. linux,phandle = <0x136>;
  2919. phandle = <0x136>;
  2920. };
  2921.  
  2922. ohci3-controller@0x05311400 {
  2923. compatible = "allwinner,sunxi-ohci3";
  2924. reg = <0x00 0x5311000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>;
  2925. interrupts = <0x00 0x21 0x04>;
  2926. clocks = <0x5c 0x5e 0x5f 0x52 0x09 0x1e>;
  2927. hci_ctrl_no = <0x03>;
  2928. status = "okay";
  2929. linux,phandle = <0x137>;
  2930. phandle = <0x137>;
  2931. };
  2932.  
  2933. ac200_codec {
  2934. compatible = "allwinner,ac200_codec";
  2935. status = "disabled";
  2936. linux,phandle = <0x138>;
  2937. phandle = <0x138>;
  2938. };
  2939.  
  2940. spdif-controller@0x05093000 {
  2941. compatible = "allwinner,sunxi-spdif";
  2942. reg = <0x00 0x5093000 0x00 0x40>;
  2943. clocks = <0x60 0x07 0x61>;
  2944. pinctrl-names = "default\0sleep";
  2945. pinctrl-0 = <0x62>;
  2946. pinctrl-1 = <0x63>;
  2947. device_type = "spdif";
  2948. status = "okay";
  2949. linux,phandle = <0x75>;
  2950. phandle = <0x75>;
  2951. };
  2952.  
  2953. dmic-controller@0x05095000 {
  2954. compatible = "allwinner,sunxi-dmic";
  2955. reg = <0x00 0x5095000 0x00 0x50>;
  2956. clocks = <0x60 0x07 0x64>;
  2957. pinctrl-names = "default\0sleep";
  2958. pinctrl-0 = <0x65>;
  2959. pinctrl-1 = <0x66>;
  2960. device_type = "dmic";
  2961. status = "disabled";
  2962. linux,phandle = <0x76>;
  2963. phandle = <0x76>;
  2964. };
  2965.  
  2966. codec@0x05096000 {
  2967. compatible = "allwinner,sunxi-internal-codec";
  2968. reg = <0x00 0x5096000 0x00 0x31c>;
  2969. clocks = <0x60 0x07 0x67>;
  2970. device_type = "codec";
  2971. status = "okay";
  2972. adcdrc_cfg = <0x00>;
  2973. adchpf_cfg = <0x00>;
  2974. dacdrc_cfg = <0x00>;
  2975. dachpf_cfg = <0x00>;
  2976. fmin_gain = <0x03>;
  2977. linein_gain = <0x03>;
  2978. digital_vol = <0x00>;
  2979. lineout_vol = <0x1a>;
  2980. ramp_func_used = <0x01>;
  2981. avcc-supply = <0x68>;
  2982. vcc33_audio-supply = <0x69>;
  2983. linux,phandle = <0x78>;
  2984. phandle = <0x78>;
  2985. };
  2986.  
  2987. cpudai-controller@0x05096000 {
  2988. compatible = "allwinner,sunxi-internal-cpudai";
  2989. reg = <0x00 0x5096000 0x00 0x31c>;
  2990. device_type = "cpudai";
  2991. status = "okay";
  2992. linux,phandle = <0x77>;
  2993. phandle = <0x77>;
  2994. };
  2995.  
  2996. cpudai0-controller@0x05097000 {
  2997. compatible = "allwinner,sunxi-ahub-cpudai";
  2998. reg = <0x00 0x5097000 0x00 0xadf>;
  2999. id = <0x00>;
  3000. status = "okay";
  3001. linux,phandle = <0x79>;
  3002. phandle = <0x79>;
  3003. };
  3004.  
  3005. cpudai1-controller@0x05097000 {
  3006. compatible = "allwinner,sunxi-ahub-cpudai";
  3007. reg = <0x00 0x5097000 0x00 0xadf>;
  3008. id = <0x01>;
  3009. status = "okay";
  3010. linux,phandle = <0x7a>;
  3011. phandle = <0x7a>;
  3012. };
  3013.  
  3014. cpudai2-controller@0x05097000 {
  3015. compatible = "allwinner,sunxi-ahub-cpudai";
  3016. reg = <0x00 0x5097000 0x00 0xadf>;
  3017. id = <0x02>;
  3018. status = "okay";
  3019. linux,phandle = <0x7b>;
  3020. phandle = <0x7b>;
  3021. };
  3022.  
  3023. cpudai3-controller@0x05097000 {
  3024. compatible = "allwinner,sunxi-ahub-cpudai";
  3025. reg = <0x00 0x5097000 0x00 0xadf>;
  3026. id = <0x03>;
  3027. status = "okay";
  3028. linux,phandle = <0x139>;
  3029. phandle = <0x139>;
  3030. };
  3031.  
  3032. ahub_codec@0x05097000 {
  3033. compatible = "allwinner,sunxi-ahub";
  3034. reg = <0x00 0x5097000 0x00 0xadf>;
  3035. clocks = <0x60 0x07 0x6a>;
  3036. status = "okay";
  3037. linux,phandle = <0x7c>;
  3038. phandle = <0x7c>;
  3039. };
  3040.  
  3041. ahub_daudio0@0x05097000 {
  3042. compatible = "allwinner,sunxi-ahub-daudio";
  3043. reg = <0x00 0x5097000 0x00 0xadf>;
  3044. clocks = <0x60 0x07 0x6a>;
  3045. pinctrl-names = "default\0sleep";
  3046. pinctrl-0 = <0x6b>;
  3047. pinctrl-1 = <0x6c>;
  3048. tdm_num = <0x00>;
  3049. device_type = "ahub_daudio0";
  3050. status = "okay";
  3051. pinconfig = <0x01>;
  3052. frametype = <0x00>;
  3053. pcm_lrck_period = <0x20>;
  3054. slot_width_select = <0x20>;
  3055. daudio_master = <0x04>;
  3056. audio_format = <0x01>;
  3057. signal_inversion = <0x01>;
  3058. tdm_config = <0x01>;
  3059. mclk_div = <0x00>;
  3060. linux,phandle = <0x71>;
  3061. phandle = <0x71>;
  3062. };
  3063.  
  3064. ahub_daudio1@0x05097000 {
  3065. compatible = "allwinner,sunxi-ahub-daudio";
  3066. reg = <0x00 0x5097000 0x00 0xadf>;
  3067. clocks = <0x60 0x07 0x6a>;
  3068. tdm_num = <0x01>;
  3069. device_type = "ahub_daudio1";
  3070. status = "okay";
  3071. pinconfig = <0x00>;
  3072. frametype = <0x00>;
  3073. pcm_lrck_period = <0x20>;
  3074. slot_width_select = <0x20>;
  3075. daudio_master = <0x04>;
  3076. audio_format = <0x01>;
  3077. signal_inversion = <0x01>;
  3078. tdm_config = <0x01>;
  3079. mclk_div = <0x01>;
  3080. linux,phandle = <0x72>;
  3081. phandle = <0x72>;
  3082. };
  3083.  
  3084. ahub_daudio2@0x05097000 {
  3085. compatible = "allwinner,sunxi-ahub-daudio";
  3086. reg = <0x00 0x5097000 0x00 0xadf>;
  3087. clocks = <0x60 0x07 0x6a>;
  3088. pinctrl-names = "default\0sleep";
  3089. pinctrl-0 = <0x6d>;
  3090. pinctrl-1 = <0x6e>;
  3091. tdm_num = <0x02>;
  3092. device_type = "ahub_daudio2";
  3093. status = "disabled";
  3094. pinconfig = <0x01>;
  3095. frametype = <0x00>;
  3096. pcm_lrck_period = <0x20>;
  3097. slot_width_select = <0x20>;
  3098. daudio_master = <0x04>;
  3099. audio_format = <0x01>;
  3100. signal_inversion = <0x01>;
  3101. tdm_config = <0x01>;
  3102. mclk_div = <0x04>;
  3103. linux,phandle = <0x73>;
  3104. phandle = <0x73>;
  3105. };
  3106.  
  3107. ahub_daudio3@0x05097000 {
  3108. compatible = "allwinner,sunxi-ahub-daudio";
  3109. reg = <0x00 0x5097000 0x00 0xadf>;
  3110. clocks = <0x60 0x07 0x6a>;
  3111. pinctrl-names = "default\0sleep";
  3112. pinctrl-0 = <0x6f>;
  3113. pinctrl-1 = <0x70>;
  3114. tdm_num = <0x03>;
  3115. device_type = "ahub_daudio3";
  3116. status = "disabled";
  3117. pinconfig = <0x01>;
  3118. frametype = <0x00>;
  3119. pcm_lrck_period = <0x20>;
  3120. slot_width_select = <0x20>;
  3121. daudio_master = <0x04>;
  3122. audio_format = <0x01>;
  3123. signal_inversion = <0x01>;
  3124. tdm_config = <0x01>;
  3125. mclk_div = <0x04>;
  3126. linux,phandle = <0x74>;
  3127. phandle = <0x74>;
  3128. };
  3129.  
  3130. sound@0 {
  3131. compatible = "allwinner,sunxi-daudio0-machine";
  3132. sunxi,cpudai-controller = <0x71>;
  3133. device_type = "snddaudio0";
  3134. status = "okay";
  3135. linux,phandle = <0x13a>;
  3136. phandle = <0x13a>;
  3137. };
  3138.  
  3139. sound@1 {
  3140. compatible = "allwinner,sunxi-hdmi-machine";
  3141. sunxi,cpudai-controller = <0x72>;
  3142. device_type = "sndhdmi";
  3143. status = "okay";
  3144. linux,phandle = <0x13b>;
  3145. phandle = <0x13b>;
  3146. };
  3147.  
  3148. sound@2 {
  3149. compatible = "allwinner,sunxi-daudio2-machine";
  3150. sunxi,cpudai-controller = <0x73>;
  3151. device_type = "snddaudio2";
  3152. status = "disabled";
  3153. linux,phandle = <0x13c>;
  3154. phandle = <0x13c>;
  3155. };
  3156.  
  3157. sound@3 {
  3158. compatible = "allwinner,sunxi-daudio3-machine";
  3159. sunxi,cpudai-controller = <0x74>;
  3160. device_type = "snddaudio3";
  3161. status = "disabled";
  3162. linux,phandle = <0x13d>;
  3163. phandle = <0x13d>;
  3164. };
  3165.  
  3166. sound@4 {
  3167. compatible = "allwinner,sunxi-spdif-machine";
  3168. sunxi,spdif-controller = <0x75>;
  3169. device_type = "sndspdif";
  3170. status = "okay";
  3171. linux,phandle = <0x13e>;
  3172. phandle = <0x13e>;
  3173. };
  3174.  
  3175. sound@5 {
  3176. compatible = "allwinner,sunxi-dmic-machine";
  3177. sunxi,dmic-controller = <0x76>;
  3178. device_type = "snddmic";
  3179. status = "disabled";
  3180. linux,phandle = <0x13f>;
  3181. phandle = <0x13f>;
  3182. };
  3183.  
  3184. sound@6 {
  3185. compatible = "allwinner,sunxi-codec-machine";
  3186. sunxi,cpudai-controller = <0x77>;
  3187. sunxi,audio-codec = <0x78>;
  3188. device_type = "sndcodec";
  3189. status = "okay";
  3190. linux,phandle = <0x140>;
  3191. phandle = <0x140>;
  3192. };
  3193.  
  3194. sound@7 {
  3195. compatible = "allwinner,sunxi-ahub-machine";
  3196. sunxi,cpudai-controller0 = <0x79>;
  3197. sunxi,cpudai-controller1 = <0x7a>;
  3198. sunxi,cpudai-controller2 = <0x7b>;
  3199. sunxi,audio-codec = <0x7c>;
  3200. device_type = "sndahub";
  3201. status = "okay";
  3202. linux,phandle = <0x141>;
  3203. phandle = <0x141>;
  3204. };
  3205.  
  3206. spi@05010000 {
  3207. #address-cells = <0x01>;
  3208. #size-cells = <0x00>;
  3209. compatible = "allwinner,sun50i-spi";
  3210. device_type = "spi0";
  3211. reg = <0x00 0x5010000 0x00 0x1000>;
  3212. interrupts = <0x00 0x0c 0x04>;
  3213. clocks = <0x02 0x7d>;
  3214. clock-frequency = <0x5f5e100>;
  3215. pinctrl-names = "default\0sleep";
  3216. pinctrl-0 = <0x7e 0x7f>;
  3217. pinctrl-1 = <0x80>;
  3218. spi0_cs_number = <0x01>;
  3219. spi0_cs_bitmap = <0x01>;
  3220. status = "disabled";
  3221. linux,phandle = <0x142>;
  3222. phandle = <0x142>;
  3223. };
  3224.  
  3225. spi@05011000 {
  3226. #address-cells = <0x01>;
  3227. #size-cells = <0x00>;
  3228. compatible = "allwinner,sun50i-spi";
  3229. device_type = "spi1";
  3230. reg = <0x00 0x5011000 0x00 0x1000>;
  3231. interrupts = <0x00 0x0d 0x04>;
  3232. clocks = <0x02 0x81>;
  3233. clock-frequency = <0x5f5e100>;
  3234. pinctrl-names = "default\0sleep";
  3235. pinctrl-0 = <0x82 0x83>;
  3236. pinctrl-1 = <0x84>;
  3237. spi1_cs_number = <0x01>;
  3238. spi1_cs_bitmap = <0x01>;
  3239. status = "disable";
  3240. spi_slave_mode = <0x00>;
  3241. linux,phandle = <0x143>;
  3242. phandle = <0x143>;
  3243.  
  3244. spi_board1 {
  3245. device_type = "spi_board1";
  3246. compatible = "rohm,dh2228fv";
  3247. spi-max-frequency = <0x5f5e100>;
  3248. reg = <0x00>;
  3249. spi-rx-bus-width = <0x01>;
  3250. spi-tx-bus-width = <0x01>;
  3251. };
  3252. };
  3253.  
  3254. pcie@0x05400000 {
  3255. #address-cells = <0x03>;
  3256. #size-cells = <0x02>;
  3257. compatible = "allwinner,sun50i-pcie";
  3258. reg = <0x00 0x5400000 0x00 0x2000 0x00 0x5410000 0x00 0x10000>;
  3259. reg-names = "dbi\0config";
  3260. device_type = "pci";
  3261. ranges = <0x800 0x00 0x5410000 0x00 0x5410000 0x00 0x10000 0x81000000 0x00 0x00 0x00 0x5e00000 0x00 0x10000 0x82000000 0x00 0x5500000 0x00 0x5500000 0x00 0x800000>;
  3262. num-lanes = <0x01>;
  3263. interrupts = <0x00 0x7f 0x04 0x00 0x7e 0x04>;
  3264. interrupt-names = "msi";
  3265. #interrupt-cells = <0x01>;
  3266. interrupt-map-mask = <0x00 0x00 0x00 0x00>;
  3267. interrupt-map = <0x00 0x00 0x00 0x01 0x85 0x00 0x7f 0x04>;
  3268. status = "okay";
  3269. linux,phandle = <0x144>;
  3270. phandle = <0x144>;
  3271. };
  3272.  
  3273. sdmmc@04022000 {
  3274. compatible = "allwinner,sunxi-mmc-v4p6x";
  3275. device_type = "sdc2";
  3276. reg = <0x00 0x4022000 0x00 0x1000>;
  3277. interrupts = <0x00 0x25 0x04>;
  3278. clocks = <0x09 0x86 0x87 0x88 0x89>;
  3279. clock-names = "osc24m\0pll_periph\0mmc\0ahb\0rst";
  3280. pinctrl-names = "default\0sleep";
  3281. pinctrl-0 = <0x8a 0x8b>;
  3282. pinctrl-1 = <0x8c>;
  3283. bus-width = <0x08>;
  3284. cap-mmc-highspeed;
  3285. cap-cmd23;
  3286. mmc-cache-ctrl;
  3287. non-removable;
  3288. max-frequency = <0x5f5e100>;
  3289. cap-erase;
  3290. mmc-high-capacity-erase-size;
  3291. no-sdio;
  3292. no-sd;
  3293. sdc_tm4_sm0_freq0 = <0x00>;
  3294. sdc_tm4_sm0_freq1 = <0x00>;
  3295. sdc_tm4_sm1_freq0 = <0x00>;
  3296. sdc_tm4_sm1_freq1 = <0x00>;
  3297. sdc_tm4_sm2_freq0 = <0x00>;
  3298. sdc_tm4_sm2_freq1 = <0x00>;
  3299. sdc_tm4_sm3_freq0 = <0x5000000>;
  3300. sdc_tm4_sm3_freq1 = <0x05>;
  3301. sdc_tm4_sm4_freq0 = <0x50000>;
  3302. sdc_tm4_sm4_freq1 = <0x04>;
  3303. status = "disabled";
  3304. mmc-ddr-1_8v;
  3305. mmc-hs200-1_8v;
  3306. mmc-hs400-1_8v;
  3307. sunxi-power-save-mode;
  3308. sunxi-dis-signal-vol-sw;
  3309. ctl-spec-caps = <0x08>;
  3310. vmmc-supply = <0x69>;
  3311. vqmmc-supply = <0x68>;
  3312. linux,phandle = <0x145>;
  3313. phandle = <0x145>;
  3314. };
  3315.  
  3316. sdmmc@04020000 {
  3317. compatible = "allwinner,sunxi-mmc-v4p1x";
  3318. device_type = "sdc0";
  3319. reg = <0x00 0x4020000 0x00 0x1000>;
  3320. interrupts = <0x00 0x23 0x04>;
  3321. clocks = <0x09 0x86 0x8d 0x8e 0x8f>;
  3322. clock-names = "osc24m\0pll_periph\0mmc\0ahb\0rst";
  3323. pinctrl-names = "default\0sleep\0uart_jtag";
  3324. pinctrl-0 = <0x90>;
  3325. pinctrl-1 = <0x91>;
  3326. pinctrl-2 = <0x92>;
  3327. max-frequency = <0x8f0d180>;
  3328. bus-width = <0x04>;
  3329. cd-gpios = <0x53 0x08 0x10 0x06 0x01 0x03 0xffffffff>;
  3330. cap-sd-highspeed;
  3331. cap-wait-while-busy;
  3332. no-sdio;
  3333. no-mmc;
  3334. sunxi-power-save-mode;
  3335. status = "okay";
  3336. cd-used-24M;
  3337. sd-uhs-sdr50;
  3338. sd-uhs-ddr50;
  3339. sd-uhs-sdr104;
  3340. ctl-spec-caps = <0x08>;
  3341. vmmc-supply = <0x69>;
  3342. vqmmc33sw-supply = <0x69>;
  3343. vdmmc33sw-supply = <0x69>;
  3344. vqmmc18sw-supply = <0x68>;
  3345. vdmmc18sw-supply = <0x68>;
  3346. linux,phandle = <0x146>;
  3347. phandle = <0x146>;
  3348. };
  3349.  
  3350. sdmmc@04021000 {
  3351. compatible = "allwinner,sunxi-mmc-v4p1x";
  3352. device_type = "sdc1";
  3353. reg = <0x00 0x4021000 0x00 0x1000>;
  3354. interrupts = <0x00 0x24 0x04>;
  3355. clocks = <0x09 0x86 0x93 0x94 0x95>;
  3356. clock-names = "osc24m\0pll_periph\0mmc\0ahb\0rst";
  3357. pinctrl-names = "default\0sleep";
  3358. pinctrl-0 = <0x96>;
  3359. pinctrl-1 = <0x97>;
  3360. max-frequency = <0x8f0d180>;
  3361. bus-width = <0x04>;
  3362. keep-power-in-suspend;
  3363. sunxi-dly-52M-ddr4 = <0x01 0x00 0x00 0x00 0x02>;
  3364. sunxi-dly-104M = <0x01 0x00 0x00 0x00 0x01>;
  3365. sunxi-dly-208M = <0x01 0x00 0x00 0x00 0x01>;
  3366. status = "okay";
  3367. no-mmc;
  3368. no-sd;
  3369. cap-sd-highspeed;
  3370. sd-uhs-sdr50;
  3371. sd-uhs-ddr50;
  3372. sd-uhs-sdr104;
  3373. sunxi-dis-signal-vol-sw;
  3374. cap-sdio-irq;
  3375. ignore-pm-notify;
  3376. ctl-spec-caps = <0x08>;
  3377. linux,phandle = <0x147>;
  3378. phandle = <0x147>;
  3379. };
  3380.  
  3381. disp@01000000 {
  3382. compatible = "allwinner,sunxi-disp";
  3383. reg = <0x00 0x1000000 0x00 0x1400000 0x00 0x6510000 0x00 0x200 0x00 0x6511000 0x00 0x1000 0x00 0x6512000 0x00 0x1000 0x00 0x6515000 0x00 0x1000 0x00 0x6516000 0x00 0x1000>;
  3384. interrupts = <0x00 0x58 0x04 0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>;
  3385. clocks = <0x0b 0x98 0x12 0x13 0x14 0x15 0x16>;
  3386. boot_disp = <0x00>;
  3387. fb_base = <0x00>;
  3388. iommus = <0x28 0x00 0x00>;
  3389. status = "okay";
  3390. disp_init_enable = <0x01>;
  3391. disp_mode = <0x00>;
  3392. screen0_output_type = <0x03>;
  3393. screen0_output_mode = <0x0a>;
  3394. screen0_output_format = <0x00>;
  3395. screen0_output_bits = <0x00>;
  3396. screen0_output_eotf = <0x04>;
  3397. screen0_output_cs = <0x101>;
  3398. screen0_output_dvi_hdmi = <0x02>;
  3399. screen0_output_range = <0x02>;
  3400. screen0_output_scan = <0x00>;
  3401. screen0_output_aspect_ratio = <0x08>;
  3402. screen1_output_type = <0x02>;
  3403. screen1_output_mode = <0x0b>;
  3404. screen1_output_format = <0x01>;
  3405. screen1_output_bits = <0x00>;
  3406. screen1_output_eotf = <0x04>;
  3407. screen1_output_cs = <0x104>;
  3408. screen1_output_dvi_hdmi = <0x00>;
  3409. screen1_output_range = <0x02>;
  3410. screen1_output_scan = <0x00>;
  3411. screen1_output_aspect_ratio = <0x08>;
  3412. dev0_output_type = <0x04>;
  3413. dev0_output_mode = <0x0a>;
  3414. dev0_screen_id = <0x00>;
  3415. dev0_do_hpd = <0x01>;
  3416. dev1_output_type = <0x02>;
  3417. dev1_output_mode = <0x0b>;
  3418. dev1_screen_id = <0x01>;
  3419. dev1_do_hpd = <0x01>;
  3420. dev2_output_type = <0x00>;
  3421. def_output_dev = <0x00>;
  3422. hdmi_mode_check = <0x01>;
  3423. fb0_format = <0x00>;
  3424. fb0_width = <0x500>;
  3425. fb0_height = <0x2d0>;
  3426. fb1_format = <0x00>;
  3427. fb1_width = <0x00>;
  3428. fb1_height = <0x00>;
  3429. chn_cfg_mode = <0x01>;
  3430. disp_para_zone = <0x01>;
  3431. linux,phandle = <0x148>;
  3432. phandle = <0x148>;
  3433. };
  3434.  
  3435. tv0@01c94000 {
  3436. compatible = "allwinner,sunxi-tv";
  3437. reg = <0x00 0x6520000 0x00 0x100 0x00 0x6524000 0x00 0x3fc>;
  3438. clocks = <0x18 0x17>;
  3439. device_type = "tv0";
  3440. pinctrl-names = "active\0sleep";
  3441. status = "okay";
  3442. dac_src0 = <0x00>;
  3443. dac_type0 = <0x00>;
  3444. interface = <0x01>;
  3445. linux,phandle = <0x149>;
  3446. phandle = <0x149>;
  3447. };
  3448.  
  3449. lcd0@01c0c000 {
  3450. compatible = "allwinner,sunxi-lcd0";
  3451. pinctrl-names = "active\0sleep";
  3452. status = "okay";
  3453. lcd_used = <0x00>;
  3454. lcd_driver_name = "default_lcd";
  3455. lcd_backlight = <0x32>;
  3456. lcd_if = <0x00>;
  3457. lcd_x = <0x500>;
  3458. lcd_y = <0x320>;
  3459. lcd_width = <0x96>;
  3460. lcd_height = <0x5e>;
  3461. lcd_dclk_freq = <0x46>;
  3462. lcd_pwm_used = <0x00>;
  3463. lcd_pwm_ch = <0x00>;
  3464. lcd_pwm_freq = <0xc350>;
  3465. lcd_pwm_pol = <0x00>;
  3466. lcd_pwm_max_limit = <0xff>;
  3467. lcd_hbp = <0x14>;
  3468. lcd_ht = <0x58a>;
  3469. lcd_hspw = <0x0a>;
  3470. lcd_vbp = <0x0a>;
  3471. lcd_vt = <0x32e>;
  3472. lcd_vspw = <0x05>;
  3473. lcd_lvds_if = <0x00>;
  3474. lcd_lvds_colordepth = <0x00>;
  3475. lcd_lvds_mode = <0x00>;
  3476. lcd_frm = <0x00>;
  3477. lcd_hv_clk_phase = <0x00>;
  3478. lcd_hv_sync_polarity = <0x00>;
  3479. lcd_gamma_en = <0x00>;
  3480. lcd_bright_curve_en = <0x00>;
  3481. lcd_cmap_en = <0x00>;
  3482. deu_mode = <0x00>;
  3483. lcdgamma4iep = <0x16>;
  3484. smart_color = <0x5a>;
  3485. lcd_pin_power = "bldo1";
  3486. lcd_power = "dc1sw";
  3487. pinctrl-0 = <0x99>;
  3488. pinctrl-1 = <0x9a>;
  3489. linux,phandle = <0x14a>;
  3490. phandle = <0x14a>;
  3491. };
  3492.  
  3493. lcd1@01c0c001 {
  3494. compatible = "allwinner,sunxi-lcd1";
  3495. pinctrl-names = "active\0sleep";
  3496. status = "okay";
  3497. linux,phandle = <0x14b>;
  3498. phandle = <0x14b>;
  3499. };
  3500.  
  3501. boot_disp {
  3502. compatible = "allwinner,boot_disp";
  3503. linux,phandle = <0x14c>;
  3504. phandle = <0x14c>;
  3505. };
  3506.  
  3507. hdmi@06000000 {
  3508. compatible = "allwinner,sunxi-hdmi";
  3509. reg = <0x00 0x6000000 0x00 0x100000>;
  3510. interrupts = <0x00 0x3f 0x00>;
  3511. clocks = <0x0f 0x10 0x19 0x11>;
  3512. status = "okay";
  3513. hdmi_used = <0x01>;
  3514. hdmi_power_cnt = <0x02>;
  3515. hdmi_power0 = "vcc-hdmi";
  3516. hdmi_power1 = "vdd-hdmi";
  3517. hdmi_hdcp_enable = <0x01>;
  3518. hdmi_hdcp22_enable = <0x01>;
  3519. hdmi_cts_compatibility = <0x00>;
  3520. hdmi_cec_support = <0x01>;
  3521. hdmi_cec_super_standby = <0x00>;
  3522. hdmi_skip_bootedid = <0x01>;
  3523. ddc_en_io_ctrl = <0x00>;
  3524. power_io_ctrl = <0x00>;
  3525. linux,phandle = <0x14d>;
  3526. phandle = <0x14d>;
  3527. };
  3528.  
  3529. g2d@01480000 {
  3530. compatible = "allwinner,sunxi-g2d";
  3531. reg = <0x00 0x1480000 0x00 0x3ffff>;
  3532. interrupts = <0x00 0x5a 0x04>;
  3533. clocks = <0x0d>;
  3534. iommus = <0x28 0x06 0x01>;
  3535. linux,phandle = <0x14e>;
  3536. phandle = <0x14e>;
  3537. };
  3538.  
  3539. tr@01000000 {
  3540. compatible = "allwinner,sun50i-tr";
  3541. reg = <0x00 0x1000000 0x00 0x200bc>;
  3542. interrupts = <0x00 0x60 0x04>;
  3543. clocks = <0x0b>;
  3544. status = "okay";
  3545. linux,phandle = <0x14f>;
  3546. phandle = <0x14f>;
  3547. };
  3548.  
  3549. pwm@0300a000 {
  3550. compatible = "allwinner,sunxi-pwm";
  3551. reg = <0x00 0x300a000 0x00 0x3ff>;
  3552. clocks = <0x9b>;
  3553. pwm-number = <0x06>;
  3554. pwm-base = <0x00>;
  3555. pwms = <0x9c 0x9d 0x9e 0x9f 0xa0 0xa1>;
  3556. linux,phandle = <0x150>;
  3557. phandle = <0x150>;
  3558. };
  3559.  
  3560. pwm0@0300a000 {
  3561. compatible = "allwinner,sunxi-pwm0";
  3562. pinctrl-names = "active\0sleep";
  3563. reg_base = <0x300a000>;
  3564. linux,phandle = <0x9c>;
  3565. phandle = <0x9c>;
  3566. };
  3567.  
  3568. pwm1@0300a000 {
  3569. compatible = "allwinner,sunxi-pwm1";
  3570. pinctrl-names = "active\0sleep";
  3571. reg_base = <0x300a000>;
  3572. linux,phandle = <0x9d>;
  3573. phandle = <0x9d>;
  3574. };
  3575.  
  3576. pwm2@0300a000 {
  3577. compatible = "allwinner,sunxi-pwm2";
  3578. pinctrl-names = "active\0sleep";
  3579. reg_base = <0x300a000>;
  3580. linux,phandle = <0x9e>;
  3581. phandle = <0x9e>;
  3582. };
  3583.  
  3584. pwm3@0300a000 {
  3585. compatible = "allwinner,sunxi-pwm3";
  3586. pinctrl-names = "active\0sleep";
  3587. reg_base = <0x300a000>;
  3588. linux,phandle = <0x9f>;
  3589. phandle = <0x9f>;
  3590. };
  3591.  
  3592. pwm4@0300a000 {
  3593. compatible = "allwinner,sunxi-pwm4";
  3594. pinctrl-names = "active\0sleep";
  3595. reg_base = <0x300a000>;
  3596. linux,phandle = <0xa0>;
  3597. phandle = <0xa0>;
  3598. };
  3599.  
  3600. pwm5@0300a000 {
  3601. compatible = "allwinner,sunxi-pwm5";
  3602. pinctrl-names = "active\0sleep";
  3603. reg_base = <0x300a000>;
  3604. pinctrl-0 = <0xa2>;
  3605. pinctrl-1 = <0xa3>;
  3606. clk_bypass_output = <0x01>;
  3607. linux,phandle = <0xa1>;
  3608. phandle = <0xa1>;
  3609. };
  3610.  
  3611. ac200 {
  3612. compatible = "allwinner,sunxi-ac200";
  3613. status = "okay";
  3614. tv_used = <0x01>;
  3615. tv_twi_used = <0x01>;
  3616. tv_twi_id = <0x03>;
  3617. tv_twi_addr = <0x10>;
  3618. tv_pwm_ch = <0x05>;
  3619. linux,phandle = <0x151>;
  3620. phandle = <0x151>;
  3621. };
  3622.  
  3623. vind@0 {
  3624. compatible = "allwinner,sunxi-vin-media\0simple-bus";
  3625. #address-cells = <0x02>;
  3626. #size-cells = <0x02>;
  3627. ranges;
  3628. device_id = <0x00>;
  3629. vind0_clk = <0x16e36000>;
  3630. reg = <0x00 0x6600800 0x00 0x200 0x00 0x6600000 0x00 0x800>;
  3631. clocks = <0xa4 0xa5 0xa6 0x09 0xa5 0xa7 0x09 0xa5>;
  3632. pinctrl-names = "mclk0-default\0mclk0-sleep\0mclk1-default\0mclk1-sleep";
  3633. pinctrl-0 = <0xa8>;
  3634. pinctrl-1 = <0xa9>;
  3635. pinctrl-2 = <0xaa>;
  3636. pinctrl-3 = <0xab>;
  3637. status = "okay";
  3638. linux,phandle = <0x152>;
  3639. phandle = <0x152>;
  3640.  
  3641. cci@0 {
  3642. compatible = "allwinner,sunxi-csi_cci";
  3643. reg = <0x00 0x6614000 0x00 0x400>;
  3644. interrupts = <0x00 0x4b 0x04>;
  3645. pinctrl-names = "default\0sleep";
  3646. pinctrl-0 = <0xac>;
  3647. pinctrl-1 = <0xad>;
  3648. device_id = <0x00>;
  3649. status = "okay";
  3650. linux,phandle = <0x153>;
  3651. phandle = <0x153>;
  3652. };
  3653.  
  3654. cci@1 {
  3655. compatible = "allwinner,sunxi-csi_cci";
  3656. reg = <0x00 0x6614400 0x00 0x400>;
  3657. interrupts = <0x00 0x4c 0x04>;
  3658. pinctrl-names = "default\0sleep";
  3659. pinctrl-0 = <0xae>;
  3660. pinctrl-1 = <0xaf>;
  3661. device_id = <0x01>;
  3662. status = "okay";
  3663. linux,phandle = <0x154>;
  3664. phandle = <0x154>;
  3665. };
  3666.  
  3667. csi@0 {
  3668. device_type = "csi0";
  3669. compatible = "allwinner,sunxi-csi";
  3670. reg = <0x00 0x6601000 0x00 0x1000>;
  3671. interrupts = <0x00 0x49 0x04>;
  3672. device_id = <0x00>;
  3673. iommus = <0x28 0x04 0x01>;
  3674. status = "okay";
  3675. linux,phandle = <0x155>;
  3676. phandle = <0x155>;
  3677. };
  3678.  
  3679. csi@1 {
  3680. device_type = "csi1";
  3681. compatible = "allwinner,sunxi-csi";
  3682. reg = <0x00 0x6602000 0x00 0x1000>;
  3683. interrupts = <0x00 0x4a 0x04>;
  3684. pinctrl-names = "default\0sleep";
  3685. pinctrl-0 = <0xb0>;
  3686. pinctrl-1 = <0xb1>;
  3687. device_id = <0x01>;
  3688. iommus = <0x28 0x04 0x01>;
  3689. status = "okay";
  3690. linux,phandle = <0x156>;
  3691. phandle = <0x156>;
  3692. };
  3693.  
  3694. mipi@0 {
  3695. compatible = "allwinner,sunxi-mipi";
  3696. reg = <0x00 0x660c000 0x00 0x1000>;
  3697. interrupts = <0x00 0x4d 0x04>;
  3698. device_id = <0x00>;
  3699. status = "okay";
  3700. linux,phandle = <0x157>;
  3701. phandle = <0x157>;
  3702. };
  3703.  
  3704. isp@0 {
  3705. compatible = "allwinner,sunxi-isp";
  3706. device_id = <0x00>;
  3707. status = "okay";
  3708. linux,phandle = <0x158>;
  3709. phandle = <0x158>;
  3710. };
  3711.  
  3712. isp@1 {
  3713. compatible = "allwinner,sunxi-isp";
  3714. device_id = <0x01>;
  3715. status = "okay";
  3716. linux,phandle = <0x159>;
  3717. phandle = <0x159>;
  3718. };
  3719.  
  3720. scaler@0 {
  3721. compatible = "allwinner,sunxi-scaler";
  3722. device_id = <0x00>;
  3723. iommus = <0x28 0x04 0x01>;
  3724. status = "okay";
  3725. linux,phandle = <0x15a>;
  3726. phandle = <0x15a>;
  3727. };
  3728.  
  3729. scaler@1 {
  3730. compatible = "allwinner,sunxi-scaler";
  3731. device_id = <0x01>;
  3732. iommus = <0x28 0x04 0x01>;
  3733. status = "okay";
  3734. linux,phandle = <0x15b>;
  3735. phandle = <0x15b>;
  3736. };
  3737.  
  3738. scaler@2 {
  3739. compatible = "allwinner,sunxi-scaler";
  3740. device_id = <0x02>;
  3741. iommus = <0x28 0x04 0x01>;
  3742. status = "okay";
  3743. linux,phandle = <0x15c>;
  3744. phandle = <0x15c>;
  3745. };
  3746.  
  3747. scaler@3 {
  3748. compatible = "allwinner,sunxi-scaler";
  3749. device_id = <0x03>;
  3750. iommus = <0x28 0x04 0x01>;
  3751. status = "okay";
  3752. linux,phandle = <0x15d>;
  3753. phandle = <0x15d>;
  3754. };
  3755.  
  3756. scaler@4 {
  3757. compatible = "allwinner,sunxi-scaler";
  3758. device_id = <0x04>;
  3759. iommus = <0x28 0x04 0x01>;
  3760. status = "okay";
  3761. linux,phandle = <0x15e>;
  3762. phandle = <0x15e>;
  3763. };
  3764.  
  3765. scaler@5 {
  3766. compatible = "allwinner,sunxi-scaler";
  3767. device_id = <0x05>;
  3768. iommus = <0x28 0x04 0x01>;
  3769. status = "okay";
  3770. linux,phandle = <0x15f>;
  3771. phandle = <0x15f>;
  3772. };
  3773.  
  3774. actuator@0 {
  3775. device_type = "actuator0";
  3776. compatible = "allwinner,sunxi-actuator";
  3777. actuator0_name = "ad5820_act";
  3778. actuator0_slave = <0x18>;
  3779. actuator0_af_pwdn;
  3780. actuator0_afvdd = "afvcc-csi";
  3781. actuator0_afvdd_vol = <0x2ab980>;
  3782. status = "disabled";
  3783. linux,phandle = <0xb3>;
  3784. phandle = <0xb3>;
  3785. };
  3786.  
  3787. flash@0 {
  3788. device_type = "flash0";
  3789. compatible = "allwinner,sunxi-flash";
  3790. flash0_type = <0x02>;
  3791. flash0_en;
  3792. flash0_mode;
  3793. flash0_flvdd = [00];
  3794. flash0_flvdd_vol;
  3795. device_id = <0x00>;
  3796. status = "disabled";
  3797. linux,phandle = <0xb2>;
  3798. phandle = <0xb2>;
  3799. };
  3800.  
  3801. sensor@0 {
  3802. device_type = "sensor0";
  3803. compatible = "allwinner,sunxi-sensor";
  3804. sensor0_mname = "ov5640";
  3805. sensor0_twi_cci_id = <0x00>;
  3806. sensor0_twi_addr = <0x78>;
  3807. sensor0_mclk_id = <0x00>;
  3808. sensor0_pos = "rear";
  3809. sensor0_isp_used = <0x00>;
  3810. sensor0_fmt = <0x00>;
  3811. sensor0_stby_mode = <0x00>;
  3812. sensor0_vflip = <0x00>;
  3813. sensor0_hflip = <0x00>;
  3814. sensor0_cameravdd-supply;
  3815. sensor0_cameravdd_vol = <0x2ab980>;
  3816. sensor0_iovdd-supply;
  3817. sensor0_iovdd_vol = <0x2ab980>;
  3818. sensor0_avdd-supply;
  3819. sensor0_avdd_vol = <0x2ab980>;
  3820. sensor0_dvdd-supply;
  3821. sensor0_dvdd_vol = <0x16e360>;
  3822. sensor0_power_en;
  3823. sensor0_reset = <0x53 0x04 0x0e 0x01 0x00 0x01 0x00>;
  3824. sensor0_pwdn = <0x53 0x04 0x10 0x01 0x00 0x01 0x00>;
  3825. sensor0_sm_vs;
  3826. flash_handle = <0xb2>;
  3827. act_handle = <0xb3>;
  3828. device_id = <0x00>;
  3829. status = "okay";
  3830. linux,phandle = <0x160>;
  3831. phandle = <0x160>;
  3832. };
  3833.  
  3834. sensor@1 {
  3835. device_type = "sensor1";
  3836. compatible = "allwinner,sunxi-sensor";
  3837. sensor1_mname = "ov5647";
  3838. sensor1_twi_cci_id = <0x01>;
  3839. sensor1_twi_addr = <0x6c>;
  3840. sensor1_mclk_id = <0x01>;
  3841. sensor1_pos = "front";
  3842. sensor1_isp_used = <0x00>;
  3843. sensor1_fmt = <0x00>;
  3844. sensor1_stby_mode = <0x00>;
  3845. sensor1_vflip = <0x00>;
  3846. sensor1_hflip = <0x00>;
  3847. sensor1_cameravdd-supply;
  3848. sensor1_cameravdd_vol = <0x2ab980>;
  3849. sensor1_iovdd-supply;
  3850. sensor1_iovdd_vol = <0x2ab980>;
  3851. sensor1_avdd-supply;
  3852. sensor1_avdd_vol = <0x2ab980>;
  3853. sensor1_dvdd-supply;
  3854. sensor1_dvdd_vol = <0x16e360>;
  3855. sensor1_power_en;
  3856. sensor1_reset = <0x53 0x04 0x0e 0x01 0x00 0x01 0x00>;
  3857. sensor1_pwdn = <0x53 0x04 0x0f 0x01 0x00 0x01 0x00>;
  3858. sensor1_sm_vs;
  3859. flash_handle;
  3860. act_handle;
  3861. device_id = <0x01>;
  3862. status = "okay";
  3863. linux,phandle = <0x161>;
  3864. phandle = <0x161>;
  3865. };
  3866.  
  3867. vinc@0 {
  3868. device_type = "vinc0";
  3869. compatible = "allwinner,sunxi-vin-core";
  3870. reg = <0x00 0x6609000 0x00 0x200>;
  3871. interrupts = <0x00 0x45 0x04>;
  3872. vinc0_csi_sel = <0x00>;
  3873. vinc0_mipi_sel = <0x00>;
  3874. vinc0_isp_sel = <0x00>;
  3875. vinc0_isp_tx_ch = <0x00>;
  3876. vinc0_rear_sensor_sel = <0x00>;
  3877. vinc0_front_sensor_sel = <0x00>;
  3878. vinc0_sensor_list = <0x00>;
  3879. device_id = <0x00>;
  3880. iommus = <0x28 0x04 0x01>;
  3881. status = "okay";
  3882. linux,phandle = <0x162>;
  3883. phandle = <0x162>;
  3884. };
  3885.  
  3886. vinc@1 {
  3887. device_type = "vinc1";
  3888. compatible = "allwinner,sunxi-vin-core";
  3889. reg = <0x00 0x6609200 0x00 0x200>;
  3890. interrupts = <0x00 0x46 0x04>;
  3891. vinc1_csi_sel = <0x00>;
  3892. vinc1_mipi_sel = <0x00>;
  3893. vinc1_isp_sel = <0x00>;
  3894. vinc1_isp_tx_ch = <0x00>;
  3895. vinc1_rear_sensor_sel = <0x00>;
  3896. vinc1_front_sensor_sel = <0x00>;
  3897. vinc1_sensor_list = <0x00>;
  3898. device_id = <0x01>;
  3899. iommus = <0x28 0x04 0x01>;
  3900. status = "okay";
  3901. linux,phandle = <0x163>;
  3902. phandle = <0x163>;
  3903. };
  3904.  
  3905. vinc@2 {
  3906. device_type = "vinc2";
  3907. compatible = "allwinner,sunxi-vin-core";
  3908. reg = <0x00 0x6609400 0x00 0x200>;
  3909. interrupts = <0x00 0x47 0x04>;
  3910. vinc2_csi_sel = <0x00>;
  3911. vinc2_mipi_sel = <0x00>;
  3912. vinc2_isp_sel = <0x00>;
  3913. vinc2_isp_tx_ch = <0x00>;
  3914. vinc2_rear_sensor_sel = <0x00>;
  3915. vinc2_front_sensor_sel = <0x00>;
  3916. vinc2_sensor_list = <0x00>;
  3917. device_id = <0x02>;
  3918. iommus = <0x28 0x04 0x01>;
  3919. status = "disabled";
  3920. linux,phandle = <0x164>;
  3921. phandle = <0x164>;
  3922. };
  3923.  
  3924. vinc@3 {
  3925. device_type = "vinc3";
  3926. compatible = "allwinner,sunxi-vin-core";
  3927. reg = <0x00 0x6609600 0x00 0x200>;
  3928. interrupts = <0x00 0x48 0x04>;
  3929. vinc3_csi_sel = <0x00>;
  3930. vinc3_mipi_sel = <0x00>;
  3931. vinc3_isp_sel = <0x00>;
  3932. vinc3_isp_tx_ch = <0x00>;
  3933. vinc3_rear_sensor_sel = <0x00>;
  3934. vinc3_front_sensor_sel = <0x00>;
  3935. vinc3_sensor_list = <0x00>;
  3936. device_id = <0x03>;
  3937. iommus = <0x28 0x04 0x01>;
  3938. status = "disabled";
  3939. linux,phandle = <0x165>;
  3940. phandle = <0x165>;
  3941. };
  3942.  
  3943. vinc@4 {
  3944. device_type = "vinc4";
  3945. compatible = "allwinner,sunxi-vin-core";
  3946. reg = <0x00 0x6609800 0x00 0x200>;
  3947. interrupts = <0x00 0x4f 0x04>;
  3948. vinc4_csi_sel = <0x01>;
  3949. vinc4_mipi_sel = <0xff>;
  3950. vinc4_isp_sel = <0x01>;
  3951. vinc4_isp_tx_ch = <0x00>;
  3952. vinc4_rear_sensor_sel = <0x01>;
  3953. vinc4_front_sensor_sel = <0x01>;
  3954. vinc4_sensor_list = <0x00>;
  3955. device_id = <0x04>;
  3956. iommus = <0x28 0x05 0x01>;
  3957. status = "disabled";
  3958. linux,phandle = <0x166>;
  3959. phandle = <0x166>;
  3960. };
  3961.  
  3962. vinc@5 {
  3963. device_type = "vinc5";
  3964. compatible = "allwinner,sunxi-vin-core";
  3965. reg = <0x00 0x6609a00 0x00 0x200>;
  3966. interrupts = <0x00 0x50 0x04>;
  3967. vinc5_csi_sel = <0x01>;
  3968. vinc5_mipi_sel = <0xff>;
  3969. vinc5_isp_sel = <0x01>;
  3970. vinc5_isp_tx_ch = <0x00>;
  3971. vinc5_rear_sensor_sel = <0x01>;
  3972. vinc5_front_sensor_sel = <0x01>;
  3973. vinc5_sensor_list = <0x00>;
  3974. device_id = <0x05>;
  3975. iommus = <0x28 0x05 0x01>;
  3976. status = "disabled";
  3977. linux,phandle = <0x167>;
  3978. phandle = <0x167>;
  3979. };
  3980. };
  3981.  
  3982. vdevice@0 {
  3983. compatible = "allwinner,sun50i-vdevice";
  3984. device_type = "Vdevice";
  3985. pinctrl-names = "default";
  3986. interrupt-parent = <0x53>;
  3987. interrupts = <0x00 0x03 0x04>;
  3988. pinctrl-0 = <0xb4>;
  3989. test-gpios = <0x53 0x00 0x00 0x01 0x02 0x02 0x01>;
  3990. status = "okay";
  3991. linux,phandle = <0x168>;
  3992. phandle = <0x168>;
  3993. };
  3994.  
  3995. emce@01905000 {
  3996. compatible = "allwinner,sunxi-emce";
  3997. device_name = "emce";
  3998. reg = <0x00 0x1905000 0x00 0x100>;
  3999. clock-frequency = <0x11e1a300>;
  4000. linux,phandle = <0x169>;
  4001. phandle = <0x169>;
  4002. };
  4003.  
  4004. ce@1904000 {
  4005. compatible = "allwinner,sunxi-ce";
  4006. device_name = "ce";
  4007. reg = <0x00 0x1904000 0x00 0xa0 0x00 0x1904800 0x00 0xa0>;
  4008. interrupts = <0x00 0x5b 0x01 0x00 0x5c 0x01>;
  4009. clock-frequency = <0x11e1a300>;
  4010. clocks = <0xb5 0x0c>;
  4011. linux,phandle = <0x16a>;
  4012. phandle = <0x16a>;
  4013. };
  4014.  
  4015. deinterlace@0x01420000 {
  4016. #address-cells = <0x01>;
  4017. #size-cells = <0x00>;
  4018. compatible = "allwinner,sunxi-deinterlace";
  4019. reg = <0x00 0x1420000 0x00 0x40000>;
  4020. interrupts = <0x00 0x59 0x04>;
  4021. clocks = <0x0e 0x0c>;
  4022. iommus = <0x28 0x01 0x01>;
  4023. status = "okay";
  4024. linux,phandle = <0x16b>;
  4025. phandle = <0x16b>;
  4026. };
  4027.  
  4028. smartcard@0x05005000 {
  4029. #address-cells = <0x01>;
  4030. #size-cells = <0x00>;
  4031. compatible = "allwinner,sunxi-scr";
  4032. device_type = "scr0";
  4033. reg = <0x00 0x5005000 0x00 0x400>;
  4034. interrupts = <0x00 0x08 0x04>;
  4035. clocks = <0xb6 0xb7>;
  4036. clock-frequency = <0x16e3600>;
  4037. pinctrl-names = "default\0sleep";
  4038. pinctrl-0 = <0xb8 0xb9>;
  4039. pinctrl-1 = <0xba>;
  4040. status = "disabled";
  4041. linux,phandle = <0x16c>;
  4042. phandle = <0x16c>;
  4043. };
  4044.  
  4045. nand0@04011000 {
  4046. compatible = "allwinner,sun50iw9-nand";
  4047. device_type = "nand0";
  4048. reg = <0x00 0x4011000 0x00 0x1000>;
  4049. interrupts = <0x00 0x22 0x04>;
  4050. clocks = <0x0c 0xbb 0xbc>;
  4051. pinctrl-names = "default\0sleep";
  4052. pinctrl-1 = <0xbf>;
  4053. nand0_regulator1 = "vcc-nand";
  4054. nand0_regulator2 = "none";
  4055. nand0_cache_level = <0x55aaaa55>;
  4056. nand0_flush_cache_num = <0x55aaaa55>;
  4057. nand0_capacity_level = <0x55aaaa55>;
  4058. nand0_id_number_ctl = <0x55aaaa55>;
  4059. nand0_print_level = <0x55aaaa55>;
  4060. nand0_p0 = <0x55aaaa55>;
  4061. nand0_p1 = <0x55aaaa55>;
  4062. nand0_p2 = <0x55aaaa55>;
  4063. nand0_p3 = <0x55aaaa55>;
  4064. chip_code = "sun50iw9";
  4065. status = "disabled";
  4066. linux,phandle = <0x16d>;
  4067. phandle = <0x16d>;
  4068. nand0_support_2ch = <0x00>;
  4069. pinctrl-0 = <0x189 0x18a>;
  4070. };
  4071.  
  4072. ts0@05060000 {
  4073. compatible = "allwinner,sun50i-tsc";
  4074. device_type = "ts0";
  4075. reg = <0x00 0x5060000 0x00 0x1000>;
  4076. interrupts = <0x00 0x11 0x04>;
  4077. clocks = <0x02 0xc0>;
  4078. clock-frequency = <0x7270e00>;
  4079. pinctrl-names = "ts0-default\0ts0-sleep";
  4080. pinctrl-0 = <0xc1>;
  4081. pinctrl-1 = <0xc2>;
  4082. ts0config = <0x01>;
  4083. status = "okay";
  4084. linux,phandle = <0x16e>;
  4085. phandle = <0x16e>;
  4086. };
  4087.  
  4088. thermal_sensor {
  4089. compatible = "arm,sun50iw9p1";
  4090. reg = <0x00 0x5070400 0x00 0x400>;
  4091. clocks = <0xc3>;
  4092. clock-names = "bus";
  4093. nvmem-cells = <0xc4>;
  4094. nvmem-cell-names = "calibration";
  4095. #thermal-sensor-cells = <0x01>;
  4096. linux,phandle = <0xc5>;
  4097. phandle = <0xc5>;
  4098. };
  4099.  
  4100. thermal-zones {
  4101.  
  4102. cpu_thermal_zone {
  4103. polling-delay-passive = <0x1f4>;
  4104. polling-delay = <0x3e8>;
  4105. thermal-sensors = <0xc5 0x02>;
  4106. sustainable-power = <0x3e8>;
  4107. k_po = <0x14>;
  4108. k_pu = <0x28>;
  4109. k_i = <0x00>;
  4110.  
  4111. trips {
  4112. linux,phandle = <0x16f>;
  4113. phandle = <0x16f>;
  4114.  
  4115. trip-point@0 {
  4116. temperature = <0xea60>;
  4117. type = "passive";
  4118. hysteresis = <0x00>;
  4119. linux,phandle = <0x170>;
  4120. phandle = <0x170>;
  4121. };
  4122.  
  4123. trip-point@1 {
  4124. temperature = <0x11170>;
  4125. type = "passive";
  4126. hysteresis = <0x00>;
  4127. linux,phandle = <0xc6>;
  4128. phandle = <0xc6>;
  4129. };
  4130.  
  4131. cpu_crit@0 {
  4132. temperature = <0x1c138>;
  4133. type = "critical";
  4134. hysteresis = <0x00>;
  4135. linux,phandle = <0x171>;
  4136. phandle = <0x171>;
  4137. };
  4138. };
  4139.  
  4140. cooling-maps {
  4141.  
  4142. map0 {
  4143. trip = <0xc6>;
  4144. cooling-device = <0xc7 0xffffffff 0xffffffff>;
  4145. contribution = <0x400>;
  4146. };
  4147.  
  4148. map1 {
  4149. trip = <0xc6>;
  4150. cooling-device = <0xc8 0xffffffff 0xffffffff>;
  4151. contribution = <0x400>;
  4152. };
  4153. };
  4154. };
  4155.  
  4156. gpu_thermal_zone {
  4157. polling-delay-passive = <0x1f4>;
  4158. polling-delay = <0x3e8>;
  4159. thermal-sensors = <0xc5 0x00>;
  4160. sustainable-power = <0x44c>;
  4161. };
  4162.  
  4163. ve_thermal_zone {
  4164. polling-delay-passive = <0x00>;
  4165. polling-delay = <0x00>;
  4166. thermal-sensors = <0xc5 0x01>;
  4167. };
  4168.  
  4169. ddr_thermal_zone {
  4170. polling-delay-passive = <0x00>;
  4171. polling-delay = <0x00>;
  4172. thermal-sensors = <0xc5 0x03>;
  4173. };
  4174. };
  4175.  
  4176. gpadc {
  4177. compatible = "allwinner,sunxi-gpadc";
  4178. reg = <0x00 0x5070000 0x00 0x400>;
  4179. interrupts = <0x00 0x12 0x00>;
  4180. clocks = <0xc9>;
  4181. status = "okay";
  4182. channel_num = <0x01>;
  4183. channel_select = <0x01>;
  4184. channel_data_select = <0x00>;
  4185. channel_compare_select = <0x01>;
  4186. channel_cld_select = <0x01>;
  4187. channel_chd_select = <0x00>;
  4188. channel0_compare_lowdata = <0x19f0a0>;
  4189. channel0_compare_higdata = <0x124f80>;
  4190. key_cnt = <0x05>;
  4191. key0_vol = <0x73>;
  4192. key0_val = <0x73>;
  4193. key1_vol = <0xf0>;
  4194. key1_val = <0x72>;
  4195. key2_vol = <0x168>;
  4196. key2_val = <0x8b>;
  4197. key3_vol = <0x1e0>;
  4198. key3_val = <0x1c>;
  4199. key4_vol = <0x258>;
  4200. key4_val = <0x66>;
  4201. linux,phandle = <0x172>;
  4202. phandle = <0x172>;
  4203. };
  4204.  
  4205. keyboard {
  4206. compatible = "allwinner,keyboard_1350mv";
  4207. reg = <0x00 0x5070800 0x00 0x400>;
  4208. clocks = <0xca>;
  4209. interrupts = <0x00 0x14 0x00>;
  4210. status = "okay";
  4211. key_cnt = <0x05>;
  4212. key0 = <0xd2 0x73>;
  4213. key1 = <0x19a 0x72>;
  4214. key2 = <0x24e 0x8b>;
  4215. key3 = <0x2ee 0x1c>;
  4216. key4 = <0x370 0xac>;
  4217. linux,phandle = <0x173>;
  4218. phandle = <0x173>;
  4219. };
  4220.  
  4221. eth@05020000 {
  4222. compatible = "allwinner,sunxi-gmac";
  4223. reg = <0x00 0x5020000 0x00 0x10000 0x00 0x3000030 0x00 0x04>;
  4224. interrupts = <0x00 0x0e 0x04>;
  4225. interrupt-names = "gmacirq";
  4226. clocks = <0xcb 0xcc>;
  4227. clock-names = "gmac\0ephy";
  4228. device_type = "gmac0";
  4229. pinctrl-0 = <0xcd>;
  4230. pinctrl-1 = <0xce>;
  4231. pinctrl-names = "default\0sleep";
  4232. phy-mode;
  4233. tx-delay = <0x07>;
  4234. rx-delay = <0x1f>;
  4235. phy-rst;
  4236. gmac-power0;
  4237. gmac-power1;
  4238. gmac-power2;
  4239. status = "disable";
  4240. linux,phandle = <0x174>;
  4241. phandle = <0x174>;
  4242. };
  4243.  
  4244. eth@05030000 {
  4245. compatible = "allwinner,sunxi-gmac";
  4246. reg = <0x00 0x5030000 0x00 0x10000 0x00 0x3000034 0x00 0x04>;
  4247. interrupts = <0x00 0x0f 0x04>;
  4248. interrupt-names = "gmacirq";
  4249. clocks = <0xcf>;
  4250. clock-names = "gmac";
  4251. device_type = "gmac1";
  4252. pinctrl-0 = <0xd0>;
  4253. pinctrl-1 = <0xd1>;
  4254. pinctrl-names = "default\0sleep";
  4255. phy-mode = "rmii";
  4256. tx-delay = <0x07>;
  4257. rx-delay = <0x1f>;
  4258. phy-rst;
  4259. gmac-power0;
  4260. gmac-power1;
  4261. gmac-power2;
  4262. status = "okay";
  4263. linux,phandle = <0x175>;
  4264. phandle = <0x175>;
  4265. };
  4266.  
  4267. gpio_encrypt {
  4268. compatible = "allwinner,gpio_encrypt";
  4269. gpio_number_sun = <0x05>;
  4270. gpio1_value = <0x00>;
  4271. gpio2_value = <0x00>;
  4272. gpio3_value = <0x00>;
  4273. gpio4_value = <0x00>;
  4274. gpio5_value = <0x00>;
  4275. gpio1_pin = <0x53 0x08 0x01 0x01 0xffffffff 0xffffffff 0x00>;
  4276. gpio2_pin = <0x53 0x08 0x02 0x01 0xffffffff 0xffffffff 0x00>;
  4277. gpio3_pin = <0x53 0x08 0x03 0x01 0xffffffff 0xffffffff 0x00>;
  4278. gpio4_pin = <0x53 0x08 0x04 0x01 0xffffffff 0xffffffff 0x00>;
  4279. gpio5_pin = <0x53 0x08 0x05 0x01 0xffffffff 0xffffffff 0x00>;
  4280. status = "disable";
  4281. linux,phandle = <0x176>;
  4282. phandle = <0x176>;
  4283. };
  4284.  
  4285. fd650 {
  4286. compatible = "oranth,fd650";
  4287. status = "okay";
  4288. fd650_gpio_clk = <0x53 0x08 0x0b 0x01 0xffffffff 0xffffffff 0x00>;
  4289. fd650_gpio_dat = <0x53 0x08 0x0c 0x01 0xffffffff 0xffffffff 0x00>;
  4290. };
  4291.  
  4292. wlan {
  4293. compatible = "allwinner,sunxi-wlan";
  4294. clocks = <0x1b>;
  4295. pinctrl-0 = <0xd2>;
  4296. pinctrl-names = "default";
  4297. wlan_busnum = <0x01>;
  4298. wlan_power;
  4299. wlan_io_regulator;
  4300. wlan_regon = <0x53 0x06 0x12 0x01 0xffffffff 0xffffffff 0x00>;
  4301. wlan_hostwake = <0x53 0x06 0x0f 0x06 0xffffffff 0xffffffff 0x00>;
  4302. chip_en;
  4303. power_en;
  4304. status = "okay";
  4305. linux,phandle = <0x177>;
  4306. phandle = <0x177>;
  4307. };
  4308.  
  4309. bt {
  4310. compatible = "allwinner,sunxi-bt";
  4311. clocks = <0x1b>;
  4312. bt_power;
  4313. bt_io_regulator;
  4314. bt_rst_n = <0x53 0x06 0x13 0x01 0xffffffff 0xffffffff 0x00>;
  4315. status = "okay";
  4316. linux,phandle = <0x178>;
  4317. phandle = <0x178>;
  4318. };
  4319.  
  4320. btlpm {
  4321. compatible = "allwinner,sunxi-btlpm";
  4322. uart_index = <0x01>;
  4323. bt_wake = <0x53 0x06 0x11 0x01 0xffffffff 0xffffffff 0x01>;
  4324. bt_hostwake = <0x53 0x06 0x10 0x06 0xffffffff 0xffffffff 0x00>;
  4325. status = "okay";
  4326. linux,phandle = <0x179>;
  4327. phandle = <0x179>;
  4328. };
  4329.  
  4330. addr_mgt {
  4331. compatible = "allwinner,sunxi-addr_mgt";
  4332. type_addr_wifi = <0x00>;
  4333. type_addr_bt = <0x00>;
  4334. type_addr_eth = <0x00>;
  4335. status = "okay";
  4336. linux,phandle = <0x17a>;
  4337. phandle = <0x17a>;
  4338. };
  4339.  
  4340. gpio_para {
  4341. device_type = "gpio_para";
  4342. status = "okay";
  4343. compatible = "allwinner,sunxi-init-gpio";
  4344. gpio_num = <0x02>;
  4345. gpio_pin_1 = <0x53 0x07 0x06 0x01 0xffffffff 0xffffffff 0x01>;
  4346. gpio_pin_2 = <0x53 0x07 0x07 0x01 0xffffffff 0xffffffff 0x00>;
  4347. normal_led = "gpio_pin_1";
  4348. standby_led = "gpio_pin_2";
  4349. easy_light_used = <0x01>;
  4350. normal_led_light = <0x01>;
  4351. standby_led_light = <0x01>;
  4352. };
  4353.  
  4354. product {
  4355. device_type = "product";
  4356. version = "100";
  4357. machine = "evb";
  4358. };
  4359.  
  4360. platform {
  4361. device_type = "platform";
  4362. eraseflag = <0x01>;
  4363. debug_mode = <0x03>;
  4364. };
  4365.  
  4366. target {
  4367. device_type = "target";
  4368. boot_clock = <0x3f0>;
  4369. storage_type = <0xffffffff>;
  4370. advert_enable = <0x00>;
  4371. burn_key = <0x01>;
  4372. dragonboard_test = <0x00>;
  4373. };
  4374.  
  4375. power_sply {
  4376. device_type = "power_sply";
  4377. dcdc2_vol = <0xf4628>;
  4378. aldo1_vol = <0xf4948>;
  4379. dldo1_vol = <0xf4f24>;
  4380. };
  4381.  
  4382. axp1530_power_sply {
  4383. device_type = "axp1530_power_sply";
  4384. dcdc2_vol = <0xf4628>;
  4385. aldo1_vol = <0xf4948>;
  4386. dldo1_vol = <0xf4f24>;
  4387. };
  4388.  
  4389. axp806_power_sply {
  4390. device_type = "axp806_power_sply";
  4391. aldo1_vol = <0xf4f24>;
  4392. bldo1_vol = <0xf4948>;
  4393. };
  4394.  
  4395. card_boot {
  4396. device_type = "card_boot";
  4397. logical_start = <0xa000>;
  4398. sprite_gpio0 = <0x53 0x07 0x06 0x01 0xffffffff 0xffffffff 0x01>;
  4399. };
  4400.  
  4401. ir_boot_recovery {
  4402. device_type = "ir_boot_recovery";
  4403. status = "okay";
  4404. ir_work_mode = <0x02>;
  4405. ir_press_times = <0x01>;
  4406. ir_detect_time = <0x7d0>;
  4407. ir_key_no_duplicate = <0x00>;
  4408. ir_recovery_key_code0 = <0x45>;
  4409. ir_addr_code0 = <0x4040>;
  4410. ir_recovery_key_code1 = <0x49>;
  4411. ir_addr_code1 = <0x7f80>;
  4412. };
  4413.  
  4414. key_boot_recovery {
  4415. device_type = "key_boot_recovery";
  4416. recovery_key_used = <0x01>;
  4417. press_mode_enable = <0x00>;
  4418. key_work_mode = <0x02>;
  4419. short_press_mode = <0x00>;
  4420. long_press_mode = <0x01>;
  4421. key_press_time = <0x7d0>;
  4422. recovery_key = <0x53 0x07 0x09 0x00 0xffffffff 0xffffffff 0xffffffff>;
  4423. };
  4424.  
  4425. pm_para {
  4426. device_type = "pm_para";
  4427. standby_mode = <0x01>;
  4428. };
  4429.  
  4430. card0_boot_para {
  4431. device_type = "card0_boot_para";
  4432. card_ctrl = <0x00>;
  4433. card_high_speed = <0x01>;
  4434. card_line = <0x04>;
  4435. pinctrl-0 = <0x182>;
  4436. };
  4437.  
  4438. card2_boot_para {
  4439. device_type = "card2_boot_para";
  4440. card_ctrl = <0x02>;
  4441. card_high_speed = <0x01>;
  4442. card_line = <0x08>;
  4443. pinctrl-0 = <0x183 0x184>;
  4444. sdc_ex_dly_used = <0x02>;
  4445. sdc_io_1v8 = <0x01>;
  4446. };
  4447.  
  4448. gpio_bias {
  4449. device_type = "gpio_bias";
  4450. pc_bias = <0x708>;
  4451. };
  4452.  
  4453. twi_para {
  4454. device_type = "twi_para";
  4455. twi_port = <0x00>;
  4456. pinctrl-0 = <0x185>;
  4457. };
  4458.  
  4459. uart_para {
  4460. device_type = "uart_para";
  4461. uart_debug_port = <0x00>;
  4462. pinctrl-0 = <0x186>;
  4463. };
  4464.  
  4465. jtag_para {
  4466. device_type = "jtag_para";
  4467. jtag_enable = <0x01>;
  4468. pinctrl-0 = <0x187>;
  4469. };
  4470.  
  4471. clock {
  4472. device_type = "clock";
  4473. pll4 = <0x12c>;
  4474. pll6 = <0x258>;
  4475. pll8 = <0x168>;
  4476. pll9 = <0x129>;
  4477. pll10 = <0x108>;
  4478. };
  4479.  
  4480. dram_select_para {
  4481. device_type = "dram_select_para";
  4482. select_mode = <0x01>;
  4483. select_gpio0 = <0x53 0x08 0x01 0x00 0x01 0xffffffff 0xffffffff>;
  4484. select_gpio1 = <0x53 0x08 0x09 0x00 0x01 0xffffffff 0xffffffff>;
  4485. select_gpio2 = <0x53 0x08 0x0d 0x00 0x01 0xffffffff 0xffffffff>;
  4486. };
  4487.  
  4488. dram_para1 {
  4489. device_type = "dram_para1";
  4490. dram_clk = <0x288>;
  4491. dram_type = <0x03>;
  4492. dram_dx_odt = <0x3030303>;
  4493. dram_dx_dri = <0xe0e0e0e>;
  4494. dram_ca_dri = <0x1c1c>;
  4495. dram_odt_en = <0x01>;
  4496. dram_para1 = <0x30fb>;
  4497. dram_para2 = <0x00>;
  4498. dram_mr0 = <0x840>;
  4499. dram_mr1 = <0x04>;
  4500. dram_mr2 = <0x08>;
  4501. dram_mr3 = <0x00>;
  4502. dram_mr4 = <0x00>;
  4503. dram_mr5 = <0x00>;
  4504. dram_mr6 = <0x00>;
  4505. dram_mr11 = <0x00>;
  4506. dram_mr12 = <0x00>;
  4507. dram_mr13 = <0x00>;
  4508. dram_mr14 = <0x00>;
  4509. dram_mr16 = <0x00>;
  4510. dram_mr17 = <0x00>;
  4511. dram_mr22 = <0x00>;
  4512. dram_tpr0 = <0xc0001305>;
  4513. dram_tpr1 = <0x00>;
  4514. dram_tpr2 = <0x00>;
  4515. dram_tpr3 = <0x00>;
  4516. dram_tpr6 = <0x33808080>;
  4517. dram_tpr10 = <0x2f0006>;
  4518. dram_tpr11 = <0xffffdddd>;
  4519. dram_tpr12 = <0xfedf7657>;
  4520. dram_tpr13 = <0x40>;
  4521. };
  4522.  
  4523. dram_para2 {
  4524. device_type = "dram_para2";
  4525. dram_clk = <0x2b8>;
  4526. dram_type = <0x03>;
  4527. dram_dx_odt = <0x8080808>;
  4528. dram_dx_dri = <0xe0e0e0e>;
  4529. dram_ca_dri = <0x1c1c>;
  4530. dram_odt_en = <0x01>;
  4531. dram_para1 = <0x310b>;
  4532. dram_para2 = <0x00>;
  4533. dram_mr0 = <0x840>;
  4534. dram_mr1 = <0x04>;
  4535. dram_mr2 = <0x08>;
  4536. dram_mr3 = <0x00>;
  4537. dram_mr4 = <0x00>;
  4538. dram_mr5 = <0x00>;
  4539. dram_mr6 = <0x00>;
  4540. dram_mr11 = <0x00>;
  4541. dram_mr12 = <0x00>;
  4542. dram_mr13 = <0x00>;
  4543. dram_mr14 = <0x00>;
  4544. dram_mr16 = <0x00>;
  4545. dram_mr17 = <0x00>;
  4546. dram_mr22 = <0x00>;
  4547. dram_tpr0 = <0x80000007>;
  4548. dram_tpr1 = <0x00>;
  4549. dram_tpr2 = <0x00>;
  4550. dram_tpr3 = <0x00>;
  4551. dram_tpr6 = <0x33808080>;
  4552. dram_tpr10 = <0x2f44b7>;
  4553. dram_tpr11 = <0xfffedddb>;
  4554. dram_tpr12 = <0xeddca998>;
  4555. dram_tpr13 = <0x40>;
  4556. };
  4557.  
  4558. dram_para3 {
  4559. device_type = "dram_para3";
  4560. dram_clk = <0x2b8>;
  4561. dram_type = <0x03>;
  4562. dram_dx_odt = <0x8080808>;
  4563. dram_dx_dri = <0xe0e0e0e>;
  4564. dram_ca_dri = <0x1c1c>;
  4565. dram_odt_en = <0x01>;
  4566. dram_para1 = <0x310b>;
  4567. dram_para2 = <0x00>;
  4568. dram_mr0 = <0x840>;
  4569. dram_mr1 = <0x04>;
  4570. dram_mr2 = <0x08>;
  4571. dram_mr3 = <0x00>;
  4572. dram_mr4 = <0x00>;
  4573. dram_mr5 = <0x00>;
  4574. dram_mr6 = <0x00>;
  4575. dram_mr11 = <0x00>;
  4576. dram_mr12 = <0x00>;
  4577. dram_mr13 = <0x00>;
  4578. dram_mr14 = <0x00>;
  4579. dram_mr16 = <0x00>;
  4580. dram_mr17 = <0x00>;
  4581. dram_mr22 = <0x00>;
  4582. dram_tpr0 = <0x80000007>;
  4583. dram_tpr1 = <0x00>;
  4584. dram_tpr2 = <0x00>;
  4585. dram_tpr3 = <0x00>;
  4586. dram_tpr6 = <0x33808080>;
  4587. dram_tpr10 = <0x2f44b7>;
  4588. dram_tpr11 = <0xfffedddb>;
  4589. dram_tpr12 = <0xeddca998>;
  4590. dram_tpr13 = <0x40>;
  4591. };
  4592.  
  4593. dram_para4 {
  4594. device_type = "dram_para4";
  4595. dram_clk = <0x2b8>;
  4596. dram_type = <0x03>;
  4597. dram_dx_odt = <0x8080808>;
  4598. dram_dx_dri = <0xe0e0e0e>;
  4599. dram_ca_dri = <0x1c1c>;
  4600. dram_odt_en = <0x01>;
  4601. dram_para1 = <0x310b>;
  4602. dram_para2 = <0x00>;
  4603. dram_mr0 = <0x840>;
  4604. dram_mr1 = <0x04>;
  4605. dram_mr2 = <0x08>;
  4606. dram_mr3 = <0x00>;
  4607. dram_mr4 = <0x00>;
  4608. dram_mr5 = <0x00>;
  4609. dram_mr6 = <0x00>;
  4610. dram_mr11 = <0x00>;
  4611. dram_mr12 = <0x00>;
  4612. dram_mr13 = <0x00>;
  4613. dram_mr14 = <0x00>;
  4614. dram_mr16 = <0x00>;
  4615. dram_mr17 = <0x00>;
  4616. dram_mr22 = <0x00>;
  4617. dram_tpr0 = <0x80000007>;
  4618. dram_tpr1 = <0x00>;
  4619. dram_tpr2 = <0x00>;
  4620. dram_tpr3 = <0x00>;
  4621. dram_tpr6 = <0x33808080>;
  4622. dram_tpr10 = <0x2f44b7>;
  4623. dram_tpr11 = <0xfffedddb>;
  4624. dram_tpr12 = <0xeddca998>;
  4625. dram_tpr13 = <0x40>;
  4626. };
  4627.  
  4628. dram_para5 {
  4629. device_type = "dram_para5";
  4630. dram_clk = <0x2b8>;
  4631. dram_type = <0x03>;
  4632. dram_dx_odt = <0x8080808>;
  4633. dram_dx_dri = <0xe0e0e0e>;
  4634. dram_ca_dri = <0x1c1c>;
  4635. dram_odt_en = <0x01>;
  4636. dram_para1 = <0x310b>;
  4637. dram_para2 = <0x00>;
  4638. dram_mr0 = <0x840>;
  4639. dram_mr1 = <0x04>;
  4640. dram_mr2 = <0x08>;
  4641. dram_mr3 = <0x00>;
  4642. dram_mr4 = <0x00>;
  4643. dram_mr5 = <0x00>;
  4644. dram_mr6 = <0x00>;
  4645. dram_mr11 = <0x00>;
  4646. dram_mr12 = <0x00>;
  4647. dram_mr13 = <0x00>;
  4648. dram_mr14 = <0x00>;
  4649. dram_mr16 = <0x00>;
  4650. dram_mr17 = <0x00>;
  4651. dram_mr22 = <0x00>;
  4652. dram_tpr0 = <0x80000007>;
  4653. dram_tpr1 = <0x00>;
  4654. dram_tpr2 = <0x00>;
  4655. dram_tpr3 = <0x00>;
  4656. dram_tpr6 = <0x33808080>;
  4657. dram_tpr10 = <0x2f44b7>;
  4658. dram_tpr11 = <0xfffedddb>;
  4659. dram_tpr12 = <0xeddca998>;
  4660. dram_tpr13 = <0x40>;
  4661. };
  4662.  
  4663. dram_para6 {
  4664. device_type = "dram_para6";
  4665. dram_clk = <0x2b8>;
  4666. dram_type = <0x03>;
  4667. dram_dx_odt = <0x8080808>;
  4668. dram_dx_dri = <0xe0e0e0e>;
  4669. dram_ca_dri = <0x1c1c>;
  4670. dram_odt_en = <0x01>;
  4671. dram_para1 = <0x310b>;
  4672. dram_para2 = <0x00>;
  4673. dram_mr0 = <0x840>;
  4674. dram_mr1 = <0x04>;
  4675. dram_mr2 = <0x08>;
  4676. dram_mr3 = <0x00>;
  4677. dram_mr4 = <0x00>;
  4678. dram_mr5 = <0x00>;
  4679. dram_mr6 = <0x00>;
  4680. dram_mr11 = <0x00>;
  4681. dram_mr12 = <0x00>;
  4682. dram_mr13 = <0x00>;
  4683. dram_mr14 = <0x00>;
  4684. dram_mr16 = <0x00>;
  4685. dram_mr17 = <0x00>;
  4686. dram_mr22 = <0x00>;
  4687. dram_tpr0 = <0x80000007>;
  4688. dram_tpr1 = <0x00>;
  4689. dram_tpr2 = <0x00>;
  4690. dram_tpr3 = <0x00>;
  4691. dram_tpr6 = <0x33808080>;
  4692. dram_tpr10 = <0x2f44b7>;
  4693. dram_tpr11 = <0xfffedddb>;
  4694. dram_tpr12 = <0xeddca998>;
  4695. dram_tpr13 = <0x40>;
  4696. };
  4697.  
  4698. dram_para7 {
  4699. device_type = "dram_para7";
  4700. dram_clk = <0x288>;
  4701. dram_type = <0x03>;
  4702. dram_dx_odt = <0x3030303>;
  4703. dram_dx_dri = <0xe0e0e0e>;
  4704. dram_ca_dri = <0x1c1c>;
  4705. dram_odt_en = <0x01>;
  4706. dram_para1 = <0x30fb>;
  4707. dram_para2 = <0x00>;
  4708. dram_mr0 = <0x840>;
  4709. dram_mr1 = <0x04>;
  4710. dram_mr2 = <0x08>;
  4711. dram_mr3 = <0x00>;
  4712. dram_mr4 = <0x00>;
  4713. dram_mr5 = <0x00>;
  4714. dram_mr6 = <0x00>;
  4715. dram_mr11 = <0x00>;
  4716. dram_mr12 = <0x00>;
  4717. dram_mr13 = <0x00>;
  4718. dram_mr14 = <0x00>;
  4719. dram_mr16 = <0x00>;
  4720. dram_mr17 = <0x00>;
  4721. dram_mr22 = <0x00>;
  4722. dram_tpr0 = <0xc0001005>;
  4723. dram_tpr1 = <0x00>;
  4724. dram_tpr2 = <0x00>;
  4725. dram_tpr3 = <0x00>;
  4726. dram_tpr6 = <0x33808080>;
  4727. dram_tpr10 = <0x2f0007>;
  4728. dram_tpr11 = <0xffffdddd>;
  4729. dram_tpr12 = <0xfedf7557>;
  4730. dram_tpr13 = <0x40>;
  4731. };
  4732.  
  4733. dram_para8 {
  4734. device_type = "dram_para8";
  4735. dram_clk = <0x2b8>;
  4736. dram_type = <0x03>;
  4737. dram_dx_odt = <0x8080808>;
  4738. dram_dx_dri = <0xe0e0e0e>;
  4739. dram_ca_dri = <0x1c1c>;
  4740. dram_odt_en = <0x01>;
  4741. dram_para1 = <0x310b>;
  4742. dram_para2 = <0x00>;
  4743. dram_mr0 = <0x840>;
  4744. dram_mr1 = <0x04>;
  4745. dram_mr2 = <0x08>;
  4746. dram_mr3 = <0x00>;
  4747. dram_mr4 = <0x00>;
  4748. dram_mr5 = <0x00>;
  4749. dram_mr6 = <0x00>;
  4750. dram_mr11 = <0x00>;
  4751. dram_mr12 = <0x00>;
  4752. dram_mr13 = <0x00>;
  4753. dram_mr14 = <0x00>;
  4754. dram_mr16 = <0x00>;
  4755. dram_mr17 = <0x00>;
  4756. dram_mr22 = <0x00>;
  4757. dram_tpr0 = <0x80000007>;
  4758. dram_tpr1 = <0x00>;
  4759. dram_tpr2 = <0x00>;
  4760. dram_tpr3 = <0x00>;
  4761. dram_tpr6 = <0x33808080>;
  4762. dram_tpr10 = <0x2f44b7>;
  4763. dram_tpr11 = <0xfffedddb>;
  4764. dram_tpr12 = <0xeddca998>;
  4765. dram_tpr13 = <0x40>;
  4766. };
  4767.  
  4768. dram_para9 {
  4769. device_type = "dram_para9";
  4770. dram_clk = <0x2b8>;
  4771. dram_type = <0x03>;
  4772. dram_dx_odt = <0x8080808>;
  4773. dram_dx_dri = <0xe0e0e0e>;
  4774. dram_ca_dri = <0x1c1c>;
  4775. dram_odt_en = <0x01>;
  4776. dram_para1 = <0x310b>;
  4777. dram_para2 = <0x00>;
  4778. dram_mr0 = <0x840>;
  4779. dram_mr1 = <0x04>;
  4780. dram_mr2 = <0x08>;
  4781. dram_mr3 = <0x00>;
  4782. dram_mr4 = <0x00>;
  4783. dram_mr5 = <0x00>;
  4784. dram_mr6 = <0x00>;
  4785. dram_mr11 = <0x00>;
  4786. dram_mr12 = <0x00>;
  4787. dram_mr13 = <0x00>;
  4788. dram_mr14 = <0x00>;
  4789. dram_mr16 = <0x00>;
  4790. dram_mr17 = <0x00>;
  4791. dram_mr22 = <0x00>;
  4792. dram_tpr0 = <0x80000007>;
  4793. dram_tpr1 = <0x00>;
  4794. dram_tpr2 = <0x00>;
  4795. dram_tpr3 = <0x00>;
  4796. dram_tpr6 = <0x33808080>;
  4797. dram_tpr10 = <0x2f44b7>;
  4798. dram_tpr11 = <0xfffedddb>;
  4799. dram_tpr12 = <0xeddca998>;
  4800. dram_tpr13 = <0x40>;
  4801. };
  4802.  
  4803. dram_para10 {
  4804. device_type = "dram_para10";
  4805. dram_clk = <0x2b8>;
  4806. dram_type = <0x03>;
  4807. dram_dx_odt = <0x8080808>;
  4808. dram_dx_dri = <0xe0e0e0e>;
  4809. dram_ca_dri = <0x1c1c>;
  4810. dram_odt_en = <0x01>;
  4811. dram_para1 = <0x310b>;
  4812. dram_para2 = <0x00>;
  4813. dram_mr0 = <0x840>;
  4814. dram_mr1 = <0x04>;
  4815. dram_mr2 = <0x08>;
  4816. dram_mr3 = <0x00>;
  4817. dram_mr4 = <0x00>;
  4818. dram_mr5 = <0x00>;
  4819. dram_mr6 = <0x00>;
  4820. dram_mr11 = <0x00>;
  4821. dram_mr12 = <0x00>;
  4822. dram_mr13 = <0x00>;
  4823. dram_mr14 = <0x00>;
  4824. dram_mr16 = <0x00>;
  4825. dram_mr17 = <0x00>;
  4826. dram_mr22 = <0x00>;
  4827. dram_tpr0 = <0x80000007>;
  4828. dram_tpr1 = <0x00>;
  4829. dram_tpr2 = <0x00>;
  4830. dram_tpr3 = <0x00>;
  4831. dram_tpr6 = <0x33808080>;
  4832. dram_tpr10 = <0x2f44b7>;
  4833. dram_tpr11 = <0xfffedddb>;
  4834. dram_tpr12 = <0xeddca998>;
  4835. dram_tpr13 = <0x40>;
  4836. };
  4837.  
  4838. dram_para11 {
  4839. device_type = "dram_para11";
  4840. dram_clk = <0x2b8>;
  4841. dram_type = <0x03>;
  4842. dram_dx_odt = <0x8080808>;
  4843. dram_dx_dri = <0xe0e0e0e>;
  4844. dram_ca_dri = <0x1c1c>;
  4845. dram_odt_en = <0x01>;
  4846. dram_para1 = <0x310b>;
  4847. dram_para2 = <0x00>;
  4848. dram_mr0 = <0x840>;
  4849. dram_mr1 = <0x04>;
  4850. dram_mr2 = <0x08>;
  4851. dram_mr3 = <0x00>;
  4852. dram_mr4 = <0x00>;
  4853. dram_mr5 = <0x00>;
  4854. dram_mr6 = <0x00>;
  4855. dram_mr11 = <0x00>;
  4856. dram_mr12 = <0x00>;
  4857. dram_mr13 = <0x00>;
  4858. dram_mr14 = <0x00>;
  4859. dram_mr16 = <0x00>;
  4860. dram_mr17 = <0x00>;
  4861. dram_mr22 = <0x00>;
  4862. dram_tpr0 = <0x80000007>;
  4863. dram_tpr1 = <0x00>;
  4864. dram_tpr2 = <0x00>;
  4865. dram_tpr3 = <0x00>;
  4866. dram_tpr6 = <0x33808080>;
  4867. dram_tpr10 = <0x2f44b7>;
  4868. dram_tpr11 = <0xfffedddb>;
  4869. dram_tpr12 = <0xeddca998>;
  4870. dram_tpr13 = <0x40>;
  4871. };
  4872.  
  4873. dram_para12 {
  4874. device_type = "dram_para12";
  4875. dram_clk = <0x2b8>;
  4876. dram_type = <0x03>;
  4877. dram_dx_odt = <0x8080808>;
  4878. dram_dx_dri = <0xe0e0e0e>;
  4879. dram_ca_dri = <0x1c1c>;
  4880. dram_odt_en = <0x01>;
  4881. dram_para1 = <0x310b>;
  4882. dram_para2 = <0x00>;
  4883. dram_mr0 = <0x840>;
  4884. dram_mr1 = <0x04>;
  4885. dram_mr2 = <0x08>;
  4886. dram_mr3 = <0x00>;
  4887. dram_mr4 = <0x00>;
  4888. dram_mr5 = <0x00>;
  4889. dram_mr6 = <0x00>;
  4890. dram_mr11 = <0x00>;
  4891. dram_mr12 = <0x00>;
  4892. dram_mr13 = <0x00>;
  4893. dram_mr14 = <0x00>;
  4894. dram_mr16 = <0x00>;
  4895. dram_mr17 = <0x00>;
  4896. dram_mr22 = <0x00>;
  4897. dram_tpr0 = <0x80000007>;
  4898. dram_tpr1 = <0x00>;
  4899. dram_tpr2 = <0x00>;
  4900. dram_tpr3 = <0x00>;
  4901. dram_tpr6 = <0x33808080>;
  4902. dram_tpr10 = <0x2f44b7>;
  4903. dram_tpr11 = <0xfffedddb>;
  4904. dram_tpr12 = <0xeddca998>;
  4905. dram_tpr13 = <0x40>;
  4906. };
  4907.  
  4908. dram_para13 {
  4909. device_type = "dram_para13";
  4910. dram_clk = <0x2b8>;
  4911. dram_type = <0x03>;
  4912. dram_dx_odt = <0x8080808>;
  4913. dram_dx_dri = <0xe0e0e0e>;
  4914. dram_ca_dri = <0x1c1c>;
  4915. dram_odt_en = <0x01>;
  4916. dram_para1 = <0x310b>;
  4917. dram_para2 = <0x00>;
  4918. dram_mr0 = <0x840>;
  4919. dram_mr1 = <0x04>;
  4920. dram_mr2 = <0x08>;
  4921. dram_mr3 = <0x00>;
  4922. dram_mr4 = <0x00>;
  4923. dram_mr5 = <0x00>;
  4924. dram_mr6 = <0x00>;
  4925. dram_mr11 = <0x00>;
  4926. dram_mr12 = <0x00>;
  4927. dram_mr13 = <0x00>;
  4928. dram_mr14 = <0x00>;
  4929. dram_mr16 = <0x00>;
  4930. dram_mr17 = <0x00>;
  4931. dram_mr22 = <0x00>;
  4932. dram_tpr0 = <0x80000007>;
  4933. dram_tpr1 = <0x00>;
  4934. dram_tpr2 = <0x00>;
  4935. dram_tpr3 = <0x00>;
  4936. dram_tpr6 = <0x33808080>;
  4937. dram_tpr10 = <0x2f44b7>;
  4938. dram_tpr11 = <0xfffedddb>;
  4939. dram_tpr12 = <0xeddca998>;
  4940. dram_tpr13 = <0x40>;
  4941. };
  4942.  
  4943. dram_para14 {
  4944. device_type = "dram_para14";
  4945. dram_clk = <0x2b8>;
  4946. dram_type = <0x03>;
  4947. dram_dx_odt = <0x8080808>;
  4948. dram_dx_dri = <0xe0e0e0e>;
  4949. dram_ca_dri = <0x1c1c>;
  4950. dram_odt_en = <0x01>;
  4951. dram_para1 = <0x310b>;
  4952. dram_para2 = <0x00>;
  4953. dram_mr0 = <0x840>;
  4954. dram_mr1 = <0x04>;
  4955. dram_mr2 = <0x08>;
  4956. dram_mr3 = <0x00>;
  4957. dram_mr4 = <0x00>;
  4958. dram_mr5 = <0x00>;
  4959. dram_mr6 = <0x00>;
  4960. dram_mr11 = <0x00>;
  4961. dram_mr12 = <0x00>;
  4962. dram_mr13 = <0x00>;
  4963. dram_mr14 = <0x00>;
  4964. dram_mr16 = <0x00>;
  4965. dram_mr17 = <0x00>;
  4966. dram_mr22 = <0x00>;
  4967. dram_tpr0 = <0x80000007>;
  4968. dram_tpr1 = <0x00>;
  4969. dram_tpr2 = <0x00>;
  4970. dram_tpr3 = <0x00>;
  4971. dram_tpr6 = <0x33808080>;
  4972. dram_tpr10 = <0x2f44b7>;
  4973. dram_tpr11 = <0xfffedddb>;
  4974. dram_tpr12 = <0xeddca998>;
  4975. dram_tpr13 = <0x40>;
  4976. };
  4977.  
  4978. dram_para15 {
  4979. device_type = "dram_para15";
  4980. dram_clk = <0x2b8>;
  4981. dram_type = <0x03>;
  4982. dram_dx_odt = <0x8080808>;
  4983. dram_dx_dri = <0xe0e0e0e>;
  4984. dram_ca_dri = <0x1c1c>;
  4985. dram_odt_en = <0x01>;
  4986. dram_para1 = <0x310b>;
  4987. dram_para2 = <0x00>;
  4988. dram_mr0 = <0x840>;
  4989. dram_mr1 = <0x04>;
  4990. dram_mr2 = <0x08>;
  4991. dram_mr3 = <0x00>;
  4992. dram_mr4 = <0x00>;
  4993. dram_mr5 = <0x00>;
  4994. dram_mr6 = <0x00>;
  4995. dram_mr11 = <0x00>;
  4996. dram_mr12 = <0x00>;
  4997. dram_mr13 = <0x00>;
  4998. dram_mr14 = <0x00>;
  4999. dram_mr16 = <0x00>;
  5000. dram_mr17 = <0x00>;
  5001. dram_mr22 = <0x00>;
  5002. dram_tpr0 = <0x80000007>;
  5003. dram_tpr1 = <0x00>;
  5004. dram_tpr2 = <0x00>;
  5005. dram_tpr3 = <0x00>;
  5006. dram_tpr6 = <0x33808080>;
  5007. dram_tpr10 = <0x2f44b7>;
  5008. dram_tpr11 = <0xfffedddb>;
  5009. dram_tpr12 = <0xeddca998>;
  5010. dram_tpr13 = <0x40>;
  5011. };
  5012.  
  5013. secure {
  5014. device_type = "secure";
  5015. dram_region_mbytes = <0x50>;
  5016. drm_region_mbytes = <0x00>;
  5017. drm_region_start_mbytes = <0x00>;
  5018. };
  5019. };
  5020.  
  5021. aliases {
  5022. serial0 = "/soc@03000000/uart@05000000\0/soc@03000000/uart@05000000";
  5023. serial1 = "/soc@03000000/uart@05000400\0/soc@03000000/uart@05000400";
  5024. serial2 = "/soc@03000000/uart@05000800\0/soc@03000000/uart@05000800";
  5025. serial3 = "/soc@03000000/uart@05000c00\0/soc@03000000/uart@05000c00";
  5026. serial4 = "/soc@03000000/uart@05001000\0/soc@03000000/uart@05001000";
  5027. serial5 = "/soc@03000000/uart@05001400\0/soc@03000000/uart@05001400";
  5028. twi0 = "/soc@03000000/twi@0x05002000\0/soc@03000000/twi@0x05002000";
  5029. twi1 = "/soc@03000000/twi@0x05002400\0/soc@03000000/twi@0x05002400";
  5030. twi2 = "/soc@03000000/twi@0x05002800\0/soc@03000000/twi@0x05002800";
  5031. twi3 = "/soc@03000000/twi@0x05002c00\0/soc@03000000/twi@0x05002c00";
  5032. twi4 = "/soc@03000000/twi@0x05003000\0/soc@03000000/twi@0x05003000";
  5033. twi5 = "/soc@03000000/twi@0x07081400\0/soc@03000000/twi@0x07081400";
  5034. spi0 = "/soc@03000000/spi@05010000\0/soc@03000000/spi@05010000";
  5035. spi1 = "/soc@03000000/spi@05011000\0/soc@03000000/spi@05011000";
  5036. ir0 = "/soc@03000000/s_cir@07040000\0/soc@03000000/s_cir@07040000";
  5037. pcie = "/soc@03000000/pcie@0x05400000\0/soc@03000000/pcie@0x05400000";
  5038. scr0 = "/soc@03000000/smartcard@0x05005000\0/soc@03000000/smartcard@0x05005000";
  5039. gmac0 = "/soc@03000000/eth@05020000\0/soc@03000000/eth@05020000";
  5040. gmac1 = "/soc@03000000/eth@05030000\0/soc@03000000/eth@05030000";
  5041. global_timer0 = "/soc@03000000/timer@03009000\0/soc@03000000/timer@03009000";
  5042. mmc0 = "/soc@03000000/sdmmc@04020000\0/soc@03000000/sdmmc@04020000";
  5043. mmc2 = "/soc@03000000/sdmmc@04022000\0/soc@03000000/sdmmc@04022000";
  5044. nand0 = "/soc@03000000/nand0@04011000\0/soc@03000000/nand0@04011000";
  5045. disp = "/soc@03000000/disp@01000000\0/soc@03000000/disp@01000000";
  5046. lcd0 = "/soc@03000000/lcd0@01c0c000\0/soc@03000000/lcd0@01c0c000";
  5047. lcd1 = "/soc@03000000/lcd1@01c0c001\0/soc@03000000/lcd1@01c0c001";
  5048. hdmi = "/soc@03000000/hdmi@06000000\0/soc@03000000/hdmi@06000000";
  5049. pwm = "/soc@03000000/pwm@0300a000\0/soc@03000000/pwm@0300a000";
  5050. tv0 = "/soc@03000000/tv0@01c94000\0/soc@03000000/tv0@01c94000";
  5051. ac200 = "/soc@03000000/ac200\0/soc@03000000/ac200";
  5052. boot_disp = "/soc@03000000/boot_disp\0/soc@03000000/boot_disp";
  5053. pmu0 = "/soc@03000000/twi@0x07081400/pmu\0/soc@03000000/twi@0x07081400/pmu";
  5054. standby_param = "/soc@03000000/twi@0x07081400/pmu/standby_param\0/soc@03000000/twi@0x07081400/pmu/standby_param";
  5055. linux,phandle = <0x17b>;
  5056. phandle = <0x17b>;
  5057. };
  5058.  
  5059. chosen {
  5060. bootargs = "earlyprintk=sunxi-uart,0x05000000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init";
  5061. linux,initrd-start = <0x00 0x00>;
  5062. linux,initrd-end = <0x00 0x00>;
  5063. };
  5064.  
  5065. firmware {
  5066.  
  5067. android {
  5068. compatible = "android,firmware";
  5069. boot_devices = "soc/sdc0,soc/sdc2,soc";
  5070.  
  5071. vbmeta {
  5072. compatible = "android,vbmeta";
  5073. parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,super,recovery";
  5074. };
  5075. };
  5076.  
  5077. optee {
  5078. compatible = "linaro,optee-tz";
  5079. method = "smc";
  5080. };
  5081. };
  5082.  
  5083. cpus {
  5084. #address-cells = <0x02>;
  5085. #size-cells = <0x00>;
  5086.  
  5087. cpu@0 {
  5088. device_type = "cpu";
  5089. compatible = "arm,cortex-a53\0arm,armv8";
  5090. reg = <0x00 0x00>;
  5091. enable-method = "psci";
  5092. clocks = <0xd3>;
  5093. operating-points-v2 = <0xd4>;
  5094. cpu-idle-states = <0xd5>;
  5095. dynamic-power-coefficient = <0x64>;
  5096. #cooling-cells = <0x02>;
  5097. cpu-supply = <0xd6>;
  5098. linux,phandle = <0xc7>;
  5099. phandle = <0xc7>;
  5100. };
  5101.  
  5102. cpu@1 {
  5103. device_type = "cpu";
  5104. compatible = "arm,cortex-a53\0arm,armv8";
  5105. reg = <0x00 0x01>;
  5106. enable-method = "psci";
  5107. clocks = <0xd3>;
  5108. operating-points-v2 = <0xd4>;
  5109. cpu-idle-states = <0xd5>;
  5110. #cooling-cells = <0x02>;
  5111. };
  5112.  
  5113. cpu@2 {
  5114. device_type = "cpu";
  5115. compatible = "arm,cortex-a53\0arm,armv8";
  5116. reg = <0x00 0x02>;
  5117. enable-method = "psci";
  5118. clocks = <0xd3>;
  5119. operating-points-v2 = <0xd4>;
  5120. cpu-idle-states = <0xd5>;
  5121. #cooling-cells = <0x02>;
  5122. };
  5123.  
  5124. cpu@3 {
  5125. device_type = "cpu";
  5126. compatible = "arm,cortex-a53\0arm,armv8";
  5127. reg = <0x00 0x03>;
  5128. enable-method = "psci";
  5129. clocks = <0xd3>;
  5130. operating-points-v2 = <0xd4>;
  5131. cpu-idle-states = <0xd5>;
  5132. #cooling-cells = <0x02>;
  5133. };
  5134.  
  5135. idle-states {
  5136. entry-method = "arm,psci";
  5137.  
  5138. cpu-sleep-0 {
  5139. compatible = "arm,idle-state";
  5140. arm,psci-suspend-param = <0x10000>;
  5141. entry-latency-us = <0x2e>;
  5142. exit-latency-us = <0x3b>;
  5143. min-residency-us = <0xdf2>;
  5144. local-timer-stop;
  5145. linux,phandle = <0xd5>;
  5146. phandle = <0xd5>;
  5147. };
  5148. };
  5149. };
  5150.  
  5151. opp_l_table {
  5152. compatible = "allwinner,sun50i-operating-points";
  5153. nvmem-cells = <0xd7>;
  5154. nvmem-cell-names = "speed";
  5155. opp-shared;
  5156. linux,phandle = <0xd4>;
  5157. phandle = <0xd4>;
  5158.  
  5159. opp@480000000-0 {
  5160. opp-hz = <0x00 0x1c9c3800>;
  5161. opp-microvolt = <0xc8320>;
  5162. clock-latency-ns = <0x3b9b0>;
  5163. opp-supported-hw = <0x03>;
  5164. };
  5165.  
  5166. opp@480000000-1 {
  5167. opp-hz = <0x00 0x1c9c3800>;
  5168. opp-microvolt = <0xd6d80>;
  5169. clock-latency-ns = <0x3b9b0>;
  5170. opp-supported-hw = <0x04>;
  5171. };
  5172.  
  5173. opp@600000000-0 {
  5174. opp-hz = <0x00 0x23c34600>;
  5175. opp-microvolt = <0xc8320>;
  5176. clock-latency-ns = <0x3b9b0>;
  5177. opp-supported-hw = <0x03>;
  5178. };
  5179.  
  5180. opp@600000000-1 {
  5181. opp-hz = <0x00 0x23c34600>;
  5182. opp-microvolt = <0xd6d80>;
  5183. clock-latency-ns = <0x3b9b0>;
  5184. opp-supported-hw = <0x04>;
  5185. };
  5186.  
  5187. opp@792000000-0 {
  5188. opp-hz = <0x00 0x2f34f600>;
  5189. opp-microvolt = <0xd1f60>;
  5190. clock-latency-ns = <0x3b9b0>;
  5191. opp-supported-hw = <0x03>;
  5192. };
  5193.  
  5194. opp@792000000-1 {
  5195. opp-hz = <0x00 0x2f34f600>;
  5196. opp-microvolt = <0xe57e0>;
  5197. clock-latency-ns = <0x3b9b0>;
  5198. opp-supported-hw = <0x04>;
  5199. };
  5200.  
  5201. opp@1008000000-0 {
  5202. opp-hz = <0x00 0x3c14dc00>;
  5203. opp-microvolt = <0xdbba0>;
  5204. clock-latency-ns = <0x3b9b0>;
  5205. opp-supported-hw = <0x03>;
  5206. };
  5207.  
  5208. opp@1008000000-1 {
  5209. opp-hz = <0x00 0x3c14dc00>;
  5210. opp-microvolt = <0xf9060>;
  5211. clock-latency-ns = <0x3b9b0>;
  5212. opp-supported-hw = <0x04>;
  5213. };
  5214.  
  5215. opp@1200000000-0 {
  5216. opp-hz = <0x00 0x47868c00>;
  5217. opp-microvolt = <0xea600>;
  5218. clock-latency-ns = <0x3b9b0>;
  5219. opp-supported-hw = <0x03>;
  5220. };
  5221.  
  5222. opp@1200000000-1 {
  5223. opp-hz = <0x00 0x47868c00>;
  5224. opp-microvolt = <0x10c8e0>;
  5225. clock-latency-ns = <0x3b9b0>;
  5226. opp-supported-hw = <0x04>;
  5227. };
  5228.  
  5229. opp@1296000000 {
  5230. opp-hz = <0x00 0x4d3f6400>;
  5231. opp-microvolt = <0x10c8e0>;
  5232. clock-latency-ns = <0x3b9b0>;
  5233. opp-supported-hw = <0x02>;
  5234. };
  5235.  
  5236. opp@1344000000 {
  5237. opp-hz = <0x00 0x501bd000>;
  5238. opp-microvolt = <0x111700>;
  5239. clock-latency-ns = <0x3b9b0>;
  5240. opp-supported-hw = <0x04>;
  5241. };
  5242.  
  5243. opp@1512000000 {
  5244. opp-hz = <0x00 0x5a1f4a00>;
  5245. opp-microvolt = <0x10c8e0>;
  5246. clock-latency-ns = <0x3b9b0>;
  5247. opp-supported-hw = <0x01>;
  5248. };
  5249. };
  5250.  
  5251. psci {
  5252. compatible = "arm,psci-1.0";
  5253. method = "smc";
  5254. };
  5255.  
  5256. n_brom {
  5257. compatible = "allwinner,n-brom";
  5258. reg = <0x00 0x00 0x00 0xa000>;
  5259. };
  5260.  
  5261. s_brom {
  5262. compatible = "allwinner,s-brom";
  5263. reg = <0x00 0x00 0x00 0x10000>;
  5264. };
  5265.  
  5266. sram_ctrl {
  5267. device_type = "sram_ctrl";
  5268. compatible = "allwinner,sram_ctrl";
  5269. reg = <0x00 0x3000000 0x00 0x100>;
  5270. };
  5271.  
  5272. sram_a1 {
  5273. compatible = "allwinner,sram_a1";
  5274. reg = <0x00 0x20000 0x00 0x8000>;
  5275. };
  5276.  
  5277. sram_a2 {
  5278. compatible = "allwinner,sram_a2";
  5279. reg = <0x00 0x100000 0x00 0x14000>;
  5280. };
  5281.  
  5282. prcm {
  5283. compatible = "allwinner,prcm";
  5284. reg = <0x00 0x1f01400 0x00 0x400>;
  5285. };
  5286.  
  5287. s_cpuscfg {
  5288. compatible = "allwinner,s_cpuscfg";
  5289. reg = <0x00 0x1f01c00 0x00 0x400>;
  5290. };
  5291.  
  5292. ion {
  5293. compatible = "allwinner,sunxi-ion";
  5294.  
  5295. heap_sys_user@0 {
  5296. compatible = "allwinner,sys_user";
  5297. heap-name = "sys_user";
  5298. heap-id = <0x00>;
  5299. heap-base = <0x00>;
  5300. heap-size = <0x00>;
  5301. heap-type = "ion_system";
  5302. };
  5303.  
  5304. heap_cma@0 {
  5305. compatible = "allwinner,cma";
  5306. heap-name = "cma";
  5307. heap-id = <0x04>;
  5308. heap-base = <0x00>;
  5309. heap-size = <0x00>;
  5310. heap-type = "ion_cma";
  5311. };
  5312.  
  5313. heap_secure@0 {
  5314. compatible = "allwinner,secure";
  5315. heap-name = "secure";
  5316. heap-id = <0x06>;
  5317. heap-base = <0x00>;
  5318. heap-size = <0x00>;
  5319. heap-type = "ion_secure";
  5320. };
  5321. };
  5322.  
  5323. dram {
  5324. compatible = "allwinner,dram";
  5325. clocks = <0xd8>;
  5326. clock-names = "pll_ddr";
  5327. dram_clk = <0x288>;
  5328. dram_type = <0x03>;
  5329. dram_zq = <0x3f3fdd>;
  5330. dram_odt_en = <0x01>;
  5331. dram_para1 = <0x30fb>;
  5332. dram_para2 = <0x00>;
  5333. dram_mr0 = <0x840>;
  5334. dram_mr1 = <0x04>;
  5335. dram_mr2 = <0x08>;
  5336. dram_mr3 = <0x00>;
  5337. dram_tpr0 = <0xc0001005>;
  5338. dram_tpr1 = <0x00>;
  5339. dram_tpr2 = <0x00>;
  5340. dram_tpr3 = <0x00>;
  5341. dram_tpr4 = <0x00>;
  5342. dram_tpr5 = <0x00>;
  5343. dram_tpr6 = <0x33808080>;
  5344. dram_tpr7 = <0x00>;
  5345. dram_tpr8 = <0x00>;
  5346. dram_tpr9 = <0x00>;
  5347. dram_tpr10 = <0x2f0007>;
  5348. dram_tpr11 = <0xffffdddd>;
  5349. dram_tpr12 = <0xfedf7557>;
  5350. dram_tpr13 = <0x40>;
  5351. linux,phandle = <0x17c>;
  5352. phandle = <0x17c>;
  5353. device_type = "dram";
  5354. dram_dx_odt = <0x3030303>;
  5355. dram_dx_dri = <0xe0e0e0e>;
  5356. dram_ca_dri = <0x1c1c>;
  5357. dram_mr4 = <0x00>;
  5358. dram_mr5 = <0x00>;
  5359. dram_mr6 = <0x00>;
  5360. dram_mr11 = <0x00>;
  5361. dram_mr12 = <0x00>;
  5362. dram_mr13 = <0x00>;
  5363. dram_mr14 = <0x00>;
  5364. dram_mr16 = <0x00>;
  5365. dram_mr17 = <0x00>;
  5366. dram_mr22 = <0x00>;
  5367. };
  5368.  
  5369. memory@40000000 {
  5370. device_type = "memory";
  5371. reg = <0x00 0x40000000 0x00 0x20000000>;
  5372. };
  5373.  
  5374. interrupt-controller@03020000 {
  5375. compatible = "arm,cortex-a15-gic\0arm,cortex-a9-gic";
  5376. #interrupt-cells = <0x03>;
  5377. #address-cells = <0x00>;
  5378. device_type = "gic";
  5379. interrupt-controller;
  5380. reg = <0x00 0x3021000 0x00 0x1000 0x00 0x3022000 0x00 0x2000 0x00 0x3024000 0x00 0x2000 0x00 0x3026000 0x00 0x2000>;
  5381. interrupts = <0x01 0x09 0xf04>;
  5382. interrupt-parent = <0x85>;
  5383. linux,phandle = <0x85>;
  5384. phandle = <0x85>;
  5385. };
  5386.  
  5387. interrupt-controller@0 {
  5388. compatible = "allwinner,sunxi-wakeupgen";
  5389. interrupt-controller;
  5390. #interrupt-cells = <0x03>;
  5391. interrupt-parent = <0x85>;
  5392. linux,phandle = <0x01>;
  5393. phandle = <0x01>;
  5394. };
  5395.  
  5396. intc-nmi@07010320 {
  5397. compatible = "allwinner,sun8i-nmi";
  5398. interrupt-parent = <0x85>;
  5399. #interrupt-cells = <0x02>;
  5400. #address-cells = <0x00>;
  5401. interrupt-controller;
  5402. reg = <0x00 0x7010320 0x00 0x0c>;
  5403. pad-control-v1 = <0x7000208>;
  5404. interrupts = <0x00 0x67 0x04>;
  5405. linux,phandle = <0x17d>;
  5406. phandle = <0x17d>;
  5407. };
  5408.  
  5409. sunxi-sid@03006000 {
  5410. compatible = "allwinner,sunxi-sid";
  5411. device_type = "sid";
  5412. reg = <0x00 0x3006000 0x00 0x1000>;
  5413. linux,phandle = <0x17e>;
  5414. phandle = <0x17e>;
  5415. };
  5416.  
  5417. sunxi-sid-ng@03006000 {
  5418. compatible = "allwinner,sun50iw9p1-sid";
  5419. reg = <0x00 0x3006000 0x00 0x1000>;
  5420. #address-cells = <0x01>;
  5421. #size-cells = <0x01>;
  5422.  
  5423. speed@00 {
  5424. reg = <0x00 0x02>;
  5425. linux,phandle = <0xd7>;
  5426. phandle = <0xd7>;
  5427. };
  5428.  
  5429. calib@14 {
  5430. reg = <0x14 0x08>;
  5431. linux,phandle = <0xc4>;
  5432. phandle = <0xc4>;
  5433. };
  5434. };
  5435.  
  5436. sunxi-chipid@03006200 {
  5437. compatible = "allwinner,sunxi-chipid";
  5438. device_type = "chipid";
  5439. reg = <0x00 0x3006200 0x00 0x200>;
  5440. linux,phandle = <0x17f>;
  5441. phandle = <0x17f>;
  5442. };
  5443.  
  5444. timer_arch {
  5445. compatible = "arm,armv8-timer";
  5446. interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
  5447. clock-frequency = <0x16e3600>;
  5448. interrupt-parent = <0x85>;
  5449. arm,no-tick-in-suspend;
  5450. };
  5451.  
  5452. pmu {
  5453. compatible = "arm,armv8-pmuv3";
  5454. interrupts = <0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04>;
  5455. };
  5456.  
  5457. dramfreq {
  5458. compatible = "allwinner,sunxi-dramfreq";
  5459. reg = <0x00 0x4002000 0x00 0x1000 0x00 0x4003000 0x00 0x3000 0x00 0x3001000 0x00 0x1000>;
  5460. interrupts = <0x00 0x21 0x04>;
  5461. clocks = <0xd8>;
  5462. status = "okay";
  5463. };
  5464.  
  5465. uboot {
  5466. linux,phandle = <0x180>;
  5467. phandle = <0x180>;
  5468. };
  5469.  
  5470. iommu@030f0000 {
  5471. compatible = "allwinner,sunxi-iommu";
  5472. reg = <0x00 0x30f0000 0x00 0x1000>;
  5473. interrupts = <0x00 0x3d 0x04>;
  5474. interrupt-names = "iommu-irq";
  5475. clocks = <0xd9>;
  5476. clock-names = "iommu";
  5477. #iommu-cells = <0x02>;
  5478. status = "okay";
  5479. linux,phandle = <0x28>;
  5480. phandle = <0x28>;
  5481. };
  5482.  
  5483. gpu@0x01800000 {
  5484. device_type = "gpu";
  5485. compatible = "arm,mali-midgard";
  5486. reg = <0x00 0x1800000 0x00 0x10000>;
  5487. interrupts = <0x00 0x5f 0x04 0x00 0x60 0x04 0x00 0x61 0x04>;
  5488. interrupt-names = "JOB\0MMU\0GPU";
  5489. clocks = <0xda 0xdb 0xdc>;
  5490. clock-names = "clk_parent\0clk_mali\0clk_bak";
  5491. #cooling-cells = <0x02>;
  5492. gpu_idle = <0x01>;
  5493. dvfs_status = <0x00>;
  5494. operating-points = <0x927c0 0xe7ef0 0x8ca00 0xe7ef0 0x83d60 0xe7ef0 0x7b0c0 0xe7ef0>;
  5495. linux,phandle = <0xc8>;
  5496. phandle = <0xc8>;
  5497.  
  5498. ipa_dvfs {
  5499. compatible = "arm,mali-simple-power-model";
  5500. static-coefficient = <0x4268>;
  5501. dynamic-coefficient = <0x2ee>;
  5502. ts = <0x3e2da 0x2568 0xffffff98 0x04>;
  5503. thermal-zone = "gpu_thermal_zone";
  5504. ss-coefficient = <0x24>;
  5505. ff-coefficient = <0x123>;
  5506. linux,phandle = <0x181>;
  5507. phandle = <0x181>;
  5508. };
  5509. };
  5510.  
  5511. box_start_os0 {
  5512. compatible = "allwinner,box_start_os";
  5513. start_type = <0x01>;
  5514. irkey_used = <0x00>;
  5515. pmukey_used = <0x00>;
  5516. pmukey_num = <0x00>;
  5517. led_power = <0x00>;
  5518. led_state = <0x00>;
  5519. pinctrl-0 = <0xdd>;
  5520. pinctrl-1 = <0xde>;
  5521. };
  5522.  
  5523. __symbols__ {
  5524. clk_losc = "/clocks/losc";
  5525. clk_iosc = "/clocks/iosc";
  5526. clk_hosc = "/clocks/hosc";
  5527. clk_osc48m = "/clocks/osc48m";
  5528. clk_hoscdiv32k = "/clocks/hoscdiv32k";
  5529. clk_pll_periph0div25m = "/clocks/pll_periph0div25m";
  5530. clk_pll_cpu = "/clocks/pll_cpu";
  5531. clk_pll_ddr0 = "/clocks/pll_ddr0";
  5532. clk_pll_ddr1 = "/clocks/pll_ddr1";
  5533. clk_pll_periph0 = "/clocks/pll_periph0";
  5534. clk_pll_periph1 = "/clocks/pll_periph1";
  5535. clk_pll_gpu = "/clocks/pll_gpu";
  5536. clk_pll_video0x4 = "/clocks/pll_video0x4";
  5537. clk_pll_video1 = "/clocks/pll_video1";
  5538. clk_pll_video2 = "/clocks/pll_video2";
  5539. clk_pll_ve = "/clocks/pll_ve";
  5540. clk_pll_de = "/clocks/pll_de";
  5541. clk_pll_csi = "/clocks/pll_csi";
  5542. clk_pll_audiox4 = "/clocks/pll_audiox4";
  5543. clk_pll_periph0x2 = "/clocks/pll_periph0x2";
  5544. clk_pll_periph0x4 = "/clocks/pll_periph0x4";
  5545. clk_periph32k = "/clocks/periph32k";
  5546. clk_pll_periph1x2 = "/clocks/pll_periph1x2";
  5547. clk_pll_audio = "/clocks/pll_audio";
  5548. clk_pll_audiox2 = "/clocks/pll_audiox2";
  5549. clk_pll_video0 = "/clocks/pll_video0";
  5550. clk_pll_video1x4 = "/clocks/pll_video1x4";
  5551. clk_pll_video2x4 = "/clocks/pll_video2x4";
  5552. clk_hoscd2 = "/clocks/hoscd2";
  5553. clk_osc48md4 = "/clocks/osc48md4";
  5554. clk_pll_periph0d6 = "/clocks/pll_periph0d6";
  5555. clk_cpu = "/clocks/cpu";
  5556. clk_axi = "/clocks/axi";
  5557. clk_cpuapb = "/clocks/cpuapb";
  5558. clk_psi = "/clocks/psi";
  5559. clk_ahb1 = "/clocks/ahb1";
  5560. clk_ahb2 = "/clocks/ahb2";
  5561. clk_ahb3 = "/clocks/ahb3";
  5562. clk_apb1 = "/clocks/apb1";
  5563. clk_apb2 = "/clocks/apb2";
  5564. clk_mbus = "/clocks/mbus";
  5565. clk_de = "/clocks/de";
  5566. clk_g2d = "/clocks/g2d";
  5567. clk_di = "/clocks/di";
  5568. clk_gpu0 = "/clocks/gpu0";
  5569. clk_gpu1 = "/clocks/gpu1";
  5570. clk_ce = "/clocks/ce";
  5571. clk_ve = "/clocks/ve";
  5572. clk_dma = "/clocks/dma";
  5573. clk_msgbox = "/clocks/msgbox";
  5574. clk_hwspinlock_rst = "/clocks/hwspinlock_rst";
  5575. clk_hwspinlock_bus = "/clocks/hwspinlock_bus";
  5576. clk_hstimer = "/clocks/hstimer";
  5577. clk_avs = "/clocks/avs";
  5578. clk_dbgsys = "/clocks/dbgsys";
  5579. clk_pwm = "/clocks/pwm";
  5580. clk_iommu = "/clocks/iommu";
  5581. clk_sdram = "/clocks/sdram";
  5582. clk_nand0 = "/clocks/nand0";
  5583. clk_nand1 = "/clocks/nand1";
  5584. clk_sdmmc0_mod = "/clocks/sdmmc0_mod";
  5585. clk_sdmmc0_bus = "/clocks/sdmmc0_bus";
  5586. clk_sdmmc0_rst = "/clocks/sdmmc0_rst";
  5587. clk_sdmmc1_mod = "/clocks/sdmmc1_mod";
  5588. clk_sdmmc1_bus = "/clocks/sdmmc1_bus";
  5589. clk_sdmmc1_rst = "/clocks/sdmmc1_rst";
  5590. clk_sdmmc2_mod = "/clocks/sdmmc2_mod";
  5591. clk_sdmmc2_bus = "/clocks/sdmmc2_bus";
  5592. clk_sdmmc2_rst = "/clocks/sdmmc2_rst";
  5593. clk_uart0 = "/clocks/uart0";
  5594. clk_uart1 = "/clocks/uart1";
  5595. clk_uart2 = "/clocks/uart2";
  5596. clk_uart3 = "/clocks/uart3";
  5597. clk_uart4 = "/clocks/uart4";
  5598. clk_uart5 = "/clocks/uart5";
  5599. clk_twi0 = "/clocks/twi0";
  5600. clk_twi1 = "/clocks/twi1";
  5601. clk_twi2 = "/clocks/twi2";
  5602. clk_twi3 = "/clocks/twi3";
  5603. clk_twi4 = "/clocks/twi4";
  5604. clk_scr0 = "/clocks/scr0";
  5605. clk_spi0 = "/clocks/spi0";
  5606. clk_spi1 = "/clocks/spi1";
  5607. clk_ephy_25m = "/clocks/ephy_25m";
  5608. clk_gmac0 = "/clocks/gmac0";
  5609. clk_gmac1 = "/clocks/gmac1";
  5610. clk_gpadc = "/clocks/gpadc";
  5611. clk_ts = "/clocks/ts";
  5612. clk_ths = "/clocks/ths";
  5613. clk_spdif = "/clocks/spdif";
  5614. clk_dmic = "/clocks/dmic";
  5615. clk_codec_1x = "/clocks/codec_1x";
  5616. clk_codec_4x = "/clocks/codec_4x";
  5617. clk_ahub = "/clocks/ahub";
  5618. clk_usbphy0 = "/clocks/usbphy0";
  5619. clk_usbphy1 = "/clocks/usbphy1";
  5620. clk_usbphy2 = "/clocks/usbphy2";
  5621. clk_usbphy3 = "/clocks/usbphy3";
  5622. clk_usbohci0 = "/clocks/usbohci0";
  5623. clk_usbohci0_12m = "/clocks/usbohci0_12m";
  5624. clk_usbohci1 = "/clocks/usbohci1";
  5625. clk_usbohci1_12m = "/clocks/usbohci1_12m";
  5626. clk_usbohci2 = "/clocks/usbohci2";
  5627. clk_usbohci2_12m = "/clocks/usbohci2_12m";
  5628. clk_usbohci3 = "/clocks/usbohci3";
  5629. clk_usbohci3_12m = "/clocks/usbohci3_12m";
  5630. clk_usbehci0 = "/clocks/usbehci0";
  5631. clk_usbehci1 = "/clocks/usbehci1";
  5632. clk_usbehci2 = "/clocks/usbehci2";
  5633. clk_usbehci3 = "/clocks/usbehci3";
  5634. clk_usb3_0_host = "/clocks/usb3_0_host";
  5635. clk_usbotg = "/clocks/usbotg";
  5636. clk_lradc = "/clocks/lradc";
  5637. clk_hdmi = "/clocks/hdmi";
  5638. clk_hdmi_slow = "/clocks/hdmi_slow";
  5639. clk_hdmi_cec = "/clocks/hdmi_cec";
  5640. clk_display_top = "/clocks/display_top";
  5641. clk_tcon_lcd = "/clocks/tcon_lcd";
  5642. clk_tcon_lcd1 = "/clocks/tcon_lcd1";
  5643. clk_tcon_tv = "/clocks/tcon_tv";
  5644. clk_tcon_tv1 = "/clocks/tcon_tv1";
  5645. clk_lvds = "/clocks/lvds";
  5646. clk_tve = "/clocks/tve";
  5647. clk_tve_top = "/clocks/tve_top";
  5648. clk_csi_top = "/clocks/csi_top";
  5649. clk_csi_master0 = "/clocks/csi_master0";
  5650. clk_csi_master1 = "/clocks/csi_master1";
  5651. clk_hdmi_hdcp = "/clocks/hdmi_hdcp";
  5652. clk_pio = "/clocks/pio";
  5653. clk_cpurcir = "/clocks/cpurcir";
  5654. clk_hosc32k = "/clocks/hosc32k";
  5655. clk_losc_out = "/clocks/losc_out";
  5656. clk_cpurcpus_pll = "/clocks/cpurcpus_pll";
  5657. clk_cpurcpus = "/clocks/cpurcpus";
  5658. clk_cpurahbs = "/clocks/cpurahbs";
  5659. clk_cpurapbs1 = "/clocks/cpurapbs1";
  5660. clk_cpurapbs2_pll = "/clocks/cpurapbs2_pll";
  5661. clk_cpurapbs2 = "/clocks/cpurapbs2";
  5662. clk_cpurpio = "/clocks/cpurpio";
  5663. clk_dcxo_out = "/clocks/dcxo_out";
  5664. clk_stwi = "/clocks/stwi";
  5665. soc = "/soc@03000000";
  5666. r_pio = "/soc@03000000/pinctrl@07022000";
  5667. s_rsb0_pins_a = "/soc@03000000/pinctrl@07022000/s_rsb0@0";
  5668. s_twi0_pins_a = "/soc@03000000/pinctrl@07022000/s_twi0@0";
  5669. s_twi0_pins_b = "/soc@03000000/pinctrl@07022000/s_twi0@1";
  5670. pio = "/soc@03000000/pinctrl@0300b000";
  5671. clk_losc_pins_a = "/soc@03000000/pinctrl@0300b000/clk_losc@0";
  5672. s_cir0_pins_a = "/soc@03000000/pinctrl@0300b000/s_cir0@0";
  5673. vdevice_pins_a = "/soc@03000000/pinctrl@0300b000/vdevice@0";
  5674. uart0_pins_a = "/soc@03000000/pinctrl@0300b000/uart0@0";
  5675. uart0_pins_b = "/soc@03000000/pinctrl@0300b000/uart0@1";
  5676. uart1_pins_a = "/soc@03000000/pinctrl@0300b000/uart1@0";
  5677. uart1_pins_b = "/soc@03000000/pinctrl@0300b000/uart1@1";
  5678. uart2_pins_a = "/soc@03000000/pinctrl@0300b000/uart2@0";
  5679. uart2_pins_b = "/soc@03000000/pinctrl@0300b000/uart2@1";
  5680. uart3_pins_a = "/soc@03000000/pinctrl@0300b000/uart3@0";
  5681. uart3_pins_b = "/soc@03000000/pinctrl@0300b000/uart3@1";
  5682. uart4_pins_a = "/soc@03000000/pinctrl@0300b000/uart4@0";
  5683. uart4_pins_b = "/soc@03000000/pinctrl@0300b000/uart4@1";
  5684. uart5_pins_a = "/soc@03000000/pinctrl@0300b000/uart5@0";
  5685. uart5_pins_b = "/soc@03000000/pinctrl@0300b000/uart5@1";
  5686. twi0_pins_a = "/soc@03000000/pinctrl@0300b000/twi0@0";
  5687. twi0_pins_b = "/soc@03000000/pinctrl@0300b000/twi0@1";
  5688. twi1_pins_a = "/soc@03000000/pinctrl@0300b000/twi1@0";
  5689. twi1_pins_b = "/soc@03000000/pinctrl@0300b000/twi1@1";
  5690. twi2_pins_a = "/soc@03000000/pinctrl@0300b000/twi2@0";
  5691. twi2_pins_b = "/soc@03000000/pinctrl@0300b000/twi2@1";
  5692. twi3_pins_a = "/soc@03000000/pinctrl@0300b000/twi3@0";
  5693. twi3_pins_b = "/soc@03000000/pinctrl@0300b000/twi3@1";
  5694. twi4_pins_a = "/soc@03000000/pinctrl@0300b000/twi4@0";
  5695. twi4_pins_b = "/soc@03000000/pinctrl@0300b000/twi4@1";
  5696. ts0_pins_a = "/soc@03000000/pinctrl@0300b000/ts0@0";
  5697. ts0_pins_b = "/soc@03000000/pinctrl@0300b000/ts0_sleep@0";
  5698. spi0_pins_a = "/soc@03000000/pinctrl@0300b000/spi0@0";
  5699. spi0_pins_b = "/soc@03000000/pinctrl@0300b000/spi0@1";
  5700. spi0_pins_c = "/soc@03000000/pinctrl@0300b000/spi0@2";
  5701. spi1_pins_a = "/soc@03000000/pinctrl@0300b000/spi1@0";
  5702. spi1_pins_b = "/soc@03000000/pinctrl@0300b000/spi1@1";
  5703. spi1_pins_c = "/soc@03000000/pinctrl@0300b000/spi1@2";
  5704. sdc0_pins_a = "/soc@03000000/pinctrl@0300b000/sdc0@0";
  5705. sdc0_pins_b = "/soc@03000000/pinctrl@0300b000/sdc0@1";
  5706. sdc0_pins_c = "/soc@03000000/pinctrl@0300b000/sdc0@2";
  5707. sdc1_pins_a = "/soc@03000000/pinctrl@0300b000/sdc1@0";
  5708. sdc1_pins_b = "/soc@03000000/pinctrl@0300b000/sdc1@1";
  5709. sdc2_pins_a = "/soc@03000000/pinctrl@0300b000/sdc2@0";
  5710. sdc2_pins_b = "/soc@03000000/pinctrl@0300b000/sdc2@1";
  5711. sdc2_pins_c = "/soc@03000000/pinctrl@0300b000/sdc2@2";
  5712. spdif_pins_a = "/soc@03000000/pinctrl@0300b000/spdif@0";
  5713. spdif_pins_b = "/soc@03000000/pinctrl@0300b000/spdif_sleep@0";
  5714. dmic_pins_a = "/soc@03000000/pinctrl@0300b000/dmic@0";
  5715. dmic_pins_b = "/soc@03000000/pinctrl@0300b000/dmic_sleep@0";
  5716. ahub_daudio0_pins_a = "/soc@03000000/pinctrl@0300b000/ahub_daudio0@0";
  5717. ahub_daudio0_pins_b = "/soc@03000000/pinctrl@0300b000/ahub_daudio0_sleep@0";
  5718. ahub_daudio0_pins_c = "/soc@03000000/pinctrl@0300b000/h_ahub_daudio0@0";
  5719. ahub_daudio0_pins_d = "/soc@03000000/pinctrl@0300b000/h_ahub_daudio0_sleep@0";
  5720. ahub_daudio2_pins_a = "/soc@03000000/pinctrl@0300b000/ahub_daudio2@0";
  5721. ahub_daudio2_pins_b = "/soc@03000000/pinctrl@0300b000/ahub_daudio2_sleep@0";
  5722. ahub_daudio3_pins_a = "/soc@03000000/pinctrl@0300b000/ahub_daudio3@0";
  5723. ahub_daudio3_pins_b = "/soc@03000000/pinctrl@0300b000/ahub_daudio3_sleep@0";
  5724. csi1_pins_a = "/soc@03000000/pinctrl@0300b000/csi1@0";
  5725. csi1_pins_b = "/soc@03000000/pinctrl@0300b000/csi1@1";
  5726. csi_mclk0_pins_a = "/soc@03000000/pinctrl@0300b000/csi_mclk0@0";
  5727. csi_mclk0_pins_b = "/soc@03000000/pinctrl@0300b000/csi_mclk0@1";
  5728. csi_cci0_pins_a = "/soc@03000000/pinctrl@0300b000/csi_cci0@0";
  5729. csi_cci0_pins_b = "/soc@03000000/pinctrl@0300b000/csi_cci0@1";
  5730. csi_mclk1_pins_a = "/soc@03000000/pinctrl@0300b000/csi_mclk1@0";
  5731. csi_mclk1_pins_b = "/soc@03000000/pinctrl@0300b000/csi_mclk1@1";
  5732. csi_cci1_pins_a = "/soc@03000000/pinctrl@0300b000/csi_cci1@0";
  5733. csi_cci1_pins_b = "/soc@03000000/pinctrl@0300b000/csi_cci1@1";
  5734. scr0_pins_a = "/soc@03000000/pinctrl@0300b000/scr0@0";
  5735. scr0_pins_b = "/soc@03000000/pinctrl@0300b000/scr0@1";
  5736. scr0_pins_c = "/soc@03000000/pinctrl@0300b000/scr0@2";
  5737. scr1_pins_a = "/soc@03000000/pinctrl@0300b000/scr1@0";
  5738. scr1_pins_b = "/soc@03000000/pinctrl@0300b000/scr1@1";
  5739. scr1_pins_c = "/soc@03000000/pinctrl@0300b000/scr1@2";
  5740. nand0_pins_a = "/soc@03000000/pinctrl@0300b000/nand0@0";
  5741. nand0_pins_b = "/soc@03000000/pinctrl@0300b000/nand0@1";
  5742. nand0_pins_c = "/soc@03000000/pinctrl@0300b000/nand0@2";
  5743. ccir_clk_pin_a = "/soc@03000000/pinctrl@0300b000/ac200@2";
  5744. ccir_clk_pin_b = "/soc@03000000/pinctrl@0300b000/ac200@3";
  5745. gmac_pins_a = "/soc@03000000/pinctrl@0300b000/gmac@0";
  5746. gmac_pins_b = "/soc@03000000/pinctrl@0300b000/gmac@1";
  5747. gmac1_pins_a = "/soc@03000000/pinctrl@0300b000/gmac1@0";
  5748. gmac1_pins_b = "/soc@03000000/pinctrl@0300b000/gmac1@1";
  5749. lvds0_pins_a = "/soc@03000000/pinctrl@0300b000/lvds0@0";
  5750. lvds0_pins_b = "/soc@03000000/pinctrl@0300b000/lvds0@1";
  5751. lvds1_pins_a = "/soc@03000000/pinctrl@0300b000/lvds1@0";
  5752. lvds1_pins_b = "/soc@03000000/pinctrl@0300b000/lvds1@1";
  5753. lvds2link_pins_a = "/soc@03000000/pinctrl@0300b000/lvds2link@0";
  5754. lvds2link_pins_b = "/soc@03000000/pinctrl@0300b000/lvds2link@1";
  5755. rgb24_pins_a = "/soc@03000000/pinctrl@0300b000/rgb24@0";
  5756. rgb24_pins_b = "/soc@03000000/pinctrl@0300b000/rgb24@1";
  5757. pwm5_pin_a = "/soc@03000000/pinctrl@0300b000/pwm5@0";
  5758. pwm5_pin_b = "/soc@03000000/pinctrl@0300b000/pwm5@1";
  5759. standby_red = "/soc@03000000/pinctrl@0300b000/standby@0";
  5760. standby_blue = "/soc@03000000/pinctrl@0300b000/standby@1";
  5761. standby_bt = "/soc@03000000/pinctrl@0300b000/standby@2";
  5762. dma0 = "/soc@03000000/dma-controller@03002000";
  5763. mbus0 = "/soc@03000000/mbus-controller@047fa000";
  5764. msgbox = "/soc@03000000/msgbox@03003000";
  5765. hwspinlock = "/soc@03000000/hwspinlock@3004000";
  5766. s_cir0 = "/soc@03000000/s_cir@07040000";
  5767. soc_timer0 = "/soc@03000000/timer@03009000";
  5768. rtc = "/soc@03000000/rtc@07000000";
  5769. wdt = "/soc@03000000/watchdog@030090a0";
  5770. ve = "/soc@03000000/ve@01c0e000";
  5771. vp9 = "/soc@03000000/vp9@01c00000";
  5772. uart0 = "/soc@03000000/uart@05000000";
  5773. uart1 = "/soc@03000000/uart@05000400";
  5774. uart2 = "/soc@03000000/uart@05000800";
  5775. uart3 = "/soc@03000000/uart@05000c00";
  5776. uart4 = "/soc@03000000/uart@05001000";
  5777. uart5 = "/soc@03000000/uart@05001400";
  5778. twi0 = "/soc@03000000/twi@0x05002000";
  5779. twi1 = "/soc@03000000/twi@0x05002400";
  5780. twi2 = "/soc@03000000/twi@0x05002800";
  5781. twi3 = "/soc@03000000/twi@0x05002c00";
  5782. twi4 = "/soc@03000000/twi@0x05003000";
  5783. twi5 = "/soc@03000000/twi@0x07081400";
  5784. pmu0 = "/soc@03000000/twi@0x07081400/pmu";
  5785. standby_param = "/soc@03000000/twi@0x07081400/pmu/standby_param";
  5786. reg_dcdc1 = "/soc@03000000/twi@0x07081400/pmu/regulators/dcdc1";
  5787. reg_dcdc2 = "/soc@03000000/twi@0x07081400/pmu/regulators/dcdc2";
  5788. reg_dcdc3 = "/soc@03000000/twi@0x07081400/pmu/regulators/dcdc3";
  5789. reg_aldo1 = "/soc@03000000/twi@0x07081400/pmu/regulators/ldo1";
  5790. reg_dldo1 = "/soc@03000000/twi@0x07081400/pmu/regulators/ldo2";
  5791. usbc0 = "/soc@03000000/usbc0@0";
  5792. udc = "/soc@03000000/udc-controller@0x05100000";
  5793. ehci0 = "/soc@03000000/ehci0-controller@0x05101000";
  5794. ohci0 = "/soc@03000000/ohci0-controller@0x05101400";
  5795. usbc1 = "/soc@03000000/usbc1@0";
  5796. ehci1 = "/soc@03000000/ehci1-controller@0x05200000";
  5797. ohci1 = "/soc@03000000/ohci1-controller@0x05200400";
  5798. usbc2 = "/soc@03000000/usbc2@0";
  5799. ehci2 = "/soc@03000000/ehci2-controller@0x05310000";
  5800. ohci2 = "/soc@03000000/ohci2-controller@0x05310400";
  5801. usbc3 = "/soc@03000000/usbc3@0";
  5802. ehci3 = "/soc@03000000/ehci3-controller@0x05311000";
  5803. ohci3 = "/soc@03000000/ohci3-controller@0x05311400";
  5804. ac200_codec = "/soc@03000000/ac200_codec";
  5805. spdif = "/soc@03000000/spdif-controller@0x05093000";
  5806. dmic = "/soc@03000000/dmic-controller@0x05095000";
  5807. codec = "/soc@03000000/codec@0x05096000";
  5808. cpudai = "/soc@03000000/cpudai-controller@0x05096000";
  5809. ahub_cpudai0 = "/soc@03000000/cpudai0-controller@0x05097000";
  5810. ahub_cpudai1 = "/soc@03000000/cpudai1-controller@0x05097000";
  5811. ahub_cpudai2 = "/soc@03000000/cpudai2-controller@0x05097000";
  5812. ahub_cpudai3 = "/soc@03000000/cpudai3-controller@0x05097000";
  5813. ahub_codec = "/soc@03000000/ahub_codec@0x05097000";
  5814. ahub_daudio0 = "/soc@03000000/ahub_daudio0@0x05097000";
  5815. ahub_daudio1 = "/soc@03000000/ahub_daudio1@0x05097000";
  5816. ahub_daudio2 = "/soc@03000000/ahub_daudio2@0x05097000";
  5817. ahub_daudio3 = "/soc@03000000/ahub_daudio3@0x05097000";
  5818. snddaudio0 = "/soc@03000000/sound@0";
  5819. sndhdmi = "/soc@03000000/sound@1";
  5820. snddaudio2 = "/soc@03000000/sound@2";
  5821. snddaudio3 = "/soc@03000000/sound@3";
  5822. sndspdif = "/soc@03000000/sound@4";
  5823. snddmic = "/soc@03000000/sound@5";
  5824. sndcodec = "/soc@03000000/sound@6";
  5825. sndahub = "/soc@03000000/sound@7";
  5826. spi0 = "/soc@03000000/spi@05010000";
  5827. spi1 = "/soc@03000000/spi@05011000";
  5828. pcie = "/soc@03000000/pcie@0x05400000";
  5829. sdc2 = "/soc@03000000/sdmmc@04022000";
  5830. sdc0 = "/soc@03000000/sdmmc@04020000";
  5831. sdc1 = "/soc@03000000/sdmmc@04021000";
  5832. disp = "/soc@03000000/disp@01000000";
  5833. tv0 = "/soc@03000000/tv0@01c94000";
  5834. lcd0 = "/soc@03000000/lcd0@01c0c000";
  5835. lcd1 = "/soc@03000000/lcd1@01c0c001";
  5836. boot_disp = "/soc@03000000/boot_disp";
  5837. hdmi = "/soc@03000000/hdmi@06000000";
  5838. g2d = "/soc@03000000/g2d@01480000";
  5839. soc_tr = "/soc@03000000/tr@01000000";
  5840. pwm = "/soc@03000000/pwm@0300a000";
  5841. pwm0 = "/soc@03000000/pwm0@0300a000";
  5842. pwm1 = "/soc@03000000/pwm1@0300a000";
  5843. pwm2 = "/soc@03000000/pwm2@0300a000";
  5844. pwm3 = "/soc@03000000/pwm3@0300a000";
  5845. pwm4 = "/soc@03000000/pwm4@0300a000";
  5846. pwm5 = "/soc@03000000/pwm5@0300a000";
  5847. ac200 = "/soc@03000000/ac200";
  5848. vind0 = "/soc@03000000/vind@0";
  5849. csi_cci0 = "/soc@03000000/vind@0/cci@0";
  5850. csi_cci1 = "/soc@03000000/vind@0/cci@1";
  5851. csi0 = "/soc@03000000/vind@0/csi@0";
  5852. csi1 = "/soc@03000000/vind@0/csi@1";
  5853. mipi0 = "/soc@03000000/vind@0/mipi@0";
  5854. isp0 = "/soc@03000000/vind@0/isp@0";
  5855. isp1 = "/soc@03000000/vind@0/isp@1";
  5856. scaler0 = "/soc@03000000/vind@0/scaler@0";
  5857. scaler1 = "/soc@03000000/vind@0/scaler@1";
  5858. scaler2 = "/soc@03000000/vind@0/scaler@2";
  5859. scaler3 = "/soc@03000000/vind@0/scaler@3";
  5860. scaler4 = "/soc@03000000/vind@0/scaler@4";
  5861. scaler5 = "/soc@03000000/vind@0/scaler@5";
  5862. actuator0 = "/soc@03000000/vind@0/actuator@0";
  5863. flash0 = "/soc@03000000/vind@0/flash@0";
  5864. sensor0 = "/soc@03000000/vind@0/sensor@0";
  5865. sensor1 = "/soc@03000000/vind@0/sensor@1";
  5866. vinc0 = "/soc@03000000/vind@0/vinc@0";
  5867. vinc1 = "/soc@03000000/vind@0/vinc@1";
  5868. vinc2 = "/soc@03000000/vind@0/vinc@2";
  5869. vinc3 = "/soc@03000000/vind@0/vinc@3";
  5870. vinc4 = "/soc@03000000/vind@0/vinc@4";
  5871. vinc5 = "/soc@03000000/vind@0/vinc@5";
  5872. Vdevice = "/soc@03000000/vdevice@0";
  5873. emce = "/soc@03000000/emce@01905000";
  5874. cryptoengine = "/soc@03000000/ce@1904000";
  5875. di = "/soc@03000000/deinterlace@0x01420000";
  5876. scr0 = "/soc@03000000/smartcard@0x05005000";
  5877. nand0 = "/soc@03000000/nand0@04011000";
  5878. ts0 = "/soc@03000000/ts0@05060000";
  5879. ths = "/soc@03000000/thermal_sensor";
  5880. cpu_trips = "/soc@03000000/thermal-zones/cpu_thermal_zone/trips";
  5881. cpu_threshold = "/soc@03000000/thermal-zones/cpu_thermal_zone/trips/trip-point@0";
  5882. cpu_target = "/soc@03000000/thermal-zones/cpu_thermal_zone/trips/trip-point@1";
  5883. cpu_crit = "/soc@03000000/thermal-zones/cpu_thermal_zone/trips/cpu_crit@0";
  5884. gpadc = "/soc@03000000/gpadc";
  5885. keyboard0 = "/soc@03000000/keyboard";
  5886. gmac0 = "/soc@03000000/eth@05020000";
  5887. gmac1 = "/soc@03000000/eth@05030000";
  5888. gpio_encrypt = "/soc@03000000/gpio_encrypt";
  5889. wlan = "/soc@03000000/wlan";
  5890. bt = "/soc@03000000/bt";
  5891. btlpm = "/soc@03000000/btlpm";
  5892. addr_mgt = "/soc@03000000/addr_mgt";
  5893. aliases = "/aliases";
  5894. cpu0 = "/cpus/cpu@0";
  5895. CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
  5896. cpu_opp_l_table = "/opp_l_table";
  5897. dram = "/dram";
  5898. gic = "/interrupt-controller@03020000";
  5899. wakeupgen = "/interrupt-controller@0";
  5900. nmi_intc = "/intc-nmi@07010320";
  5901. sid = "/sunxi-sid@03006000";
  5902. speedbin_efuse = "/sunxi-sid-ng@03006000/speed@00";
  5903. ths_calib = "/sunxi-sid-ng@03006000/calib@14";
  5904. chipid = "/sunxi-chipid@03006200";
  5905. uboot = "/uboot";
  5906. mmu_aw = "/iommu@030f0000";
  5907. gpu = "/gpu@0x01800000";
  5908. ipa_dvfs = "/gpu@0x01800000/ipa_dvfs";
  5909. };
  5910. };
  5911.  
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